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Intel 8087 Math-Coprocessor
DEPARTMENT OF BIOMEDICAL ENGINEERING , KUET
Course teachers:
Monika Gope
Assistant Professor
Institute of Information and
Communication Technology
Fazla Rabbi Mashrur
1515020
A PRESENTATION ON
Presented by:
1
01
Introduction
▪ 8087 was the first math coprocessor for 16-bit
processors designed by Intel
▪ It was built to pair with 8086 and 8088.
▪ The purpose of 8087 was to speed up the
computations involving floating point
calculations.
▪ Addition, subtraction, multiplication and division
of simple numbers is not the coprocessor’s job.
▪ It does all the calculations involving floating
point numbers like scientific calculations and
algebraic functions.
Introduction
▪ By having a coprocessor, which performs all the calculations, it can
free up a lot of CPU’s time.
▪ This would allow the CPU to focus all of its resources on the other
functions it has to perform.
▪ This increases the overall speed and performance of the entire
system.
▪ This coprocessor introduced about 60 new instructions available to
the programmer.
Data Type
▪ Binary Integer
▪ Word integer16 bitsDW(Define Word)
▪ Short integer 32 bitsDD(Define DoubleWord)
▪ Long Integer 64 bitsDQ(Define Quadword)
Cont.
Packed Decimal Numbers
▪ Packed Decimal80 bitsDT(Define TenBytes)
Cont.
Real Numbers
▪ Short real32 bitsDD(Define DoubleWord)
▪ Long Real 64 bitsDD(Define QuadWord)
▪ Temporary Real 80 bitsDT(Define TenBytes)
Single bit Precision
The single precision floating point unit is a packet of 32 bits,
divided into three sections one bit, eight bits, and twenty-three bits
Cont.
Let’s convert and learn
Pick a decimal number : 43.625
Binary of this number is :101011.101
represent it in floating point notation :1.01011101 * 25
Cont.
Sign Field
The first section is one bit long, and is the sign bit. It is either 0 or 1; 0
indicates that the number is positive, 1 negative. The number
1.01011101 * 25 is positive, so this field would have a value of 0.
Cont.
Exponent Field
The second section is eight bits long. In our 1.01011101 x 25 number,
the eight-bit exponent field would have a decimal value of 5 + 127 =
132. In binary this is 10000100.
Cont.
Mantissa Field
The third section is twenty-three bits long, and serves as the
"mantissa." (The mantissa is sometimes called the significand.) The
mantissa is merely the "other stuff" to the left of the 2aterm in our
binary number represented in scientific notation. In our 1.01011101
* 25 number and our mantissa for our number would in fact be
01011101000000000000000.
Internal Architecture
▪ 8087 coprocessor is designed to operate with 8086
microprocessor.
▪ The microprocessor and coprocessor can execute their respective
instructions simultaneously.
▪ Microprocessor interprets and executes the normal instruction set
and the coprocessor interprets and executes only the coprocessor
instructions.
Cont.
Cont.
▪ The internal structure of 8087 coprocessor is divided into two
major sections:
▪ Control Unit (CU)
▪ Numerical Execution Unit (NEU)
Control Unit (CU)
▪ It interfaces coprocessor to the microprocessor system bus.
▪ It also synchronize the operation of the coprocessor and the
microprocessor.
▪ This unit has a Control Word, Status Word and Data Buffer.
▪ If an instruction is ESC instruction, then coprocessor executes it.
▪ If not, then microprocessor executes.
Numeric Execution Unit (NEU)
▪ This unit is responsible for executing all coprocessor instructions.
▪ It has an 8 register stack that holds the operands for instructions
and result of instructions.
▪ The stack contains 8 registers that are 80-bits wide.
▪ Numeric data is transferred inside the coprocessor in two parts:
▪ 64-bit mantissa bus
▪ 16-bit exponent bus
Status Register
Cont.
▪ Status Register tells the overall status of 8087 coprocessor.
▪ It is a 16-bit register.
▪ It is accessed by executing the FSTSW instruction.
▪ This instruction stores the contents of status register into memory.
▪ Once the status is stored in memory, the bit positions of the status
register can be examined.
Cont.
▪ Busy: It indicates that the coprocessor is busy executing the task.
▪ Condition Codes (C0-C3): They indicate various conditions about the
coprocessor.
▪ Top of Stack: It indicates a register as top of stack register, out of
the eight stack registers.
▪ Exception Flag: It is set if any of the exception flag bits (SF, PR, UF,
OF, ZD, DN, IO) are set.
Cont.
▪ Stack Fault: It is not available in 8087. It is active only in 80387
and above.
▪ Precision: It indicates that the result has exceeded the selected
precision.
▪ Underflow: It tells if the result is too small to fit in a register.
▪ Overflow: It tells if the result is too large to fit in a register.
Cont.
▪ Zero Divide: It indicates that you try to divide a non-zero value by
zero.
▪ Denormalized: It indicates that at least one of the operand is de-
normalized.
▪ Invalid Operation: It indicates an invalid operation.
Control Register
20-Nov-1022
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Control Register
▪ Control Register controls the operating modes of 8087.
▪ It is also a 16-bit register.
▪ It performs rounding control and precision control.
▪ It is also used to do masking and unmasking of the
exception bits that correspond to the rightmost six bits of
the status register.
▪ FLDCW instruction is used to load the value into control
register.
20-Nov-1023
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es.com
Control Register
▪ Rounding Control: It determines the type of rounding
or truncating to be done.
▪ Precision Control: It sets the precision of the result.
▪ Exception Masks: It determines that whether an error
effects the exception bits in the status register.
▪ If it is one, then the corresponding error is ignored.
▪ If it is zero and the corresponding error occurs, then it
generates an interrupt, and the corresponding bit in
status register is set.
24
Tag Register
▪ Tag Register is used to indicate the contents of each
register in the stack.
▪ There are total 8 tags (Tag 0 to Tag 7) in this register
and each tag uses 2 bits to represent a value.
▪ Therefore, it is a 16-bit register.
20-Nov-1025
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Tag Values:
00 = Valid
01 = Zero
10 = Invalid
11 = Empty
TAG 7 TAG 6 TAG 5 TAG 4 TAG 3 TAG 2 TAG 1 TAG 0
Pin Diagram of 8087
20-Nov-1026
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8
0
8
7
GND
GND
CLK
NC
NC
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
VCC
AD15
A16/S3
A17/S4
A18/S5
A19/S6
BHE/S7
RQ/GT1
INT
RQ/GT0
NC
NC
S2
S1
S0
QS0
QS1
BUSY
READY
RESET
Interfacing of 8086 and 8087
▪ 8087 can be connected with CPU only in
max.mode,i.e when MN/MX pin is grounded.
▪ In max. mode, all control signals are derived using a
bus controller.
▪ Multiplexed address-data bus lines are connected
directly from the 8086 to 8087.
▪ The status lines and the queue status lines
connected directly from 8086 to 8087.
▪ The QS0 and QS1 lines may be directly connected to
corresponding pins in case of 8086/88 based
systems.
20-Nov-1027
www.eazynot
es.com
Cont.
▪ The Request/Grant signal RQ/GT0 of 8087 is connected to
RQ/GT1 of 8086.
▪ The clock pin of 8087 connected with CPU 8086/88 clock i/p.
▪ The interrupt o/p of 8087 is routed to 8086/88 via a
programmable interrupt controller.
▪ The pins AD0-AD15,BHE/S7,RESET,A19/S6-A16/S3 r
connected to corresponding pins of 8086
▪ BUSY signal 8087 is connected to TEST pin of 8086.
Cont.
▪ Interrupt o/p INT of the 8087 to NMI input of 8086. This intimates
an error condition
▪ A WAIT instruction is passed to keep looking at its TEST pin, until it
finds pin Low to indicates that the 8087 has completed the
computation.
▪ SYNCHRONIZATION must be established between the processor
and coprocessor in

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Math coprocessor 8087

  • 1. Intel 8087 Math-Coprocessor DEPARTMENT OF BIOMEDICAL ENGINEERING , KUET Course teachers: Monika Gope Assistant Professor Institute of Information and Communication Technology Fazla Rabbi Mashrur 1515020 A PRESENTATION ON Presented by: 1 01
  • 2. Introduction ▪ 8087 was the first math coprocessor for 16-bit processors designed by Intel ▪ It was built to pair with 8086 and 8088. ▪ The purpose of 8087 was to speed up the computations involving floating point calculations. ▪ Addition, subtraction, multiplication and division of simple numbers is not the coprocessor’s job. ▪ It does all the calculations involving floating point numbers like scientific calculations and algebraic functions.
  • 3. Introduction ▪ By having a coprocessor, which performs all the calculations, it can free up a lot of CPU’s time. ▪ This would allow the CPU to focus all of its resources on the other functions it has to perform. ▪ This increases the overall speed and performance of the entire system. ▪ This coprocessor introduced about 60 new instructions available to the programmer.
  • 4. Data Type ▪ Binary Integer ▪ Word integer16 bitsDW(Define Word) ▪ Short integer 32 bitsDD(Define DoubleWord) ▪ Long Integer 64 bitsDQ(Define Quadword)
  • 5. Cont. Packed Decimal Numbers ▪ Packed Decimal80 bitsDT(Define TenBytes)
  • 6. Cont. Real Numbers ▪ Short real32 bitsDD(Define DoubleWord) ▪ Long Real 64 bitsDD(Define QuadWord) ▪ Temporary Real 80 bitsDT(Define TenBytes)
  • 7. Single bit Precision The single precision floating point unit is a packet of 32 bits, divided into three sections one bit, eight bits, and twenty-three bits
  • 8. Cont. Let’s convert and learn Pick a decimal number : 43.625 Binary of this number is :101011.101 represent it in floating point notation :1.01011101 * 25
  • 9. Cont. Sign Field The first section is one bit long, and is the sign bit. It is either 0 or 1; 0 indicates that the number is positive, 1 negative. The number 1.01011101 * 25 is positive, so this field would have a value of 0.
  • 10. Cont. Exponent Field The second section is eight bits long. In our 1.01011101 x 25 number, the eight-bit exponent field would have a decimal value of 5 + 127 = 132. In binary this is 10000100.
  • 11. Cont. Mantissa Field The third section is twenty-three bits long, and serves as the "mantissa." (The mantissa is sometimes called the significand.) The mantissa is merely the "other stuff" to the left of the 2aterm in our binary number represented in scientific notation. In our 1.01011101 * 25 number and our mantissa for our number would in fact be 01011101000000000000000.
  • 12. Internal Architecture ▪ 8087 coprocessor is designed to operate with 8086 microprocessor. ▪ The microprocessor and coprocessor can execute their respective instructions simultaneously. ▪ Microprocessor interprets and executes the normal instruction set and the coprocessor interprets and executes only the coprocessor instructions.
  • 13. Cont.
  • 14. Cont. ▪ The internal structure of 8087 coprocessor is divided into two major sections: ▪ Control Unit (CU) ▪ Numerical Execution Unit (NEU)
  • 15. Control Unit (CU) ▪ It interfaces coprocessor to the microprocessor system bus. ▪ It also synchronize the operation of the coprocessor and the microprocessor. ▪ This unit has a Control Word, Status Word and Data Buffer. ▪ If an instruction is ESC instruction, then coprocessor executes it. ▪ If not, then microprocessor executes.
  • 16. Numeric Execution Unit (NEU) ▪ This unit is responsible for executing all coprocessor instructions. ▪ It has an 8 register stack that holds the operands for instructions and result of instructions. ▪ The stack contains 8 registers that are 80-bits wide. ▪ Numeric data is transferred inside the coprocessor in two parts: ▪ 64-bit mantissa bus ▪ 16-bit exponent bus
  • 18. Cont. ▪ Status Register tells the overall status of 8087 coprocessor. ▪ It is a 16-bit register. ▪ It is accessed by executing the FSTSW instruction. ▪ This instruction stores the contents of status register into memory. ▪ Once the status is stored in memory, the bit positions of the status register can be examined.
  • 19. Cont. ▪ Busy: It indicates that the coprocessor is busy executing the task. ▪ Condition Codes (C0-C3): They indicate various conditions about the coprocessor. ▪ Top of Stack: It indicates a register as top of stack register, out of the eight stack registers. ▪ Exception Flag: It is set if any of the exception flag bits (SF, PR, UF, OF, ZD, DN, IO) are set.
  • 20. Cont. ▪ Stack Fault: It is not available in 8087. It is active only in 80387 and above. ▪ Precision: It indicates that the result has exceeded the selected precision. ▪ Underflow: It tells if the result is too small to fit in a register. ▪ Overflow: It tells if the result is too large to fit in a register.
  • 21. Cont. ▪ Zero Divide: It indicates that you try to divide a non-zero value by zero. ▪ Denormalized: It indicates that at least one of the operand is de- normalized. ▪ Invalid Operation: It indicates an invalid operation.
  • 23. Control Register ▪ Control Register controls the operating modes of 8087. ▪ It is also a 16-bit register. ▪ It performs rounding control and precision control. ▪ It is also used to do masking and unmasking of the exception bits that correspond to the rightmost six bits of the status register. ▪ FLDCW instruction is used to load the value into control register. 20-Nov-1023 www.eazynot es.com
  • 24. Control Register ▪ Rounding Control: It determines the type of rounding or truncating to be done. ▪ Precision Control: It sets the precision of the result. ▪ Exception Masks: It determines that whether an error effects the exception bits in the status register. ▪ If it is one, then the corresponding error is ignored. ▪ If it is zero and the corresponding error occurs, then it generates an interrupt, and the corresponding bit in status register is set. 24
  • 25. Tag Register ▪ Tag Register is used to indicate the contents of each register in the stack. ▪ There are total 8 tags (Tag 0 to Tag 7) in this register and each tag uses 2 bits to represent a value. ▪ Therefore, it is a 16-bit register. 20-Nov-1025 www.eazynot es.com Tag Values: 00 = Valid 01 = Zero 10 = Invalid 11 = Empty TAG 7 TAG 6 TAG 5 TAG 4 TAG 3 TAG 2 TAG 1 TAG 0
  • 26. Pin Diagram of 8087 20-Nov-1026 www.eazynot es.com 8 0 8 7 GND GND CLK NC NC AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 VCC AD15 A16/S3 A17/S4 A18/S5 A19/S6 BHE/S7 RQ/GT1 INT RQ/GT0 NC NC S2 S1 S0 QS0 QS1 BUSY READY RESET
  • 27. Interfacing of 8086 and 8087 ▪ 8087 can be connected with CPU only in max.mode,i.e when MN/MX pin is grounded. ▪ In max. mode, all control signals are derived using a bus controller. ▪ Multiplexed address-data bus lines are connected directly from the 8086 to 8087. ▪ The status lines and the queue status lines connected directly from 8086 to 8087. ▪ The QS0 and QS1 lines may be directly connected to corresponding pins in case of 8086/88 based systems. 20-Nov-1027 www.eazynot es.com
  • 28. Cont. ▪ The Request/Grant signal RQ/GT0 of 8087 is connected to RQ/GT1 of 8086. ▪ The clock pin of 8087 connected with CPU 8086/88 clock i/p. ▪ The interrupt o/p of 8087 is routed to 8086/88 via a programmable interrupt controller. ▪ The pins AD0-AD15,BHE/S7,RESET,A19/S6-A16/S3 r connected to corresponding pins of 8086 ▪ BUSY signal 8087 is connected to TEST pin of 8086.
  • 29. Cont. ▪ Interrupt o/p INT of the 8087 to NMI input of 8086. This intimates an error condition ▪ A WAIT instruction is passed to keep looking at its TEST pin, until it finds pin Low to indicates that the 8087 has completed the computation. ▪ SYNCHRONIZATION must be established between the processor and coprocessor in