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 Instruction classification,
 Instruction set,
 Addressing Modes: Immediate, register, direct, indirect
and relative,
 assembler directives (org, end), features with example,
 I/O Bit & Byte programming using assembly language for
LED and seven segment display (SSD) interfacing.
 Introduction to 8051 programming in C
Prepared By Mrs. Pallavi Mahagaonkar
Chapter 2
Programming Model
 An 8051 Instruction consists of an Opcode (short of
Operation – Code) followed by Operand(s) of size Zero
Byte, One Byte or Two Bytes Instruction set
 The Op-Code part of the instruction contains the Mnemonic,
which specifies the type of operation to be performed.
 OPCODE DESTINATION, SOURCE
 MOV A, #20H
 MOV A , #01101011B
Prepared By Mrs. Pallavi Mahagaonkar
 DB (define byte)
 ORG (origin)
 EQU (equate)
 END
Prepared By Mrs. Pallavi Mahagaonkar
 ORG (origin) The ORG directive is used to indicate the
beginning of the address.
 The number that comes after ORG can be either in hex or
in decimal.
 If the number is not followed by H, it is decimal and the
assembler will convert it to hex
Prepared By Mrs. Pallavi Mahagaonkar
 END directive Another important pseudocode is the END
directive.
 This indicates to the assembler the end of the source (asm)
file.
 The END directive is the last line of an 8051 program,
meaning that in the source code anything after the END
directive is ignored by the assembler.
Prepared By Mrs. Pallavi Mahagaonkar
 DB (define byte): The DB directive is the most widely
used data directive in the assembler.
 It is used to define the 8-bit data.
 When DB is used to define data, the numbers can be in
decimal, binary, hex, or ASCII formats.
Prepared By Mrs. Pallavi Mahagaonkar
 EQU (equate) This is used to define a constant without
occupying a memory location.
 The EQU directive does not set aside storage for a data
item but associates a constant value with a data label so
that when the label appears in the program, its constant
value will be substituted for the label.
 The following uses EQU for the counter constant and then
the constant is used to load the R3 register. When
executing the instruction “MOV R3, #COUNT”, the register
R3 will be loaded with the value 25 (notice the # sign).
Prepared By Mrs. Pallavi Mahagaonkar
 Data Transfer Instructions
 Arithmetic Instructions
 Logical Instructions
 Boolean or Bit Manipulation Instructions
 Program Branching Instructions
Prepared By Mrs. Pallavi Mahagaonkar
 The Data Transfer Instructions are associated with transfer
with data between registers or external program memory
or external data memory. The Mnemonics associated with
Data Transfer are given below
MOV
MOVC
MOVX
PUSH
POP
XCH
XCHD
Prepared By Mrs. Pallavi Mahagaonkar
ADD A, #32H
This is an instruction of type ADD A, #d8. The immediate data
32H is added to register A. The result is also stored in A.
ADDC A, @R1
This is an instruction of type ADDC A, @Ri. It means the content
on internal RAM location which is pointed by register R1 is added
to A.
SUBB A, R5
This is SUBB A, Rn type instruction. The SUBB stands for Subtract
with borrow. So the content of R5 will be subtracted from A.
INC A Increment A by 1
DEC A Decrement A by 1
Prepared By Mrs. Pallavi Mahagaonkar
MUL AB
This instruction is used to multiply the content of register A and
B. The 16-bit address will be stored at B and A registers. The B
will hold the MSByte and A will hold the LSByte
ORG 00H
MOV A, #55H
MOV B,#10H
MUL AB
Prepared By Mrs. Pallavi Mahagaonkar
DIV AB
This instruction is used to divide the content of A register by B
register. The 8-bit quotient is stored into the register A, and the
8-bit remainder is stored into the register B.
ORG 00H
MOV A, #15H
MOV B,#02H
DIV AB
Prepared By Mrs. Pallavi Mahagaonkar
 ANL---AND
 ORL
 XRL----XOR
 CPL---Complement
 CJNE Dest>Source CY=0
A=23H 0010 0011
B=FFH 1111 1111
ORL 1111 1111
04H
30H
Prepared By Mrs. Pallavi Mahagaonkar
 Compare & Jump Not Equal
Org 00h
MOV A, #07H
CJNE A, #45H, SYF
MOV B, #30H
CPL A
SYF: MOV A, #30H
MOV B, #0FFH
ADD A, B
END
 Repeating a sequence of instruction a certain number of times is called loop
 In 8051, the loop action is performed by the instruction “DJNZ reg,label”
 Example: Write a program to clear Accumulator and then ADD 3 to the accumulator
10 times
ORG 00H
MOV A, #00
ADD A, #03
ADD A, #03
ADD A, #03
ADD A, #03
ADD A, #03
ADD A, #03
ADD A, #03
ADD A, #03
ADD A, #03
ADD A, #03
ORG 00H
MOV A,#00
MOV R2,#10
AGAIN: ADD A, #3
DJNZ R2, AGAIN
MOV R5, A
END
 There are 3 types of jump instructions:
Relative Jump
Short Absolute Jump
Long Absolute Jump
Relative Jump –
 SJMP
 JBC Jump if bit = 1 and clear bit
 JNB Jump if bit = 0
 JB Jump if bit = 1
 JNC Jump if CY = 0
 JC Jump if CY = 1
 CJNE reg,#data Jump if byte ≠ #data
 CJNE A,byte Jump if A ≠ byte
 DJNZ Decrement and Jump if A ≠ 0
 JNZ Jump if A ≠ 0
 JZ Jump if A = 0 JZ <relative address>
 JNZ <relative address>
 Bit level JUMP instructions will check the conditions of the bit and
if condition is true, it jumps to the address specified in the
instruction. All the bit jumps are relative jumps.
 JB bit, rel ; jump if the direct bit is set to the relative address
specified.
 JNB bit, rel ; jump if the direct bit is clear to the relative address
specified.
 JBC bit, rel ; jump if the direct bit is set to the relative address
specified and then clear the bit
Prepared By Mrs. Pallavi Mahagaonkar
LOGICAL AND
ANL C,BIT(BIT ADDRESS) ; ‘LOGICALLY AND’ CARRY AND
CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY
ANL C, /BIT; ; ‘LOGICALLY AND’ CARRY AND COMPLEMENT OF
CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY
LOGICAL OR
ORL C,BIT(BIT ADDRESS) ; ‘LOGICALLY OR’ CARRY AND
CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY
ORL C, /BIT; ; ‘LOGICALLY OR’ CARRY AND COMPLEMENT OF
CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY
CLR bit
CLR bit ; CONTENT OF BIT ADDRESS SPECIFIED WILL BE
CLEARED.
CLR C ; CONTENT OF CARRY WILL BE CLEARED.
CPL bit
CPL bit ; CONTENT OF BIT ADDRESS SPECIFIED WILL BE
COMPLEMENTED
CPL C ; CONTENT OF CARRY WILL BE COMPLEMENTED
Prepared By Mrs. Pallavi Mahagaonkar
Org 00h
MOV P0, #25H
MOV P1, #35H
MOV P2,#00H
MOV P3, #0FFH
 Immediate Addressing Mode
 Register Addressing Mode
 Direct Addressing Mode
 Register Indirect Addressing Mode
 Indexed Addressing Mode
 Implied Addressing Mode
Prepared By Mrs. Pallavi Mahagaonkar
 In these instructions, the # symbol is used for immediate data
 The data is provided immediately after the opcode.
 These are some examples of Immediate Addressing Mode.
MOV A, #0AFH
MOV R3, #45H
MOV DPTR, #FE00H
 In the last instruction, there is DPTR. The DPTR stands for
Data Pointer
 Using this, it points the external data memory location
Prepared By Mrs. Pallavi Mahagaonkar
 In the register addressing mode the source or destination data
should be present in a register (R0 to R7).
 These are some examples of Register Addressing Mode
MOV A, R5
MOV R2, #45H
MOV R0, A
Prepared By Mrs. Pallavi Mahagaonkar
 In the Direct Addressing Mode, the source or destination
address is specified by using 8-bit data in the instruction. Only
the internal data memory can be used in this mode.
 Here some of the examples of direct Addressing Mode.
MOV 80H, R6
MOV R2, 45H
MOV R0, 05H
 The first instruction will send the content of registerR6 to port
P0 (Address of Port 0 is 80H).
 The second one is forgetting content from 45H to R2.
 The third one is used to get data from Register R5 (When
register bank RB0 is selected) to register R5.
Prepared By Mrs. Pallavi Mahagaonkar
 In this mode, the source or destination address is given in the
register.
 By using register indirect addressing mode, the internal or
external addresses can be accessed.
 The R0 and R1 are used for 8-bit addresses, and DPTR is used
for 16-bit addresses, no other registers can be used for
addressing purposes.
 Let us see some examples of this mode.
MOVX A, @R1
MOV@DPTR, A
Prepared By Mrs. Pallavi Mahagaonkar
 In the indexed addressing mode, the source memory can only
be accessed from program memory only.
 The destination operand is always the register A.
 These are some examples of Indexed addressing mode.
MOVC A, @A+PC
MOVC A, @A+DPTR
 The C in MOVC instruction refers to code byte. For the first
instruction, let us consider A holds 30H. And the PC value
is1125H. The contents of program memory location 1155H
(30H + 1125H) are moved to register A.
Prepared By Mrs. Pallavi Mahagaonkar
 In the implied addressing mode, there will be a single operand.
 These types of instruction can work on specific registers only.
These types of instructions are also known as register specific
instruction.
 Here are some examples of Implied Addressing Mode.
RLA
SWAPA
 These are 1- byte instruction. The first one is used to rotate the A
register content to the Left.
 The second one is used to swap the nibbles in A.
Prepared By Mrs. Pallavi Mahagaonkar
 FFH value INPUT and if 00H output
 Write a program to get byte from P0 and send it to P1
ORG 00H ;originate program at 00h location
MOV A, #0FFH ;move FFH into Accumulator
MOV P0,A ;Make P0 as input port
BACK: MOV A, P0
MOV P1,A
SJMP BACK
Example: Make Port 2 as output port
org 00h
mov p2,#00h ;make p2 as output port
P0,P1,P2,P3-----Input then FFH
------Output then 00H
Prepared By Mrs. Pallavi Mahagaonkar
Write a program to toggle all bits of P1 Continuously
P1 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0
1 0 1 0 1 0 1 0 AAH
0 1 0 1 0 1 0 1 55H
ORG 00H
AGAIN: MOV P1,#0AAH
MOV P1, #55H
SJMP AGAIN
Prepared By Mrs. Pallavi Mahagaonkar
Write a program to toggle all bits of P1 Continuously
ORG 00H
BACK: MOV P1,#55H
ACALL DELAY
MOV P1,#0FFH
ACALL DELAY
SJMP BACK
DELAY: MOV R1,#255
AGAIN: DJNZ R1,AGAIN
RET
Prepared By Mrs. Pallavi Mahagaonkar
Single bit Addressability
Prepared By Mrs. Pallavi Mahagaonkar
Write the following programs:
a. Create a square wave of 50% duty cycle on bit 0 of port 1
The 50% duty cycle means that the on and off states have the
same length
ORG 00H
HERE: SETB P1.0
ACALL DELAY
CLR P1.0
ACALL DELAY
SJMP HERE
DELAY: MOV R2,#0FFH
BACK: DJNZ R2,BACK
Prepared By Mrs. Pallavi Mahagaonkar
LED is connected to port 3 pin 7 write a program to blink LED with some
delay. Draw interfacing diagram
ALGORITHM:
1. Originate program ORG 00H
2. Make led on BACK: SETB P3.7
3. Call delay or wait ACALL DELAY
4. Make led off CLR P3.7
5. Call delay or wait ACALL DELAY
6. Go to step no 2 SJMP BACK
7. Write delay function
Prepared By Mrs. Pallavi Mahagaonkar
LED is connected to port 3 pin 7 write a program to blink LED with some delay. Draw
interfacing diagram
ORG 00H
AGAIN: SETB P3.7
ACALL DELAY
CLER P3.7
ACALL DELAY
SJMP AGAIN
DELAY: MOV R0,#9
BACK1: MOV R1,#0FFH
BACK2: DJNZ R1,BACK2
DJNZ R0,BACK1
RET
Prepared By Mrs. Pallavi Mahagaonkar
Write a program to switch ON and OFF two LED’s alternately. Also draw interfacing diagram. First
LED is connected at pin 1 of port 3(P3.1) and second LED is connected at pin 3 of port 3(P3.3)
ORG 00H
AGAIN : SETB P3.1 ;FIRST LED ON
CLR P3.3 ;SECOND LED OFF
ACALL DELAY
CLR P3.1 ;FIRST LED OFF
SETB P3.3 ;SECOND LED ON
SJMP AGAIN
DELAY: MOV R0,#120
BACK1: MOV R1,#0FFH
BACK: DJNZ R1, BACK
DJNZ R0,BACK1
RET
END
Prepared By Mrs. Pallavi Mahagaonkar
Write a program to switch ON and OFF two LED’s alternately. Also draw interfacing diagram. First LED is connected
at pin 1 of port 3 and second LED is connected at pin 3 of port 3
ORG 00H
AGAIN: SETB P3.1
CLR P3.3
ACALL DELAY
CLR P3.1
SETB P3.3
ACALL DELAY
SJMP AGAIN
DELAY: MOV R0,#9
BACK1: MOV R1,#0FFH
BACK2: DJNZ R1,BACK2
DJNZ R0,BACK1
RET
Prepared By Mrs. Pallavi Mahagaonkar
Prepared By Mrs. Pallavi Mahagaonkar
ORG 00H
AGAIN: MOV A, #00H
UP: MOV P2,A ;P2=01H
ACALL DELAY
INC A ;A=01H
CJNE A,#0AH,UP ;A =01 Source=0AH Not equal so jmp to titile UP
SJMP AGAIN
DELAY: MOV R0,#9
BACK1: MOV R1,#0FFH
BACK2: DJNZ R1,BACK2
DJNZ R0,BACK1
RET
Prepared By Mrs. Pallavi Mahagaonkar
Why C?
 Processor independent:
C language is not specific to any microprocessor/micro-controller or
any system.
It can work on various hardware configuration. C doesn’t require same
set of hardware to run a program
 Performance: C code gets compiled into raw binary executable which
can be directly loaded into memory and executed.
 Bit manipulation:
C is more flexible, structured language that provides “low level bit
wise data manipulation” using the bit-wise operators.
Using bit-wise operators, one could play with available bits, which
comes handy when it comes to Embedded Systems
Prepared By Mrs. Pallavi Mahagaonkar
Write n 8051 C program to toggle all the bits of P1 continuously with
some delay
P1=55H
P1=0AAH
Prepared By Mrs. Pallavi Mahagaonkar

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The 8051 microcontroller

  • 1.  Instruction classification,  Instruction set,  Addressing Modes: Immediate, register, direct, indirect and relative,  assembler directives (org, end), features with example,  I/O Bit & Byte programming using assembly language for LED and seven segment display (SSD) interfacing.  Introduction to 8051 programming in C Prepared By Mrs. Pallavi Mahagaonkar
  • 3.  An 8051 Instruction consists of an Opcode (short of Operation – Code) followed by Operand(s) of size Zero Byte, One Byte or Two Bytes Instruction set  The Op-Code part of the instruction contains the Mnemonic, which specifies the type of operation to be performed.  OPCODE DESTINATION, SOURCE  MOV A, #20H  MOV A , #01101011B Prepared By Mrs. Pallavi Mahagaonkar
  • 4.  DB (define byte)  ORG (origin)  EQU (equate)  END Prepared By Mrs. Pallavi Mahagaonkar
  • 5.  ORG (origin) The ORG directive is used to indicate the beginning of the address.  The number that comes after ORG can be either in hex or in decimal.  If the number is not followed by H, it is decimal and the assembler will convert it to hex Prepared By Mrs. Pallavi Mahagaonkar
  • 6.  END directive Another important pseudocode is the END directive.  This indicates to the assembler the end of the source (asm) file.  The END directive is the last line of an 8051 program, meaning that in the source code anything after the END directive is ignored by the assembler. Prepared By Mrs. Pallavi Mahagaonkar
  • 7.  DB (define byte): The DB directive is the most widely used data directive in the assembler.  It is used to define the 8-bit data.  When DB is used to define data, the numbers can be in decimal, binary, hex, or ASCII formats. Prepared By Mrs. Pallavi Mahagaonkar
  • 8.  EQU (equate) This is used to define a constant without occupying a memory location.  The EQU directive does not set aside storage for a data item but associates a constant value with a data label so that when the label appears in the program, its constant value will be substituted for the label.  The following uses EQU for the counter constant and then the constant is used to load the R3 register. When executing the instruction “MOV R3, #COUNT”, the register R3 will be loaded with the value 25 (notice the # sign). Prepared By Mrs. Pallavi Mahagaonkar
  • 9.  Data Transfer Instructions  Arithmetic Instructions  Logical Instructions  Boolean or Bit Manipulation Instructions  Program Branching Instructions Prepared By Mrs. Pallavi Mahagaonkar
  • 10.  The Data Transfer Instructions are associated with transfer with data between registers or external program memory or external data memory. The Mnemonics associated with Data Transfer are given below MOV MOVC MOVX PUSH POP XCH XCHD Prepared By Mrs. Pallavi Mahagaonkar
  • 11. ADD A, #32H This is an instruction of type ADD A, #d8. The immediate data 32H is added to register A. The result is also stored in A. ADDC A, @R1 This is an instruction of type ADDC A, @Ri. It means the content on internal RAM location which is pointed by register R1 is added to A. SUBB A, R5 This is SUBB A, Rn type instruction. The SUBB stands for Subtract with borrow. So the content of R5 will be subtracted from A. INC A Increment A by 1 DEC A Decrement A by 1 Prepared By Mrs. Pallavi Mahagaonkar
  • 12. MUL AB This instruction is used to multiply the content of register A and B. The 16-bit address will be stored at B and A registers. The B will hold the MSByte and A will hold the LSByte ORG 00H MOV A, #55H MOV B,#10H MUL AB Prepared By Mrs. Pallavi Mahagaonkar
  • 13. DIV AB This instruction is used to divide the content of A register by B register. The 8-bit quotient is stored into the register A, and the 8-bit remainder is stored into the register B. ORG 00H MOV A, #15H MOV B,#02H DIV AB Prepared By Mrs. Pallavi Mahagaonkar
  • 14.  ANL---AND  ORL  XRL----XOR  CPL---Complement  CJNE Dest>Source CY=0 A=23H 0010 0011 B=FFH 1111 1111 ORL 1111 1111 04H 30H Prepared By Mrs. Pallavi Mahagaonkar
  • 15.  Compare & Jump Not Equal Org 00h MOV A, #07H CJNE A, #45H, SYF MOV B, #30H CPL A SYF: MOV A, #30H MOV B, #0FFH ADD A, B END
  • 16.  Repeating a sequence of instruction a certain number of times is called loop  In 8051, the loop action is performed by the instruction “DJNZ reg,label”  Example: Write a program to clear Accumulator and then ADD 3 to the accumulator 10 times ORG 00H MOV A, #00 ADD A, #03 ADD A, #03 ADD A, #03 ADD A, #03 ADD A, #03 ADD A, #03 ADD A, #03 ADD A, #03 ADD A, #03 ADD A, #03
  • 17. ORG 00H MOV A,#00 MOV R2,#10 AGAIN: ADD A, #3 DJNZ R2, AGAIN MOV R5, A END
  • 18.  There are 3 types of jump instructions: Relative Jump Short Absolute Jump Long Absolute Jump Relative Jump –  SJMP  JBC Jump if bit = 1 and clear bit  JNB Jump if bit = 0  JB Jump if bit = 1  JNC Jump if CY = 0  JC Jump if CY = 1  CJNE reg,#data Jump if byte ≠ #data  CJNE A,byte Jump if A ≠ byte  DJNZ Decrement and Jump if A ≠ 0  JNZ Jump if A ≠ 0  JZ Jump if A = 0 JZ <relative address>  JNZ <relative address>
  • 19.  Bit level JUMP instructions will check the conditions of the bit and if condition is true, it jumps to the address specified in the instruction. All the bit jumps are relative jumps.  JB bit, rel ; jump if the direct bit is set to the relative address specified.  JNB bit, rel ; jump if the direct bit is clear to the relative address specified.  JBC bit, rel ; jump if the direct bit is set to the relative address specified and then clear the bit Prepared By Mrs. Pallavi Mahagaonkar
  • 20. LOGICAL AND ANL C,BIT(BIT ADDRESS) ; ‘LOGICALLY AND’ CARRY AND CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY ANL C, /BIT; ; ‘LOGICALLY AND’ CARRY AND COMPLEMENT OF CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY LOGICAL OR ORL C,BIT(BIT ADDRESS) ; ‘LOGICALLY OR’ CARRY AND CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY ORL C, /BIT; ; ‘LOGICALLY OR’ CARRY AND COMPLEMENT OF CONTENT OF BIT ADDRESS, STORE RESULT IN CARRY CLR bit CLR bit ; CONTENT OF BIT ADDRESS SPECIFIED WILL BE CLEARED. CLR C ; CONTENT OF CARRY WILL BE CLEARED. CPL bit CPL bit ; CONTENT OF BIT ADDRESS SPECIFIED WILL BE COMPLEMENTED CPL C ; CONTENT OF CARRY WILL BE COMPLEMENTED Prepared By Mrs. Pallavi Mahagaonkar
  • 21. Org 00h MOV P0, #25H MOV P1, #35H MOV P2,#00H MOV P3, #0FFH
  • 22.  Immediate Addressing Mode  Register Addressing Mode  Direct Addressing Mode  Register Indirect Addressing Mode  Indexed Addressing Mode  Implied Addressing Mode Prepared By Mrs. Pallavi Mahagaonkar
  • 23.  In these instructions, the # symbol is used for immediate data  The data is provided immediately after the opcode.  These are some examples of Immediate Addressing Mode. MOV A, #0AFH MOV R3, #45H MOV DPTR, #FE00H  In the last instruction, there is DPTR. The DPTR stands for Data Pointer  Using this, it points the external data memory location Prepared By Mrs. Pallavi Mahagaonkar
  • 24.  In the register addressing mode the source or destination data should be present in a register (R0 to R7).  These are some examples of Register Addressing Mode MOV A, R5 MOV R2, #45H MOV R0, A Prepared By Mrs. Pallavi Mahagaonkar
  • 25.  In the Direct Addressing Mode, the source or destination address is specified by using 8-bit data in the instruction. Only the internal data memory can be used in this mode.  Here some of the examples of direct Addressing Mode. MOV 80H, R6 MOV R2, 45H MOV R0, 05H  The first instruction will send the content of registerR6 to port P0 (Address of Port 0 is 80H).  The second one is forgetting content from 45H to R2.  The third one is used to get data from Register R5 (When register bank RB0 is selected) to register R5. Prepared By Mrs. Pallavi Mahagaonkar
  • 26.  In this mode, the source or destination address is given in the register.  By using register indirect addressing mode, the internal or external addresses can be accessed.  The R0 and R1 are used for 8-bit addresses, and DPTR is used for 16-bit addresses, no other registers can be used for addressing purposes.  Let us see some examples of this mode. MOVX A, @R1 MOV@DPTR, A Prepared By Mrs. Pallavi Mahagaonkar
  • 27.  In the indexed addressing mode, the source memory can only be accessed from program memory only.  The destination operand is always the register A.  These are some examples of Indexed addressing mode. MOVC A, @A+PC MOVC A, @A+DPTR  The C in MOVC instruction refers to code byte. For the first instruction, let us consider A holds 30H. And the PC value is1125H. The contents of program memory location 1155H (30H + 1125H) are moved to register A. Prepared By Mrs. Pallavi Mahagaonkar
  • 28.  In the implied addressing mode, there will be a single operand.  These types of instruction can work on specific registers only. These types of instructions are also known as register specific instruction.  Here are some examples of Implied Addressing Mode. RLA SWAPA  These are 1- byte instruction. The first one is used to rotate the A register content to the Left.  The second one is used to swap the nibbles in A. Prepared By Mrs. Pallavi Mahagaonkar
  • 29.  FFH value INPUT and if 00H output  Write a program to get byte from P0 and send it to P1 ORG 00H ;originate program at 00h location MOV A, #0FFH ;move FFH into Accumulator MOV P0,A ;Make P0 as input port BACK: MOV A, P0 MOV P1,A SJMP BACK Example: Make Port 2 as output port org 00h mov p2,#00h ;make p2 as output port P0,P1,P2,P3-----Input then FFH ------Output then 00H Prepared By Mrs. Pallavi Mahagaonkar
  • 30. Write a program to toggle all bits of P1 Continuously P1 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 1 0 1 0 1 0 1 0 AAH 0 1 0 1 0 1 0 1 55H ORG 00H AGAIN: MOV P1,#0AAH MOV P1, #55H SJMP AGAIN Prepared By Mrs. Pallavi Mahagaonkar
  • 31. Write a program to toggle all bits of P1 Continuously ORG 00H BACK: MOV P1,#55H ACALL DELAY MOV P1,#0FFH ACALL DELAY SJMP BACK DELAY: MOV R1,#255 AGAIN: DJNZ R1,AGAIN RET Prepared By Mrs. Pallavi Mahagaonkar
  • 32. Single bit Addressability Prepared By Mrs. Pallavi Mahagaonkar
  • 33. Write the following programs: a. Create a square wave of 50% duty cycle on bit 0 of port 1 The 50% duty cycle means that the on and off states have the same length ORG 00H HERE: SETB P1.0 ACALL DELAY CLR P1.0 ACALL DELAY SJMP HERE DELAY: MOV R2,#0FFH BACK: DJNZ R2,BACK Prepared By Mrs. Pallavi Mahagaonkar
  • 34. LED is connected to port 3 pin 7 write a program to blink LED with some delay. Draw interfacing diagram ALGORITHM: 1. Originate program ORG 00H 2. Make led on BACK: SETB P3.7 3. Call delay or wait ACALL DELAY 4. Make led off CLR P3.7 5. Call delay or wait ACALL DELAY 6. Go to step no 2 SJMP BACK 7. Write delay function Prepared By Mrs. Pallavi Mahagaonkar
  • 35. LED is connected to port 3 pin 7 write a program to blink LED with some delay. Draw interfacing diagram ORG 00H AGAIN: SETB P3.7 ACALL DELAY CLER P3.7 ACALL DELAY SJMP AGAIN DELAY: MOV R0,#9 BACK1: MOV R1,#0FFH BACK2: DJNZ R1,BACK2 DJNZ R0,BACK1 RET Prepared By Mrs. Pallavi Mahagaonkar
  • 36. Write a program to switch ON and OFF two LED’s alternately. Also draw interfacing diagram. First LED is connected at pin 1 of port 3(P3.1) and second LED is connected at pin 3 of port 3(P3.3) ORG 00H AGAIN : SETB P3.1 ;FIRST LED ON CLR P3.3 ;SECOND LED OFF ACALL DELAY CLR P3.1 ;FIRST LED OFF SETB P3.3 ;SECOND LED ON SJMP AGAIN DELAY: MOV R0,#120 BACK1: MOV R1,#0FFH BACK: DJNZ R1, BACK DJNZ R0,BACK1 RET END Prepared By Mrs. Pallavi Mahagaonkar
  • 37. Write a program to switch ON and OFF two LED’s alternately. Also draw interfacing diagram. First LED is connected at pin 1 of port 3 and second LED is connected at pin 3 of port 3 ORG 00H AGAIN: SETB P3.1 CLR P3.3 ACALL DELAY CLR P3.1 SETB P3.3 ACALL DELAY SJMP AGAIN DELAY: MOV R0,#9 BACK1: MOV R1,#0FFH BACK2: DJNZ R1,BACK2 DJNZ R0,BACK1 RET Prepared By Mrs. Pallavi Mahagaonkar
  • 38. Prepared By Mrs. Pallavi Mahagaonkar
  • 39. ORG 00H AGAIN: MOV A, #00H UP: MOV P2,A ;P2=01H ACALL DELAY INC A ;A=01H CJNE A,#0AH,UP ;A =01 Source=0AH Not equal so jmp to titile UP SJMP AGAIN DELAY: MOV R0,#9 BACK1: MOV R1,#0FFH BACK2: DJNZ R1,BACK2 DJNZ R0,BACK1 RET Prepared By Mrs. Pallavi Mahagaonkar
  • 40. Why C?  Processor independent: C language is not specific to any microprocessor/micro-controller or any system. It can work on various hardware configuration. C doesn’t require same set of hardware to run a program  Performance: C code gets compiled into raw binary executable which can be directly loaded into memory and executed.  Bit manipulation: C is more flexible, structured language that provides “low level bit wise data manipulation” using the bit-wise operators. Using bit-wise operators, one could play with available bits, which comes handy when it comes to Embedded Systems Prepared By Mrs. Pallavi Mahagaonkar
  • 41. Write n 8051 C program to toggle all the bits of P1 continuously with some delay P1=55H P1=0AAH Prepared By Mrs. Pallavi Mahagaonkar