2. Three criteria in Choosing a
Microcontroller
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
๏ meeting the computing needs of the task efficiently
and cost effectively
โฆ speed, the amount of ROM and RAM, the number of I/O
ports and timers, size, packaging, power consumption
โฆ easy to upgrade
โฆ cost per unit
โฆ Noise of environment
๏ availability of software development tools
โฆ assemblers, debuggers, C compilers, emulator, simulator,
technical support
๏ wide availability and reliable sources of the
microcontrollers
3. Comparison of the 8051 Family
Members
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
๏ ROM type
โฆ 8031 no ROM
โฆ 80xx mask ROM
โฆ 87xx EPROM
โฆ 89xx Flash EEPROM
๏ 89xx
โฆ 8951
โฆ 8952
โฆ 8953
โฆ 8955
โฆ 898252
โฆ 891051
โฆ 892051
๏ Example (AT89C51,AT89LV51)
โฆ AT= ATMEL(Manufacture)
โฆ C = CMOS technology
โฆ LV= Low Power(3.0v)
4. 8051 Basic Component/
Feature
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
๏ 4K bytes internal ROM
๏ 128 bytes internal RAM
๏ Four 8-bit I/O ports (P0 - P3).
๏ Two 16-bit timers/counters
๏ One serial interface
๏ 64k external memory for code
๏ 64k external memory for data
๏ 210 bit addressable
5. The basic 8051 Core
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
โข 8-bit CPU optimized for control applications
โข Capability for single bit Boolean operations.
โข Supports up to 64K of program memory.
โข Supports up to 64K of data memory.
โข 4 K bytes of on-chip program memory.
โข Newer devices provide more.
โข 128 or 256 bytes of on-chip data RAM
โข Four 8 bit ports.
โข Two 16-bit timer/counters
โข UART
โข Interrupts
โข On-chip clock oscillator
12. R.K.Tiwari(ravikumar.tiwari@raisoni.net)
IMPORTANT PINS
(IO Ports)
One of the most useful features of the 8051 is that it
contains four I/O ports (P0 - P3)
Each port can be used as input or output (bi-direction)
๏Port 0
pins 32-39 ๏ผP0.0๏ฝP0.7๏ผ
โฆ 8-bit R/W - General
Purpose I/O
โฆ Or acts as a
multiplexed low byte
address and data
bus for external
memory design
17. R.K.Tiwari(ravikumar.tiwari@raisoni.net)
๏ ALE - Address latch enable
to select valid address
๏ EA/Vpp - External access enable
EA-0 execute program in external
memory
EA-1 execute program in internal
memory
Vpp it receives 21 V for on chip EPROM
PSEN Program store enable
store to read the external program memory
19. Parallel I/O Ports
โข Each port can be input or output
โข Direction is set in Special Function
Registers
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
Port0
latch
Port1
latch
Port2
latch
Port3
latch
Port0 Port1 Port2 Port3
20. DPTR
๏ The data pointer consists of a high
byte(DPH) and a low byte (DPL). Its
function is to hold a 16 bit address. It
may be manipulated as a 16 bit data
register or two independent 8 bit
register. It serves as a base register in
indirect jumps, lookup table
instructions and external data transfer.
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
22. Memory Organization
๏ The 8051 memory organization is rather complex.
๏ The 8051 has separate address spaces for
Program Memory, Data Memory, and external
RAM.
๏ This is refereed to as a Harvard architecture.
๏ Both program memory and external data memory
are 8 bits wide and use 16 bits of address. The
internal data memory is accessed using an 8-bit
address.
๏ Since the same address can refer to different
locations the specific location is determined by the
type of instruction.
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
23. RAM Memory Space
Allocation
๏ There are 128 bytes of RAM in 8051.
๏ The 128 bytes of RAM inside 8051 are
assigned addresses 00h to 7FH.
๏ These 128 bytes are divided into three
different groups as Follows:
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
24. RAM Memory Space
Allocation
๏ 1. A total of 32 bytes from location 00
to 1F hex are set aside for register
banks and the stack( 4 register bank
each of 8 byte)
๏ 2. A total of 16 byte from location 20h
to 2F h are set aside for bit
addressable RAM.
๏ 3. A total of 80bytes from 30h to 7Fh
are used for RD/WR storage which is
normally called as Scratch Pad.
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
26. Stack in the 8051
R.K.Tiwari(ravikumar.tiwari@raisoni.net)
7FH
30H
2FH
20H
1FH
17H
10H
0FH
07H
08H
18H
00H
Register Bank 0
(Stack) Register Bank
1
Register Bank 2
Register Bank 3
Bit-Addressable RAM
Scratch pad RAM
๏ The register used to access
the stack is called SP (stack
pointer) register.
๏ The stack pointer in the
8051 is only 8 bits wide,
which means that it can
take value 00 to FFH. When
8051 powered up, the SP
register contains value 07.