8. ===================================================
- 3 -
5.5 TCP communication experiment ..............................................
.................................................. ...... 221
The 5.6 GUI Experiment 1 ..............................................
.................................................. ........... 226
The 5.7 GUI Experiment 2 ..............................................
.................................................. ........... 230
5.8 System message loop experiments .............................................
.................................................. 237
5.9 printer interface experiments ..............................................
.................................................. ... 245
Appendix A EasyARM use of the software
Appendix B Frequently Asked Questions
9. ===================================================
- 4 -
The Chapter 1 EasyARM2200 development board hardware structure
EasyARM2200 development board is a powerful 32-bit ARM microcontroller
development board PHILIPS public
Division ARM7TDMI-S core, the microcontroller LPC2210, of the bus open
with JTAG debug functions. Board provides
Keyboard, LED, RS232 and other commonly used features, and has an IDE
hard disk interface, CF memory card interface, Ethernet
Interface and MODEM interface and design peripherals PACK greatly
facilitate the users in the 32-bit ARM embedded
The system field development trials.
LPC2210/2212/2214/2290/2292/2294 is the world's first encrypted with
external memory interface ARM
Chip has zero wait 0K/128K/256K bytes on-chip FLASH (FLASH chip chip is
not encrypted)
16K bytes SRAM, simplify system design, to improve performance and
reliability. Chip internal UART, hardware I2C
SPI, PWM, ADC, timers, CAN (LPC2290/2292/2294) and many other
peripheral components, the more powerful;
144-pin LQFP package, 3.3V and 1.8V system power supply, internal PLL
clock adjustment, and lower power consumption.
1.1 Features
� CPU PACK, you can use a variety of compatible chip
(LPC2210/2212/2214/2290/2292/2294, /
LPC2114/2124/2119/2129/2194 etc.), standard the LPC2210 CPU PACK
board one comes empty CPU
PCAK a plate;
� completely independent hardware and software design, own copyright the
JTAG emulation technology to support the integrated development of the
ADS1.2
Environment;
� has 4Mbit SRAM, 16Mbit FLASH, user-friendly prototype development;
� rich peripheral support peripherals PACK, external, and matching a
variety of peripherals PACK board;
10. � RTL8019AS card chip, provides TCP / IP package;
� with standard the MODEM directly interface to facilitate remote
communications, PPP protocol package;
� IDE hard disk interface, CF memory card interface, the FAT file system
package;
� D12 USBPACK, offer mobile hard Packages;
� optional CAN interface board for easy assembly fieldbus;
� with a graphical LCD interface provides a GUI package;
� with up to 16 keys, the Chinese character input method package;
� printer interface circuit provides printer package;
� RS232 converter circuit, and can communicate with the host computer;
� providing PC-based human-machine interface, convenient debugging real-
time clock, serial communication functions;
� provide detailed teaching materials, experimental routines;
� GPIO control experiments buzzer control, analog SPI;
� the external interrupt Experimental learning vector interrupt controller
(VIC);
� board I2C devices, I2C bus to complete the experiment;
� use 74HC595 chip SPI interface, data transmission and receiving
experimental;
� test point and the filter circuit with a PWM output, PWM output, PWM
DAC experiments;
� real-time clock control experiments;
� WDT and low-power control experiments;
� ADC data acquisition experiments.
EasyARM2200 development board functional block diagram is shown in
Figure 1.1.
11. ===================================================
- 5 -
The Figure 1.1 EasyARM2200 development board functional block diagram
1.2 hardware schematic
1.2.1 circuit schematics
EasyARM2200 development board circuit schematic diagram is shown in
Figure 1.2.
1.2.2 Rationale
1 power circuit
LPC2000 family of ARM7 microcontroller to use two sets of power supply, I /
O port power supply of 3.3V, kernel and tablets
Within peripheral power supply 1.8V, so the system is designed for 3.3V
applications. First, CZ1 power input interface 9V
DC power diode D1 prevents power reverse, C1, C4 filtering, and then by the
LM7805 power regulator to
5V, LDO regulator output 3.3V and 1.8V voltage chip (low dropout power
chip).
5V regulator circuit schematic design is the use of the LM2575 switching
power chip, shown in Figure 1.3, if the user
On the the development board peripherals Pack and other user interface uses
the power of a larger load, the LM2575 can provide sufficient
Current. The development boards 5V regulator EasyARM2200 can use
LM7805 linear regulator chips, circuit schematic circuit
Shown in Figure 1.4.
Figure 1.3 5V power supply circuit-LM2575
5V regulator
Power supply
LDO low pressure
Dropout Regulator
9-pin D-type
Serial Interface
Modem
Interface
RJ45 to
Ethernet interface
12. LPC2210_PACK
(ARM7TDMI-S)
JTAG interface
Port (20-pin)
CAN interface
(LPC229
2/2294, etc.
Effective)
IDE hard disk
And CF card
Interface
I2C memory
Memory
RTL8019 to
Ethernet controller
RS232 to
Converter (8-way)
RS232 to
Converter (2-way)
LCM interface
(SMG240128A)
Peripheral PACK
16/8 bit bus
FLASH
16M bit
SRAM
4M bit
Keyboard with LED
(I2C interface drives)
ADC interface
13. ===================================================
- 6 -
Figure 1.4 5V power supply circuit-LM7805
LDO chip SPX1117M3-1.8,, and SPX1117M3-3.3, which is characterized by
large output current, output voltage
High precision, high stability. The system power supply circuit as shown in
Figure 1.5.
Figure 1.5 system power circuit
SPX1117 series the LDO chip output current of up to 800mA, output voltage
accuracy within ± 1%, also has electric
Current limit and thermal protection function, a wide range of users in the
handheld meter, digital home appliances, industrial control and other fields.
When used, its output
Need at least 10uF tantalum capacitor terminal to improve the transient
response and stability.
Description: the development board analog power / analog ground noise
requirements are not very high, so there is no analog power / analog
With digital power / digital ground isolation, but the PCB board with a large
area of deposited earth, in order to reduce the noise.
Note: The power EasyARM2200 development board is a 9V DC power
supply, CZ1 power connector input connector
Power polarity is negative outside positive. POWER LED should be lit when
the power to the development board is powered on.
2. Reset circuit
Because the ARM chip's high-speed, low-power, low operating voltage lead to
its low noise margin, power supply ripple, transient
Many aspects of the response to the performance, the stability of the clock
source, power monitoring reliability also put forward higher requirements.
The development board
The reset circuit using a a dedicated microprocessor power monitoring chip
SP708S, improve system reliability. During JTAG
Debugging, nRST, TRST by JTAG emulator control reset, so use a tri-state
buffer gate 74HC125
Drive circuit as shown in Figure 1.6.
14. ===================================================
- 7 -
Figure 1.6 System Reset Circuit
In Figure 1.6, signal nRST connected to the LPC2210 chip reset pin RESET,
signal nTRST, of connection to
LPC2210 chip the internal JTAG interface circuit reset pin TRST. When
pressed the reset button RST, SP708S immediately lose
A reset signal pin RST output low level lead 74HC125A, 74HC125B
conduction signal the nRST and nTRST
Output low to reset the system. Usually SP708S the RST output high level
The, 74HC125A, 74HC125B deadline
By the pull-up resistor R3, R4 will signal the nRST and nTRST pull high,
normal operation of the system or the JTAG emulation tune
Again.
3. System clock circuit
LPC2000 series ARM7 microcontrollers can use an external crystal or
external clock source, the internal PLL circuit to adjust the system
System clock, allowing the system to run faster (CPU operating clock is
60MHz). If they do not use the on-chip PLL function and
ISP download function of the external crystal frequency range 1MHz ~
30MHz, 1MHz ~~ 50MHz external clock frequency range;
If you use a the chip PLL function or ISP download function, external crystal
frequency range is 10MHz ~ 25MHz, external
The bell frequency range is 10MHz ~ 25MHz.
EasyARM2200 development board uses external 11.0592MHz crystal, the
circuit shown in Figure 1.7 with 1MΩ resistor
R45 and attached to both ends of the crystal, and to make the system easier to
start-up. 11.0592MHz crystal reasons is the serial port baud rate
Accurate, at the same time be able to support the LPC2000 series ARM7
microcontroller chip internal PLL function and ISP function.
Figure 1.7 system clock circuit
15. ===================================================
- 8 -
4 JTAG interface circuit
ARM's standard 20-pin JTAG emulator debug interface, JTAG signal
definition and LPC2210
Connection is shown in Figure 1.8. Figure JTAG interface signals nRST,
nTRST development board reset circuit connection (see
To Figure 1.6) to form a line with the relationship, to achieve the purpose of
jointly controlled system reset.
According to the the LPC2210 application manual explains, the RTCK pin
pick a 4.7KΩ pull-down resistors, so that the system reset
After LPC2210 the internal JTAG interface is enabled, so you can directly
JTAG emulator debug. If the user needs
P1.26 ~ P1.31 for I / O, and JTAG emulator debug, you can in the user
program by setting PINSEL2
Register LPC2210 the internal JTAG interface is disabled. In addition, in
TRACESYNC pin by jumper JP10
Pick a 4.7KΩ the pull-down resistor, can reset enable / disable tracking debug
port, disable (JP10 disconnect)
Only P1.16 ~ P1.25 I / O
Figure 1.8 JTAG interface circuit
5 serial MODEM interface circuit
Because the system is 3.3V system, so use the SP3232E RS232 level
conversion, SP3232E 3V workers
RS232 conversion chip for power. In addition, the LPC2000 series ARM7
microcontrollers UART1 with a complete tune
Modem (MODEM) interface, so you want to use the 8-way RS232 conversion
chip SP3243ECA. Shown in Figure 1.9,
JP3 connect UART1 port line jumper when they disconnect mouth line
reserved for the user as other functions.
When you want to use your ISP function, CZ2 connected to the PC's serial
port (COM1) and the development of experimental board, UART0
Communication. Also JP1 shorted ISP hardware conditions are met.
Users through the CZ3 direct connection MODEM, controlled by UART1 of
LPC2000 ARM7 microcontroller series
16. MODEM dial-up communications. Note LPC2000 series of ARM7
microcontroller ISP enable pin
(P0.14 mouth) with DCD1 functional pin multiplexing system reset P0.14 port
is low, then enter the ISP status; same
Kind of program simulation debugging process, when the JP1 shorted, DCD1
maintain low impact MODEM interface
Proper use.
17. ===================================================
- 9 -
Figure 1.9 serial MODEM interface circuit
6. Keypad and LED display circuit
EasyARM2200 developed experimental board has 16 buttons and 8-bit LED
digital tube, use the I2C interface key
The disk LED driver chip ZLG7290, circuit in Figure 1.10, as shown in Figure
1.11. ZLG7290 a style powerful
Keyboard and LED driver chips, up to 64 keys and eight common cathode
LED digital tube. JP5 can disconnect
EasyARM2200 development board I2C devices with LPC2210 connection.
, EasyARM2200 development board using a 74HC595 drive eight LED lights,
as shown in Figure 1.12.
Clock (SCK), data (SI) received LPC2210 SPI interface of the SCLK0 MOSI0,
so that you can send
Data to the 74HC595; chip select (RCK, 74HC595 output trigger side) is
connected to the P0.8 port, controlled by P0.8 74HC595
Data latch output; the SPI interface MISO0, highest bit output (SQH)
connected to LPC2210 can be used to read back the number of
It is. This connection can SPI interface control experiments, and can a
74HC595 shift output read back (by MISO0
Read back). This part of the circuit can be JP8 tripped.
Using the hardware SPI interface main should SPI0 / 1 4 I / O ports are set to
SPI functions, such as P0.4 as a cause
P0.5, P0.6, P0.7, and SSEL0 / 1 pin can not be low, generally connected to a
10KΩ on the pull-up resistor. In
EasyARM2200 development board P0.7 complex used as a of Ethernet chips
RT8019AS the interrupt input, use hardware
SPI control 8 LED lights, to disconnect of P0.7 with RT8019AS the connection
(JP4 jumper).
21. Figure 1.10 8 LED digital tube drive circuit
Figure 1.11 16-button connection circuit
22. ===================================================
- 11 -
Figure 1.12 SPI driver LED lamp circuit
If the need for the large amounts of data, that can use EasyARM.exe software
for analog display. EasyARM.exe
Is a host computer software for EasyARM2200 experimental board
development, has eight analog digital display, full simulation
The DOS screen display, analog calendar clock display, and 20 analog key
input all this through the serial port through
Information control operation.
Buzzer and PWM circuit 7.
As shown in Figure 1.13, the buzzer using a PNP transistor Q2, the drive
control, when the P0.7 control level 0 is output,
Q2 is turned on, the buzzer beeps; P0.7 control level output, Q2 is off, buzzer
stop beep; if the JP9
Disconnect, Q2 cut-off, the buzzer stop beep.
Figure 1.13 buzzer control circuit
Q2 switching transistor 8550, its main feature is the high magnification hFE =
300, maximum collector current
ICM = 1500mA, characteristic frequency fT = 100MHz.
R89 for limiting the base current of Q2, when the P0.7 output 0, the current
flowing through R89, as shown in Equation 1.1, Ir
2.6mA, assuming Q2 work in the enlarged area = ⋅ = 400 × 2.6 = 1040 cb I β I
mA; while the general DC buzzer
3.3V voltage current is about 28mA, turn = 28 c I mA, the voltage on the
buzzer
Reach 3.3V, at this time Uec ≈ 0V, ie Ueb> Uec, Q2 to deep saturated
conduction, buzzer enough current.
0.0026
1000
3.3 3.3 0.7 =
-
=
-
=
23. R
IR Veb of (A), (Equation 1.1)
This pin on due the P0.7 port and SPI components SSEL0 reuse, so a pull-up
resistor R88, to prevent the use of
Hardware SPI bus SSEL0 pin floating SPI operation error.
PWM output experiment shown in Figure 1.14, use PWM6 (P0.9 pin) output
after R90, C34
RC filter to achieve control of the PWM DAC, JP2 can disconnect the part of
the circuit. The PWM test points can be directly measured
Trial PWM the waveform, PWMDAC test points can measure the the PWM
DAC voltage value.
24. ===================================================
- 12 -
Figure 1.14 PWM DAC circuit
8. ADC circuit
LPC2114/2124/2119/2129/2194 with 4-channel 10-bit ADC converter,
LPC2210/2212/2214/2290/22
92/2294 8-channel 10-bit ADC converter reference voltage of 3.3V (V3a pin
provides), the reference voltage is fine
Degree will affect the ADC conversion results. EasyARM2200 development
experiment board provides two DC voltage measuring circuit, as shown in
1.15 below, the adjustable resistor W1 and W2 for the adjustment of the ADC
input voltage can VIN1, VIN2 test point
Using the multimeter to check the current voltage value. R34, R35 for the I /
O port protection resistor adjusted when the ADC input voltage to 3.3V or
0V, while P0.27 or P0.28 as GPIO output 0/1 the two resistors ensure that the
circuit does not produce short-circuit fault.
The development board will also EasyARM2200 other 4-channel ADC
interface leads through J4, shown in Figure 1.15.
The experiment circuit of Figure 1.15 ADC
9 CAN interface circuit
LPC2119/2129/2290/2292 has a 2 way CAN interface, LPC2194/2294 the 4-
channel CAN interface,
J5 leads EasyARM2200 development board microcontroller CAN interface,
shown in Figure 1.16. The CAN interface
Port connected to CAN transceiver (TJA1050), you CAN bus communication
operation.
Figure 1.16 CAN interface circuit
10. Peripheral the PACK Interface circuit
LPC2200 series ARM7 microcontroller bus open type of microcontroller, it is
through the external memory controller
25. ===================================================
- 13 -
(EMC) provides an interface for AMBA AHB system bus and off-chip
memory, SRAM, ROM, FLASH
Burst ROM and external I / O devices. The EasyARM2200 development
board designed a peripheral PACK, the circuit shown in Figure 1.17
Shown with 24 address bus A0 ~ A23, 16 root data bus D0 ~ D15, a read /
write signal OE, WE, BLS0
And BLS1, chip-select signal CS2, available on the peripherals PACK address
to 0x82000000 to 0x82FFFFFF.
The user can use the the CS2 signal and the high order address for decoding
to reach the address re-allocation purposes. Peripheral PACK on
6 I / O port, and two I / O for external interrupt pin, thus greatly facilitate the
connection with the external I / O devices.
Figure 1.17 Peripheral the PACK Interface circuit
11 Ethernet interface circuit
EasyARM2200 development board is designed the RTL8019AS chip as the
core of the Ethernet interface circuit, the circuit of the original
Processing shown in Figure 1.18. LPC2210 is the bus open, the circuit design
for 16-bit bus on RTL8019AS
Access the data bus D0 ~ D15 SD0 ~ SD16 chips, due to the the RTL8019AS
work power
5V rather LPC2210 I / O voltage of 3.3V, and so 470Ω protection resistor in
series on the bus.
Figure 1.18 Ethernet interface circuit
The the RTL8019AS chips work in jumper mode, the base address of 0x300,
circuit SA6, SA7, SA10 to
26. ===================================================
- 14 -
SA19 are grounded, SA9 power supply. SA8 A22 of the address bus is
connected to SA5 and the LPC2210 external memory
BANK3 chip select CS3 connected SA8 1, SA5 is 0, RTL8019AS chip is
selected, i.e. its operating address
As 0x83400000 ~ 0x8340001F. Details, please refer RTL8019AS RTL8019AS
applications and connect
Chip data manual.
12 graphics LCD module interface circuit
EasyARM2200 development board has a dot matrix graphics LCD module
interface circuit can be directly SMG240128A lattice
Graphic LCD module or other compatible module is connected to the
interface circuit is shown in Figure 1.19. 8-bit bus connection
The SMG240128A graphics LCD module, the module does not address bus,
address and display data through DB0 ~ DB7
Interface. Module power is 5V rather LPC2210 I / O voltage of 3.3V, so the
series with 470 bus
Ω protection resistors. Graphic LCD module C / D and A1 connection, use the
the A1 control module processing data / command. The C / D
With A1 connection One of the advantages is that you can use a 16-bit bus
LPC2210 operate the graphic LCD module (8
Data is ignored). Module chip-select signal by the a LPC2210 A22 and
external memory BANK3 chip select CS3 phase "or"
Obtained after, when A22 and nCS3, while 0, the module is selected, so the
address of its data operation 0x83000000
The command operand address 0x83000002.
If the user needs to use other graphics LCD module can connect peripherals
PACK.
Figure 1.19 Graphical LCD module interface circuit
13. System memory circuit
The EasyARM2200 development board extends 4Mbit SRAM
(IS61LV25616AL) and 16Mbit FLASH (SST39V
F160), the circuit shown in Figure 1.20. In order to facilitate the process of
debugging and final code curing applications, use the BANK0
27. And BANK1 the address space, by JP6 jumper CS0 and CS1 were assigned to
the SRAM or FLASH. In
28. ===================================================
- 15 -
Debugging allocated SRAM Address for BANK0, because BANK0 interrupt
vector remap operation.
When the curing of the final code to FLASH for allocation FLASH for
BANK0 address, SRAM BANK1 address,
BANK0 can be used to guide the program is running. Use BANK0 guide
program run JP7 is shorted to OUTSIDE
End, so that the the system reset BOOT1, BOOT0 for 0b01.
The memory connection using a 16-bit bus, data bus D0 ~~ D15 address bus
A1 ~~
A20, for 16-bit SRAM BLS0, BLS1 signal, used to control the low byte, high
byte write operation. A more detailed
Interface use Application Notes Reference LPC2210 chip external memory
controller (EMC) part of the description.
LPC2210 chip FLASH, we can only use the external FLASH save the user the
ultimate program.
Figure 1.20 memory interface circuit
14. CF card and IDE hard disk interface circuit
LPC2210 GPIO pin with the CF card and IDE hard disk interface circuit
shown in Figure 1.21 and Figure 1.22.
CF card can work at 5V or 3.3V under CF work CF card pin requirements
when the power supply is 5V input logic
The level of the minimum value of 4.0V, the GPIO output level before 3.3V,
we can only use 3.3V power supply to the CF card.
The address of the register is by the A00, A01, A02,-CS0 and-CS1 choose, they
are assigned in the P1 port
To simplify programming; data bus D00-D15 P2.16 ~ P2.31 use continuous
GPIO, but also to the programming side
It; other IO pins are no special requirements. Table 1.1 LPC2210's GPIO pin
CF card and IDE hard
The disc pin connections Allocation Table, as described in the table of GPIO
pins CF card and IDE hard disk corresponding control signal pin.
Table 1.1 LPC2210 GPIO pin CF card and IDE hard disk connector pin
assignment
29. The LPC2210 CF card IDE hard disk I / O LPC2210 the CF card IDE hard
disk I / O
* P0.17-RESET-RESET O * P1.17 A01 A01 O
* P2.16 ~ P2.31 D00 ~ D15 D00 ~ D15 I / O * P1.16 A00 A00 O
P0.18 DMARQ I * P1.19-CS0-CS0 O
30. ===================================================
- 16 -
Connected to the table
The LPC2210 CF card IDE hard disk I / O LPC2210 the CF card IDE hard
disk I / O
* P0.19-IOWR-DIOW O P1.23 CSEL O
* P0.21-IORD-DIOR O P1.24-IOCS16-IOCS16 I
P0.22 IORDY IORDY I P1.25-PDIAG-PDIAG I
P1.21-DMACK I * P1.18 A02 A02 O
P0.20 INTRQ INTRQ I * P1.20-CS1-CS1 O
Note: The table "*" pin, for use to the pin, the other pin is not used, but need
to be configured to the appropriate state.
ATA_DASP
1 1
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
34. 31 32
33 34
35 36
37 38
39 40
J3
IDE / GPIO
NC
P1.16
P1.17
P1.18
P1.19 P1.20
P1.21
P1.24
P1.25
VDD3.3
R31
10K
R33
10K
R13
10K
VDD3.3
VDD3.3
ATA_DASP
R94
470
P1.23
LED15
IDE
Figure 1.22 LPC2210 IDE hard disk interface circuit
15. D12 USBPACK circuit
In EasyARM2200 development board, PDIUSBD12 PACK form of the
development board connected. 1.23 to
35. ===================================================
- 17 -
D12 PACK element distribution. D12 PACK J1, J2 with EasyARM2200
development board J6 J7
Connected. PDIUSBD12 connected to LPC2210 hardware schematic shown in
Figure 1.24, can be seen by the figure PDIUSBD12
Relationship with LPC2210 connection, as shown in Table 1.2.
Table 1.2 PDIUSBD12 LPC2210 connected relationship
The PDIUSBD12 power can LPC2210
D0 ~ D7 PDIUSBD12 data bus D0 ~ D7
The AD0 PDIUSBD12 address bus A0
CS_USB PDIUSBD12 chip select lines nCS2 of
RD PDIUSBD12 read enable (active low) nOE
WR PDIUSBD12 write enable (active low) nEW
INT_USB PDIUSBD12 interrupt output signal P0.16_EINT0
RST_USB PDIUSBD12 reset input signal P0.10_RTS1
SUSP PDIUSBD12 suspend input signal P0.13_DTR1
By the above relation, it was found PDIUSBD12 use the LPC2210 external
storage control Bank2 portion, its address, such as
Follows:
Data address - 0x82000000 (even address)
Command address - 0x82000001 (odd address)
RST_USB, SUSP by the LPC2210 the output pin control, PDIUSBD12
interrupt signal is connected to LPC2210
External Interrupt 0.
Figure 1.23 D12 PACK element maps
40. ===================================================
- 19 -
1.3.2 jumpers Description
The experiment board jumpers of EasyARM2200 development, as shown in Table 1.3, the
distribution of jumpers as shown in Figure 1.26.
To Table 1.3 EasyARM2200 list of jumper
The jumper labeled I / O functions reuse Remarks
The JP1 ISP P0.14 ISP function enabled shorted effective JP3_DCD1 re reset into ISP
The jumper JP2 PWMDAC P0.9 PWM DAC conversion, short
Bonding
JP3_RXD1 voltage test points PWMDAC
DCD1 P0.14 JP1
DSR1 P0.12 J6, J5
RXD1 P0.9 JP2
CTS1 P0.11 J6, J5
RI1 P0.15 J7
DTR1 P0.13 J6, J5
TXD1 P0.8 JP8_nCS
JP3
RTS1 P0.10
UART1 RS232 interface jumpers
Shorted
J6, J5
MODEM interface functions
NET_RST P0.6 RTL8019AS reset control, shorted
Valid when
JP8_MOSI
JP4
INT_N P0.7 RTL8019AS interrupt output, short circuit
Valid when
JP9 need to use the hardware I2C disconnect
This jumper
SCL P0.2 -
SDA P0.3 -
JP5
KEYINT P0.30
ZLG7290 I2C bus interrupt
Jumper pin connections, shorted
41. Efficiency J4
JP6 BANK P1.0
P3.26
FLASH and RAM address block set - are set to BANK0 or
BANK1
The JP7 BOOT_SEL P2.27 system start to choose J3, J17 INSIDE: internal FLASH
OUTSIDE: External BANK0
MOSI P0.6 JP4_NET_RST
nCS P0.8 JP3_TXD1
SCLK P0.4 -
JP8
MISO P0.5
74HC595 connected with SPI interface
Jumper shorted
-
Short-circuited by the SPI interface output
Control LED1 ~ LED8
JP9 BUZZER P0.7 the buzzer jumper driven, shorting
Effective
JP4_INT_N
The JP10 ETM_EN P1.20 ETM trace debug interface to enable short
Bonding
J3, J17, J18 the trace debug interface:
P1.16 ~ P1.25
42. ===================================================
- 20 -
The Figure 1.26 EasyARM2200 jumpers
The 1. JP1 ISP enable control
LPC2000 family of ARM7 microcontrollers with ISP, if reset P0.14 cited as a low, and then
enter the ISP
Status. JP1 jumper is connected to P0.14 mouth, shorting jumper will P0.14 mouth forced low
reset
System after entering ISP. The JP1 jumper described in Table 1.4.
Table 1.4 JP1 jumper
JP1 I / O function default value
Shorted P0.14 for low enable ISP
Disconnect P0.14 by the pull-up resistor set is high prohibit ISP
Disconnect
2. JP2 PWM DAC circuit interface
The P0.9/PWM6 pin in EasyARM2200 development board connected to the the PWM test
point, at the same time, the development board
On a simple RC filter circuit PWM output DA converter can be achieved through the RC filter.
When JP2 shorted
PWM6 output connected to the RC filter circuit DA voltage by PWMDAC test points on the
measurement. JP2 jumper description, see
Table 1.5.
JP9
JP3 JP1 JP2 JP4 JP5 JP6 JP7 JP8
JP10
43. ===================================================
- 21 -
Table 1.5 JP2 jumper
JP2 I / O function default value
The shorted PWM6 RC filter circuit connected to the PWM DAC
The disconnect PWM6 RC filter circuit disconnect -
Disconnect
3. JP3 UART1 circuit interface
UART1 MODEM interface functions, P0.8 ~ P0.15 and 8 I / O when not using the MODEM
Function, these pins can also be used as other functions, so EasyARM2200 development
board JP3 jumper
Connectivity options. When JP3 jumper shorted, all the MODEM interface pins of connection
to SP3243E (U7) chip,
The RS232 signals CZ3 connected. JP3 jumpers are described in Table 1.6.
Table 1.6 JP3 jumper
JP3 I / O function default value
DCD1 P0.14/DCD1 SP3243E connection MODEM interface
DSR1 P0.12/DSR1 SP3243E connection MODEM interface
RXD1 P0.9/RXD1 SP3243E connection of UART1 RXD
CTS1 P0.11/CTS1 SP3243E connection MODEM interface
RI1 P0.15/RI1 SP3243E connection MODEM interface
DTR1 P0.13/DTR1 SP3243E connection MODEM interface
TXD1 P0.8/TXD1 SP3243E connected to the UART1 TXD
The RTS1 P0.10/RTS1 SP3243E connection MODEM interface
Disconnect all
A 4. JP4 NET circuit interface
JP4 jumper set the Ethernet controller RTL8019AS interrupt signal and reset signal is
connected to
LPC2210. Interrupt signal is connected to P0.7/EINT2, reset signal when the JP4 jumper
shorted, RTL8019AS
Connected to P0.6 upper. JP4 jumpers are shown in Table 1.7.
Table 1.7 JP4 jumper
JP4 I / O function default value
INT_N interrupt signal, and P0.7/EINT2 connected RTL8019AS interrupt
NET_RST reset signal P0.6 connected to the RTL8019AS the reset control
Disconnect all
5. JP5 I2C circuit interface
The EasyARM2200 development board has two I2C devices the one E2PROM chip
44. CAT24WC02, another
A keyboard LED driver chip ZLG7290, the I2C interface of the two devices connected via JP5
and LPC2210. When
When the JP5 all shorted, the development board I2C devices connected to P0.2/SCL,
P0.3/SDA. JP5 jumper in Table 1.8.
Table 1.8 JP5 jumper
JP5 I / O function default value
To the SDA I2C devices the SDA and P0.3/SDA connection I2C devices operating
SCL I2C devices connected I2C devices SCL and P0.2/SCL of operation
KEYINT ZLG7290 interrupt signal, and P0.30/EINT3 connected keyboard interrupt
All short-circuit
45. ===================================================
- 22 -
Description: The I2C bus is connected to the outside of the development board I2C devices
through JP5.
The 6. JP6 board memory allocation
The EasyARM2200 development board LPC2210 external memory interface BANK0, BANK1
expansion
SST39VF160 (FLASH) and IS61LV25616 (SRAM), SST39VF160 and IS61LV25616 each using a
BANK, can be used by JP6 settings FLASH which BANK SRAM which a BANK. JP6 jump
The line is shown in Table 1.9.
Table 1.9 JP6 jumper
JP6 I / O function default value
SST39VF160 assigned to BANK0
IS61LV25616 assigned to BANK1
To can use SST39VF160 up
Actuation system
IS61LV25616 assigned to BANK0
SST39VF160 allocated for BANK1
You can use IS61LV25616
JTAG emulator debug
Other settings illegal illegal
Description: Illegal set or remove the jumper will cause a corresponding memory access error.
Development board at the factory in SST39VF160 programming a demo program, so JP6
default settings for
"SST39VF160 distribution BANK0". JTAG emulator debug, the user needs to set JP6 set to
"IS61LV25616 assignment BANK0".
The 7. JP7 system start selector
The LPC2200 series chip with external memory interface, through BOOT1, BOOT0 pin set can
be selected on-chip
FLASH starter or piece outside FLASH (FLASH) in BANK0 on starting. JP7 jumper is the choice
of a three-pin jumper
You can select BOOT1 pin pull-up resistor or pull-down resistor. JP7 jumper described in Table
1.10.
Table 1.10 JP7 jumper
The JP7 I / O functions default value
Select the pull-up resistor the INSIDE BOOT1 pin chip FLASH starter
Pull-down resistors select OUTSIDE BOOT1 pin chip FLASH starter
OUTSIDE
46. Description: EasyARM2200 development to board BOOT0 pin has pull-up resistor when JP7
choose INSIDE,
BOOT1: 0 = 11, when the JP7 select OUTSIDE the BOOT1: 0 = 01.
8. JP8 SPI circuit interface
JP8 jumper setting 74HC595 chip whether connected P0.4/SCK0, P0.5/MISO0, P0.6/MOSI0,
and P0.8
The 74HC595 shift output directly control eight LED, LED1 ~~ of LED8. When all shorting JP8
development board
The 74HC595 devices connected to P0.4/SCK0, P0.5/MISO0, P0.6/MOSI0, and P0.8. The JP8
jumper description, see
Table 1.11.
47. ===================================================
- 23 -
Table 1.11 JP8 jumper
JP8 I / O function default value
The MOSI 74HC595 SI and P0.6/MOSI0 of connection data output
nCS 74HC595 RCK and P0.8 connected to the chip select (output latch)
The SCLK 74HC595 SCK and P0.4/SCK0 connected shift clock
The MISO 74HC595 SQH connection with P0.5/MISO0 data input
All short-circuit
9. JP9 buzzer circuit interface
JP9 jumper is set is connected buzzer circuit buzzer beeps when JP9 shorted by P0.7 control.
JP9
The jumpers are described in Table 1.12.
Table 1.12 JP9 jumper
JP9 I / O function default value
The buzzer circuit shorted P0.7 connection to control the buzzer
Disconnect the buzzer circuit with P0.7 disconnect -
Shorting
10. JP10 ETM interface to enable control
JP10 jumpers enable the ETM trace debug interface, when JP10 jumper shorted, the system
reset P1.16 ~ P1.25
Use as trace debug interface. JP10 jumpers are described in Table 1.13.
Table 1.13 JP10 jumper
JP10 I / O function default value
Shorted P1.20 pin is connected to the pull-down resistor enabled ETM trace debug interface
Disconnect P1.20 pin internal pull-high resistor P1.16 ~ P1.25 as I / O
Disconnect
1.3.3 Connector Description
EasyARM2200 developed experimental board connector as shown in Table 1.14, jumper
distribution in Figure 1.27 shown.
To Table 1.14 EasyARM2200 list of connector
Connector Remarks
CZ1 power socket power input (DC 9V)
CZ2 UART0 interface RS232 level
CZ3 UART1 interface (MODEM Interface) RS232 level
CZ4 Ethernet interface RJ45
PACK PACK interface for extended (use BANK2 address)
J1 LCM the interface compatible SMG240128A LCD module
48. J2 JTAG interface is used for simulation debugging
J3 IDE / GPIO interface
J4 ADC I / O interface
J5 CAN I / O interface
J17 CF memory card interface
J18 ETM trace debug interface controlled by JP10 enable / disable
49. ===================================================
- 24 -
Figure 1.27 EasyARM2200 connector
1. J1 LCM interface
The J1 interface LCM interface, can be used directly compatible SMG240128A the LCD
module. J1 pin defined as
Figure 1.28 shows.
1,234,567,891,011,121,314 15 16 17 18 19 20 21
GND
GND
+5 V
Vo
WE
OE
CS *
A1
+5 V
D0
D1
D2
D3
D4
D5
D6
D7
GND
Vout
+5 V
P1.22 *
Figure 1.28 J1 connector pin
Figure 1.28 Description:
Vout the output voltage of the liquid crystal module (for adjusting the contrast)
Vo LCD drive voltage (contrast adjustment input)
* Not LPC2210 pin signal, but by the a LPC2210 corresponding pin control.
2. J2 JTAG interface
J2 is 20PIN JTAG interface, when the need for JATG simulation debugging, JTAG emulator that
J2 connector
Can. JTAG emulator debug (set PINSEL2 register bit2 0) P1.27 to P1.31 as
51. ===================================================
- 25 -
1 +3 V +3 V 2
3 nTRST GND 4
5 TDI/P1.28 GND 6
7 TMS/P1.30 GND 8
9 TCK/P1.29 GND 10
11 RTCK/P1.26 GND 12
13 TDO/P1.27 GND 14
15 nRST GND 16
17 - GND 18
19 - GND 20
Figure 1.29 J2 connector pin
3. J3 IDE / GPIO interface
J3 40PIN IDE interface can be directly connected to the IDE hard disk, due to
its control of the port for GPIO, so
Users can use leads to I / O via J3. J3 on a total of 31 I / O, some of these I / O
can be set to PWM
The CAP, MAT, EINT SPI1 function and so on. J3 pin definition shown in
Figure 1.30.
1 P0.17/CAP1.2 GND 2
3 P2.23 P2.24 4
5 P2.22 P2.25 6
7 P2.21 P2.26 8
9 P2.20 P2.27 10
11 P2.19 P2.28 12
13 P2.18 P2.29 14
15 P2.17 P2.30 16
17 P2.16 P2.31 18
19 GND - 20
21 P0.18/CAP1.3 GND 22
23 P0.19/MAT1.2 GND 24
25 P0.21/PWM5 GND 26
27 P0.22/MAT0.0 P1.23 28
29 P1.21 GND 30
52. 31 P1.20/EINT3 P1.24 32
33 P1.17 P1.25 34
35 P1.16 P1.18 36
37 P1.19 P1.20 38
39 ATA_DASP GND 40
Figure 1.30 J3 connector pin
Figure 1.30, ATA_DASP IDE hard drive signal, this signal control
EasyARM2200 development board
IDE lamp (LED15).
Description: The printer interface circuit is connected to the J3 interface.
53. ===================================================
- 26 -
1.4 hardware resources used
A peripheral device address allocation
Development boards peripheral devices in EasyARM2200 address allocation
is shown in Table 1.15.
Table 1.15 peripheral device address allocation table
The peripheral devices jumpers set the chip select signal address range
Remarks
SST39VF160 JP6: Bank0-Flash CS0 0x80000000 ~ 0x801FFFFF
JP6: Bank1-Flash CS1 0x81000000 ~ 0x811FFFFF
IS61LV25616AL JP6: Bank0-RAM CS0 0x80000000 ~ 0x8007FFFF
JP6: Bank1-RAM CS1 0x81000000 ~ 0x8107FFFF
According to the needs of these two
Are respectively assigned to the device
Bank0 and Bank1 deposit
Storage block
RTL8019AS
-
CS3 + A22
0x83400000 ~ 0x8340001F
JP4 shorted:
Interrupt -P0.7/EINT2
Reset-P0.6
SMG240128A liquid
Grain module interface
- CS3 + A22 0x83000000 ~ 0x83000002 controlled by P1.22 backlight
Peripheral PACK
-
CS2
0x82000000 ~ 0x82FFFFFF
16-bit bus interface,
P0.10 ~ P0.13,
P0.15/EINT2 and
P0.16/EINT0
54. 2 memory address space in the chip
EasyARM2200 development board CPU PACK, you can use a variety of
compatible chip LPC2210/2212/2214/2290 of
/ 2292/2294 / LPC2114/2124/2119/2129/2194. When the use of a different chip,
the chip memory address space
Different, see Table 1.16.
Table 1.16 within the memory address space
The device FLASH address range RAM address range Remarks
LPC2210,
LPC2290
0x40000000 ~ 0x40003FFF
LPC2114,
LPC2119,
LPC2212
0x00000000
~
0x0001FFFF
0x40000000 ~ 0x40003FFF
Boot sector
Can not be saved
User code
LPC2124,
LPC2129,
LPC2194,
LPC2214,
LPC2292,
LPC2294
0x00000000
~
0x0003FFFF
0x40000000 ~ 0x40003FFF
Boot sector
Can not be saved
User code
3. I / O port allocation
56. ===================================================
- 27 -
Table 1.17 I / O port allocation table
I / O devices jumper to set the I / O Remarks
Buzzer JP9: shorting P0.7 output buzzer buzzer;
Output 1, the buzzer does not beep
CAT24WC02,
ZLG7290
(ZLG7290 control LED9,
LED10 and keys S1 to S16)
JP5: all shorted P0.2/SCL, of
P0.3/SDA,
P0.30/EINT3
I2C slave address:
CAT24WC02 - 0xA0
ZLG7290 - 0x70
ZLG7290 interrupt: P0.30/EINT3
74HC595
(Control LED1 ~ LED8)
JP8: all shorted P0.4/SCK0, of
P0.5/MISO0,
P0.6/MOSI0,
P0.8
SPI0 control the 74HC595 output, its
P0.8 as a chip select signal.
W1 to adjust the voltage the - P0.27/AIN0 voltage test points VIN1
W2 to adjust the voltage the - P0.28/AIN1 voltage test points VIN2
1.5 Other
The 1.5.1 EasyARM2200 development board power supply
EasyARM2200 development board power input interface CZ1, the input
power to the DC 9V, power polarity on the connector
The outside is negative, the POWER lamp is lit when the power is properly
connected. Connector J4, J5 and peripherals PACK have power
Output to the user board to provide power, but not too heavy, and do not
connect with other power requirements of the load power, otherwise
57. Can lead to device damage.
1.5.2 jumpers
The experimental panel some features of EasyARM2200 development
connection jumper, when a user uses a function
Parts, corresponding jumper can be shorted when users need these lines of the
other uses can be jumper disconnected.
P0.8 ~ P0.15 UART1 MODEM interface I / O, and other devices reuse part of
the mouth line, such as P0.9 complex
Used PWM DAC circuit P0.14 that complex as the ISP enable jumper, P0.10
~~ P0.13 and P0.15 multiplexed into peripheral PACK
On and so on, so UART1 MODEM function is not in use, it is best to
disconnect JP3 all jumpers.
1.5.3 CPU PACK installation
CPU PACK directional installation should be especially careful to avoid
inserting the opposite result in CPU damage. CPU PACK
Board printed with "Easy ARM2200" character, these characters are
mounted to the development of experimental board is a positive direction, as
shown in
1.31 below.
59. ===================================================
- 29 -
Chapter 2 ADS integrated development the environment and EasyJTAG
emulator application
ADS integrated development environment for ARM core microcontrollers
ARM has introduced an integrated development tool, called the English
ARM Developer Suite, mature version ADS1.2. ADS1.2 support the ARM10
before all ARM series of micro-
Controller, support for software debugging and the JTAG hardware
simulation debugging support Assembler, C, C + + source with compiler
efficiency
High, the system library function, Windows98, Windows XP, Windows 2000
and RedHat Linux
Run.
Here brief ADS1.2 to establish engineering compilation connection settings,
debugging operations. Finally introduced
Based on the use of the LPC2200 series ARM7 microcontroller project
templates, EasyJTAG emulator to install and use.
2.1 ADS 1.2 the composition of the Integrated Development Environment
ADS 1.2 consists of six sections, as shown in Table 2.1.
Table 2.1 ADS 1.2 part
Name Description use
Code generation tools
ARM assembler
The ARM C and C + + compiler,
The Thumb of C, C + + compiler,
ARM connector
Call by the CodeWarrior IDE
Integrated development environment the CodeWarrior IDE engineering
management, compiled connection
Debugger
AXD,
ADW / ADU,
armsd
Simulation debugging
60. Instruction simulator ARMulator by the AXD call
ARM development package some of the underlying routines
Utility (such as fromELF)
Some utility by CodeWarrior
IDE call
ARM Applications Library C, C + + libraries and other user programs use
Because users typically direct manipulation is the the CodeWarrior IDE
integrated development environment and AXD debugger, so this
Chapter describes the use of the two parts of the software, a detailed
description of the rest of Reference ADS 1.2 online help documentation or
phase
Relevant information.
2.1.1 CodeWarrior IDE Introduction
The ADS 1.2 the CodeWarrior IDE integrated development environment, and
integrate the ARM assembler, ARM C / C + +
Compiler Thumb C / C + + compiler, ARM connectors include project
management, code generation interface, syntax-sensitive
Sense (keyword displayed in different colors) editor, source files and class
browser and so on. CodeWarrior IDE main window shown in Figure
2.1 shows.
61. ===================================================
- 30 -
Figure 2.1 CodeWarrior development environment
2.1.2 AXD debugger Profile
AXD debugger for ARM Extended Debugger (ARM eXtended Debugger),
including all ADW / ADU
Features, support for hardware emulation and software simulation (The
ARMulator). The AXD image file can be loaded into the target memory, with
a single
Step, full-speed and breakpoint debugging features, variables, registers, and
memory data, can be observed. The AXD debugger main window
Port as shown in Figure 2.2.
62. ===================================================
- 31 -
Figure 2.2 AXD debugger
The 2.2 engineering of editing
2.2.1 Establishing the works
WINDOWS operating system, click the [Start] -> [Programs] -> [ARM
Developer Suite v1.2] ->
[CodeWarrior for ARM Developer Suite] starting Metrowerks CodeWarrior,
or the double-"CodeWarrior
for ARM Developer Suite "shortcut starter start ADS1.2 IDE shown in Figure
2.3.
Figure 2.3 start ADS1.2 IDE
Click the [File] menu, select [New ...] pop-up New dialog box, shown in Figure
2.4.
63. ===================================================
- 32 -
Figure 2.4 New dialog
Select the project template for ARM executable image (ARM Executable
Image) or Thumb executable mappings
(Thumb Executable Image), or the Thumb, ARM intertwined image (Thumb
ARM Interworking Image),
Storage path and in [Location options works, and in the [Project name] entry
input project name, click [indeed
Given] button to create the corresponding engineering project file name suffix
for mcp (hereinafter sometimes project called Project).
2.2.2 create documents
Create a text file, in order to enter the user program. Click "New Text File"
icon button, shown in Figure 2.5
Shows.
Figure 2.5 "New Text File" icon button
New file program, click on the "Save" icon button to save files (or from the
[File] menu options
Choose [Save]), the full name of the input file, such as TEST1.S. Note that,
save the file to the corresponding directory of the project,
Easy to manage and find.
Of course, you can also New dialog box, select [File] page to create a source
file, shown in Figure 2.4, or use other
A text editor to create or edit the source files.
2.2.3 Add file to project
In the project window, as shown in Figure 2.6 [Files] page blank space right
click pop-up floating menu, select "Add
Files ... "to pop up the" Select files to add ... "dialog box, select the
corresponding source file (subject Ctrl key election
Optional multiple files), click [open] button.
Project templates
Engineering the storage path
Project Name
New Text File
64. ===================================================
- 33 -
In addition, users can select the [Project] menu [Add Files ...] to add the
source files, or use the New
Source file to create the dialog box, select [File] page, select the project (ie
select "Add to Project"). Add text
The parts operation shown in Figure 2.6, as shown in Figure 2.7.
Figure 2.6 add the source files in the project window
Figure 2.7 Select files to add ... dialog box
2.2.4 compiled connected engineering
These icons button icon button in the project window, shown in Figure 2.8,
you can quickly project set
Set, compiled connection start debugging (on a different menu items can find
the corresponding menu command). They left to
To the right, respectively, as follows:
DebugRel Settings ... project settings, such as the address set the output file
settings, such as compiler options,
In which DebugRel for the current generation target (target system).
65. ===================================================
- 33 -
Synchronize Modification Dates sync each file modification date, modified
date, check the project if
Updates (such as the use of other editor to edit the source files), in
Touch column marked "√".
Make compile connection (shortcut key F7).
Debug start AXD debugging (shortcut key F5).
Run start AXD debug, and run the program directly.
The Project Inspector engineering checks, view and configure the project
source file.
Figure 2.8 project window icon button
Figure 2.9 DebugRel Settings window
Icon click "DebugRel Settings ..." button, you can project address set the
output file settings, compiled
Translation options, and so on, as shown in Figure 2.9. "ARM Linker" dialog
box to set the connection address, "Language Settings"
Set compiler compiler option.
View simple software debugging connection address settings can not click
directly on the project window "Make".
Standard button to complete the compilation connection. If compile error,
there will be a corresponding error message, double-click the error prompt
line information
Editing window that will use the source code line the cursor pointed out this
error, compiled connected to the output window in Figure 2.10 below.
Similarly,
You can find the appropriate command in the [Project] menu.
66. ===================================================
- 34 -
Figure 2.10 compiled connected to the output window
As shown in Figure 2.11, Touch the bar to mark the file is compiled, if the "√"
indicates that the corresponding file required
To recompile. Touch bar for tag files are compiled, if the "√" indicates that
the corresponding files need to be renumbered
Translation. / Cancel symbol "√" can be set by clicking on the column
position or project directory *. Tdt file deletion
The entire project source files are marked with a "√".
The Make operation in Figure 2.11 Project window
2.2.5 Open the old engineering
Click [File] menu, select Open ...] that pop up the "Open" dialog box, find the
corresponding project file (*. Mcp)
Touch bar
67. ===================================================
- 36 -
Click [Open]. Double-click the source file name to open the file in the project
window [Files] page
Edited.
The 2.3 engineering of debugging
2.3.1 Select the debug target
Figure 2.12 Choose Target window
When engineering compiled connected by click "Debug" icon button in the
project window, you can start AXD
Debug (You can also start] menu starting AXD). Click on the menu [Options]
select [the Configure Target ...]
Choose Target window pops up that, as shown in Figure 2.12. Add other
emulation driver, Target in
Only two were ADP (JTAG hardware simulation) and ARMUL (software
emulation).
Select emulation driver, click [File] Select [Load Image ...] the loaded ELF
format executable
Pieces, ie *. Axf file. Description: When engineering compiled connected by
the project name project name _Data current generated mesh
Standard "directory will generate a *. Axf debug files such as engineering the
TEST, the current generation of target Debug compile even
After connected, in ... the TEST TEST_Data Debug directory generate
TEST.axf file.
2.3.2 debug toolbar
AXD run debug tool bar as shown in Figure 2.13, debug observation window
toolbar shown in Figure 2.14, file operatives
Toolbar shown in Figure 2.15.
Figure 2.13 run debug toolbar
Running at full speed (Go)
Stop running (Stop)
68. ===================================================
- 37 -
Single-step operation (Step In), the Step command that the function call
statement, will enter the Step In command
The function.
Single-step operation (Step), each execution of a statement, then the function
call will perform as a statement.
Single-step operation (Step Out), performing this function is called, to stop the
next statement in the function call.
Run to Cursor (Run To Cursor), stop the run the program until the current
cursor row.
Set breakpoints (Toggle BreakPoint)
Figure 2.14 debug observation window toolbar
Open the register window (Processor Registers)
The open observation window (Processor Watch)
Open the variable observation window (Context Variable)
To open memory observation window (Memory)
Open the disassembly window (Disassembly)
Figure 2.15 file operations toolbar
To load debug files (Load Image)
Reload the file (Reload Current Image). AXD not reset command, it is usually
to use
Reload achieve reset (directly change the PC register zero can achieve reset).
2.4 LPC2200 series ARM7 microcontroller project template
Section 2.2 describes the establishment of new engineering, we have contacted
several standard project template ADS1.2, so
Various templates created works, they all have different set of convenient to
generate the different structure of the code, such as ARM
Executable image (generation ARM instruction code) or Thumb executable
image (generated the Thumb instruction code), or
Thumb, ARM interwoven image (generated Thumb and ARM instruction
interwoven code).
For LPC2200 series ARM7 micro-controller, we define six project templates,
these templates are generally contained
Setup information FLASH start address 0x00000000, the on-chip RAM
69. starting address 0x40000000, off-chip RAM since
Start address 0x80000000, compile connectivity options and compiler
optimization level, and so on; template contains the LPC2200 series
70. ===================================================
- 38 -
The ARM7 microcontroller starter files, including STACK.S, HEAP.S,
STARTUP.S, TARGET.C; template also
Contains the LPC2200 series ARM7 microcontroller header file (eg:
LPC2294.h and LPC2294.inc, LPC2294
Register downward compatible), scatter-loading description files (such as:
mem_a.scf mem_b.scf mem_c.scf) and so on.
2.4.1 increase ADS1.2 LPC2200 dedicated engineering template
"Lpc2200 project module" directory of all files and directories are copied to,
"<ADS1.2 install directory
> Stationery "to the operation shown in Figure 2.16 and Figure 2.17. This
step only once, after you can directly make
Project template.
Figure 2.16 Select copy files and directories
Figure 2.17 Copy files directory
71. ===================================================
- 39 -
2.4.2 use the LPC2200 dedicated engineering template to establish engineering
Start ADS1.2 IDE, click [File] menu, select New ...] that is the pop-up New
dialog box, shown in Figure 2.18
Shown. Prior increase LPC2200 dedicated engineering template, so more
several engineering template selected in the project template column
Entry.
Figure 2.18 increase in the project template
LPC2200 special project templates are described as follows:
ARM Executable Image for lpc22xx: no operating system, all the C code is
compiled into the ARM instruction
Project template.
the asm for lpc22xx: Assembler project template.
Part of the C code the Thumb ARM Interworking Image for lpc22xx:
operating system compiled for ARM
Instruction, part of the C code is compiled for the the Thumb instruction of
project templates.
Thumb Executable Image for lpc22xx: No operating system all C compiled
into the Thumb instruction work
The process template.
ARM Executable Image for UCOSII (for lpc22xx): all the C code compiled for
ARM instruction
μC / OS-II project template
Thumb Executable Image for UCOSII (for lpc22xx): part of the C code is
compiled into the ARM instruction
Part of the C code is compiled for Thumb instruction μC / OS-II project
template (use the μC / OS-II, it is not possible to all code
Compiled into the Thumb instruction).
The user to select the appropriate project template building project, shown in
Figure 2.19 to use the ARM Executable Image for
lpc22xx project template to build a project. Works four generate the target
(target system): DebugInExram
The DebugInChipFlash, RelInChip RelOutChip, their configuration is shown
in Table 2.2. Project templates will phase
72. Should the compiler parameters set up, you can use directly.
Note: the LPC2200 chip selection RelInChip goals encryption (no chip chip
FLASH
Not encrypted). The encryption chip can only use the ISP chip global erase in
order to restore the JTAG debug and ISP read /
73. ===================================================
- 40 -
Write operations.
Table 2.2 LPC2200 special project templates each generated target
configuration
Generate the target scatter-loading description file to debug entry point
address C optimization level application notes
DebugInExram mem_b.scf 0x80000000 Most RAM chip debug mode, the
program
In the off-chip RAM
DebugInChipFlash mem_c.scf 0x00000000 Most chip FLASH debug mode,
Cheng
Sequence in FLASH chip
FLASH work mode the RelInChip mem_c.scf 0x00000000 Most chip, Cheng
The sequence in the chip FLASH. Program
Write chip after chip will be protected
RelOutChip mem_a.scf 0x80000000 Most chip FLASH mode, Cheng
The FLASH sequence chip
Figure 2.19 with LPC2200 dedicated project templates to establish
engineering
2.4.3 template Scope
1 The template assumes that the user system using off-chip memory. If the
user does not use off-chip memory, you can use
LPC2100 project templates, download address for
http://www.zlgmcu.com/tools/kaifaban/EasyARM2100.asp
Of the EasyARM2100 Development Kit QuickStart and LPC210 ....
(2) The template is assumed that the user system chip memory using the 16-bit
bus, without using ETM function. If the user's
Chip memory instead of using the 16-bit bus, and / or use of ETM function,
need to modify Startup.s this file repair
Change point to see the list of procedures 2.1. Please refer to the user manual
of LPC2200 chip how to modify the download address:
http://www.zlgmcu.com/philips/philips-arm.asp. Note: the each project
templates Startup.s incomplete phase
Respectively, according to need to modify.
74. Need to change the code of program Listing 2.1 Startup.s the file
......
ResetInit
75. ===================================================
- 41 -
; The initialization external bus controller, configured according to the target
board decided
LDR R0, = PINSEL2
IF: DEF: EN_CRP
LDR R1, = 0x0f814910
; 0x0f814910 changed to a desired value, note that the minimum 4 0
ELSE
LDR R1, = 0x0f814914
; 0x0f814914 changed to a desired value, if you use ETM last 4 need to be
modified to 6
ENDIF
STR R1, [R0]
LDR R0, = BCFG0
LDR R1, = 0x1000ffef
; 0x1000ffef changed values
STR R1, [R0]
LDR R0, = BCFG1
LDR R1, = 0x1000ffef
; 0x1000ffef changed values
STR R1, [R0]
......
3. Generate target DebugInExRam. Suppose the user systems chip debugging
the RAM usage bank0 (ie origin
Address is 0x8000 0000), this one can not be modified. If the user is not the
case, you can not use DebugInExRam
This generated a target debugger.
4. Generate target DebugInExRam. Assuming the user system in debug chip
RAM size is 512K bytes, this
Article affects only generate the target DebugInExRam. If not, you will need
to modify mem_b.scf this file, modify
Point, see the list of procedures 2.2. Note: the windows will hidden this file
extension, only for mem_b.
Program Listing 2.2 mem_b.scf file need to modify the code
76. ......
ERAM 0x80040000
/ * Be modified according to the actual situation from the beginning of the
address stored program can read and write variables * /
{
* (+ RW, + ZI)
}
......
5. Generate target RelOutChip. Assume that the user system start using an
external chip FLASH start address must
0x8000 0000 (LPC2200 chip requirements), the off-chip RAM Bank1 (starting
address 0x8100
0000). Do not use if there is no off-chip FLASH RelOutChip the generated
target. If the off-chip RAM starting
The address is not as 0x8100 0000, you will need to modify mem_a.scf file,
modify the point shown in Listing 2.3. If no chip
ram, 2.4 modify mem_a.scf file list in accordance with the procedures. Note:
windows will hide this file extension,
Only appear as mem_a.
77. ===================================================
- 42 -
Program Listing 2.3 mem_a.scf file need modify the code - chip RAM
......
ERAM 0x81000000
/ * From the beginning of the address stored program can read and write
variables, changed to the actual start of the off-chip RAM address * /
{
* (+ RW, + ZI)
}
......
Program Listing 2.4 mem_a.scf file need modify the code - chip RAM
......
IRAM 0x40000000
{
Startup.o (+ RW, + ZI)
os_cpu_a.o (+ RW, + ZI)
}
ERAM +0
/ * Note the ERAM segment position change to the STACKS front * /
{
* (+ RW, + ZI)
}
STACKS 0x40004000 UNINIT
{
stack.o (+ ZI)
}
......
The 6. To generate goals DebugInChipFlash and RelInChip. A hypothetical
user system chip RAM usage Bank0 (ie
Start address 0x8000 0000). Chip RAM starting address 0x8000 0000, you
need to modify mem_c.scf
File, modify the point shown in Listing 2.3.
Users can also modify several files on the memory usage mem_a.scf,
mem_b.scf, mem_c.scf more
78. And more control.
In order to adapt to the different speed of the memory, the default project
template configuration 4 Bank memory interface for the slowest access
Speed. Users can reconfigure according to the actual use of the memory access
speed, to obtain the best performance of the system, the reference process
Sequence list 2.5.
The list of procedures 2.5 target.c file to configure the access speed of the
memory interface
void TargetResetInit (void)
{
# Ifdef __ DEBUG
79. ===================================================
- 42 -
MEMMAP = 0x3; / / remap
/ * Bank0 reconfigure the access speed * /
BCFG0 = 0x10000400;
# Endif
# Ifdef __ OUT_CHIP
MEMMAP = 0x3; / / remap
/ * Bank0 reconfigure the access speed * /
BCFG0 = 0x10000400;
# Endif
# Ifdef __ IN_CHIP
MEMMAP = 0x1; / / remap
/ * Bank0 reconfigure the access speed * /
BCFG0 = 0x10000400;
# Endif
......
}
Users can also modify target.c the TargetResetInit () function before entering
the main function to initialize the East
West (use assembler template other than construction).
2.5 EasyJTAG emulator installation
The EasyJTAG emulator is Luminary Micro Development Co., Ltd.
developed the LPC2000 family of ARM7 micro-controller
Made a JTAG emulator, to support ADS1.2 integrated development
environment, supports single-step, full-speed and breakpoint debugging
features, support
Holding download the program to the chip FLASH and specific types of off-
chip FLASH, using ARM's standard 20-pin JTAG
Simulation debugging interface. Its main features are as follows:
� the RDI communication interface, seamless to scarfing ADS1.2 and RDI
interface IDE debugging environment.
� up to 1M rate JTAG clock drive.
� sync Flash refresh technology (synFLASH), synchronization download user
code into Flash, and that under that tune.
80. � using the synchronous timing control technology (synTIME), simulation is
reliable and stable.
� support 32-bit ARM instruction / 16 THUMB instruction mixed debugging.
� increase mapped register window, user-friendly view / modify the register
values.
� micro-volume design, user-friendly flexibility.
EasyJTAG emulator appearance shown in Figure 2.20, the driver can
http://www.zlgmcu.com/tools/kaifa
ban/EasyARM2200.asp Web download or on the product CD (the directory
named EasyJTAG_drive
A readme.txt file in the directory noted).
81. ===================================================
- 44 -
The emulator Figure 2.20 EasyJTAG the physical appearance
To 2.5.1 installed EasyJTAG emulator
First of all, the driver of the EasyJTAG emulator (like product CD
EasyJTAG_drive directory all files
Pieces) to the ADS BIN directory, such as C: Program Files ARM
ADSv1_2 BIN.
Then, the EasyJTAG emulator's 25-pin interface connected via a parallel port
extension cord with the parallel port of a PC,
EasyJTAG emulator 20-pin interface development boards J2 EasyARM2200
received by 20 PIN connection cable
Matching transformer (9V) power supply to the development board.
Then enter AXD debug environment, open the [Options] -> [Configure Target
...] to pop up the Choose Target
Window, as shown in Figure 2.12. Click "ADD" to add the emulator driver in
the Add File window choose, such as C: Program
Files ARM ADSv1_2 BIN directory EasyJTAG.dll, click "Open".
Description: Windows system, click [start] -> [Programs] -> [ARM Developer
Suite v1.2] ->
【The AXD Debugger】 can run AXD software directly.
Note: Add Files window displays DLL file, set the the WINDOWS file browser
window "file
Folder Options (O) ... "," hidden files "View page items using the" Show All
Files ".
And 2.5.2 use EasyJTAG emulator
Computer parallel port with EasyJTAG of emulator connection and emulator
JTAG port connector into EasyARM2200
Development board J2 AXD software is set to simulation debugging.
1 emulator settings
AXD debugging environment, open the [Options] -> [Configure Target ...]
Choose Target window pops up,
"Target Environments" box, select "EasyJTAG ..." item.
Click the "Configure" button, enter "EasyJTAG Setup" settings window, as
shown in Figure 2.21. "ARMcore"
82. Select the CPU type, select the "Options" item Halt and reset. Then click
"OK", and then click on the "OK"
The connection (development board) operation will be carried out at this time
EasyJTAG. If the connection is successful, the development board LPC2210
chip
EasyJTAG control, the previously running program is stopped.
Note: Sometimes, AXD will pop up an error dialog box as shown in Figure
2.23, or a similar dialog box can
Click "Connect mode ...", and then select the "ATTACH ..." to determine,
and then click "Restart". If EasyJTAG
Correctly connected to the development board, AXD code window will display
a blank, then you can use [File] -> [Load Image ...]
Debug file is loaded, JTAG debug.
83. ===================================================
- 45 -
Figure 2.21 "EasyJTAG Setup" settings window
EasyJTAG set Option Description:
ARMcore items, select CPU model;
Tap No. Items, when the CPU for LPC2106/2105/2104, master / slave JTAG
debug port, Tap1 main
Tap2 from;
Connection, hardware connection interface options;
Halt Mode, the shutdown mode selection contains Halt program (to stop CPU)
and Halt and reset (reset and then stopped
Stop CPU) two;
Aux. Option, support options, including Step In Interrupt (allows single step
into the interrupt) and Erase Flash
when need (allow EasyJTAG Erase Flash) two;
Flash Type, chip FLASH Model Select two FLASH chip, when ARMcore
choose LPC2200
Series CPU this to be effective. When the program needs to be downloaded to
the chip FLASH, EasyJTAG emulator will be selected core
Model of chip erase / program.
Flash 0 Addrss, the first piece of Flash address set contains the Start Address
(Flash the start address, such as
Bank0 0x80000000) Memory Size (memory capacity when fill in the actual
chip capacity, such as
The capacity of the SST39VF160 0x200000). When the program do not need
to download to the chip FLASH, or the system does not chip
When FLASH, Start Address and Memory Size is set to 0.
The Flash 1 Addrss, with Flash 0 Addrss.
2 emulator application
Press F5 or Debug icon button to ADS1.2 IDE environment directly into AXD,
but sometimes appear as
Prompt shown in Figure 2.22, the processing method is to click "OK", and
then click the "Load Session window pop-up to take
Elimination. "Into AXD After, the main debug window without any code, and
[File] -> [Load Image ...] menu item without
84. Efficiency, the need to re-open the [Options] -> [Configure Target ...] Click
the "OK", and then click [File]
Select Load Image ...] to load the debug files.
85. ===================================================
- 46 -
Figure 2.22 session file error
AXD debug environment, sometimes the Fatal AXD Error window pops up,
as shown in Figure 2.23, then you can
To click on the "Connect mode ...", and then select the "ATTACH ..." to
determine, and then click "Restart". Next on
Can use [File] -> [Load Image ...] loaded debug files for JTAG debugging.
Note: for some of the PC, EasyJTAG not correctly connected to the
development board, always error dialog box pops up, then can be
To check the parallel port connection is reliable, check whether the parallel
port on the dongle is connected to, or to re-development board under electric.
In addition,
CMOS settings in the PC parallel port mode is set to SPP mode, set the
parallel port of the resources for the 378H to 37FH.
Figure 2.23 Fatal AXD error
Chip peripheral registers observation. To open in the System Views] ->
[Debugger Internals] LPC2000
Series ARM7 microcontroller chip peripheral register window. Some registers
are not allowed to deliver the show or read operation will affect
The value of other registers, so can not be found in the on-chip peripheral
register window, if you need to observe these registers can be
Use of the the memory observation window (Memory).
JTAG download the program to the FLASH. Enter the AXD debugging
environment, open the [Options] -> [Configure
Target ...] Choose Target window pops up, click on the "Configure" button to
enter the set of "EasyJTAG Setup"
Window, select "FLASH" item "Erase Flash when need", then OK to exit. In
this way, each loaded FLASH
Address debug files, erase the FLASH and download code to FLASH.
2.6 firmware
To download the program to the on-chip FLASH FLASH or external JTAG
emulator debug through (ie curing
Program), before they can run offline.
2.6.1 chip FLASH curing
86. Firmware for LPC2200 series ARM7 microcontroller chips to chip FLASH
two parties
Style to achieve: JTAG interface to download and use ISP function download.
No matter which way the user first set compiled
Translation of the address of the link, the code address start from 0x00000000
address, such as using LPC2200 special project templates
In to generate target selection RelInChip, scatter-loading description the file
mem_c.scf such program shown in Listing 2.6.
, ROM_LOAD loading area behind 0x00000000 the address of the start of the
loading area (DPS
87. ===================================================
- 47 -
Put the starting address of the program code), can also be added later in the
size of its space, such as "ROM_LOAD 0x00000000
0x20000 "loading area starting address 0x00000000, size is 128K bytes;
ROM_EXEC describe the execution
Line of the address, location defined on the first piece, the starting address of
the starting address space size and loading area space
Consistent. Placed from the start address to the scale (ie Startup.o (vectors +
First) where Startup.o for Startup.s
Target file), and then place the other code (* (+ RO)); the variable area IRAM
starting address 0x40000000 placed
Startup.o (+ RW, + ZI); The variable area ERAM the starting address
0x80000000, placed addition to Startup.o file outside
Other variables of the file (ie * (+ RW, + ZI)); close to the the ERAM variable
area system heap space (HEAP) is placed
Description heap.o (+ ZI); stack area the STACKS using the on-chip RAM,
ARM stack generally use the full descending heap
Stack, so the starting address of the stack area is set to 0x40004000, placed be
is described as stack.o (+ ZI).
Program Listing 2.6 scatter-loading description file for curing procedures
mem_c.scf
ROM_LOAD 0x00000000
{
ROM_EXEC 0x00000000
{
Startup.o (vectors, + First)
* (+ RO)
}
IRAM 0x40000000
{
Startup.o (+ RW, + ZI)
}
ERAM 0x80000000
{
88. * (+ RW, + ZI)
}
HEAP +0 UNINIT
{
heap.o (+ ZI)
}
STACKS 0x40004000 UNINIT
{
stack.o (+ ZI)
}
}
1. Use the JTAG interface to download
JTAG interface to download the program to the FLASH JTAG emulator
support is required. EasyJTAG emulator support
Held LPC2000 series ARM7 micro controller chip FLASH download, so you
can use this feature to program
To FLASH, in order to run offline.
89. ===================================================
- 48 -
First to set EasyJTAG emulator, see Figure 2.24 Note ARMcore must select
the correct CPU type
Number, otherwise may lead to programming errors.
Figure 2.24 the FLASH of EasyJTAG download chip set
Then chosen to generate the target of the project RelInChip, compiled and
linked AXD debugging environment, and then press the F5 key to enter in
To load the the debug image file that will download a program to FLASH.
In fact, as long as you load the debug image file and code address is set to
FLASH address, EasyJTAG
Emulator that the program is downloaded to the specified FLASH.
ISP download
LPC2200 series ARM7 microcontroller chip with ISP (LPC2210 chip FLASH,
can not be
The ISP programming), you can download the program via the serial port.
First, the current project compiled to generate HEX file, open the engineering
DebugRel Settings window, in the Target
Post-linker is set in the Settings item selected the ARM fromELF (as shown in
Figure 2.25).
90. ===================================================
- 49 -
Figure 2.25 Set Post-linker
In the ARM formELF items set the output file type, such as the Intel 32 bit
Hex, and then set the output text
The file name can also be specified directory, If you do not specify a directory,
the generated files are stored in the directory of the current project (Figure
2.26
Shown). Recompile connection, compiled by that will generate the specified
output file.
Figure 2.26 generated file set
91. ===================================================
- 50 -
Generate HEX file, then use the serial extension cord connected to a PC serial
port (COM1) and EasyARM2200 real
Examination board (UART0), and experimental board ISP (JP1) jumper
shorted. Open LPC2000 Flash Utility software, and set
Set the serial port, baud rate, system crystal (note crystal frequency items
kHz), as shown in Figure 2.27.
After setting parameters, click the Read Device ID button, read the chip ID
number, if the read was successful (status bar displays "Read
Part ID Successfully! "), Indicates that the ISP connection is successful.
Otherwise, when the error message is reset LPC2000
First press RST button EasyARM2200 development board to reset, and then
determine the prompt, as shown in Figure 2.28.
After a successful connection, first use the Erase button to erase the selected
sectors FLASH, then enter the Filename entry
Download the HEX file, click Upload to Flash button to start the download
process. Cured of the program, the ISP (JP1)
Jumper disconnected, reset the system to run the program again. Description
LPC2200 series ARM7 microcontrollers to Scale
32-bit data (machine code instruction 0x00000000 ~ 0x0000001c address)
accumulation and zero to Kai
Activity user program. Retained by setting the data in the exception vector
address 0x14 achieve.
Figure 2.27 LPC2000 Flash Utility software settings
Figure 2.28 Reset LPC2000 Tip
3 run offline
� the JP7 jumper selectable INSIDE, JP1 disconnection inhibition ISP;
JP6 jumper � to choose RAM BANK0 address, FLASH BANK1 address;
� reset the system, you can start the program in the chip FLASH.
2.6.2 chip FLASH curing
EasyJTAG emulator supports specific chip FLASH programming. The user
must first address, set the compiler links
92. ===================================================
- 51 -
Code address 0x80000000 address begins LPC2200 special project templates,
such as the use of the election in the target system
With RelOutChip, scatter-loading description file mem_a.scf such as the list
of procedures 2.7 below.
, ROM_LOAD the name of the loading area behind the starting address
0x80000000 said loading zone (due to
Chip FLASH allocation Bank0); ROM_EXEC described perform the address
position defined on the first piece of
Starting address of the start address, size and loading area, the size of the
space to be consistent from the start address placed to scale (ie
Other Startup.o (vectors, + First), which Startup.o target file Startup.s), then
place the code (ie *
(+ RO)); the variable area IRAM start address 0x40000000, placed Startup.o
(+ RW, + ZI); stack area STACKS
The use of on-chip RAM, ARM stack is generally full descending stack, so the
starting address of the stack area is set to
0x40004000, place described as stack.o (+ ZI); starting address of the variable
area ERAM 0x81000000 (chip
RAM allocation for BANK1,) placed outside Startup.o file file variable (ie, *
(+ RW, + ZI)); close to
The ERAM variable after the system heap space (HEAP), placed is described
as heap.o (+ ZI);
List of procedures for curing procedures 2.7 scatter-loading description file
mem_a.scf
ROM_LOAD 0x80000000
{
ROM_EXEC 0x80000000
{
Startup.o (vectors, + First)
* (+ RO)
}
IRAM 0x40000000
{
93. Startup.o (+ RW, + ZI)
}
STACKS 0x40004000 UNINIT
{
stack.o (+ ZI)
}
ERAM 0x81000000
{
* (+ RW, + ZI)
}
HEAP +0 UNINIT
{
heap.o (+ ZI)
}
}
1. Use the JTAG interface to download
JTAG interface to download the program to the chip FLASH JTAG emulator
support is needed. EasyJTAG simulator
94. ===================================================
- 52 -
Support of specific chip FLASH download program, so that you can use this
feature of the program is downloaded to the chip FLASH
In order to run offline.
JP6 jumper select Bank0-Flash, Bank1-Ram;
Then set EasyJTAG emulator, see Figure 2.29;
Figure 2.29 download chip the FLASH of EasyJTAG set
Final selection will generate the target of the project RelOutChip, compiled
and linked AXD debug environment, and then press the F5 key to enter
Load debug image file that will download the program to the chip FLASH.
In fact, as long as you load the debug image file, and the address of the code is
set to address chip FLASH
The EasyJTAG emulator that the program is downloaded to the specified
FLASH.
2 run offline
� JP7 jumper OUTSIDE, to the JP1 disconnect prohibit the ISP;
JP6 jumper � will be select Bank0-Flash, Bank1-Ram;
� reset the system, you can start the program in the chip FLASH.
95. ===================================================
- 53 -
Chapter 3 Basic Experiment
The 3.1 ADS 1.2 integrated development environment to practice
3.1.1 The purpose of the experiment
Learn to use ADS 1.2 integrated development environment.
3.1.2 The laboratory equipment
� Hardware: PC, a
� software: Windows98/XP/2000 system, ADS 1.2 integrated development
environment
3.1.3 Experimental content
1 to create a new project;
2 Create a C source file, and added to the project;
Set compiler Connection control options;
4. Compile connection works.
3.1.4 prelab requirements
Carefully read the content of Section 2.2 of the book section ADS project
editor.
3.1.5 Experimental Procedure
1 start ADS1.2 IDE integrated development environment, select [File] -> [New
...] ARM Executable Image
The project template to create a project, project name for the ADS, as shown
in Figure 3.1.
Figure 3.1 build ARM instruction code works
2 Select [File] -> [New ...] a new file TEST1.S, the settings directly added to
the project, see
Figure 3.2. Enter the code shown in Listing 3.1 and save it, as shown in Figure
3.3.
96. ===================================================
- 54 -
Figure 3.2 new file TEST1.S of
Program the Listing 3.1 TEST1.S file code
AREA Example1, CODE, READONLY; declarative code segment Example1
ENTRY; identification program entry
CODE32; Statement 32-bit ARM instruction
START MOV R0, # 15; setting parameters
MOV R1, # 8
ADDS R0, R0, R1; R0 = R0 + R1
B START
END
Figure 3.3 added TEST1.S the project management window
97. ===================================================
- 55 -
3 Select [Edit] -> [DebugRel Settings ...], the left side of the DebugRel Settings
dialog box, select the ARM
Linker item, then set in the Output page the connected address (see Figure
3.4), debug entry address set in the Options page (see Figure
3.5).
Figure 3.4 project to connect the address set
Figure 3.5 project commissioning entry address set
4 Select [Project] -> [Make], compiled connect the whole project.
3.1.6 Thinking
What is the role of project templates? (Hint: Compile control settings)
How to force re-compile all files of the project? (Hint: select [Project] ->
[Remove Object Code ...]
The deleted engineering in the *. Obj file)
98. ===================================================
- 56 -
3.2 assembly instructions experimental 1
3.2.1 The purpose of the experiment
1. Learn of ADS 1.2 integrated development environment and the ARMulator
software simulation;
2. Master the usage of the the ARM7TDMI assembly instructions, and be able
to write a simple assembler;
3. Mastered conditional execution of instructions and use LDR / STR
instruction to complete the memory access.
3.2.2 The laboratory equipment
� Hardware: PC, a
� software: Windows98/XP/2000 system, ADS 1.2 integrated development
environment
3.2.3 Experimental content
LDR instruction reads data 0x40003100, data plus 1 if the result is less than 10
STR refers
So that the result is written back to the original address, if the result is greater
than or equal to 10, put the write back to the original address.
Simulation using ADS 1.2 software, single-step, full-speed running the
program, set breakpoints, open the register window (Processor
Registers) to monitor the value of R0, R1, open the the memory observation
window (Memory) monitor on 0x40003100 value.
3.2.4 prelab requirements
Carefully read Chapter 4 ARM "ARM based embedded system tutorial
instruction system;
Carefully read the contents of the book Edit 2.2, 2.3 section of ADS project
and AXD debugger. (The experimental use software emulation)
3.2.5 Experimental Procedure
Start ADS 1.2, to use ARM Executable Image project template to create a
project Instruction1.
2. Establish assembler source file TEST2.S, the preparation of the
experimental procedure, and then added to the project.
Set works connected address RO Base 0x40000000, RW Base for 0x40003000.
Set debug into
99. Port address Image entry point 0x40000000.
Compile the connection works, select [Project] -> [Debug], start AXD
software simulation debugging.
Open the register window (Processor Registers), the Select Current
monitoring R0, the value of R1. Open storage
Is observation window (Memory) setting observed address as 0x40003100
Pattern Size 32Bit monitoring
0x40003100 address value.
Description: Memory window, click the right mouse button, select the display
format for 8Bit, 16Bit, 32Bit Size item.
Shown in Figure 3.6.
Can single-step run the program, you can set / cancel the breakpoint, or run
the program at full speed, stop the program running, debugging
Observed when the value on the address registers and 0x40003100. The
results are shown in Figure 3.7.
100. ===================================================
- 57 -
Figure 3.6 Memory window display formatting
Figure 3.7 compilation of experimental results of a program run
3.2.6 experimental reference program
1 assembly instruction experiment reference program shown in Listing 3.2.
The program list 3.2 assembly instructions experimental reference program
COUNT EQU 0x40003100; define a variable address 0x40003100
101. ===================================================
- 58 -
AREA Example2, CODE, READONLY; declarative code segment Example2
ENTRY; identification program entry
CODE32; Statement 32-bit ARM instruction
START LDR R1, = COUNT; R1 <= COUNT
MOV R0, # 0; R0 <= 0
STR R0, [R1]; [R1] <= R0, that set COUNT 0
LOOP LDR R1, = COUNT
LDR R0, [R1]; R0 <= [R1]
ADD R0, R0, # 1; R0 <= R0 + 1
CMP R0, # 10; R0 and 10 comparison, affect the condition code flags
MOVHS R0, # 0; If R0 is greater than or equal to 10, this instruction is
executed, R0 <= 0
STR R0, [R1]; [R1] <= R0, ie save COUNT
B LOOP
END
3.2.7 Thinking
If instead of the program in Listing 3.2 LDRB / STRB load / store instructions
(LDR / STR), the program will be
Correct execution?
LDR pseudo-instruction LDR load instruction features and applications
What's the difference between an example? (Hint: LDR directive
The form of a "LDR Rn, = expr")
LDR / STR instructions before index offset instructions how to write?
Instructions how to operate?
The AXD debugger how to reset program? (Hint: Select [File] -> [Reload
Current Image] re-add
Upload image files)
3.3 assembly instructions experimental 2
3.3.1 The purpose of the experiment
1 to master the use of the ARM data processing instruction;
Learn the ARM instruction flexible two operands.
3.3.2 The laboratory equipment
� Hardware: PC, a
102. � software: Windows98/XP/2000 system, ADS 1.2 integrated development
environment
3.3.3 Experimental content
1. MOV and MVN instructions to access the ARM general-purpose registers;
2 Use the ADD, SUB, AND, ORR, CMP, TST instructions to complete the
data addition and subtraction and logical operations.
103. ===================================================
- 59 -
3.3.4 prelab requirements
Carefully read Chapter 4 ARM "ARM based embedded system tutorial
instruction system;
Carefully read the contents of the book Edit 2.2, 2.3 section of ADS project
and AXD debugger. (The experimental use software emulation)
3.3.5 Experimental Procedure
Start ADS 1.2, to use ARM Executable Image project template to create a
project Instruction2.
2. Establish assembler source file TEST3.S, the preparation of the
experimental procedure, and then added to the project.
Set works connected address RO Base 0x40000000, RW Base for 0x40003000.
Set debug into
Port address Image entry point 0x40000000.
Compile the connection works, select [Project] -> [Debug], start AXD
software simulation debugging.
Open the register window (Processor Registers), select Current Item
monitoring the value of the register.
Description: Use the left mouse button to select a register, and then click the
right mouse button, choose to display the Format item
Format Hex, Decimal, and so on. Shown in Figure 3.8.
Figure 3.8 setting register display format
6 single-step run the program and observe the changes of register values.
Description: change registers will be displayed in red. Figure 3.9.
104. ===================================================
- 60 -
Figure 3.9 register values to update the display
3.3.6 experimental reference program
Experiment 2 assembly instruction reference program shown in Listing 3.3.
The Listing 3.3 assembly instructions Experiment 2 reference program
X EQU 11; definition of X is 11
Y EQU 8; define the Y value of 8
BIT23 EQU (1 << 23); defined BIT23 value 0x00800000
AREA Example3, CODE, READONLY; declarative code segment Example3
ENTRY; identification program entry
CODE32; Statement 32-bit ARM instruction
START; MOV, ADD instruction to achieve: R8 = R3 = X + Y
MOV R0, # X; R0 <= X, the value of X must be 8-bit map data
MOV R1, # Y; R1 <= Y, the value of Y must be an 8-bit map data
ADD R3, R0, R1; i.e. R3 = X + Y
MOV R8, R3; R8 <= R3
; MOV, MVN, SUB instruction to achieve: R5 = 0x5FFFFFF8 - R8 * 8
MVN R0, # 0xA0000007; a 0xA0000007's anti-code for 0x5FFFFFF8
SUB R5, R0, R8, LSL # 3; R8 left by 3 bits, the result is R8 * 8
; Judgment using the CMP instruction (5 * Y / 2)> (2 * X) it? Greater than R5
= R5 & 0xFFFF0000 or R5 = R5 | 0x000000FF
MOV R0, # Y
ADD R0, R0, R0, LSL # 2; calculated R0 = Y + 4 * Y = 5 * Y
MOV R0, R0, LSR # 1; calculate R0 = 5 * Y / 2
