project report

1. Efficiency Improvement of A High
Power Amplifier
PROJECTREPORT
BACHELOR OF TECHNOLOGY
ELECTRONICS AND COMMUNICATION ENGINEERING
Under The Guidance Of Submitted by
Dr.Priyanka Mondal Abhishek Kumar (1304010)
[ ASST. PROF. ECE-NITPATNA ] Krishna Kumar (1304035)
Prashant Shekhar (1304038)
NATIONAL INSTITUTE OF TECHNOLOGY, PATNA

2. 2
CERTIFICATE
This is to certify that Abhishek Kumar(1304010),Krishna Kumar(1304035) & Prashant
Shekhar(1304038) student of ECE 8th semester of National Institute of Technology,
Patna has done project on Efficiency Improvement of a high Power Amplifier using
ADS in partial fulfilment of degree of Bachelor of Technology (2013-2017).
Dr. Priyanka Mondal Dr. G. Pradhan
(Project Supervisor) (Head of Department)
ELECTRONICS AND COMMUNICATION ENGINEERING
NATIONAL INSTITUTE OF TECHNOLOGY, PATNA

3. 3
TABLE OF CONTENTS
Page
NOMENCLATURE.......................................................................................... 4
ACKNOWLEDGEMENTS.............................................................................. 5
ABSTRACT………………………………...................................................... 6
CHAPTER 1 INTRODUCTION...................................................................... 7
1.1 Motivation............................................................................................. 7
1.2 Thesis Organization.............................................................................. 8
CHAPTER 2 INITIAL ESTIMATION OF THE PA PERFORMANCE ….. 9
2.1 Figure of merit……………………………………………………….. 10
CHAPTER 3 INTRODUCTION TO HEMT……........................................... 11
CHAPTER 4 RF POWER AMPLIFIER OVERVIEW ..................................... 13
4.1 Class A Power Amplifier ....................................................................... 13
4.2 Class B Power Amplifier ....................................................................... 14
4.3 Class AB Power Amplifier…………..................................................... 14
4.4 Class C Power Amplifier ....................................................................... 14
4.5 Class D Power Amplifier ....................................................................... 15
4.6 Class E Power Amplifier ........................................................................ 16
4.7 Class F Power Amplifier …………………………………………….... 18
4.7.1 Fourier series expansion of voltage and current waveeforms….. 19
4.7.2 Harmonic termination impedances…………................................ 21
4.7.3 Third harmonic peaking topology………. ................................... 22
4.7.4 DC biasing .. …….......................................................................... 23
CHAPTER 5 AMPLIFIER DESIGN STEPS IN SIMULATION….. 25
5.1 DC biasing condition for Class F Power Amplifier.................................... 25
5.2 S-parameter verification & Stability ......................................................... 26
5.3 Load pull .................................................................................................... 31
5.4 Impedance matching …............................................................................... 31
5.5 Simulation circuits and results. …………………………………………... 32
CHAPTER 6 CONCLUSION AND FUTURE SCOPE......................................... 40
REFERENCES…………………………………………………………………… 41

4. 4
NOMENCLATURE
RF Radio Frequency
RFC Radio Frequency Choke
FCC Federal Communications Commission
GSM Global System for Mobile Communication
LTE Long Term Evolution
PA Power Amplifier
WiMAX Worldwide Interoperability for Microwave Access
WCDMA Wideband Code Division Multiple Access
CMOS Complementary Metal Oxide Semiconductor
MOSFET Metal Oxide Field Effect Transistor
BJT Bipolar Junction Transistor
HEMT High Electron Mobility Transistor
QAM Quadrature Amplitude Modulation
P-I-N P dopped - Intrinsic (undopped) - N dopped region
MEMS Micro-Electromechanical Systems
MMIC Monolithic Microwave Integrated Circuit
ADS Advanced Design System
FR-4 Flame Retardant 4
DUT Device Under Test
GPIB General Purpose Interface Bus
VSG Vector Signal Generator
RMS Root Mean Square
CW Continuous Wave

5. 5
ACKNOWLEDGEMENTS
It is with a great pleasure that I acknowledge the many people who have helped me through
this journey. Most importantly, I would like to thank Dr. Priyanka Mondal for her support,
guidance and mentorship throughout my project study here at NIT Patna. In addition, I would
also like to thank my friends, colleagues, the department faculty and staff for making my
time at NIT Patna a wonderful experience.
Finally, we would like to thank our family for all the
financial help and the source of unending love and support in my entire education journey.
Our parent deserve all the credits for teaching us the sense of hard work, perseverance and
ethics. They have led us to where we are now and we cannot thank them enough.

6. 6
ABSTRACT
Due to the rapid development of telecommunication devices, operating speeds are getting
faster and more power is being consumed by those devices. Power amplifiers (PA) at the
front end of wireless equipment have drawn a big concern from engineers because of their
large power consumption in the system. There is a lot research conducted on PA solutions for
improving power-added efficiency (PAE) of amplifiers. PAE is a figure of merit representing
how efficient the PA converts DC power to RF power. With PAE increased, the device is
able to output the same amount of power with less DC power consumed. Non-linear Class-F
PAs have drawn the most attention among all different classes of PAs from engineers
because of their capability of outputting high power and providing good PAE. Class-F
boosts up PAE by controlling the harmonic content at the output.
Advanced Design System (ADS) from Agilent is used for design and simulation based on
the ADS with enhancement mode pseudomor high electron mobility transistor (E-P HEMT ).
In this design, the harmonics at the input are controlled as well as the harmonics at the
output. By terminating harmonics with proper impedances at the output, a square voltage
waveform and a half-sine current waveform are obtained at the transistor drain terminal. The
overlapping area between the voltage and current waveforms can be reduced as well as the
active device power consumption.
The final design operating at 2.4 GHz produced a PAE of 62.197% with 33.015dBm output
power in simulation. The thesis has shown the effectiveness of the Class-F PA to boost up
PAE by controlling upto 25 harmonic power from delivering to the load and shaping the
waveforms at the transistor terminals.

7. 7
CHAPTER 1
INTRODUCTION
1.1 Motivation
Power Amplifier is an electronic device used to amplify low power signal to relatively larger
power signal [1]. It is used in wireless communication system. For a PA designers, the main
challenge is to maintain high efficiency and good linearity across multiple different
frequency bands modulation standards , and bandwidths. We use smart phones. Smart
phone provide features such as internet browsing , video conferencing ,online gaming ,GPS
and file transferring. The speed of communication is getting faster in order to fulfil the
needs. The power consumed in cellular network infrastructure is directly proportional to data
transfer rate [2]. As data transfer rate is increases ,the power consumed is increases in
cellular network .To fulfil the needed level of power, modern transmitters utilize multiple
parallel PAs with each separate PA dedicated to a specific communication standard and/or
band within a given standard .In design of PA ,we focus mainly on PAE , linearity, output
power and figure of merit. Power Amplifier are most critical and power hungry modules to
design in a wireless communication system. Wireless communication demands multiband
transmitter and receiver, so for getting optimum efficiency and linearity in power amplifiers
in multi band applications becomes more and more challenging day by day.
Consequently ,there is requirement to improve the performance and the PAE of PAs. Among
different classes of PA ,class F has drawn the most attention because of its capability of
outputting high power and providing excellent PAE by using selected harmonics to shape
its drain voltage waveform and drain current waveforms . Voltage waveform is approximate
a square wave while current waveform is half sine wave [2].

8. 8
1.2 Thesis Organization
In chapter2, we will discuss different specification of power amplifier which is followed by
designer in power amplifier design. In specification we will go to technology ,which will be
used in PA design ,frequency and input power condition for a good power amplifier and also
different parameter which should measure before going to submission of power amplifier.
Then in chapter 3 we will discuss about different performance parameter of power amplifier .
In which we will go to figure of merit , efficiency, power added efficiency and linearity of
power amplifier. where we will mention which parameter should be high or low for a good
power amplifier. Then in chapter4 we will elaborate about technology which we are using in
simulation of power amplifier. Basically we will discuss about HEMT technology. Then in
chapter5 we will go to overview of different class of power amplifier . we will elaborate
about class A, class B, class C,class D, class E and class F. Here we will tell advantage and
disadvantage ,efficiency ,linearity of different class of power amplifier. Then in chapter 6 we
will introduce design method of class F power amplifier ,here a full implementation of our
circuit is present. Here first we will first go to DC analysis and we will choose operating
point for class F power amplifier .Then s-parameter analysis , stability, load pull, impedance
matching circuit is present and finally we will show simulation circuit and result in chapter
6.Then this thesis will be closed in chapter 7 with conclusion of our major project.

9. 9
CHAPTER 2
INITIAL ESTIMATION OF THE PA PERFORMANCE
In my project we have chosen E-Phemt because of its wide band gap and it has high thermal
conductivity and it is very reliable for high power operation.In ATF53189 model transistor
,transistor can operate till 6 GHz and it can give output power till 10W or 40 dbm. this
transistor has higher gain compared to other transistors.At our operating frequency this
transistor provide small –signal gain of 11.65.In class F power amplifier operating point is lie
in cutoff region which limit the gain of power amplifier [3].
This model of transistor ,it has better power added efficiency (PAE) at lower frequency and
also at higher frequency.Consequently ,here in this project we designed class F power
amplifier at operating point 2.4 GHz and maximum permitted input power 25dBm this is for
obtain best power added efficiency.PAE will be introduced in later section.
We are getting PA gain of 11.65, the output power is about 33.105 dBm. The power
amplifier has output power about 33.105dBm. PAE of power amplifier is 62.197% or higher
because power amplifier like class F are able to achieve a maximum PAE of more than 62%
or more general. Below table is initial PA performance value [4].
Table 1. PA performance at 2.4 GHz
Operating frequency 2.4 GHz
Input power 18.85dBm
Output power 33.015dBm
GAIN 11.65
Power added efficiency(PAE) 62.197%

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2.1 Figure of merit
Power amplifier devices have some important performance parameter in which
efficiency is one good parameter .Efficiency is good parameter for low power operation
and for small signal amplifiers [4]. It is mathematically defined as ratio output RF
output power to DC supply power . It tells ability of power amplifier to convert ac power
into dc power. If efficiency increases it means we can get same output power for less dc
power consumption. Life time of battery of cellular phone can be increases by increases
efficiency and it can satisfy consumers needs. There is a trade -off between efficiency
and linearity, for more efficiency we have to lost linearity and for more linearity we have
to lost efficiency. Linearity means how well input signal shape is reproduced at output
side. Since we add more hardware in cell phone so efficiency improvement is a major
issue for designer, but for larger signal we cannot major performance by efficiency only
[5]. Here we define figure of merit is power added efficiency(PAE).It is mathematically
defined as output power-input power/dc power. It tells efficient ability of power amplifier
to convert dc power into ac power.PAE should be high for a good power amplifier. PAE
is mainly uses for larger signal RF application. Another parameter is gain, it is defined as
ratio output power to input power. Gain is connected to PAE if PAE will increases then
gain will be increases. Another last performance parameter is figure of merit (FOM) it is
defined as ratio of power dissipation in device to output RF power. Power dissipation in
transistor is undesired so FOM should be low as much as possible for a good power
amplifier [6].

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CHAPTER 3
INTRODUCTION TO HEMT
Fig 1. Active device family tree
In our project ,we have used HEMT technology transistor .HEMT means high electron
mobility transistor which is come from FET class. It is made of two different band gap
materials for making channel, it is not like MOSFET ,which uses a doped region as a
channel between source and drain. Since in HEMT we uses two different band gap
material so it is also known as hetro-structure FET (HFET).Active device family tree
figure is shown above [7].
HEMT type active devices is earlier made by using Silicon or
gallium Arsenide(GaAs) compounds. While ,these day HEMT is made by Silicon
Carbide (SiC) and Gallium Nitride(GaN) . GaN based HEMT provide higher breakdown
voltages ,higher output impedance ,low parasitic capacitance and provide good efficiency
at higher frequency. But there is some demerit like it is costly and it is less linear than
LDMOS. Another quality of HEMT is higher conductivity and wider band gap [8]. In any
device higher band gap allow higher operating temperature and lower vulnerability to
external noise , noise like shot noise .Since HEMT based devices require more energy to
escape from the conduction band. Wider band gap also give a higher breakdown voltage
and higher power density ,thus this type of transistor is able to provide higher power in
smaller physical size [9].

12. 12
Thermal conductivity is an important aspect of transistor ,it tells ability to avoid
increasing the junction temperature that provide the device higher reliability at high
power operations , it will remove heat problem ,it disperse heat quickly. GaN based
HEMT has high electron and hole mobility that gives smaller knee voltage [10].
Table 2. Comparison of different parameter of different type of HEMT

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CHAPTER 4
RF POWER AMPLIFIER OVERVIEW
Power amplifiers are classified into two major groups: Linear power amplifiers(Biasing
type power amplifier) and Nonlinear Power amplifiers(Switching type Power amplifiers).
Linear power amplifiers are define on the basis of operating point for operation and since
operating point can be fixed by biasing so it is called as biasing type power amplifier
[11]. Linear power amplifier has good linearity but efficiency is not good.Due to linearity
output has very few harmonics. Linear type power amplifier is class A,class B,class AB,
class C. Non-linear power amplifiers operate near cut off region here efficiency is good
but linearity is not good so here significant amount of harmonic is generated besides
fundamental frequency. Nonlinear power amplifier is also called switch type power
amplifier because here transistor work either saturation region or in cut off region or
transistor switch between on and off.Non linear type power amplifier is class D,class
E,and class F power amplifier.In linear type power amplifier conduction angle is higher
than nonlinear power amplifier.In non linear power amplifier has theoretically power
efficiency is 100% [12].
Fig 2. PA classification
4.1 Class A Power Amplifier
It is a linear type power amplifier .It is a power amplifier in which operating point is lie
at the centre of the load line . It has conduction angle is 360 degree means in this type of

14. 14
power amplifier transistor conducts in whole sinusoidal cycle. Most of power amplifier
is design by this class because of its simplicity and it is best linear among all power
amplifier. Class A power amplifier has very low efficiency due to its 360 degree
conduction angle. So it is suitable for low-power application [13].
4.2. Class B Power Amplifier
Class B operate in cutoff region or saturation region or in class B operating point is lie in
bottom or top of load line. In Class B, the transistor conducts only on a half-cycle of the
input drive signal. Conduction angle in class B power amplifier is 180 degree.Class B is
more efficient than class A power amplifier but it is less linear than class A power
amplifier .Due to its less linearity more harmonics is generated at output side.Class B
poor linearity can be improved by using to transistor model called push pull model here
we use two transistor .In push pull model when one transistor will be on another
transistor will be off and for full cycle conduction will be present so linearity improve. In
push pull model for short period of time both transistor are off and this create cross-over
distortion [14].
4.3 Class AB Power Amplifier
Class AB power amplifier operating point lie between class A and class B power
amplifier.It conduct for more than half cycle but less than full cycle.Its conduction angle
is greater than 180 degree but less than 360 degree.Class AB is more linear than class B
but less linear than class A. Class AB is efficient than class A but less efficient than class
B. In class AB type push pull amplifier has less cross over distortion than class B so
linearity is improved in class AB [15].
4.4 Class C Power Amplifier
Class C power amplifier has operating point is lie either in deep cut off or deep saturation
region. It has highest efficiency among all linear power amplifier.It has worst linearity
among all linear power amplifier.Class C conduct for less than half cycle or conduction

15. 15
angle is less than 180 degree.As conduction angle decreases efficiency is increases. For
obtaining operating point of class C power amplifier we have to properly biased the
transistor. Due to less conduction angle we get very less linearity at output waveform at
output we get more number of harmonics and compression in output waveform.
Distortion in output is related to input and output waveforms not to power gain of power
amplifier [17].We can get 100% efficiency if conduction angle will be zero degree but at
zero conduction angle output will be zero but for maintain output we have to put
amplitude of current pulse infinity so practically it is not possible. The maximum
theoretical drain efficiency can reach 100% but this only happens at zero degree
conduction angles where the output will be driven toward zero.In order to maintain
output power, the amplitude of the current pulses must approach infinity. Here we can get
good efficiency but linearity is loss .Hence we have to comprise between linearity and
efficiency at the time of design [18].
4.5 Class D Power Amplifier
Class D power amplifier is a non linear power amplifier .Class D has theoretical 100%
efficiency.In the below shown class D power amplifier configuration we first create pulse
width modulation signal is given to input of push pull configuration of transistor.In push
pull model here we use two transistor one is n-mos and another is p-mos. Class D is not
suitable for microwave application due to less switching speed and device nonlinear
[19].
Fig 3. class D power amplifier

16. 16
4.6 Class-E Power Amplifier
This type of power amplifier act as a switch which turn ON and OFF according to the
duty cycle. It uses the reactive elements at the output which help in boost up the
efficiency by achieving zero voltage switching (ZVS). ZVS can be defined as there is
zero voltage when switch is ON state and zero voltage derivative switching (ZVDS).
ZVDS is defined as no overlap between current and voltage wave form hence there is no
loss occurs during switching [20]. In given diagram Cp introduced as a shunt capacitor
or we called intrinsic parasitic capacitance and there is circuit capacitance which provide
proper switching action of amplifier. Here Cs , Ls and R in series function as a oscillating
circuit due to which Cp will get discharge through load resistor R.
Fig 4. Class E circuit diagram
The figure shows the drain current wave form when transistor is ON state and the
capacitor current wave form when transistor is OFF state in T1 time. The drain voltage
wave form in T2 time shows the ideal waveform when transistor turns OFF and current
wave form when it is ON. In figure there is no overlap between current and voltage wave
form hence no power will be consumed during operation.

17. 17
Fig 5.a) Drain current waveform Fig 5.b) Capacitor Cp current waveform
Fig 5.c) Voltage waveform across drain-source (Solid line – voltage waveform /
Dotted line – current waveform)
Since class-E and class-F both are two type of non linear amplifier and class-E have some
disadvantages ,one of them is to design class-E power amplifier for high frequency
application because at higher frequency we gate large output capacitance because of
shunt capacitance Cp which limits the operating frequency as well as capability of high
power output [21].
The knee voltage (Vk) required to turn on the channel of GaN is relatively high because
of immature manufacturing. Here ZVS assumption not met because there are existence of
both current and voltage during ON state which lower the efficiency of class-E. Also
class-E amplifier require a fast input switching drive signal in order to achive ZVDS but

18. 18
this drive signal increases the stress for transistor which is not required in class-F. class-E
also require higher break down voltage as compare to class-F. It have higher current
handling capacity. we have conclude that class-F amplifier is more attractive than class-
E amplifier because of above mention limitation of class-E amplifier. In table shown
below that the maximum theoretical efficiency of different amplifier classes. We can see
that switching class amplifier have greater efficiency than biasing class amplifier [22].
Table 3. Theoretical value of different class of Power Amplifier
4.7 Class F Power Amplifier
A class-F is modified form of class-B and class-E amplifier. In class-F we control the
harmonics content and wave form at the drain which boost up the efficiency and
fundamental power signal. Since the quiescent point of class-F amplifier is close to
class-B whose conduction angle is 180 degree. Because of there switching nature
harmonics are generated which are undesired in biasing class amplifier. But by
controlling there harmonics we can increase the PAE. Theoretically we can achieve
100%efficiency by controlling infinite harmonics which is impractical [23].
Fig 6. Ideal normalized voltage waveform (blue) & current waveform (red) for class
F PA
PA Class Theoretical max. Efficiency (%) Linearity
A 50 Good
B 78.5 Poor
AB 78.5 Moderate
E 100 Poor
F / F-1 100 Poor

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The voltage waveform at drain is tends toward perfect square ass many harmonics are
controlled and there corresponding drain current waveform will be half sine wave with
180 degree phase shift. Since in ideal case there is no overlapping between voltage and
current wave form and hence there is no power is consumed by the device during
switching. figure shown above the ideal voltage and current waveforms in class-F during
operation for 100%efficiency. Equation (a) and (b) describe the general equation of
class-F, voltage and current where ɸ is the phase difference between fundamental signal
and harmonics. There has been significant research has been done on class-F amplifier
focusing on design of output network. However some research are on input network also
play an important role and output network for improving the efficiency. The 2nd
harmonic input termination plays a critical role on shaping , the waveform at the input
and has a great contribution to PA performance. Simulation was done on PA with and
without wave shaping network. PA able to provide maximum PAE of 39%. The PA
without input wave-shaping network for controlling 25 harmonics is able to provide
maximized PAE of 63%. Almost 24% improvement in PAE is obtained after adding the
input wave-shaping network.
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4.7.1 Fourier series expansion of voltage and current waveforms
To obtained a truncated half sine wave current waveform ,the normalized fourier series
expansion closed form equation for the coefficients are shown in equation (e) and (f),
where n is the harmonic order [24].
A0 = 1/π………...(c)
A1 = 1/2………....(d)
An,even = 2*(-1)^(.5*n +1)/( π(n*n -1))………….(e)
An,odd = 0…………...(f)
To obtain a perfect square waveform the normalized fourier series expansion closed form
coefficient equation are shown in equation (i) and (j).

20. 20
B0 = 1/π………..….(g)
B1 = 1/2…………..(h)
Bn,even = 0……..… (i)
Bn,odd = 2*(-1)^(.5*(n +1))/( π*n)………….(j)
From equation (e) and (f), all odd harmonics in the current waveform must be eliminated
to shape a truncated half sine waveform with only even harmonics. Similarly in voltage
waveform all even harmonics must be eliminated to shape as a perfect square waveform
with only odd harmonics as shown in equation (i) and (j). As shown in figure below, the
effect of addition of harmonics on wave shaping of current and voltage waveform
Fig 7.Class-F drain voltage (left) and current (right) waveforms with different
number of harmonic added. n-odd harmonics up to nth order are present in the
voltage waveform and m - even harmonics up to mth order are present in the
current waveform.
In the right side, at top and the bottom of the voltage waveform is flattened out and the
transition slop gets steeper as more even harmonics are added and in the left, it is shown

21. 21
that the negative swing of the current waveform is flattened out and the transition time
gets faster as more as odd harmonics are added. by reducing the transition time of current
and voltage signal, the overlapping area between the two signals is reduced and thus the
PAE is improved [25].
4.7.2 Harmonic Termination Impedances
For a particular drain waveform the amplifier output network need specifics termination
impedances to different harmonics. For all the desired harmonics that are required for
voltage waveform shaping the output network need to provide an open or high
impedances at the drain so that the harmonic power can be trapped. And for unwanted
harmonics, the output network need to provide a short or low impedance at the drain so
that harmonic power can be vanished [25]. In inverse class-F amplifier the wave form are
opposite to that of class-F amplifier, i.e Inverse class-F amplifier have square current
waveform and half sine waveform at the drain as shown in figure.
Fig 8 . Class F voltage and current waveforms with an infinite number of
harmonics
class F output impedances: Z2n=0, Z2n+1=∞
where n = harmonic order

22. 22
4.7.3 Third Harmonic peaking topology
Theoretically 100% efficiency can be achievable by controlling infinite harmonics but the
matching network will become complicated and hard to design as more harmonics are
being controlled. Figure shown below the simplified schematic of class-F amplifier’s
output network.
Fig 9 . Simplified schematic of Class F output network
At higher frequency, higher frequency signal will leak through drain source channel be
shorted to ground as shown in figure. Hence higher order harmonics have very less
contribution in wave shaping of waveform and also in PAE. To limit the upper bound
operating frequency, parasitic capacitance of transistor play the major role [26].
Practically only few number of harmonics will be controlled. The filter block function as
a harmonics trap to block specific harmonics power from being delivered to the load. It
is the part of the network of the impedance matching for fundamental signal and used to
shape a particular waveform at the drain. In class-f topology, higher order harmonics
being controlled. For example a topology will be called 7th harmonic peaking or 7th
harmonic injection if up to the 7th harmonic is controlled. Figure given below is an

23. 23
example of 3rd harmonic peaking configuration for class-F amplifier. the L3 & C3 parallel
resonator resonates at 3rd harmonic frequency so that it act as an open circuit for 3rd
harmonic signal while passing all other frequency though as a short circuit. The shunt
parallel L1||C1 resonator has a resonant frequency at fundamental frequency. So it
passes the fundamental frequency signal to the load and shorting all other harmonics to
the ground hence there will no harmonic power reaches to the load. The output current
and voltage wave form are in phase with each other. Since 50ohm reistive load is used ,
normalized harmonic content upto 3rd harmonic are shown blow.
Fig 10 .Example of 3rd Harmonic peaking configuration using lumped elements for
Class F power amplifiers
4.7.4 DC Biasing
In order to generate significant amount of harmonics, thee quiescent point of class-F
amplifier must be close to the cutoff region and is located a bit higher than that of class-
B. the bias point of different classes are shown below. The drain wave form of class-F are

24. 24
similar to those of class-B because of their similar bias point. By controlling the
harmonics larger voltage is created in class-F amplifier with clipping the current at the
same level as class-B [30]. hence we called class-F as overdriven class-B amplifier.
Figure shown below, shows the current and voltage waveform of overdriven class-B
amplifier.
Fig 11 .Quiescent bias points for different classes of amplifier

25. 25
CHAPTER-5
Amplifier designsteps in simulation
Fig 12. ATF53189 model transistor
The non-linear model transistor ATF53189 which is applied in simulation is obtained
from the Avago technology. It is shown in fig. The parameters are adjusted according to
the requirement for increasing efficiency. This is done in Advanced Design System
(ADS) from Agilent. There are following steps which is used in simulation-
1. DC biasing for class F PA
2. S-parameter verification & Stability analysis
3. Load-Pull analysis
4. PA design characterisation
5. Impedance matching of PA
5.1 DC biasing for class F PA
According to the datasheet of ATF53189 transistor model, the valid range of gate voltage
(Vgg) is from -5V to 1V and the threshold voltage (Vt) is at 0.4V. For drain voltage
(Vdd) is from 0V to 7V for determining the bias point of the PA. This is initial part of
designing and it is used to determine the DC bias condition for the transistor [33]. For
class F PA , it is decided to keep drain bias voltage of 4V and gate bias voltage of 0.4V as

26. 26
indicated by marker in Fig. This point is chosen because of small quiescent current of
7mA through the transistor showing that the transistor is biased close to the cut-off
region.
Fig 13. DC analysis of model transistor
5.2 S-parameter verification & stability
After selecting a proper DC bias point, the next step is to verify the simulated s-
parameters and compare with the data provided in the datasheet [34]. At three different
bias condition, s-parameter is provided in the datasheet. Only drain voltage & current are
given for the measurement in the datasheet. Therefore, we have to find the corresponding
gate voltage in order to generate the same drain current in simulation. The transistor is

27. 27
terminated with 50 ohm at input and output. The 3 DC bias conditions verified in the
simulation are shown below-
1.Vdd=4V , Id=7mA , Vgg=0.4V
2.Vdd=5V , Id=14mA , Vgg=0.4

28. 28

29. 29
3.Vdd=3V , Id=13mA , Vgg=0.4V
The simulated s-parameters from the ATF53189 transistor model using ADS including
magnitude and phase are really close to the experimental value in datasheet. It can be
assumed that the transistor is accurate enough to describe the actual PA performance.
Stability is a very important part of circuit design. It was
observed in the older radio transmitters that show damped or undamped oscillations due
to the current losses, gate voltage level, feedback coupling, and parasitic circuits [35]. If

30. 30
the input and output port impedance is a negative real part, it may oscillate and thus
become unstable. We can the define two types of stabilities- unconditional and
conditional stability.
Unconditional stability occurs when |Γin|˂ 1 and |Γout|˂ 1, independent of the source and
load passive impedance while network can be considered conditional stable [36].
There are two independent methods to find stability of a given circuit
1.the K-Δ stability factor-it is also known as Rollett’s condition are given below
1|**| 21122211  SSSS
Both condition are necessary & sufficient for unconditional stability. There is a single
condition for unconditional stability and is defined as-
|)*||*(|
)||1(
21121122
2
11
SSSS
S



The concept of stability circle is used to separate stable and unstable regions of the
source or load reflection coefficient plane. Resistor is used to reduce the loop gain and
forcing a bandwidth increase because of constant gain bandwidth product condition. We
can use either a series or a shunt resistor or both to stabilize an active device depending
on the location of the stability circle. The size of resistor depends on the frequency.
Stability was calculated at the whole tuning range of our designed PA and beyond. The
system is unconditionally stable when the source and load impedances are located on the
right hand side of the smith chart showing the large resistance region. In other words, the
system is unstable when the source and load are terminated with a low or short resistance.
Smith chart can be avoided when performing source-load pull analysis to find the
termination impedances at the input and output of the PA.
1
|)**2(|
)||1(
2112
22
12
2
11



SS
SS
K

31. 31
5.3 Load pull analysis
We have controlled up to 3rd harmonics to improve PAE. After DC analysis & proper
stability circle, computing the optimum source and load termination impedances for
harmonics and fundamental will be next step. PAE is the only parameter used to calculate
the PA performance. One of the functions of ADS is load pull analysis, which allows to
determine the optimum source and load termination impedance in order to increase the
PAE. It also calculates impedance of fundamental signal and all involved harmonics
being controlled [37]. The simulator will calculates PAE and output power for every
swept point and generates the PAE and output power contour.
We can perform load pull analysis for fundamental
frequency by terminating the odd harmonics with high impedance and even harmonics
with low impedance. By calculating with this process, we are getting PAE is equal to
62.19% , output power is 31 dBm and gain is 12.
Wave shaping network is a sub-network which is used to
shape a particular voltage & current waveform at drain of transistor by terminating
harmonics with specified impedances. The output wave-shaping network should shape a
square waveform for the voltage and a half sine waveform for current at the drain in class
F PA. However, a distorted sine voltage waveform should be seen at the gate because of
presence of 2nd & 3rd harmonics. The class F PA is made up of the input/output wave-
shaping network which are part of the matching networks. In order to obtain the better
PAE, the short & open circuit is present to the harmonics at the transistor terminals
should be optimized because these circuit acts as filters which prevent harmonic power
from being delivered to the load or source. It is also known as harmonic trap because of
its ability to trap harmonic at the terminals of transistor.
5.4 Impedance matching
Matching is essential for the best possible energy transfer from one part to another part.
In class F PA, the input impedance is low, decreasing as the power increases. This
impedance must be match either to generator of generally 50 ohm internal impedance.
Complex impedance matching is more difficult to implement in practical, especially if

32. 32
matching must be accomplished over a wide frequency band. A matching network is
placed between the load and a transmission line. The matching network is ideally lossless
to avoid unnecessary loss of power. The matching network is important for the following
reasons-
1.Maximum power is delivered to the load from the circuit and power loss should be
minimum.
2.Matching improves signal to noise ratio of the system.
3.Matching in power distribution network reduces amplitude and phase errors.

33. 33
5.5 Simulation circuits and results
1.DC ANALYSIS

34. 34
2.BIAS AND STABILITY

35. 35

36. 36
3.LOAD PULL ANALYSIS

37. 37
4.PA DESIGN

38. 38

39. 39
5.IMPEDANCE MATCHING

40. 40
CHAPTER 6
CONCLUSION AND FUTURE SCOPE
Conclusion
1.Class F power amplifiers offer a significant improvement in transmitter efficiency over
other designs.
2.We have improved power added efficiency from 39% to 62% by changing 50 ohm
standard impedance to complex impedance.
3.We have achieved output power 33 dBm from input power 18 dBm after designing and
matching.
4.Class F power amplifiers are an extremely good choice for single band continuous wave
transmitter.
Future scope
We can increase power added efficiency (PAE) by adding more harmonics at drain output of
transistor. By controlling more harmonics we can also increase gain because output power
will be increase. We can also improve PAE by changing various parameter of transistor.

41. 41
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