1. JJ U L I EU L I E LL EE
408- 508-8497
San Jose, CA 95125
l.julie25@yahoo.com
ANALOG/MIXED SIGNAL MASK LAYOUT DESIGNER
SSUMMARYUMMARY::
I have a passion for technology and desire to learn new things. I am a hard working, adaptable, flexible, and responsible. Able to
change activities to prioritize the priorities to meet new demands are my goals. I could also able to make a positive effort to accept
changes, willing to work in different environments, attempt new tasks and a team player.
SKILLS AND ACCOMPLISHMENTS:
• Performed Custom analog/mixed-signal blocks/Cells including Amplifiers, Comparators,
Current Mirrors, Charge Pumps, Regulators, Oscillators, and Band-Gap.
• Full custom layouts design, floor planning, and P-cells
• IC block placements and Routings, Stream out/GDS
• Experience in DRC, VXL, LVS, DRC, Cadence/Virtuoso 6.1.6, and 6.1.7. Used Calibre and Assura for
verification. Debug and fixed DRC and LVS issues at cells/blocks level.
• Understand matching devices on Schematics, sensitive devices and Netlist
• Shielding, signal flow, Isolation Techniques, Antenna, W.P.E, LOD, and Electro Migration.
• 350db,CMOS process, Stress. Density,ESD, ERC check
• Sufficient with .18 u, 65nm TSMC , and understand BICMOS, Unix commands environments.
• Created and modified cells/blocks levels. Power grid and signal bus connection
IC LAYOUT DESIGNER – Avago/Broadcom
11/4/15 – Present11/4/15 – Present
Duties are; to developing the layouts, DRC, VLS, XL,( ERC,DEN.,ESD,ANT.Stress run), , debug and fixed DRC and LVS
issues at cells/blocks level included modifying, and editing layouts when schematics changed for the following Analog and
Mixed-signal circuit cells/blocks and datapaths.
Regulators, PLL, and OpAmp, TIA, Gains
IC LAYOUT DESIGNER -VOLUNTEER – INNOVOTEK
01/8/15 – 11/04/1501/8/15 – 11/04/15
Duties are; to developing the layouts, DRC, VLS, XL, ERC,DEN.,ESD,ANT.Stress, , debug and fixed DRC and LVS issues at
cells/blocks level included modifying, and editing layouts when schematics changed for the following Analog and Mixed-signal
circuit cells/blocks.
• Regulators, PLL, and OpAmp, TIA
• Sufficient in the following Tools; Cadence 6.1 and Calibre for verification, .18u, 65nm TSMC, .35ODB
DRC, LVS, and VXL.
• Other skills including matching, signal flow, isolation techniques, CMOS , BICMOS processes.
• .
• Sufficient in the following Tools; Cadence 6.1 and Calibre for verification, .18u, 65nm TSMC, .35ODB
DRC, LVS, and VXL.
• Other skills including matching, signal flow, isolation techniques, CMOS , BICMOS processes.
IC LAYOUT DESIGNER -VOLUNTEER – INNOVOTEK
01/8/15 – 11/04/1501/8/15 – 11/04/15

2. Duties are; to developing the layouts, DRC, VLS, XL, ERC,DEN.,ESD,ANT.Stress, , debug and fixed DRC and LVS issues at
cells/blocks level included modifying, and editing layouts when schematics changed for the following Analog and Mixed-signal
circuit cells/blocks.
• Regulators, PLL, and OpAmp,
• Sufficient in the following Tools; Cadence 6.1 and Calibre for verification, .18u, 65nm TSMC, .35ODB
DRC, LVS, and VXL.
• Other skills including matching, signal flow, isolation techniques, CMOS , BICMOS processes.
FISCAL ASSISTANT II - San Andreas Regional Center - Campbell, CA
11/2008 – 01/201311/2008 – 01/2013
• Responsible for full cycle accounts payable including month end and checks run.
• Collected packing slips and mailed on daily basis. Three ways matching invoices with Purchase Orders and
Packing slips from warehouse to ensure the quantity received and the unit price are correct including non-
purchase order related. Verified and processed expense reports for payment.
• Coding made prior journal entries invoices to the accounting system with the appropriate G/L. accounts
reconciliation including maintain accounts payable aging up to date.
ACCOUNTS PAYABLE/RECEIVABLEACCOUNTS PAYABLE/RECEIVABLE -- Anda NetworksAnda Networks, Sunnyvale, CA, Sunnyvale, CA
10/07 - 07/200810/07 - 07/2008
• Responsible for full cycle accounts payable including month end and checks run.
• Collected packing slips and mailed on daily basis. Three ways matching invoices with Purchase Orders and
Packing slips from warehouse to ensure the quantity received and the unit price are correct including non-
purchase order related. Verified and processed expense reports for payment.
• Coding made prior journal entries invoices to the accounting system with the appropriate G/L. accounts
reconciliation including maintain accounts payable aging up to date..
ACCOUNTS PAYABLE/RECEIVABLEACCOUNTS PAYABLE/RECEIVABLE – M.E. FOX and CO., San Jose, CA
06/2005 - 08/200606/2005 - 08/2006
• Full Cycle of accounts receivable; including supported accounts payable department to audit invoices for
approvals. Compare invoice with receiving document and PO for discrepancies Vouchers invoices
for payment through AP System.
• Processed employee expense reports, and processed bi-weekly check runs. Monthly, Quarterly, and
Annual accruals.
DDOCUMENTOCUMENT CCONTROLONTROL AASSISTANTSSISTANT – N– NOVELLUSOVELLUS SSYSTEMSYSTEMS. S. SANAN JJOSÉOSÉ, CA, CA
06/2000 – 03/200106/2000 – 03/2001
• Updated ECO’s, ECN’s change orders and distributed requested copies to appreciated related
department such as engineering, purchasing and finance and filed completeness documents history.
• Included updated and regenerated Bill of Materials, engineering drawings, schematics, and blues
prints.
DDOCUMENTOCUMENT CCONTROLONTROL AASSISTANTSSISTANT – A– ANALYTICNALYTIC DDESIGNESIGN INCINC. S. SANTAANTA CCLARALARA, CA, CA
11/1996 – 03/200011/1996 – 03/2000
• Updated ECO’s, ECN’s change orders and distributed requested copies to appreciated related
department such as engineering, purchasing and finance and filed completeness documents history.
• Included updated and regenerated Bill of Materials, engineering drawings, schematics, and blues
prints.
OOTHERTHER SSKILLSKILLS:: Microsoft Office Applications
10 Keys by Touch, typing 47w.p.m.
Ohm Meter, Microscope, AOI, AXI, X-Ray, SAP, and IPC -610e Certified.
Positive attitude and strong work ethic
Familiar with Micrometer, caliper
Good communication skills as well as organizational skills

3. EEDUCATIONDUCATION::
Certification in IC Layout Design and Verification - Silicon Valley Technique Ins., San Jose, CA
AA degree in Business/General Education - San Jose City College, San Jose, CA