mcu, baremetal

1. Microprocessors systems
Vlasov Sergey
smvlasov@itmo.ru
Kirsanova Aleksandra

2. Memory and bus architecture

3. Embedded Flash memory interface

4. Memory organization

5. Relation between CPU clock frequency and Flash memory read time

6. Flash. Read and write operations

7. Reset and clock control

8. High speed clock source
External (HSE)

9. High speed clock source
Internal (HSI)

10. Phase-locked loop

11. Frequency divider

12. System clock (SYSCLK) selection

13. System clock calculation
𝑆𝑌𝑆𝐶𝐿𝐾 = 𝐹𝑃𝐿𝐿 𝑔𝑒𝑛𝑒𝑟𝑎𝑙 𝑐𝑙𝑜𝑐𝑘 𝑜𝑢𝑡𝑝𝑢𝑡
𝐹𝑃𝐿𝐿 𝑔𝑒𝑛𝑒𝑟𝑎𝑙 𝑐𝑙𝑜𝑐𝑘 𝑜𝑢𝑡𝑝𝑢𝑡 =
𝐹𝑉𝐶𝑂 𝑐𝑙𝑜𝑐𝑘
𝑃𝐿𝐿𝑃
𝐹𝑉𝐶𝑂 𝑐𝑙𝑜𝑐𝑘 = FPLL clock input ×
𝑃𝐿𝐿𝑁
𝑃𝐿𝐿𝑀
𝐻𝐶𝐿𝐾 =
𝑆𝑌𝑆𝐶𝐿𝐾
𝐴𝐻𝐵𝑃𝑟𝑒𝑠𝑐𝑎𝑙𝑒𝑟
𝑃𝐶𝐿𝐾1 =
𝐻𝐶𝐿𝐾
𝐴𝑃𝐵1𝑃𝑟𝑒𝑠𝑐𝑎𝑙𝑒𝑟
𝑃𝐶𝐿𝐾2 =
𝐻𝐶𝐿𝐾
𝐴𝑃𝐵2𝑃𝑟𝑒𝑠𝑐𝑎𝑙𝑒𝑟
Note.
Pay attention to frequencies limits,
listed in reference manual.

14. Example
Configure STM32 clock to 84 MHz from external clock generator
Algorithm:
1. Set FLASH latency.
2. Enable HSE. Check HSE Ready bit.
3. Set AHB, APB1 and APB2 prescaler.
4. Config PLL:
1. Set PLL clock source. Wait until switch operation complete.
2. Set PLL M, N and P prescalers.
3. Enable PLL. Wait PLL start.
5. Set Main clock switch to PLL source.

15. SysTick
//define main clock value
#define HCLK 84000000
//define System Tick Timer frequency
#define SysTicksClk 10000
//define System Tick Timer prescaler
#define SysTicks HCLK/SysTicksClk
void SysTick_Handler(void)
{
//SysTick Interrupt handler
}
int main()
{
SysTick_Config(SysTicks); //SysTick Enable and configuration
}

16. Thank you for attention
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