cascaded h bridge and neutral point clamped multilevel inverter

1. P R E S E N T E D B Y :
A B D U L A Z E E M
M . T E C H ( P O W E R S Y S T E M & D R I V E S )
D E P A R T M E N T O F E L E C T R I C A L E N G I N E E R I N G
A L I G A R H M U S L I M U N I V E R S I T Y , A L I G A R H
U . P . 2 0 2 0 0 2
CASCADED H-BRIDGE AND NEUTRAL POINT
CLAMPED(DIODE CLAMPED) MULTILEVEL INVERTER

2. MULTILEVEL INVERTER
 The multi-level inverter is to synthesize a near
sinusoidal voltage from several levels of dc
voltages.
 The Multi level inverter is like an inverter and it is used
for industrial applications as alternative in high power
and medium voltage situations.
 The need of multilevel converter is to give a high output
power from medium voltage source.

3. TYPES OF MULTILEVEL INVERTERS
Multilevel inverters are of four types:
1-Cascaded or H-bridge type
2-Neutral Point Clamped or Diode Clamped type
3-Flying Capacitors type
4-Packed U Cell (PUC) type

4. CASCADED OR H-BRIDGE TYPE MULTILEVEL
INVERTER
H-bridge Cell:
 Each H-Bridge Cell consists of
four switches and four diodes
as shown in the picture.
 Like every H-Bridge, different
combinations of switch
positions determine different
voltages such as V+, V- and 0.
 Two switching combinations
are present for 0 volts.
 S1 and S2 are connected to
positive voltage and S3 and S4
are connected to negative
voltage.

5. MERITS , DEMRITS AND MODULED
STRUCTURE
 Advantages:
1. The modularized structure
allows easy packaging and
storage.
2. The quantity of possible
voltage levels is more than
DC and FC type.
 Disadvantages:
1. Separated DC sources or
capacitor are required for
each module.
2. A More complex controller
is required due to the
amount of capacitors, which
need to be balanced

6. SIMULATION DIAGRAM FOR 3- LEVELS

7. CONTROL STRATEGY

8. OUTPUT

9. NPC MULTILEVEL INVERTER
 The NPC topology has been adopted for high power
applications as it can achieve better harmonic
reduction than traditional two-level voltage source
inverters and the associated control strategies help to
minimize semiconductor losses.

10. SIMULATION DIAGRAM FOR 3 LEVELS

11. MODULE SUBSYSTEM

12. CONTROL STRATEGY SINOSOIDAL PULSE
WIDTH MODULATION

13. OUTPUT (PHASE)