Introduction of Motorola microprocessors Designers Motorola microprocessor family Motorola 6800 Microprocessor Family Variations of 6800 Motorola 680x0 Microprocessor Family Motorola PowerPC Family Features of MC6800 Microprocessor Memory of MC6800 Microprocessor

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2. An integrated circuit that contains the entire
central processing unit of a computer on a
single chip.
The first microprocessors emerged in the early
1970s by Intel.
At the heart of all personal computers and
most workstations sits a microprocessor.
2

3. Microprocessors also control the logic of
almost all digital devices, from clock
radios to fuel-injection system for
automobiles.
Figure: Intel 4004, the first general-purpose,
commercial microprocessor.
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6. The 6800 is an 8-bit microprocessor
produced by Motorola and released shortly
after the Intel 8080 in late 1974.
It had 78 instructions.
This microprocessor also had a couple of
extra instructions added to it’s instruction
sets. 6

7.  It may have been the first microprocessor with
an index register.
It was usually packaged in a 40 pin DIP (dual-inline
package).
Fig: Motorola 6800 microprocessor 7

8. It's not clear if there was a chief architect,
but the two main designers were Chuck
Peddle and Charles Melear.
Charles Melear continued working at
Motorola on the 6800 family and the
683xx family including the 68332.
Bill Mensch designed the MC6820 PIA
(Peripheral Interface Adapter).
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9. microprocessor year
MOTOROLA 6800 1974
MOTOROLA 68000 1979
MOTOROLA 68020 1984
MOTOROLA 68030 1987
MOTOROLA 68040 1991
MOTOROLA 68020 1993
MOTOROLA POWER PC
603
1994
MOTOROLA POWER PC
604
1994
MOTOROLA POWER PC
620
1996
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10. Introduced in 1975.
strictly an 8-bit processor capable of
addressing 64 kilobytes of memory.
Main difference with Intel is to minimize
the usage of registers in favor of general
purpose RAM.
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11. The 6802 incorporated 128 bytes of RAM
on the CPU itself.
The 6803/6808 ran faster (3.58 MHz),
incorporated 128 bytes of RAM, and
included both a URAT (universal
asynchronous receiver or transmitter) for
serial communications, and a
counter/timer.
The last variation of the 8-bit Motorola
family was the 6809. 11

12. By 1978, the age of the 16-bit CPU had begun.
In 1978 Motorola introduced its first 16-bit
CPU: the 68000.
Unlike Intel’s 8086/8088, which could address
only one megabyte of physical RAM, the 68000
had 24 address lines that could access 16
megabytes of RAM directly.
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13. The 68000 ran faster than mainstream
Intel processors of that day: 16MHz.
Motorola abandoned the idea of RAM-based
registers and incorporated 16
general-purpose registers in the 68000.
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14. Motorola entered the 32-bit CPU arena
with the 68020.
The 68020 has 16 general-purpose
registers, and can address four gigabytes
of RAM directly.
It had an internal 256-byte instruction
cache . 14

15. The 68030 is Motorola’s second generation
32-bit CPU. It is available in faster
speeds, and with one 256-byte cache each
for data and instruction.
The 68040 is the third generation. It
increases the data and instruction caches
to 4 kilobyte each, includes an on-board
math co-processor and memory
management unit. 15

16. The latest members of the 680x0 family is
the 68060.
68060 is a superscalar design that has
multiple instruction pipelines and on
board memory and power management.
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17. The PowerPC is the first implementation of
reduced instruction act computing (RISC) for
personal computers.
The MPC601, or PowerPC, is a 640bit
superscalar CPU that can effectively execute
up to three instructions per clock cycle.
It has a 32-bit address bus, 32 kilobytes of
cache memory and an internal math co-processor.
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18. A 16-bit address bus provides the MC6800
with access to 65k bytes of memory.
Three-state operation of the data and
address line is permitted.
The MPU (Memory protection unit) will
respond to a set of 72 variable-length
instructions.
MC6800 has seven address modes.
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19. Timing of the MPU is accomplished with a
two-phase clock at rates of up to 1.0 MHz
It has four chip select inputs.
The MC6800L, single-chip digital modem,
provides modulation, demodulation, and
supervisory control functions, necessary to
implement a serial data communications
link.
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20. Three kinds of memory:
 Program memory
 Data memory
 Stack memory
Program, data and stack memories occupy the
same memory space. The total addressable
memory size is 64 KB.
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21. Reserved memory locations:
 FFF8h - FFF9h
FFFAh – FFFBh
FFFCh – FFFDh
 FFFEh - FFFFh
Some memory addresses are reserved for
memory mapped I/O as the processor
doesn't have hardware I/O capability.
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22. The MC6800 contains six program-available
registers . The 2-byte registers are:
Program counter.
Stack pointer.
Index register.
The single-byte registers are:
 Accumulators.
Condition code register.
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23. Figure: Block diagram of MC6800 microprocessor. 23

24. The MC6800 microprocessor has 40
Pins . According similarities all these pins are
divided into five groups:
Address/data bus.
Start signal.
Bus control signals.
Interrupt signals.
Direct Memory Access(DMA) signal.
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25. Figure : Pins ASSIGNMENT of MC6800
Microprocessor
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26. MC6800 Clocks:
The MC6800 has four pins committed to
developing the clock signals needed for
internal and system operation.
 They are:
1. The oscillator pins EXTAL and XTAL
2. The standard M6800 enable (E) clock
3.Quadrature (Q) clock.
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27. SSIIGGNNAALL DDEESSCCRRIIPPTTIIOONN
Processor State Indicators :
Two output lines to indicate the present
processor state.
 Bus available (BA) .
 Bus status (BS) .
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28. Address Bus (A0-A15):
 This is 16-bit,unidirectional.
 Three-state bus, to provide address information
to the address bus.
Data Bus (D0-D7):
 This is 8-bit, bidirectional.
 This three-state bus is the general purpose data
path.
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29. Read/Write (R/W):
This output indicates the direction of data
transfer on the data bus.
Interrupts:
Three separate interrupt input pins:
 Non- maskable interrupt (NMI)
 Fast interrupt request (FIRQ)
 Interrupt request (IRQ) 29

30. Direct Memory Access/Bus Request:
This input is used to suspend program
execution.
This also makes the buses available for
another use such as a direct memory
access or a dynamic memory refresh.
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31. The MC6800 has a set of 72 different executable
source instructions. They include:
 Data moving instructions.
Arithmetic – add, subtract, negate, increment,
decrement and compare.
Logic – AND, OR, exclusive OR, complement,
shift/rotate.
Control transfer – conditional and
unconditional.
Other – clear/set condition flags, bit test, stack
operations, software interrupt, etc.
31

32. The addressing modes available on the
MC6809 and MC6809E are:
Inherent,
Immediate
Extended
Direct
Indexed
Branch Relative.
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33. Figure: Programming model of MC6800.
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34. Only one pointer register.
Stack instructions use post-decrement on push
and pre-increment on pop instead of the more
natural post-increment on pop and pre-decrement
on push.
index register can not be directly pushed or
popped from the stack.
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35. The accumulators and index registers
occupy different spaces and thus there are
no instructions to transfer or operate
between the two.
The CPX (compare X) instruction does not
affect the Carry flag.
The DAA (decimal adjust) instruction only
worked after addition, and not
subtraction. 35

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