8085 Architecture & Memory Interfacing1

55,881 views

Published on

visit: www.techbed.blogspot.com

Published in: Education, Technology, Business

8085 Architecture & Memory Interfacing1

  1. 1. 8085 Microprocessor: Architecture & Support Components
  2. 2. Contents <ul><li>Pin diagram of 8085 </li></ul><ul><li>8085 Operations </li></ul><ul><li>Architecture of 8085 </li></ul><ul><li>8085 Communication with Memory </li></ul>
  3. 3. Pinout Diagram of 8085 <ul><li>A 40-pin IC </li></ul><ul><li>Six groups of signals </li></ul><ul><ul><li>Address Bus </li></ul></ul><ul><ul><li>Data Bus </li></ul></ul><ul><ul><li>Control and Status pins </li></ul></ul><ul><ul><li>Power Supply & frequency signals </li></ul></ul><ul><ul><li>Externally initiated Signals </li></ul></ul><ul><ul><li>Serial I/O ports </li></ul></ul>
  4. 4. Logic Pinout of 8085 Data Bus Address Bus Control & Status Control & Status Externally initiated signals Serial I/O ports Power Supply & frequency
  5. 5. 8085 Operations <ul><li>Microprocessor Initiated Operations </li></ul><ul><li>Internal Operations </li></ul><ul><li>Peripheral/Externally Initiated Operations </li></ul>
  6. 6. Microprocessor Initiated Operations <ul><li>Memory Read </li></ul><ul><li>Memory Write </li></ul><ul><li>I/O Read </li></ul><ul><li>I/O Write </li></ul>
  7. 7. Internal Operations <ul><li>Store 8-bit data </li></ul><ul><li>Perform Arithmetic and Logic Operations </li></ul><ul><li>Test for conditions </li></ul><ul><li>Sequence the execution of instructions </li></ul><ul><li>Store/Retrieve data from stack during execution </li></ul>
  8. 8. Peripheral/Externally Initiated Operations <ul><li>Reset </li></ul><ul><li>Interrupt </li></ul><ul><li>Ready </li></ul><ul><li>Hold </li></ul>
  9. 9. Architecture of 8085 <ul><li>Power Supply – a +5V DC power supply </li></ul><ul><li>Maximum clock frequency of 3MHz </li></ul><ul><li>8-bit general purpose microprocessor </li></ul><ul><li>16-bit Address Bus </li></ul><ul><ul><li>Capable of addressing 64K of memory </li></ul></ul>
  10. 10. Architecture of 8085
  11. 11. Architecture 0f 8085 Cont… <ul><li>ALU </li></ul><ul><li>Timing and Control Unit </li></ul><ul><li>General Purpose Registers </li></ul><ul><li>Program Status word </li></ul><ul><li>Program Counter </li></ul><ul><li>Stack Pointer </li></ul><ul><li>Instruction Register and Decoder </li></ul><ul><li>Interrupt Control </li></ul><ul><li>Serial I/O Control </li></ul><ul><li>Address Bus </li></ul><ul><li>Data Bus </li></ul>
  12. 12. Architecture 0f 8085 Cont… <ul><li>Arithmetic Logic Unit (ALU) </li></ul><ul><ul><li>8085 has 8-bit ALU </li></ul></ul><ul><ul><li>Performs arithmetic & Logic operations on data </li></ul></ul><ul><li>Timing & Control Unit </li></ul><ul><ul><li>Generates timing and control signals </li></ul></ul><ul><li>General Purpose Registers </li></ul><ul><ul><li>8-bit registers (B,C,D,E,H,L) </li></ul></ul><ul><ul><li>16-bit register pairs (BC, DE, HL,PSW) </li></ul></ul>
  13. 13. Architecture 0f 8085 Cont… <ul><li>Program Status Word (PSW) </li></ul><ul><ul><li>Accumulator and Flag Register can be combined as a register pair called PSW </li></ul></ul><ul><li>Instruction Register and Decoder </li></ul><ul><ul><li>Instruction fetched from memory is stored in Instruction register (8-bit register) </li></ul></ul><ul><ul><li>Decoder decodes the instruction and directs the Timing & Control Unit accordingly </li></ul></ul>
  14. 14. Architecture 0f 8085 Cont… <ul><li>Interrupt Control </li></ul><ul><ul><li>8085 has 5 interrupt signals </li></ul></ul><ul><ul><ul><li>INTR – general purpose interrupt </li></ul></ul></ul><ul><ul><ul><li>RST 5.5 Restart Interrupts </li></ul></ul></ul><ul><ul><ul><li>RST 6.5 </li></ul></ul></ul><ul><ul><ul><li>RST 7.5 </li></ul></ul></ul><ul><ul><ul><li>TRAP – non-maskable interrupt </li></ul></ul></ul><ul><ul><li>The interrupts listed above are in increasing order of priority </li></ul></ul>
  15. 15. Architecture 0f 8085 Cont… <ul><li>Serial I/O Control </li></ul><ul><ul><li>8085 has two signals for serial communication </li></ul></ul><ul><ul><li>SID – Serial Input Data </li></ul></ul><ul><ul><li>SOD – Serial Output Data </li></ul></ul>
  16. 16. Architecture 0f 8085 Cont… <ul><li>Address Bus </li></ul><ul><ul><li>Used to address memory & I/O devices </li></ul></ul><ul><ul><li>8085 has a 16-bit address bus </li></ul></ul>Lower-order Address Higher-order Address <ul><li>Data Bus </li></ul><ul><ul><li>Used to transfer instructions and data </li></ul></ul><ul><ul><li>8085 has a 8-bit data bus </li></ul></ul>Data Bus A 15 A 14 A 13 A 12 A 11 A 10 A 9 A 8 AD 7 AD 6 AD 5 AD 4 AD 3 AD 2 AD 1 AD 0
  17. 17. 8085 Communication with Memory <ul><li>Involves the following three steps </li></ul><ul><ul><li>Identify the memory location (with address) </li></ul></ul><ul><ul><li>Generate Timing & Control signals </li></ul></ul><ul><ul><li>Data transfer takes place </li></ul></ul>
  18. 18. Example: Memory Read Operation 1 2 3
  19. 19. 1 2 3
  20. 20. Timing Diagram
  21. 21. Demultiplexing Address/Data Bus <ul><li>8085 identifies a memory location with its 16 address lines, (AD0 to AD7) & (A8 to A15) </li></ul><ul><li>8085 performs data transfer using its data lines, AD0 to AD7 </li></ul><ul><li>Lower order address bus & Data bus are multiplexed on same lines i.e. AD0 to AD7. </li></ul><ul><li>Demultiplexing refers to separating Address & Data signals for read/write operations </li></ul>
  22. 22. Need for Demultiplexing… 8085 Memory A8-A15 20H AD0-AD7 05H RD 4FH 2005H
  23. 23. <ul><li>The 16-bit address of the memory location must be applied to the memory chip for the whole duration of the memory read/write operation. </li></ul><ul><li>Lower-order address needs to be saved before microprocessor uses it for data transfer </li></ul>Need for Demultiplexing…
  24. 25. 8085 Interfacing with Memory chips 8085 Memory Interface Memory Chip Address Data Control Address Data Control
  25. 26. 8085 Interfacing with Memory chips 8085 Memory Interface Memory Chip AD0-AD7 Control A0 – A7 Data 74LS373 A8-A15 A8-A15 ALE
  26. 27. 8085 Interfacing with Memory chips 8085 Memory Interface Program Memory AD0-AD7 IO/M A0 – A7 Data 74LS373 A8-A15 A8-A15 ALE RD RD CS
  27. 29. Memory Mapping <ul><li>8085 has 16-bit Address Bus </li></ul><ul><li>The complete address space is thus given by the range of addresses 0000 H – FFFF H </li></ul><ul><li>The range of addresses allocated to a memory device is known as its memory map </li></ul>
  28. 30. Memory map: 64K memory device <ul><li>Address lines required: 16 (A0 – A15) </li></ul><ul><li>Memory map: 0000 H - FFFF H </li></ul>Memory map: 32K memory device <ul><li>Address lines required: 15 (A0 – A14) </li></ul><ul><li>Memory map: depends on how address line A15 is connected </li></ul>
  29. 31. Memory device is selected only if IO/M = 0 & A15 = 0
  30. 32. <ul><li>So the memory map is </li></ul>A 11 to A 0 0…. 0 0 = 0000H A 11 to A 0 1…. 111 = 7FFFH to 0 0 0 0 A 15 A 14 A 13 A 12 0 1 1 1 A 15 A 14 A 13 A 12
  31. 33. Interfacing I/O devices with 8085 Peripheral-mapped I/O & Memory-mapped I/O
  32. 34. Interfacing I/O devices with 8085 8085 I/O Interface I/O Devices Memory Interface Memory Devices System Bus
  33. 35. Techniques for I/O Interfacing <ul><li>Memory-mapped I/O </li></ul><ul><li>Peripheral-mapped I/O </li></ul>
  34. 36. Memory-mapped I/O <ul><li>8085 uses its 16 -bit address bus to identify a memory location </li></ul><ul><li>Memory address space: 0000 H to FFFF H </li></ul><ul><li>8085 needs to identify I/O devices also </li></ul><ul><li>I/O devices can be interfaced using addresses from memory space </li></ul><ul><li>8085 treats such an I/O device as a memory location </li></ul><ul><li>This is called Memory-mapped I/O </li></ul>
  35. 37. Peripheral-mapped I/O <ul><li>8085 has a separate 8-bit addressing scheme for I/O devices </li></ul><ul><li>I/O address space: 00H to FFH </li></ul><ul><li>This is called Peripheral-mapped I/O or I/O-mapped I/O </li></ul>
  36. 38. 8085 Communication with I/O devices <ul><li>Involves the following three steps </li></ul><ul><ul><li>Identify the I/O device (with address) </li></ul></ul><ul><ul><li>Generate Timing & Control signals </li></ul></ul><ul><ul><li>Data transfer takes place </li></ul></ul><ul><li>8085 communicates with a I/O device only if there is a Program Instruction to do so </li></ul>
  37. 39. 1. Identify the I/O device (with address) <ul><li>Memory-mapped I/O (16-bit address) </li></ul><ul><li>Peripheral-mapped I/O (8-bit address) </li></ul>
  38. 40. 2. Generate Timing & Control Signals <ul><li>Memory-mapped I/O </li></ul><ul><ul><li>Reading Input: IO/M = 0 , RD = 0 </li></ul></ul><ul><ul><li>Write to Output: IO/M = 0 , WR = 0 </li></ul></ul><ul><li>Peripheral-mapped I/O </li></ul><ul><ul><li>Reading Input: IO/M = 1 , RD = 0 </li></ul></ul><ul><ul><li>Write to Output: IO/M = 1 , WR = 0 </li></ul></ul>3. Data transfer takes place
  39. 41. 8085 Communication with I/O devices <ul><li>Involves the following three steps </li></ul><ul><ul><li>Identify the I/O device (with address) </li></ul></ul><ul><ul><li>Generate Timing & Control signals </li></ul></ul><ul><ul><li>Data transfer takes place </li></ul></ul><ul><li>8085 communicates with a I/O device only if there is a Program Instruction to do so </li></ul>
  40. 42. Peripheral I/O Instructions <ul><li>IN Instruction </li></ul><ul><ul><li>Inputs data from input device into the accumulator </li></ul></ul><ul><ul><li>It is a 2-byte instruction </li></ul></ul><ul><ul><li>Format: IN 8-bit port address </li></ul></ul><ul><ul><li>Example: IN 01 H </li></ul></ul>
  41. 43. <ul><li>OUT Instruction </li></ul><ul><ul><li>Outputs the contents of accumulator to an output device </li></ul></ul><ul><ul><li>It is a 2-byte instruction </li></ul></ul><ul><ul><li>Format: OUT 8-bit port address </li></ul></ul><ul><ul><li>Example: OUT 02 H </li></ul></ul>
  42. 44. ----------Example Program---------- <ul><li>WAP to read a number from input port (port address 01H) and display it on ASCII display connected to output port (port address 02H) </li></ul><ul><li>IN 01 H ;reads data value 03H (example)into ;accumulator, A = 03H </li></ul><ul><li>MVI B, 30 H;loads register B with 30H </li></ul><ul><li>ADD B ;A = 33H, ASCII code for 3 </li></ul><ul><li>OUT 02 H ;display 3 on ASCII display </li></ul>
  43. 45. Memory-mapped I/O Instructions <ul><li>I/O devices are identified by 16-bit addresses </li></ul><ul><li>8085 communicates with an I/O device as if it were one of the memory locations </li></ul><ul><li>Memory related instructions are used </li></ul><ul><li>For e.g. LDA, STA </li></ul><ul><li>LDA 8000 H </li></ul><ul><ul><li>Loads A with data read from input device with 16-bit address 8000H </li></ul></ul><ul><li>STA 8001 H </li></ul><ul><ul><li>Stores (Outputs) contents of A to output device with 16-bit address 8001H </li></ul></ul>
  44. 46. ----------Example Program---------- <ul><li>WAP to read a number from input port (port address 8000H) and display it on ASCII display connected to output port (port address 8001H) </li></ul><ul><li>LDA 8000 H;reads data value 03H (example)into ;accumulator, A = 03H </li></ul><ul><li>MVI B, 30 H;loads register B with 30H </li></ul><ul><li>ADD B ;A = 33H, ASCII code for 3 </li></ul><ul><li>STA 8001 H;display 3 on ASCII display </li></ul>

×