The document describes the design and simulation of an optical cyclic redundancy check (CRC) encoder using lithium niobate waveguides. Key points: 1) A (7,4) CRC encoder is designed using lithium niobate Mach-Zehnder interferometers to perform the encoding optically for faster and more efficient error detection in optical communication. 2) The encoder structure and encoding process are explained mathematically and through simulation show the encoder can accurately detect single bit errors. 3) Beam propagation method is used to simulate the encoder design using lithium niobate waveguides and evaluate its performance in encoding test codewords and detecting errors.

1. 1
Abstract— Optical communication has proven its capabilities
in fulfilling the ever increasing global desire for higher data rates
for long as well as short distance communication. In order to
achieve reliable communication several error detection
mechanisms have so far been implemented using conventional
electronics which do not match with the pace of optical
processing of digital bits. In this research, implementation of the
encoding of (7, 4) Cyclic Redundancy Check (CRC) code using
optical method has been shown. The CRC encoder has been
designed using Lithium Niobate (LiNbO3) waveguide based
Mach-Zehnder Interferometers (MZI). The structure simulated
using beam propagation method has shown accurate encoding of
the CRC code. The design parameters as well as the performance
parameters have been described briefly.
I. INTRODUCTION
High data rate is needed to fulfill the increasing demand of
the broadband services. To achieve high data rate, large
bandwidth is required but it is difficult to achieve using
conventional electronic circuits. Some researchers have found
that optical devices seem to be a good alternate solution.
Optical communication devices use optical switches for high
speed signal routing. Optical switches are the key components
of optical networks which can execute essential signal
processing function such as switching, regeneration, and
header recognition processing at photonic nodes [1], [2].
Different types of optical switches have been proposed like,
semiconductor optical amplifier- Mach-Zehnder
interferometer (SOA-MZI), opto-electronic SOA, quantum
dot - SOA (QD-SOA), bit differential delay technique with
Terahertz Optical Asymmetric Demultiplexers (TOAD) [3],
nonlinear material based intensity encoder [4], semiconductor
optical amplifier (SOA)-assisted Sagnac switch technology
[5], and micro-ring resonator technology [6]. Cross gain and
cross phase effect in SOA limit its speed due to saturation
effect. Bit differential delay techniques have round trip delay
which increase the time-of-flight (TOF) latency. Lithium
niobate based MZI [7] provide promising solution because of
its characteristic features like compact size, thermal stability,
integration potential [8], re-configurability and low power
consumption [9]. With the advancement in the optical
communication, high speed long distance communication has
been made possible. This is because optical communication
* Vivek Kumar Srivastava is pursuing Ph.D from DIT University,
Dehradun, India (srivastava17vivek@ gmail.com).
Amrindra Pal is an Assistant Professor in the Department of Electrical and
Electronics & Communication, DIT University, Dehradun, India (phone: +91
9012195515; amrindra.pal123@gmail.com).
provides ultra-fast switching which enables high speed data
transmission. It also minimizes the losses occurring over long
distances enabling one to use minimal number of repeaters [5].
Lossy channel may change signal intensity for logic 1 at the
output due to which optical circuits consider it as logic 0.
Conversion of bit(s) (1 to 0 or vice-versa) may lead to major
errors [10]. Such errors may be avoided, but up to some extent
only [11]. Hence, there arises a need to detect such errors at
the receiver end. Here comes the role of redundancy, which
although increases the code length but provides an effective
method to recover the original message from the received
contaminated word.
It were the seminal works of Shannon and Hamming which
proved to be a landmark in the field of coding theory [12], [13].
To achieve error free communication over a lossy channel one
needs to add redundant bits to the data in such a way which
enables the receiver to detect the error(s) although they do not
add any new information in the code. Vertical redundancy
check (VRC) is the least expensive mechanism for detecting
errors in the receive codeword. Codewords with a minimum
hamming distance of two can detect all single-bit errors at the
destination. An easy way to detect burst errors (multiple bit-
errors) is to use longitudinal redundancy check (LRC). An n-
bit LRC can detect all burst errors up to length n. Another error
detection method used is checksum, which can detect errors
unnoticed by VRC and LRC [14]. Error detection using
checksum is performed using one’s complement. But, mere
detection of error in the received codeword does not fully solve
the problem. It is important for a reliable communication
system to also detect the position of error bit. The above
discussed methods can only detect error in the received word
but cannot indicate the bit-position of the error [14]. To detect
the position of the bit with error correction tools are employed.
The cyclic code - Cyclic redundancy check (CRC) has proved
to be a powerful tool in error correction mechanisms, having
the capability to correct burst errors [15], [16]. Hardware
implementation of CRC is also not so much difficult which
requires two major components as shift register and modulo-2
adder. Modulo-2 addition as well as subtraction can easily be
achieved using a 2-input XOR gate. CRC codes find their
applications in computer networks like LANs and WANs.
Shreya is pursuing M. Tech at Department of Electrical and Electronics &
Communication, DIT University, Dehradun, India
(shreyadhyani271@gmail.com).
Sandeep Sharma is an Associate Professor in the Department of Electrical
and Electronics & Communication, DIT University, Dehradun, India.
(tek.learn@gmail.com).
Design of Electro-Optical Cyclic Redundancy Check Encoder using
Lithium Niobate waveguide for Reliable Communication*
Vivek Kumar Srivastava, Amrindra Pal, Shreya and Sandeep Sharma, Member, IEEE
Department of Electrical and Electronics & Communication Engineering, DIT University, India

2. Some of the commonly used CRC codes are listed here in
Table I [16].
TABLE I. COMMONLY USED CRC CODES WITH APPLICATIONS
CRC Code Applications
CRC-4 ITU G.704
CRC-8 ATM header
CRC-10 ATM AAL
CRC-16 Bluetooth
CRC-32 LANs
In this paper, (7, 4) CRC encoder for optical
communication systems is proposed which is capable enough
to accurately detect any single bit error in the received word.
The encoder has been designed using electro-optical switches
implemented using Lithium Niobate (LiNbO3) based Mach-
Zehnder Interferometer (MZI) using OptiBPM software based
on the principles of beam propagation method (BPM). The
CRC has further been reviewed in the paper.
Section II gives a short review of cyclic codes. In section
III an MZI design of CRC has been proposed. Section IV
explains the mathematical formulation and MATLAB
simulation results for the proposed device. Next, Section V
consists of BPM simulation results and case study for a few
received codewords.
II. REVIEW OF CYCLIC CODES
A (7,4) block code consists of 4 data bits 1
2
3 ,
, D
D
D and
0
D followed by 3 redundant bits called parity. There can be
sixteen 7-bit codewords formed from 4-bit datawords
0
1
2
3 D
D
D
D
D = . Block codes can broadly be classified as
linear and cyclic codes. Adding two linear codewords results
into another codeword. Cyclic codes are a special class of
linear block codes with a cyclic structure. A cyclic shift in a
codeword will result in another codeword. The cyclic structure
makes them convenient for their practical implementation
[17].
An ( )
k
n, code is designed using a generator polynomial
which is a factor of 1
+
n
x having a maximum power of
( )
k
n − . Therefore, for a (7,4) cyclic code
0
1
2
3
4
5
6 C
C
C
C
C
C
C
C = :
)
1
)(
1
)(
1
(
1 2
3
3
7
+
+
+
+
+
=
+ x
x
x
x
x
x (1)
So the generator polynomial may be taken as either:
1)
+
x
+
(x
)
( 3
=
x
g (2)
or, )
1
(
)
( 2
3
+
+
= x
x
x
g (3)
Here, in this paper the (7, 4) cyclic code has been designed
using )
1
(
)
( 2
3
+
+
= x
x
x
g , which is equivalent to generator
code 1011. Similarly 4 bit dataword can also be written in a
polynomial expression as ( )
x
d . The generator polynomial is
used to divide the expression ( )
x
d
x k
n−
to obtain the ( )
k
n −
bit remainder polynomial ( )
x
r . This remainder polynomial
( )
x
r is appended at the end of the dataword to give the
designed 7 bit CRC codeword polynomial ( )
x
c .
)
(
)
(
)
( x
r
x
d
x
x
c k
n
+
= −
(4)
Using the above description the designed encoder is shown
in Fig. 1. The ‘+’ sign in (1-4) refers to modulo-2 addition,
which is equivalent to XOR of two bits. This makes
implementation of this encoder simpler and easier.
Figure 1. (7, 4) CRC encoder for 1)
+
x
+
(x
)
( 3
=
x
g
The encoder consists of a 3-bit shift register containing the
bits 1
0,C
C and 2
C which are initially cleared. The encoder
works by shifting the bits stored in the shift register at each
pulse cycle t. Starting with MSB, a data-bit enters the encoder
at each pulse cycle. At the same time the data-bits are fed to
the output, generating first 4 code-bits ( 3
4
5
6 C
C
C
C ) of the 7-
bit codeword for t = 1 to 4, as the output switch S1 is connected
to the input data-bit pin. Meanwhile, rest of the 3 code bits are
generated at the end of the 4th
pulse cycle which are extracted
serially. The whole process is explained in the following lines.
During the first 4 pulse cycles switch S2 remains closed; the
data bits and the shifted values stored in 1
0,C
C and 2
C are
XORed and shifted forward to the right. After 4 pulse cycles
the output switch S1 moves to check bits and S2 gets opened
up, subsequently the final generated check bits are transferred
to the output in next 3 pulse cycles [17], [18].
The check bits generation process only for t = 0 to 4 has
been shown here in Table II. Next three cycles are mere
shifting of the check bits generated in pulse cycle 4. A total of
7 pulse cycles are involved in generating the codeword.
TABLE II. CHECK BITS GENERATION CYCLE
Pulse
Cycle
Input Data
Bits
Check Bits
t Di
C0, t
= Di + C2, t-1
C1, t
= C0, t-1 +C0, t
C2, t
= C1, t-1
0 - 0 0 0
1 D3 D3 + C2, 0 C0, 0 + C0, 1 C1, 0
2 D2 D2 + C2, 1 C0, 1 + C0, 2 C1, 1
3 D1 D1 + C2, 2 C0, 2 + C0, 3 C1, 2
4 D0 D0 + C2 , 3 C0, 3 + C0, 4 C1, 3
C0 C1 C2
Generated Check Bits
Design of the (7,4) code using the other generator
polynomial i.e. )
1
(
)
( 2
3
+
+
= x
x
x
g would result in a similar
but different encoder structure.
In Table III, sixteen possible codewords derived from
different data bit combinations of 1
2
3 ,
, D
D
D and 0
D are

3. described. Any single bit change in any of these sixteen
codewords will result in an erroneous word. This one bit
contaminated word will be one among the 27
– 24
= 112 words.
The error position in the codeword can easily be found by
calculating the syndrome for the received word. Syndrome is
an indicator of the bit-error position. A zero value of syndrome
indicates no error in received word, whereas a non-zero value
indicates an error at a particular bit-position. The error position
can be found using a predefined method similar to the
encoding process that has not been described in this paper.
TABLE III. TRUTH TABLE FOR (7,4) CRC, 1)
+
x
+
(x
)
( 3
=
x
g
S.
No.
Dataword Codeword
D3 D2 D1 D0 C6 C5 C4 C3 C2 C1 C0
1 0 0 0 0 0 0 0 0 0 0 0
2 0 0 0 1 0 0 0 1 0 1 1
3 0 0 1 0 0 0 1 0 1 1 0
4 0 0 1 1 0 0 1 1 1 0 1
5 0 1 0 0 0 1 0 0 1 1 1
6 0 1 0 1 0 1 0 1 1 0 0
7 0 1 1 0 0 1 1 0 0 0 1
8 0 1 1 1 0 1 1 1 0 1 0
9 1 0 0 0 1 0 0 0 1 0 1
10 1 0 0 1 1 0 0 1 1 1 0
11 1 0 1 0 1 0 1 0 0 1 1
12 1 0 1 1 1 0 1 1 0 0 0
13 1 1 0 0 1 1 0 0 0 1 0
14 1 1 0 1 1 1 0 1 0 0 1
15 1 1 1 0 1 1 1 0 1 0 0
16 1 1 1 1 1 1 1 1 1 1 1
III. DESIGN OF (7,4) CRC STRUCTURE USING MZI
The encoder circuit depicted in Fig. 1 has here been
implemented using the electro-optical switching characteristic
of LiNbO3 waveguide based MZI (shown in Fig. 2). A
continuous optical wave applied to one of the input ports of an
MZI can be produced at one of the output ports in a controlled
manner by suitable application of appropriate electric potential
on the three electrodes of the MZIs. To apply a bit ‘1’ a
potential of 6.75 volts is applied as the control signal at the
second electrode of each of the MZI. The first and third
electrodes are kept at ground.
In Fig. 2, a continuous optical wave is applied at each of
the first input ports of MZI 1 and MZI 3. In the schematic view
of the proposed structure the check bits are followed by a
subscript containing a number followed by a time unit such as
t
C ,
0 . This representation has been used just to differentiate
between different check bits and their values at different pulse
cycles. As an example, 2
,
0
C represents the check bit 0
C at
pulse cycle t = 2. The text written in red in Fig.2 can be
assumed as optical signals.
MZI 1 and MZI 2 are cascaded to generate the check-bit
t
C ,
0 which is the modulo-2 sum of i
D and ( )
1
,
2 −
t
C . At every
pulse cycle subsequent data bits are applied at MZI 1 as control
signal. The optical output t
C ,
0 is converted to electric signal
using a photo-detector and an amplifier to obtain a potential of
6.75 volts or 0 volts, depending upon the status of the bit t
C ,
0
. This electric signal is applied at MZI 3. MZI 4 carries the bit
( )
1
,
0 −
t
C . MZI 3 and MZI 4 together produce t
C ,
1 bit. The
output 1
C is connected to a unit delay element to produce 2
C in
the next pulse cycle. The check bits generated at each pulse
cycle can be stored using an optical delay flip-flop [19], to
perform shifting of the resultant bits. The status of the optically
generated check-bits at the end of 4 pulse cycles denote the
final remainder . These signals may be captured optically
or may be converted to electric signals as per the requirement
of the user. In this way, the last three bits of the
codeword are obtained, while are already
present with the user in the form of the data bits .
Figure 2. Schematic view of the proposed (7, 4) CRC encoder
IV. MATHEMATICAL FORMULATION AND MATLAB
SIMULATION
Using the equation for power at the output bar port of a
single MZI [20] the normalized power for two cascaded MZIs
to produce XOR output at the second output port can be
derived for the output and .










Δ
Δ
+
Δ
Δ
=
2
cos
2
sin
2
sin
2
cos
2
2
1
2
2
2
1
2
0
MZI
MZI
MZI
MZI
C
P
ϕ
ϕ
ϕ
ϕ
(5)










Δ
Δ
+
Δ
Δ
=
2
cos
2
sin
2
sin
2
cos
4
2
3
2
4
2
3
2
1
MZI
MZI
MZI
MZI
C
P
ϕ
ϕ
ϕ
ϕ
(6)
where,
2
1 i
i
MZIi ϕ
ϕ
ϕ −
=
Δ (7)
for i = 1 to 4.
The output power of the output 2
C will be same as derived
for the output 1
C (6).
The above equations were designed on MATLAB 2014a.
The obtained results are presented below in Fig. 3 in a concise

4. format. The first four waveforms show the 16 possible
combinations of the dataword 0
1
2
3 D
D
D
D
D = . These
combinations are also a representative of the first four code-
bits 3
4
5
6 C
C
C
C . Corresponding generated check bits 0
1
2 C
C
C
are shown in the last three waveforms. In a way the 7
waveforms present the 16 - (7, 4) CRC codewords that were
desired to be generated. The results are in complete agreement
with the codewords present in the truth table (Table III).
Figure 3. MATLAB simulation waveforms for (7, 4) CRC codewords
V. DESIGN OF (7, 4) CRC USING BEAM PROPAGATION
METHOD (BPM)
The proposed structure as designed using beam
propagation method on the platform OptiBPM, Version 12.1,
a product of Optiwave, has been presented in Fig. 4. The
software provides modelling and simulation of various
integrated optical structures such as linear and nonlinear
waveguide based MZI, directional couplers, etc. Propagation
of light may be simulated in 2 dimensional or 3 dimensional
waveguide based devices. Here in this work 2 dimensional
simulation has been performed. Other simulation parameters
of the designed structure have been specified in Table IV.
Figure 4. BPM layout of the designed structure
The structure shows two parallel paths to generate the bits
t
C ,
0 and t
C ,
1 . The structure does not show the generation of
the bit t
C ,
2 , as it is same as the ( )
1
,
1 −
t
C . Hence, it can be
captured from the previous cycle. As discussed earlier, these
generated bits may be stored using a memory element.
TABLE IV. SIMULATION PARAMETERS FOR THE DESIGNED
STRUCTURE
S. N. Design Characteristic Parameter
1 Input optical plane 3400 µm
2 Polarization TM
3 Wafer Dimensions (Length × Width) 95314µm×300µm
4 Substrate LiNbO3
5 Cladding Air
6 Wavelength 1.3 µm
7 Global Refractive Index (Modal) 2.147
8 Engine Finite Difference
The simulation has been carried in accordance with Table
II. The optical outputs for each pulse cycle are shown in Fig.
5 and Fig. 6 along with the check-bit generation tables for the
corresponding data, for two different datawords randomly
chosen from the truth table presented in Table III.
For dataword = 0110:
Figure 5. BPM simulation results for: dataword = 0110
The check-bit generation table for the above case is shown
in Table V showing all the pulse cycles and the corresponding
results.
TABLE V. CHECK BIT GENERATION TABLE FOR DATAWORD=0110
Pulse
Cycle
Input Data
Bit
Check Bits
t
Data=0110
Di
C0, t
= Di + C2, t-1
C1, t
= C0, t-1 +C0, t
C2, t
= C1, t-1
0 - 0 0 0
1 D3 =0 0 + 0 = 0 0 + 0 = 0 0
2 D2 =1 1 + 0 = 1 1 + 0 = 1 0
3 D1 =1 1 + 0 = 1 1 + 1 = 0 1
4 D0= 0 0 + 1 = 1 1 + 1 = 0 0
C0 = 1 C1 = 0 C2 = 0
For dataword = 1010:
Figure 6. BPM simulation results for dataword =1010

5. The check-bit generation results at each pulse cycle for
dataword=1010 are shown in Table VI.
TABLE VI. CHECK BIT GENERATION TABLE FOR DATAWORD=1010
Pulse
Cycle
Input Data
Bit
Check Bits
t
Data=0110
Di
C0, t
= Di + C2, t-1
C1, t
= C0, t-1 +C0, t
C2, t
= C1, t-1
0 - 0 0 0
1 D3 =1 1 + 0 = 1 1 + 0 = 1 0
2 D2 =0 0 + 0 = 0 0 + 1 = 1 1
3 D1 =1 1 + 1 = 0 0 + 0 = 0 1
4 D0 =0 0 + 1 = 1 1 + 0 = 1 0
C0 = 1 C1 = 1 C2 = 0
Each MZI is working as an electro-optical switch
controlled by the bit applied to its electrodes. The input
optical signal reaches first output port i.e. the bar-port if the
bit applied is ‘1’; if the bit applied is ‘0’ the optical signal
propagates to the second output port or as called the cross-
port. The signal outputs that have to be noted in Fig. 5 are
4
,
1
3
,
1 ,C
C and 4
,
0
C which correspond to 1
2,C
C and 0
C ,
respectively.
The BPM results are in complete agreement with the check
bits generation tables presented for every cycle. The optical
field propagation variation at the two input ports and the four
possible output ports for the dataword ‘1010’, at the end of
pulse cycle 4 are presented below in Fig. 7:
(a)
(b)
Figure 7. Variation of Optical Field Propagation at (a) input ports (b)
output ports for dataword = 1010, pulse cycle 4
For all the cases the input ports are applied with a
continuous optical wave of 1 milli watt power. Fig. 7 (a) and
(b) show the YZ slice of the wafer at X-cut = 3400 which is
the input plane of the structure and at X-cut = 95314, the
output port, respectively. The check bit 0
C is generated at the
output port 2 of MZI 2 and 1
C at the output port 2 of MZI 4.
It can be seen from Fig. 7 (b) that some finite output is present
at the output port 1 of MZI 2 and MZI 4.
To calculate the performance of the cyclic code encoder,
some parameters like Contrast Ratio (CR) and extinction
ration (ER) are measured from the simulated output.
Extinction ratio is defined as:








= 0
max
1
min
log
10
)
(
P
P
dB
ER (8)
where 1
min
P is the minimum value of output power for logic
‘1’ and 0
max
P is the maximum output power for logic ‘0’
state.
A high value of ER is desirable for high speed switching of
an optical device and better sensitivity of the receiver [6],
[21].
Contrast Ratio (CR) is a significant factor for an optical
switching device that describes its overall performance
criterion, calculated as:








=
0
1
log
10
)
(
mean
mean
P
P
dB
CR (9)
where 1
mean
P is the mean value of output power for output
logic ‘1’ and 0
mean
P is the mean output power for output logic
‘0’ [22] . CR should be as high as possible. The CR value
obtained for the proposed structure presented in this paper is
above 20 dB.
Fig. 8 shows variation of extinction ratio vs. wavelength
and Fig. 9 shows ER vs. coupling ratio. Maximum extinction
ratio of 15.48 dB is achieved at 1.3µm and 0.5 coupling
coefficient.

6. Figure 8. Extinction ratio vs. wavelength
Figure 9. Extinction ratio vs. coupling coefficient
Table VII presents a comparison of ER and CR of few of
the optical switch/device designed using different design
technologies. The last row shows the parameters obtained for
the presented work.
TABLE VII. COMPARISON BETWEEN VARIOUS DESIGN METHODS
Design Method ER (dB) CR (dB) Ref.
Micro-ring resonator based
optical switch
12.1 15.56 [6]
All-optical Flip Flop based on
active MZI
- 11 [19]
Nonlinear photonic crystal ring
resonator
- 5.67 [23]
SOA-MZI (20 Gb/s) 9.22 > 8 [24]
MMI GaAs-GaAlAs 20.6 - [25]
7,4 CRC using LiNbO3 based
MZI (Presented work)
15.48 >20
The obtained parameters for the presented work show
values which are desirable for the successful performance of
the device for a reliable communication system. The design of
the structure is limited for designing of 7 bit codewords for 4-
bit datawords only. The design may easily be modified to
obtain codewords for longer datawords and detection of burst
errors be made possible.
ACKNOWLEDGMENT
The author(s) would like to gratefully acknowledge all the
reviewers for their valuable and constructive suggestions
regarding the paper.
REFERENCES
[1] T. Yamamoto, K. Tanaka, S. Ide, and T. Aoki, “Optical
interconnect technology for high-bandwidth data connection in
next-generation servers,” Fujitsu Sci. Tech. J., vol. 50, no. 1, pp.
117–122, 2014.
[2] Y. a Zaghloul and a R. M. Zaghloul, “Complete all-optical
processing polarization-based binary logic gates and optical
processors.,” Opt. Express, vol. 14, no. 21, pp. 9879–95, 2006.
[3] A. J. Poustie, K. J. Blow, A. E. Kelly, and R. J. Manning, “All-
optical parity checker with bit-differential delay,” no. April, pp.
37–43, 1999.
[4] K. R. Chowdhury, D. De, and S. Mukhopadhyay, “Parity checking
and generating circuit with nonlinear material in all-optical
domain,” Chinese Phys. Lett., vol. 22, no. 6, pp. 1433–1435, 2005.
[5] A. Bhattacharyya, D. Kumar Gayen, and T. Chattopadhyay, “All-
optical parallel parity generator circuit with the help of
semiconductor optical amplifier (SOA)-assisted Sagnac switches,”
Opt. Commun., vol. 313, pp. 99–105, 2014.
[6] J. K. Rakshit, J. N. Roy, and T. Chattopadhyay, “Design of micro-
ring resonator based all-optical parity generator and checker
circuit,” Opt. Commun., vol. 303, pp. 30–37, 2013.
[7] V. K. Srivastava, A. Pal, S. Kumar, and S. Sharma, “Error detecting
code for long haul network,” in Proc. SPIE 10526, Physics and
Simulation of Optoelectronic Devices XXVI, 105261V (23
February 2018), 2018, no. February, p. 69.
[8] R. P. Y. Ghanshyam Singh, Vijay Janyani, “Modeling of a high
performance Mach – Zehnder interferometer all optical switch,”
Opt. Appl., vol. XLII, no. 3, pp. 613–625, 2012.
[9] S. K. Raghuwanshi, A. Kumar, and S. Kumar, “1 × 4 signal router
using three Mach-Zehnder interferometers,” Opt. Eng., vol. 52 (3).
[10] H. J. S. Dorren, M. T. Hill, A. Member, Y. Liu, S. Member, N.
Calabretta, A. Srivatsa, F. M. Huijskens, H. De Waardt, and G. D.
Khoe, “Optical Packet Switching and Buffering by Using All-
Optical Signal Processing Methods,” J. Light., vol. 21, no. 1, pp.
2–12, 2003.
[11] J. Gomes and B. K. Mishra, “Double Error Correcting Long Code,”
Int. J. Comput. Networks Commun., vol. 2, no. 5, pp. 58–69, 2010.
[12] C. E. Shannon, “A mathematical theory of communication,” Bell
Syst. Tech. J., vol. XXVII, , no. 1, pp. 1–131, 1948.
[13] R. W. HAMMING, “The Bell system technical journal,” Bell Syst.
Tech. J., vol. XXVI, NO., no. 4, pp. 147–160, 1950.
[14] N. Sadagopan, “Error Detection and Correction.” Indian
Institutte of Information technology Design and Manufacturing,
Kanchepuram, pp. 1–20, 2013.
[15] P. Koopman, K. Driscoll, and B. Hall, “Selection of Cyclic
Redundancy Code and Checksum Algorithms to Ensure Critical
Data Integrity,” 2015.
[16] B. A. Forouzan, “Data Communications and Networking,” in Data
Communications and Networking, 5th ed., Mcgraw Higher
Education, 2013, pp. 257–284.
[17] A. B. Carlson, P. B. Crilly, and J. C. Rutledge, “Communication
Systems,” in An Introduction to Signals and Noise in Electrical
Communication, Mcgraw Hill, 2002, pp. 547–573.
[18] S. Sheng-Ju, “Implementation of Cyclic Redundancy Check in
Data Communication,” in Proceedings - 2015 International
Conference on Computational Intelligence and Communication
Networks, CICN 2015, 2015, pp. 529–531.
[19] R. Clavero, F. Ramos, and J. Martí, “All-optical flip-flop based on
an active Mach–Zehnder interferometer with a feedback loop,”
Opt. Lett., vol. 30, no. 21, pp. 2861–2863, 2005.
[20] G. P. Agrawal, Lightwave Technology: Components and Devices.
Wiley Interscience, 2004.
[21] Z. Li, Y. He, B. F. Jmgensen, and R. J. Pedersen, “Extinction Ratio
Effect for High-speed Optical Fiber Transmissions,” in Internation
Conference on Communication Technology, 1998, pp. 1–5.
[22] K. E. Zoiros, G. Papadopoulos, T. Houbavlis, and G. T. Kanellos,
“Theoretical analysis and performance investigation of ultrafast
all-optical Boolean XOR gate with semiconductor optical
amplifier-assisted Sagnac interferometer,” Opt. Commun., vol.
258, pp. 114–134, 2006.
[23] M. Ghadrdan and M. A. Mansouri-Birjandi, “Concurrent
implementation of all-optical half-adder and AND & XOR logic
gates based on nonlinear photonic crystal,” Opt. Quantum
Electron., vol. 45, no. 10, pp. 1027–1036, 2013.
[24] M. Zhang, Y. Zhao, L. Wang, J. Wang, and P. Ye, “Design and
analysis of all-optical XOR gate using SOA-based Mach-Zehnder
interferometer,” Opt. Commun., vol. 223, pp. 301–308, 2003.
[25] S. Cao, L. Sun, and M. Savoie, “2×2 MMI-MZI GaAs-GaAlAs
carrier-injection optical switch,” 2010 IEEE Photonics Soc.
Summer Top. Meet. Ser. PHOSST 2010, pp. 207–208, 2010.