digital integrated circuits and applications is a course in electronics and communication branch in engineering .multiplexers is a concept in digital integrated circuits. this concept is very useful in engineering domain electronics and communication branch is most recognised branch in engineering domain multiplexers are used in digital communications.

1. Unit III - Multiplexers

2. Introduction
• A multiplexer connects data from one of
the multiple sources to the output
• The image shows a n-input b-bit
multiplexer
• Each data source has b-bits
• Based on the select value, any one of the
data sources will be connected to the
output

3. Functional Diagram

4. 74x151 8 input 1-bit Multiplexer
• It has 8(n) input lines each with 1 bit
of data
• It requires 3 select pins to select any
of the eight inputs
• No of select pins s= log2n
• It has an Enable pin which is active
low
• The inverted output is also available

5. Functional Truth table

6. Logic Diagram

7. module mux8to1( input C,B,A, EN_L, input [7:0] D, output reg Y,Y_L );
always @(*)
begin
casex({EN_L, C, B, A})
4'b1xxx: begin Y=0; Y_L=~Y; end
4'b0000: begin Y=D[0]; Y_L=~Y; end
4'b0001: begin Y=D[1]; Y_L=~Y; end
4'b0010: begin Y=D[2]; Y_L=~Y; end
4'b0011: begin Y=D[3]; Y_L=~Y; end
4'b0100: begin Y=D[4]; Y_L=~Y; end
4'b0101: begin Y=D[5]; Y_L=~Y; end
4'b0110: begin Y=D[6]; Y_L=~Y; end
4'b0111: begin Y=D[7]; Y_L=~Y; end
default: begin Y=0; Y_L=~Y; end
endcase
end
endmodule

8. Cascading 8 :1 Mux to realize 32 :1 Mux

9. XEN_L XA4 XA3 XA2 XA1 XA0 XO_0 XO_1 XO_2 XO_3 XOUT
0 0 0 0 0 0 X0 0 0 0 X0
0 0 0 0 0 1 X1 0 0 0 X1
0 0 0 0 1 0 X2 0 0 0 X2
0 0 0 0 1 1 X3 0 0 0 X3
0 0 0 1 0 0 X4 0 0 0 X4
0 0 0 1 0 1 X5 0 0 0 X5
0 0 0 1 1 0 X6 0 0 0 X6
0 0 0 1 1 1 X7 0 0 0 X7
0 0 1 0 0 0 0 X8 0 0 X8
0 0 1 0 0 1 0 X9 0 0 X9
0 0 1 0 1 0 0 X10 0 0 X10
0 0 1 0 1 1 0 X11 0 0 X11
0 0 1 1 0 0 0 X12 0 0 X12
0 0 1 1 0 1 0 X13 0 0 X13
0 0 1 1 1 0 0 X14 0 0 X14
0 0 1 1 1 1 0 X15 0 0 X15

10. XEN_L XA4 XA3 XA2 XA1 XA0 XO_0 XO_1 XO_2 XO_3 XOUT
0 1 0 0 0 0 0 0 X16 0 X16
0 1 0 0 0 1 0 0 X17 0 X17
0 1 0 0 1 0 0 0 X18 0 X18
0 1 0 0 1 1 0 0 X19 0 X19
0 1 0 1 0 0 0 0 X20 0 X20
0 1 0 1 0 1 0 0 X21 0 X21
0 1 0 1 1 0 0 0 X22 0 X22
0 1 0 1 1 1 0 0 X23 0 X23
0 1 1 0 0 0 0 0 0 X24 X24
0 1 1 0 0 1 0 0 0 X25 X25
0 1 1 0 1 0 0 0 0 X26 X26
0 1 1 0 1 1 0 0 0 X27 X27
0 1 1 1 0 0 0 0 0 X28 X28
0 1 1 1 0 1 0 0 0 X29 X29
0 1 1 1 1 0 0 0 0 X30 X30
0 1 1 1 1 1 0 0 0 X31 X31

11. Questions
1. Draw the logic diagram of 74x151 and explain its operation
2. Design a 32x1 Multiplexer using 8x1 multiplexers
3. Draw the logic symbol, write the truth table and write the VeriLog
code for 8x1 multiplexer

12. 74x157 2-input 4-bit multiplexer
• It has 2(n) input lines each of which is
4(b) bits width
• One select pin to select one of the two
inputs

14. module mux2input4bit(
input G_L, S,
input [3:0] A, B,
output reg[3:0] Y
);
always @(*)
begin
if(G_L==1)
Y=4'b0000;
else if(G_L==0 & S==0)
Y=A;
else
Y=B;
end
endmodule

15. module muxdf24( input G_L, S, input [3:0] A, B, output [3:0] Y );
wire SA, SB, YA1, YB1, YA2, YB2, YA3, YB3, YA4, YB4;
assign SA= (~G_L & ~S);
assign SB= (~G_L & S);
assign YA1= (SA & A[0]);
assign YB1= (SB & B[0]);
assign YA2= (SA & A[1]);
assign YB2= (SB & B[1]);
assign YA3= (SA & A[2]);
assign YB3= (SB & B[2]);
assign YA4= (SA & A[3]);
assign YB4= (SB & B[3]);
assign Y[0]= (YA1 | YB1);
assign Y[1]= (YA2 | YB2);
assign Y[2]= (YA3 | YB3);
assign Y[3]= (YA4 | YB4);
endmodule

16. 74x153 4-input 2-bit multiplexer
• It has 4 inputs each of which is 2 bits
width
• A, B are the select pins which selects any
one of the four inputs
• Enable pins are provided for selection of
individual bits in each input

18. Demultiplexer
• A demux does the reverse operation of the multiplexer
• It receives the data and based on the select pins the data will be
passed to the one of the outputs

19. • A decoder can be used as a demultiplexer by giving the data line to the
enable pin of the decoder
• The select lines of the decoder will decide which output line will be
driven with that data
• For example, half section of a 74x139 decoder can be used as a 1-bit 4
output demultiplexer