Analog-to-digital, digital-to-analog, sample and hold circuits; voltage controlled oscillator, phase locked loop – operating principles, applications of PLL.
result management system report for college project
Unit IV DA & AD Convertors and Phase Locked Loop
1. Presented by
Dr. R. RAJA, M.E., Ph.D.,
Assistant Professor, Department of EEE,
Muthayammal Engineering College, (Autonomous)
Namakkal (Dt), Rasipuram – 637408
19EEC03-Linear Integrated Circuits and Its Applications
Unit-IV DA & AD Convertors and Phase Locked Loop
MUTHAYAMMAL ENGINEERING COLLEGE
(An Autonomous Institution)
(Approved by AICTE, New Delhi, Accredited by NAAC, NBA & Affiliated to Anna University),
Rasipuram - 637 408, Namakkal Dist., Tamil Nadu.
2. Unit IV: D/A & A/D Convertors and Phase Locked Loop
Analog-to-digital, digital-to-analog, sample and hold circuits; voltage controlled
oscillator, phase locked loop – operating principles, applications of PLL.
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3. Analog to Digital Converter
From the name itself it is clear that it is a converter which converts the analog
(continuously variable) signal to digital signal.
This is really an electronic integrated circuit which directly converts the
continuous form of signal to discrete form.
It can be expressed as A/D or A-to-D or A-D or ADC.
The input (analog) to this system can have any value in a range and are directly
measured. But for output (digital) of an N-bit A/D converter, it should have
only 2N discrete values.
This A/D converter is a linkage between the analog (linear) world of
transducers and discreet world of processing the signal and handling the data.
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4. Contd..
The digital to analog converter (DAC) carry out the inverse function of the
ADC.
The schematic representation of ADC is shown below.
ADC Process
There are mainly two steps involves in the process of conversion. They are
Sampling and Holding
Quantizing and Encoding
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6. Contd..
Sampling and Holding
In the process of Sample and hold (S/H), the continuous signal will gets
sampled and freeze (hold) the value at a steady level for a particular least period
of time.
It is done to remove variations in input signal which can alter the conversion
process and thereby increases the accuracy.
The minimum sampling rate has to be two times the maximum data frequency
of the input signal.
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7. Contd..
Quantizing and Encoding
For understanding quantizing, we can first go through the term Resolution used
in ADC.
It is the smallest variation in analog signal that will result in a variation in the
digital output. This actually represents the quantization error.
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8. Contd..
Quantizing:
It is the process in which the reference signal is partitioned into several discrete
quanta and then the input signal is matched with the correct quantum.
Encoding:
Here; for each quantum, a unique digital code will be assigned and after that the
input signal is allocated with this digital code.
The process of quantizing and encoding is demonstrated in the table below.
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9. Contd..
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From the above table we can observe that
only one digital value is used to represent
the whole range of voltage in an interval.
Thus, an error will occur and it is called
quantization error.
This is the noise introduced by the process
of quantization. Here the maximum
quantization error is
10. Contd..
Improvement of Accuracy in ADC
Two important methods are used for improving the accuracy in ADC.
They are by increasing the resolution and by increasing the sampling rate.
This is shown in figure below (figure 3).
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11. Contd..
Types of Analog to Digital Converter
Successive Approximation ADC: This converter compares the input signal with the
output of an internal DAC at each successive step. It is the most expensive type.
Dual Slope ADC: It have high accuracy but very slow in operation.
Pipeline ADC: It is same as that of two step Flash ADC.
Delta-Sigma ADC: It has high resolution but slow due to over sampling.
Flash ADC: It is the fastest ADC but very expensive.
Other: Staircase ramp, Voltage-to-Frequency, Switched capacitor, tracking, Charge
balancing, and resolver.
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12. Contd..
Application of ADC
Used together with the transducer.
Used in computer to convert the analog signal to digital signal.
Used in cell phones.
Used in microcontrollers.
Used in digital signal processing.
Used in digital storage oscilloscopes.
Used in scientific instruments.
Used in music reproduction technology etc.
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13. Digital to Analog Converter or DAC
Op amp is extensively used as main building block of digital to analog
convertor.
Digital to analog convertor is an electronics device in form of IC, which
converts digital signal to its equivalent analog signal.
The DAC can be realized in many ways. One of the popular digital to analog
convertor circuit is binary weighted ladder.
This is basically a summing amplifier designed with suitable resistances, as
shown below.
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15. Contd..
Before going through the above circuit of digital to analog convertor, Let us
put some suitable values of different resistors connected in the circuit.
Such as, Rf = 10KΩ, R1 = 10KΩ, R2 = 20KΩ, R3 = 40KΩ and R4= 80KΩ.
Putting these values in equation (i) we get,
Now, let us also apply voltage at input terminals either 0 or 1 volt. Putting , 0
volt at all inputs,(i.e. v1 = 0, v2 = 0, v3 = 0 and v4 = 0) we get,
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16. Contd..
So, for digital input 0000, we get analog output 0 volt. Putting, 1V at last input
only, (i.e. v1 = 0, v2 = 0, v3 = 0 and v4 = 1V), we get,
Similarly, for v1 = 0, v2 = 0, v3 = 1, v4 = 0
For, v1 = 0, v2 = 0, v3 = 1, v4 = 1
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17. Contd..
In this way the inputs and corresponding outputs can be represented in a table
as shown below.
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18. Contd..
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So, for each decimal number there is one unique output voltage level. From the
table it is also seen that, form 0 to 15, for each increment there is an increase of
output voltage level by 0.125 volt.
19. Contd..
So, the output is analog and it is linearly proportional the decimal equivalent of
digital inputs.
The above example was of a four bit DAC. A four bit DAC can be represented
as shown below.
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20. Sample and Hold Circuit
Definition: The Sample and Hold circuit is an electronic circuit which creates
the samples of voltage given to it as input, and after that, it holds these samples
for the definite time.
The time during which sample and hold circuit generates the sample of the
input signal is called sampling time. Similarly, the time duration of the circuit
during which it holds the sampled value is called holding time.
Sampling time is generally between 1µs to 14 µs while the holding time can
assume any value as required in the application. It will not be wrong to say that
capacitor is the heart of sample and hold circuit.
This is because the capacitor present in it charges to its peak value when the
switch is opened, i.e. during sampling and holds the sampled voltage when the
switch is closed.
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21. Contd..
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Circuit Diagram of Sample and Hold Circuit
The diagram below shows the circuit of the sample and hold circuit with the help of an
Operational Amplifier. It is evident from the circuit diagram that two OP-AMPS are
connected via a switch. When the switch is closed sampling process will come into the
picture and when the switch is opened holding effect will be there.
22. Contd..
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The capacitor connected to the second operational amplifier is nothing but a
holding capacitor.
23. Contd..
Significance
Now, you all are aware that what is the sample and hold circuit. But what are
the driving forces which have turned us in the direction to use the sample and
hold circuit? To understand this, we need to enter into communication realm.
We all know digital communication is better than analogue communication, but
why? What is wrong with analogue communication?
The noise interference is the real culprit. It makes analogue communication
less efficient and less reliable.
Thus, in digital communication, we need digital signals. But naturally, all the
signals are analogue. This is the turning point where we need a sample and hold
circuit.
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24. Contd..
With the help of sample and hold circuit we can take samples of the analogue
signal, followed by a capacitor.
It holds these sample for a particular period. As a consequence of this, a
constant signal is generated this can be converted into the digital signal with the
help of analogue to digital converters.
Working of Sample and Hold Circuit
The working of sample and hold circuit can be easily understood with the help
of working of its components.
The main components which a sample and hold circuit involves is an N-
channel Enhancement type MOSFET, a capacitor to store and hold the
electric charge and a high precision operational amplifier.
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25. Contd..
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The N-channel Enhancement MOSFET will be used a switching element. The input
voltage is applied through its drain terminal and control voltage will be applied
through its gate terminal.
26. Contd..
When the positive pulse of the control voltage is applied, the MOSFET will be
switched to ON state.
And it acts as a closed switch. On the contrary, when the control voltage is zero
then the MOSFET will be switched to OFF state and acts as the open switch.
When the MOSFET acts as a closed switch, then the analogue signal applied to
it through the drain terminal will be fed to the capacitor.
The capacitor will then charge to its peak value.
When the MOSFET switch is opened, then the capacitor stops charging.
Due to the high impedance operational amplifier connected at the end of the
circuit, the capacitor will experience high impedance due to this it cannot get
discharged.
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27. Contd..
This leads to the holding of the charge by the capacitor for the definite amount
of time.
This time can be referred as holding period. And the time in which samples of
the input voltage is generated is called sampling period.
The output processed by operational amplifier during the holding period.
Therefore, holding period holds significance for OP-AMPS.
Input and Output Waveforms
The waveforms as described in the diagram clearly depicts the picture.
It is evident from the waveform of the sample and hold circuit, that during the
ON duration what will be the voltage at the output. During the OFF duration the
voltage that exists at the output of OP-AMP.
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28. Contd..
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Connections
The connection diagram helps us to build a
better understanding about the input
voltage and control voltage and how they
are applied to the OP-AMP.
The capacitor used should be versatile so
that it does possess any leakage.
The capacitor made of Teflon and
polyethylene will be appropriate to
achieve our desired purpose.
30. Contd..
In the connection diagram, you can see that LF 398 is written, that is nothing
but the special architecture IC for sample and hold circuit.
The crucial point to be noted here is the frequency of analog input signal and
control signal.
To maintain the efficiency of the sample and hold circuit it is very important to
observe the frequency.
The frequency of the control voltage should be greater than the frequency
of input voltage so that the analog signal can be sampled twice in a complete
cycle.
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31. Contd..
Functional diagram
With the help of this diagram, we can easily interpret that how a sample and
hold circuit functions.
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32. Contd..
Performance Parameters
Acquisition Time (TAC): The time required by the capacitor to get the charge
of the input voltage applied to the sample and hold circuit. It is referred as
acquisition time.
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33. Contd..
Aperture Time (TAP): The aperture time can be defined as the time required by
the capacitor to change its state from sampling to holding. Due to the
propagation delay of switches, even after the hold command is given the
capacitor still keeps on charging for the short duration of time. This is nothing
but aperture time.
Voltage Droop: The voltage droop is the voltage drop down in the capacitor
due to leakage of charge by a capacitor. Ideally, we require capacitors which do
not possess any leakage, but it is not possible practically. No matter how good
quality material we use there will be some voltage drop.
Hold Mode Settling Time: After the generation of hold commands, the
analogue input voltage which is used by the capacitor for charging takes some
time to settle completely. This is called Hold Mode settling time.
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34. Contd..
Application of Sample and Hold Circuit
Data Distribution System
Sampling Oscilloscopes
Data Conversion System
Digital Voltmeters
Analog Signal Processing
Signal Constructional Filters
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35. Voltage Controlled Oscillator | VCO
Voltage controlled oscillator (VCO), from the name itself it is clear that the
output instantaneous frequency of the oscillator is controlled by the input
voltage.
It is a kind of oscillator which can produce output signal frequency over a large
range (few Hertz-hundreds of Giga Hertz) depending on the input DC voltage
given to it.
Frequency Control in Voltage Controlled Oscillator
Many forms of VCOs are generally used. It can be of RC oscillator or multi
vibrator type or LC or crystal oscillator type.
However; if it is of RC oscillator type, the oscillation frequency of output signal
will be in inversely proportional to capacitance as
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36. Contd..
In the case of LC oscillator, the oscillation frequency of output signal will be
So, we can say that as the input voltage or control voltage increases, the
capacitance get reduced. Hence, the control voltage and frequency of
oscillations are directly proportional.
That is, when one increases, the other will increase.
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37. Contd..
The figure above represents the basic working of voltage controlled oscillator.
Here, we can see that at nominal control voltage represented by VC(nom), the
oscillator works at its free running or normal frequency, fC(nom).
As the control voltage decreases from nominal voltage, the frequency also
decreases and as the nominal control voltage increases, the frequency also gets
higher.
The varactors diodes which are variable capacitance diodes (available in
different capacitance range) are implemented for getting this variable voltage.
For low frequency oscillators, the charging rate of capacitors is altered using
voltage controlled current source to get the variable voltage..
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38. Contd..
Types of Voltage Controlled Oscillator
The VCOs can be categorized based on the output waveform:
Harmonic Oscillators and Relaxation Oscillators
Harmonic Oscillators
The output waveform produced by harmonic oscillators is sinusoidal. This can often
referred as linear voltage controlled oscillator. The examples are LC and Crystal
oscillators. Here, the capacitance of the varactor diode is varied by the voltage which is
across the diode. This in turns alters the capacitance of the LC circuit. Hence, the output
frequency will change. Advantages are frequency stability with reference to power
supply, noise and temperature, Accuracy in control of frequency. The main drawback is
this type of oscillators cannot be implemented effortlessly on monolithic ICs.
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39. Contd..
Relaxation Oscillators
The output waveform produced by harmonic oscillators is saw tooth. This type can
give a large range of frequency using reduced quantity of components. Mainly it
can be used in monolithic ICs. The relaxation oscillators can possess the following
topologies:
Delay-based ring VCOs, Grounded capacitor VCOs and Emitter-Coupled VCOs
Here; in delay-based ring VCOs, the gain stages are attached together in a ring
form.
As the name implies, the frequency is related to the delay in every single stage.
The second and third type VCOs works almost similarly.
The time period taken in each stage is directly related to the charging and
discharging time of capacitor.
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40. Contd..
Working Principle of Voltage Controlled Oscillator (VCO)
VCO circuits can be designed by means of many voltage control electronic
components such as varactor diodes, transistors, Op-amps etc. Here, we are
going to discuss about the working of a VCO using Op-amps. The circuit
diagram is shown below.
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41. Contd..
The output waveform of this VCO will be square wave.
As we know the output frequency is related to the control voltage. In this circuit
the first Op-amp will function as an integrator.
The voltage divider arrangement is implemented here. Because of this, the half
of the control voltage that is given as input is given to the positive terminal of
the Op-amp 1.
The same level of voltage is maintained at the negative terminal. This is to
sustain the voltage drop across the resistor, R1 as half of the control voltage.
When the MOSFET is in on condition, the current flowing from the R1 resistor
passes through the MOSFET. The R2 have half the resistance, same voltage
drop and twice the current as that of R1.
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42. Contd..
So, the extra current charges the connected capacitor. The Op-amp 1 should
provide a gradually increasing output voltage to supply this current.
When the MOSFET is in off condition, the current flowing from the R1 resistor
passes through the capacitor, get discharged. The output voltage obtained from
the Op-amp 1 at this time will be falling. As a result, a triangular waveform is
generated as the output of Op-amp 1.
The Op-amp 2 will operate as Schmitt trigger. The input to this Op-amp is
triangular wave which is the output of the Op-amp 1. If the input voltage is
higher than the threshold level, the output from the Op-amp 2 will be VCC.
If the input voltage is less than the threshold level, the output from the Op-amp
2 will be zero. Therefore, the output of the Op-amp 2 will be square wave.
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43. Contd..
Example of VCO is LM566 IC or IC 566. It is in fact an 8 pin integrated circuit
which can produce double outputs-square wave and triangular wave. The
internal circuit is represented below.
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44. Contd..
Applications of Voltage Controlled Oscillator
Function generator
Phase Locked Loop
Tone generator
Frequency-shift keying
Frequency modulation
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45. Phase Locked Loop
The key to the operation of a phase locked loop, PLL, is the phase difference
between two signals, and the ability to detect it.
The information about the error in phase or the phase difference between the
two signals is then used to control the frequency of the loop.
To understand more about the concept of phase and phase difference, it is
possible to visualise two waveforms, normally seen as sine waves, as they
might appear on an oscilloscope.
If the trigger is fired at the same time for both signals they will appear at
different points on the screen.
The linear plot can also be represented in the form of a circle.
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46. Contd..
The beginning of the cycle can be represented as a particular point on the circle
and as a time progresses the point on the waveform moves around the circle.
Thus a complete cycle is equivalent to 360° or 2π radians.
The instantaneous position on the circle represents the phase at that given
moment relative to the beginning of the cycle.
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47. Contd..
The concept of phase difference takes this concept a little further.
Although the two signals we looked at before have the same frequency, the
peaks and troughs do not occur in the same place.
There is said to be a phase difference between the two signals. This phase
difference is measured as the angle between them.
It can be seen that it is the angle between the same point on the two waveforms.
In this case a zero crossing point has been taken, but any point will suffice
provided that it is the same on both.
This phase difference can also be represented on a circle because the two
waveforms will be at different points on the cycle as a result of their phase
difference.
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48. Contd..
The phase difference measured as an angle: it is the angle between the two lines
from the center of the circle to the point where the waveform is represented.
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49. Contd..
When there two signals have different frequencies it is found that the phase
difference between the two signals is always varying.
The reason for this is that the time for each cycle is different and accordingly
they are moving around the circle at different rates.
It can be inferred from this that the definition of two signals having exactly the
same frequency is that the phase difference between them is constant. There
may be a phase difference between the two signals.
This only means that they do not reach the same point on the waveform at the
same time.
If the phase difference is fixed it means that one is lagging behind or leading the
other signal by the same amount, i.e. they are on the same frequency.
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50. Contd..
Phase locked loop basics
A phase locked loop, PLL, is basically of form of servo loop.
Although a PLL performs its actions on a radio frequency signal, all the basic
criteria for loop stability and other parameters are the same.
In this way the same theory can be applied to a phase locked loop as is applied
to servo loops.
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51. Contd..
A basic phase locked loop, PLL, consists of three basic elements:
Phase comparator / detector: As the name implies, this circuit block within the
PLL compares the phase of two signals and generates a voltage according to the
phase difference between the two signals.
Voltage controlled oscillator, VCO: The voltage controlled oscillator is the circuit
block that generates the radio frequency signal that is normally considered as the
output of the loop.
Loop filter: This filter is used to filter the output from the phase comparator in the
phase locked loop, PLL. It is used to remove any components of the signals of which
the phase is being compared from the VCO line.
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52. Operating Principles
Phase locked loop operation
The basic concept of the operation of the PLL is relatively simple, although the
mathematical analysis and many elements of its operation are quite complicated
The diagram for a basic phase locked loop shows the three main element of the
PLL: phase detector, voltage controlled oscillator and the loop filter.
In the basic PLL, reference signal and the signal from the voltage controlled
oscillator are connected to the two input ports of the phase detector.
The output from the phase detector is passed to the loop filter and then filtered
signal is applied to the voltage controlled oscillator.
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54. Contd..
The Voltage Controlled Oscillator, VCO, within the PLL produces a signal
which enters the phase detector.
Here the phase of the signals from the VCO and the incoming reference signal
are compared and a resulting difference or error voltage is produced.
This corresponds to the phase difference between the two signals.
The error signal from the phase detector passes through a low pass filter which
governs many of the properties of the loop and removes any high frequency
elements on the signal.
Once through the filter the error signal is applied to the control terminal of the
VCO as its tuning voltage.
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55. Contd..
The sense of any change in this voltage is such that it tries to reduce the phase
difference and hence the frequency between the two signals.
Initially the loop will be out of lock, and the error voltage will pull the
frequency of the VCO towards that of the reference, until it cannot reduce the
error any further and the loop is locked.
When the PLL, phase locked loop, is in lock a steady state error voltage is
produced.
By using an amplifier between the phase detector and the VCO, the actual error
between the signals can be reduced to very small levels.
However some voltage must always be present at the control terminal of the
VCO as this is what puts onto the correct frequency.
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56. Contd..
The fact that a steady error voltage is present means that the phase difference
between the reference signal and the VCO is not changing.
As the phase between these two signals is not changing means that the two
signals are on exactly the same frequency.
The phase locked loop, PLL is a very useful building block, particularly for
radio frequency applications.
The PLL forms the basis of a number of RF systems including the indirect
frequency synthesizer, a form of FM demodulator and it enables the recovery of
a stable continuous carrier from a pulse waveform. In this way, the phase
locked loop, PLL is an essential RF building tool.
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57. Applications of Phase-Locked Loop
FM demodulation networks for FM operations
It is used in motor speed controls and tracking filters.
It is used in frequency shifting decodes for demodulation carrier frequencies.
It is used in time to digital converters.
It is used for Jitter reduction, skew suppression, clock recovery.
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