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Tk2050

The document provides technical information about the TK2050, a 50W Class-T digital audio amplifier using Tripath's Digital Power Processing technology. It offers high output power of 50W at 8 ohms or less than 1% THD+N and high efficiency of 92% at 60W into 8 ohms. The amplifier integrates the TC2000 audio signal processor and TP2050 power stage driver. It is suitable for applications such as home theater and stereo systems.

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Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TK2050 STEREO 50W (8Ω) CLASS-T™ DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSING (DPP™) TECHNOLOGY Technical Information Revision 1.1 – October 2002 GENERAL DESCRIPTION The TK2050 (TC2000/TP2050 chipset) is a 50W continuous average power per channel, Class-T Digital Audio Power Amplifier using Tripath’s proprietary Digital Power ProcessingTM technology. Class-T amplifiers offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers. The performance of the TK2050 is similar to the TK2051, but the TP2050 driver used in the TK2050 is a thermally enhanced PSOP package, which provides for a more effective and flexible heat removal solution. APPLICATIONS FEATURES 5.1-Channel DVD Class-T Architecture Mini/Micro Component Systems High Output power Home Theater 35W @ 6Ω, < 1% THD+N Stereo applications (6Ω / 8Ω) 50W @ 8Ω, < 3% THD+N Mono applications (4Ω) 117W @ 4Ω, < 10.0% THD+N (paralleled outputs) BENEFITS Audiophile Quality Sound Single Supply Operation 0.007% THD+N @ 30W 8Ω Very High Efficiency 0.005% THD+N @ 70W 4Ω Wide Dynamic Range (paralleled outputs) Compact layout High Efficiency 92% @ 60W 8Ω 85% @ 46W 6Ω 89% @ 117W 4Ω (paralleled outputs) Dynamic Range >100 dB 1 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on A B S O L U T E M A X I M U M R A T I N G S – T C 2 0 0 0 (Note 1) SYMBOL PARAMETER Value UNITS V5 5V Power Supply 6 V Vlogic Input Logic Level V5+0.3V V TA Operating Free-air Temperature Range -40 to 85 °C TSTORE Storage Temperature Range -55 to 150 °C TJMAX Maximum Junction Temperature 150 °C ESDHB ESD Susceptibility – Human Body Model (Note 2), all pins 2000 V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. See the table below for Operating Conditions. Note 2: Human body model, 100pF discharged through a 1.5KΩ resistor. A B S O L U T E M A X I M U M R A T I N G S – T P 2 0 5 0 (Note 1) SYMBOL PARAMETER Value UNITS VCC Power Supply 40 V Vlogic Input Logic Level 5.5 V TA Operating Free-air Temperature Range 0 to 70 °C TSTORE Storage Temperature Range -40 to 150 °C TJMAX Maximum Junction Temperature 150 °C ESDHB ESD Susceptibility – Human Body Model (Note 2), all pins 2000 V O P E R A T I N G C O N D I T I O N S – T C 2 0 0 0 (Note 1) SYMBOL PARAMETER MIN. TYP. MAX. UNITS V5 Supply Voltage 4.5 5 5.5 V VHI Logic Input High V5-1.0 V VLO Logic Input Low 1 V TA Operating Temperature Range -40 25 85 °C O P E R A T I N G C O N D I T I O N S – T P 2 0 5 0 (Note 1) SYMBOL PARAMETER MIN. TYP. MAX. UNITS VCC Power Supply 10 36 V VHI Logic Input High Ibias/10 + 500mV V VLO Logic Input Low Ibias/5 + 1V V TA Operating Temperature Range 0 25 70 °C THERMAL CHARACTERISTICS TC2000 SYMBOL PARAMETER Value UNITS θJA Junction-to-ambient Thermal Resistance (still air) 80 °C/W TP2050 SYMBOL PARAMETER Value UNITS θJC Junction-to-case Thermal Resistance 2.5 °C/W 2 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on ELECTRICAL CHARACTERISTICS - TC2000 SYMBOL PARAMETER MIN. TYP. MAX. UNITS I5 Supply Current 60 mA fsw Switching Frequency 650 kHz VIN Input Sensitivity 0 1.5 V VOUTHI High Output Voltage V5-0.5 V VOUTLO Low Output Voltage 100 mV RIN Input Impedance 2 kΩ Input DC Bias 2.5 V ELECTRICAL CHARACTERISTICS - TP2050 TA = 25 °C. See Application/Test Circuit. Unless otherwise noted, the supply voltage is VCC = 28V. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS Quiescent Current VCC = +28V 125 mA Iq (No load, Mute = 0V) V5 = 5V 27 60 mA Mute Supply Current VCC = +31V 28 mA IMUTE (No load, Mute = 5V) V5 = 5V 7 mA VIH High-level input voltage (MUTE) IIH = See Mute Control Section 3.5 V VIL Low-level input voltage (MUTE) IIL = See Mute Control Section 1.0 V o ISC Short-circuit current limit VCC = +30V, T=25 C 3.5 5 6.5 A PERFORMANCE CHARACTERISTICS - TK2050 TA = 25 °C. Unless otherwise noted, VCC = 30V, f=1kHz, and the measurement bandwidth is 20kHz. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS POUT Output Power VCC = +30V, RL = 8Ω (Continuous Average/Channel) THD+N < 0.01% 30 W (Note 13) THD+N < 3.0% 50 W THD+N < 10.0% 60 W VCC = +23.5V, RL = 6Ω THD+N < 0.05% 30 W THD+N < 5.0% 40 W THD+N < 10.0% 45 W VCC = +30V, RL = 4Ω (par. output) THD+N < 0.01% 75 W THD+N < 10% 117 W THD + N Total Harmonic Distortion Plus POUT = 40W/Channel, RL = 8Ω 0.03 % Noise VCC = +30V POUT = 30W/Channel, RL = 6Ω 0.03 % VCC = +23.5V IHF-IM IHF Intermodulation Distortion 19kHz, 20kHz, 1:1 (IHF), RL = 8Ω 0.05 % POUT = 30W/Channel SNR Signal-to-Noise Ratio A-Weighted 103 dB 0dB = 50W/Channel, RL = 8Ω CS Channel Separation 0dB = 10W, RL = 8Ω, f=1kHz 95 dB AV Amplifier Gain POUT = 10W/Channel, RL = 8Ω, 15 V/V See Application / Test Circuit AVERROR Channel to Channel Gain Error POUT = 10W/Channel, RL = 8Ω 0.5 dB See Application / Test Circuit η Power Efficiency POUT = 60W/Channel, RL = 8Ω 92 % POUT = 45W/Channel, RL = 6Ω 85 % eN Output Noise Voltage A-Weighted, input AC grounded 135 µV 3 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TC2000 AUDIO SIGNAL PROCESSOR PIN DESCRIPTIONS Pin Function Description Bandgap reference times two (typically 2.5VDC). Used to set the common mode voltage 1 BIASCAP for the input op amps. This pin is not capable of driving external circuitry. 2, 6 FDBKP2, FDBKP1 Positive switching feedback. Internal mode selection. This pin must be grounded for proper device 3 DCMP operation. 4, 7 FDBKN2, FDBKN1 Negative switching feedback. 5 VPWR Test pin. Must be left floating. Logic output. A logic high indicates both amplifiers are muted, due to the mute pin state, or 8 HMUTE a “fault”. 9, 12 Y1, Y2 Non-inverted switching modulator outputs. 10, 11 Y1B, Y2B Inverted switching modulator outputs. 13 NC No connect 14 OCD2 Over Current Detect. 15 REF Internal reference voltage; approximately 1.2 VDC. Over Current Detect. This pin must be grounded for proper device 16 OCD1 operation. 17 VnnSense Negative power stage over/under supply voltage sense resistor tie point. 18 OVRLDB A logic low output indicates the input signal has overloaded the amplifier. 19 VppSense Positive power stage over/under supply voltage sense resistor tie point. 20 AGND Ground 21 V5 5 Volt power supply input. 22, 27 OAout1, OAout2 Input stage output pins. Single-ended inputs. Inputs are a “virtual” ground of an inverting opamp with 23, 28 INv1, INv2 approximately 2.4VDC bias. When set to logic high, both amplifiers are muted and in idle mode. When low (grounded), 24 MUTE both amplifiers are fully operational. If left floating, the device stays in the mute mode. Ground if not used. 25, 26 BBM0, BBM1 Break-before-make timing control to prevent shoot-through in the output FETs. TC2000 AUDIO SIGNAL PROCESSOR PINOUT BIASCAP 1 28 INv2 FDBKP2 2 27 OAout2 DCMP 3 26 BBM0 FDBKN2 4 25 BBM1 VPWR 5 24 MUTE FDBKP1 6 23 INv1 FDBKN1 7 22 OAout1 HMUTE 8 21 V5 Y1 9 20 AGND Y1B 10 19 VppSENSE Y2B 11 18 OVRLDB Y2 12 17 VnnSENSE NC 13 16 OCD1 OCD2 14 15 REF 4 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TP2050 POWER STAGE PIN DESCRIPTIONS Pin Function Description 1 GND-SUB Substrate ground 35,36 VccSign Signal positive supply 15 Vcc1A Positive supply 12 Vcc1B Positive supply 7 Vcc2A Positive supply 4 Vcc2B Positive supply 14 GND1A Negative supply 13 GND1B Negative supply 6 GND2A Negative supply 5 GND2B Negative supply 16,17 OUT1A Output half bridge 1A 10,11 OUT1B Output half bridge 1B 8,9 OUT2A Output half bridge 2A 2,3 OUT2B Output half bridge 2B 29 IN1A Input of half bridge 1A 30 IN1B Input of half bridge 1B 31 IN2A Input of half bridge 2A 32 IN2B Input of half bridge 2B 21,22 Vdd 5V regulator referenced to ground 33,34 Vss 5V regulator referenced to Vcc 25 PWRDN Stand-by pin 26 TRI-STATE Hi-Z pin 27 FAULT Fault output 24 CONFIG Config input 28 TH-WAR Thermal warning output 19 GND-clean Logic ground 23 IBIAS Logic high voltage 18 NC Not connected 20 GND-Reg Ground for Vdd regulator TP2050 POWER STAGE PINOUT (Top view with heat slug up) VCCSIGN 36 1 GNDSUB VCCSIGN 35 2 OUT2B VSS 34 3 OUT2B VSS 33 4 VCC2B IN2B 32 5 GND2B IN2A 31 6 GND2A IN1B 30 7 VCC2A IN1A 29 8 OUT2A TH_WAR 28 9 OUT2A FAULT 27 10 OUT1B TRISTATE 26 11 OUT1B PWRDN 25 12 VCC1B CONFIG 24 13 GND1B IBIAS 23 14 GND1A VCC 22 15 VCC1A VCC 21 16 OUT1A GNDREG 20 17 OUT1A GNDCLEAN 19 18 NC 5 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on APPLICATION / TEST DIAGRAMS Inputs and TC2000 RREF 8.2K 15 14 REF OCD1 16 13 OCD0 NC 17 12 V5 VLO Y2 Y2 R53 18 11K 11 OVRLDB Y2B Y2B 1 19 ROFA 10 VHI Y1B Y1B 500K 20 ROFB 9 GND Y1 Y1 5K R54 22K 8 COF HMUTE HMUTE V5 RFBC .1u;50V 3 7 14K;1% RCA_RT_ANG ROFA 21 V5 FDBKN1 OUT1A J9 500K RF CI 20K 22 VP1 RFBB CFB 2.2u;10V 1 1.0K;1% 470p;50V 23 1 IN1 + RI V5 20K TC2000 2 JP RFBC IN1 1 2 14K;1% 24 6 2 1 MUTE FDBKP1 OUT1B ROFA JUMPER V5 2 500K ROFB RFBB CFB 5K 25 1.0K;1% BBM2 470p;50V COF RCA_RT_ANG .1u;50V 26 3 BBM1 J10 ROFA RF 500K 20K 27 5 VP2 VPWR RFBC 1 28 14K;1% 4 1 IN2 FDBKN2 OUT2A + RI CI 20K 2 2.2u;10V RFBB IN2 1.0K;1% CFB V5 V5 390p;50V 2 + CS CS .1u;50V 100u;16V 3 DCMP RFBC 2 14K;1% FDBKP2 OUT2B 1 BIASCAP RFBB CFB 1.0K;1% 390p;50V C7 .1u;50V TP2050 and Outputs VCC U2 O UT1A V5 15 VCC1A LO Y1 29 15u IN1A M3 17 O UT1A 23 IBIAS O UT1P 16 O UT1A C H BR CO C12 R37 24 CO NFIG .1u;50V .22u;50V .1u 10K M2 14 C SN (note 1) 25 G ND1A PW RDN 330p;100V;NPO C C ASE (note 2) 1000p;50V C18 PRO TECTIO N CZ R40 .1u 10K .22u;50V 27 & SPEAKER FAULT CDM LO G IC .1u;100V 26 TRISTATE C21 RZ .1u VCC 15;1W C C ASE (note 2) R SN (note 1) 12 20;1/4W 1000p;50V 28 VCC1B TH_W AR M5 C H BR CO 30 11 LO Y1B IN1B O U T1B .1u;50V .22u;50V 10 15u O UT1N O UT1B M4 VCC 13 18 G ND1B NC TP2050 O UT1B CS + VCC O UT2A 560u;50V 7 LO 31 VCC2A Y2 IN2A M17 15u 8 O UT2A O UT2P 21 9 C H BR VDD O UT2A CO .1u;50V .22u;50V 22 VDD M15 6 C SN (note 1) 33 REG ULATO RS G ND2A VSS 330p;100V;NPO C C ASE (note 2) 34 1000p;50V VSS CZ C31 .22u;50V C30 SPEAKER .1u .1u CDM 35 .1u;100V VCCSIG N 36 C14 VCCSIG N RZ .1u 20 VCC 15;1W R SN (note 1) C C ASE (note 2) G NDREG 4 20;1/4W 1000p;50V 32 VCC2B Y2B IN2B M16 C H BR CO 19 3 LO G NDCLEAN O UT2B .1u;50V .22u;50V 15u 2 O UT2N O UT2B 1 G NDSUB M14 5 G ND2B O UT2B NOTE 1: C SN /R SN are optional locations, loaded only if required to reduce overshoot NOTE 2: C CASE (4 locations) represent bypass capacitors m ounted at the exit of the speaker cable from the cabinet. They are optional and are used for EM I supression. Lead lengths on these com ponents m ust be kept short to be effective. They are shown in this schem atic for reference. 6 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on APPLICATION / TEST DIAGRAMS FOR PARALLEL OPERATION Inputs and TC2000 RREF 8.2K 15 14 REF OCD1 16 13 OCD0 NC 17 12 VLO Y2 Y2 R53 18 11K 11 OVRLDB Y2B Y2B 19 10 VHI Y1B 20 9 GND Y1 R54 RFBD 22K 8 HMUTE HMUTE 40K V5 7 21 V5 FDBKN1 RFBD 40K 22 VP1 23 IN1 V5 TC2000 JP 1 2 24 6 1 MUTE FDBKP1 ROFA JUMPER V5 2 500K ROFB 5K 25 BBM2 COF RCA_RT_ANG .1u;50V 26 3 BBM1 J10 ROFA RF 500K 20K 27 5 VP2 VPWR RFBC 1 28 14K;1% 4 1 IN2 FDBKN2 OUT2A + RI CI 20K 2 2.2u;10V RFBB 1.0K;1% CFB V5 V5 390p;50V 2 + CS CS .1u;50V 100u;16V 3 DCMP RFBC 2 14K;1% FDBKP2 OUT2B 1 BIASCAP RFBB CFB 1.0K;1% 390p;50V C7 .1u;50V TP2050 and outputs VCC U2 V5 15 VCC1A 29 IN1A M3 17 OUT1A 23 IBIAS 16 O UT1A CHBR C12 R37 24 CONFIG .1u;50V .1u 10K M2 14 25 G ND1A PWRDN C18 PROTECTION R40 .1u OUT2A 10K & LO 27 FAULT 15u LOG IC 26 TRISTATE O UT2P C21 .1u VCC CO .22u;50V 12 28 VCC1B TH_WAR M5 C H BR 30 11 Y2 IN1B OU T1B .1u;50V C C AS E (note 2) 10 OUT1B 1000p;50V M4 13 C SN (note1) CZ 18 G ND1B .22u;50V NC 330p;100V;NPO SPEAKER TP2050 CDM VCC .1u;100V 7 R SN (note1) VCC2A RZ 31 Y2B IN2A M17 20;1/4W 15;1W C C AS E (note 2) 8 OUT2A 1000p;50V 21 9 C H BR VDD O UT2A .1u;50V 22 VDD M15 6 33 REGULATORS G ND2A VSS CO 34 .22u;50V VSS C30 C31 LO .1u .1u 15u OUT2N 35 VCCSIG N 36 C14 VCCSIG N .1u 20 VCC OUT2B GNDREG 4 32 VCC2B VCC IN2B M16 CHBR 19 3 GNDCLEAN OUT2B .1u;50V 2 + O UT2B CS 1 GNDSUB M14 560u;50V 5 G ND2B NOTE 1: C SN /R SN are optional locations, loaded only if required to reduce overshoot NO TE 2: C CASE (4 locations) represent bypass capacitors mounted at the exit of the speaker cable from the cabinet. They are optional and are used for EM I supression. Lead lengths on these com ponents must be kept short to be effective. They are shown in this schem atic for reference. 7 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on E X T E R N A L C O M P O N E N T S D E S C R I P T I O N (Refer to the Application/Test Circuit) Component Description RI Inverting input resistance to provide AC gain in conjunction with RF. This input is biased at the BIASCAP voltage (approximately 2.5VDC). RF Feedback resistor to set AC gain in conjunction with RI. Please refer to the Amplifier Gain paragraph, in the Application Information section. CI AC input coupling capacitor, which, in conjunction with RI, forms a high pass filter at fC = 1 (2πRICI ) . RFBB Feedback divider resistor connected to AGND. The value of this resistor depends on the supply voltage setting and helps set the TK2050 gain in conjunction with RI, RF, RFBA, and RFBC. Please see the Modulator Feedback Design paragraphs in the Application Information Section. RFBC Feedback resistor connected from either the OUT1A/OUT2A to FDBKP1/FDBKP2 or OUT1B/OUT2B to FDBKN1/FDBKN2. The value of this resistor depends on the supply voltage setting and helps set the TK2050 gain in conjunction with RI, RF, RFBA, and RFBB. It should be noted that the resistor from OUT1/OUT2 to FBKOUT1/FBKOUT2 must have a power rating of greater than PDISS = VPP2 (2RFBC) . Please see the Modulator Feedback Design paragraphs in the Application Information Section. CFB Feedback delay capacitor that both lowers the idle switching frequency and filters very high frequency noise from the feedback signal, which improves amplifier performance. The value of CFB should be offset between channel 1 and channel 2 so that the idle switching difference is greater than 40kHz. Please refer to the Application / Test Circuit. ROFB Potentiometer used to manually trim the DC offset on the output of the TK2050. ROFA Resistor that limits the manual DC offset trim range and allows for more precise adjustment. RREF Bias resistor. Locate close to pin 15 and ground at pin 20. CS Supply decoupling for the power supply pins. For optimum performance, these components should be located close to the TC2000/TP2050 and returned to their respective ground as shown in the Application/Test Circuit. CZ Zobel capacitor, which in conjunction with RZ, terminates the output filter at high frequencies. Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. RZ Zobel resistor, which in conjunction with CZ, terminates the output filter at high frequencies. The combination of RZ and CZ minimizes peaking of the output filter under both no load conditions or with real world loads, including loudspeakers which usually exhibit a rising impedance with increasing frequency. The recommended power rating is 1 Watt. LO Output inductor, which in conjunction with CO, demodulates (filters) the switching waveform into an audio signal. Forms a second order filter with a cutoff frequency of f C = 1 ( 2 π L O C O ) and a quality factor of Q = R L C O L O C O . CO Output capacitor, which in conjunction with LO, demodulates (filters) the switching waveform into an audio signal. Forms a second order low-pass filter with a cutoff frequency of f C = 1 ( 2 π L O C O ) and a quality factor of Q = R L C O L O C O . Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Electrolytic capacitors should not be used. CHBR High-frequency bypass capacitor for VCC – GND on each supply pin. A 50V rating is required for this component. CSN Optional snubber capacitor, which in conjunction with RSN, reduces overshoot on non-optimal layouts. Only required if switching output overshoot is above rated voltage of TP2500. Use low-dissipation type (NPO). RSN Optional snubber resistor, which in conjunction with CSN, reduces overshoot on non- optimal layouts. Only required if switching output overshoot is above rated voltage of TP2500. Required ¼ Watt rating. CDM Differential mode capacitor. 8 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on TYPICAL PERFORMANCE CHARACTERISTICS THD+N vs Output Power THD+N vs Output Power 10 10 f = 1kHz f = 1kHz RL= 6Ω RL= 8Ω 5 5 VDD=23.5 V VDD=30V AES 17 Filter AES 17 Filter 2 2 1 1 0.5 0.5 THD+N (%) THD+N (%) 0.2 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 0.01 0.005 0.005 1 2 5 10 20 50 100 1 2 5 10 20 50 100 Output Power (W) Output Power (W) THD+N vs Frequency THD+N vs Frequency 1 1 Po = 10W/ch Po = 10W/ch RL = 6Ω RL = 8Ω 0.5 0.5 Vcc=23.5V Vcc=30V 0.2 0.2 0.1 0.1 0.05 0.05 THD+N (%) THD+N (%) 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 BW = 22kHz BW = 22kHz 0.001 0.001 0.0005 0.0005 20 50 100 200 500 1k 2k 5k 10k 20k 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Frequency (Hz) Intermodulation Distortion +0 Intermodulation Distortion 19kHz, 20kHz 1:1 +0 -10 Po = 16.6W/ch, 6 Ω 19kHz, 20kHz 1:1 0dBr = 10.0Vrms -10 Po = 12.5W/ch, 8 Ω -20 Vcc=23.5V 0dBr = 10.0Vrms BW = 22Hz - 30kHz -20 Vcc=30V -30 BW = 22Hz - 30kHz -30 -40 -40 -50 Amplitude (dBr) -50 Amplitude (dBr) -60 -60 -70 -70 -80 -80 -90 -90 -100 -100 -110 -110 -120 -120 -130 -130 -140 -140 20 50 100 200 500 1k 2k 5k 10k 20k 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Frequency (Hz) 9 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on T Y P I C A L P E R F O R M A N C E C H A R A C T E R I S T I C S (cont’d) Efficiency vs Output Power Efficiency vs Output Power 100 100 Vcc=23.5V Vcc=30V RL = 6Ω RL = 8Ω 90 90 AES 17 Filter AES 17 Filter THD+N < 10% THD+N < 10% 80 80 70 70 Efficiency (%) Efficiency (%) 60 60 50 50 40 40 30 30 20 20 10 10 0 0 0 5 10 15 20 25 30 35 40 45 50 55 60 0 5 10 15 20 25 30 35 40 45 50 55 60 Output Power (W) Output Power (W) Channel Separation versus Frequency Channel Separation versus Frequency +0 +0 RL = 6 Ω RL = 8Ω -10 0dBr = 7.75V -10 0dBr = 8.95V VS = 23.5V V S = 30V -20 BW = 22Hz - 20kHz(AES17) -20 BW = 22Hz - 20kHz(AES17) -30 -30 -40 -40 d -50 d -50 B B r -60 r -60 A -70 A -70 -80 -80 -90 -90 -100 -100 -110 -110 -120 -120 30 50 100 200 500 1k 2k 5k 10k 20k 30 50 100 200 500 1k 2k 5k 10k 20k Hz Hz THD+N vs Output Power (paralleled outputs) Efficiency vs Output Power (paralleled outputs) 100 10 f=1kHz Vcc=30V 5 Vcc=30V RL = 4Ω 90 RL = 4 Ω AES 17 Filter AES 17 Filter THD+N < 10% 2 80 1 70 0.5 Efficiency (%) THD+N (%) 60 0.2 0.1 50 0.05 40 0.02 30 0.01 20 0.005 10 0.002 0.001 0 0 10 20 30 40 50 60 70 80 90 100 110 120 1 2 5 10 20 50 100 200 Output Power (W) Output Power (W) 10 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on APPLICATION INFORMATION TK2050 Basic Amplifier Operation The TC2000 is a 5V CMOS signal processor that amplifies the audio input signal and converts the audio signal to a switching pattern. This switching pattern is spread spectrum with a typical idle switching frequency of about 700kHz. The switching patterns for the two channels are not synchronized and the idle switching frequencies should differ by at least 40kHz to avoid increasing the audio band noise floor. The idle frequency difference can be accomplished by offsetting the value of CFB for each channel. Typical values of CFB are 470pF for channel 1 and 390pF for channel 2. The TP2050 is a MOSFET output stage that level-shifts the signal processor’s 5V switching patterns to the power supply voltages and drives the power MOSFETs. The power MOSFETs are N-channel devices configured in full-bridges and are used to supply power to the output load. The outputs of the power MOSFETs must be low pass filtered to remove the high frequency switching pattern. A residual voltage from the switching pattern will remain on the speaker outputs when the recommended output LC filter is used, but this signal is outside of the audio band and will not affect audio performance. Circuit Board Layout The TK2050 is a power (high current) amplifier that operates at relatively high switching frequencies. The output of the amplifier switches between VPP and VNN at high speeds while driving large currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage and below ground by the energy in the output inductance. To avoid subjecting the TK2050 to potentially damaging voltage stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath’s layout and application circuit be used for all applications and only be deviated from after careful analysis of the effects of any changes. The following components are important to place near their associated TC2000/TP2050 pins and are ranked in order of layout importance, either for proper device operation or performance considerations. - The capacitors CHBR provide high frequency bypassing of the amplifier power supplies and will serve to reduce spikes across the supply rails. CHBR should be kept within 1/8” (3mm) of the VCC pins. Please note that the four VCC pins must be decoupled separately. In addition, the voltage rating for CHBR should be 50V as this capacitor is exposed to the full supply range. Similarly, capacitor CS (one place) should be located as close as possible to the VCC pins on TP2050. - CFB removes very high frequency components from the amplifier feedback signals and lowers the output switching frequency by delaying the feedback signals. In addition, the value of CFB is different for channel 1 and channel 2 to keep the average switching frequency difference greater than 40kHz. This minimizes in-band audio noise. - To minimize noise pickup and minimize THD+N, RFBC should be located as close to the TC2000 as possible. Make sure that the routing of the high voltage feedback lines is kept far away from the input op amps or significant noise coupling may occur. It is best to shield the high voltage feedback lines by using a ground plane around these traces as well as the input section. In general, to enable placement as close to the TC2000/TP2050, and minimize PCB parasitics, the capacitors listed above should be surface mount types. 11 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Some components are not sensitive to location but are very sensitive to layout and trace routing. - To maximize the damping factor and reduce distortion and noise, the modulator feedback connections should be routed directly to the pins of the output inductors, LO. - The modulator feedback resistors, RFBA and RFBB should all be grounded and attached to 5V together. These connections will serve to minimize common mode noise via the differential feedback. TK2050 Grounding Proper grounding techniques are required to maximize TK2050 functionality and performance. Parametric parameters such as THD+N, noise floor and cross talk can be adversely affected if proper grounding techniques are not implemented on the PCB layout. The following discussion highlights some recommendations about grounding both with respect to the TK2050 as well as general “audio system” design rules. The TK2050 is divided into two sections: the input section, and the output (high power) section. On the TK2050 evaluation board, the ground is also divided into distinct sections, one for the input and one for the output. To minimize ground loops and keep the audio noise floor as low as possible, the input and output ground must be only connected at a single point. Depending on the system design, the single point connection may be in the form of a ferrite bead or a PCB trace. Modulator Feedback Design The modulator converts the signal from the input stage to the high-voltage output signal. The optimum gain of the modulator is determined from the maximum allowable feedback level for the modulator and maximum supply voltage for the power stage. Depending on the maximum supply voltage, the feedback ratio will need to be adjusted to maximize performance. The values of RFBB and RFBC (see explanation below) define the gain of the modulator. Once these values are chosen, based on the maximum supply voltage, the gain of the modulator will be fixed even with as the supply voltage fluctuates due to current draw. For the best signal-to-noise ratio and lowest distortion, the maximum differential modulator feedback voltage should be approximately 4Vpp. This will keep the gain of the modulator as low as possible and still allow headroom so that the feedback signal does not clip the modulator feedback stage. The modulator feedback resistors are: RFBB = User specified; typically1kΩ  V CC ∗ R FBB  R FBC =   − R FBB  2V  TK2050 Amplifier Gain The gain of the TK2050 is the product of the input stage gain and the modulator gain. Please refer to the sections, Input Stage Design, and Modulator Feedback Design, for a complete explanation of how to determine the external component values. A VTK2050 = A VINPUTSTAG E * A V MODULATOR R F  R FBC + R FBB  A VTK2050 ≈   RI  R FBB  12 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on For example, using a TK2050 with the following external components, RI = 20kΩ RF = 20kΩ RFBB = 1kΩ RFBC = 14kΩ 20k Ω  14k Ω + 1k Ω )  V A VTK2050 ≈   = 15 20k Ω  1k Ω  V Input Stage Design The TC2000 input stage is configured as an inverting amplifier, allowing the system designer flexibility in setting the input stage gain and frequency response. Figure 1 shows a typical application where the input stage is a constant gain inverting amplifier. The input stage gain should be set so that the maximum input signal level will drive the input stage output to 4Vpp. TC2000 OAOUT1 V5 RF CI RI INV1 - INPUT1 + BIASCAP AGND V5 + INV2 - RF CI RI AGND OAOUT2 INPUT2 Figure 1: Input Stage The gain of the input stage, above the low frequency high pass filter point, is that of a simple inverting amplifier: It should be noted that the input amplifiers are biased at approximately 2.5VDC. Thus, the polarity of CI must be followed as shown in Figure 1 for a standard ground referenced input signal RF A VINPUTSTAG E =− RI Input Capacitor Selection CI can be calculated once a value for RI has been determined. CI and RI determine the input low frequency pole. Typically this pole is set below 10Hz. CI is calculated according to: 1 CI = 2π f P R I where: RI = Input resistor value in ohms. fP = Input low frequency pole (typically 10Hz or below) 13 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Mute Control When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and low- side transistors are turned off). When a logic level low is supplied to MUTE, both amplifiers are fully operational. There is a delay of approximately 200 milliseconds between the de-assertion of MUTE and the un-muting of the TK2050. To ensure proper device operation, including minimization of turn on/off transients that can result in undesirable audio artifacts, Tripath recommends that the TK2050 device be muted prior to power up or power down of the 5V supply. The “sensing” of the V5 supply can be easily accomplished by using a “microcontroller supervisor” or equivalent to drive the TC2000 mute pin high when the V5 voltage is below 4.5V. This will ensure proper operation of the TK2050 input circuitry. A micro-controller supervisor such as the MCP101-450 from Microchip Corporation has been used by Tripath to implement clean power up/down operation. If turn-on and/or turn-off noise is still present with a TK2050 amplifier, the cause may be other circuitry external to the TK2050. While the TK2050 has circuitry to suppress turn-on and turn-off transients, the combination of power supply and other audio circuitry with the TK2050 in a particular application may exhibit audible transients. One solution that will completely eliminate turn-on and turn-off pops and clicks is to use a relay to connect/disconnect that amplifier from the speakers with the appropriate timing during power on/off. TK2050 Output Capability The TK2050 can drive two 8 Ohm loads with 45 Watts each at less than 0.05% THD+N. The maximum sustained amplifier output power will be determined by a number of factors including the TC2000/TP2050 junction temperatures, the load impedance and the power supply voltage. Tripath does not recommend driving loads below 6 Ohms single ended as the amplifier efficiency will be reduced and the amplifier will reach it’s current limit at relatively low power output levels. With the outputs connected in parallel, however, the TK2050 is capable of driving single channel loads down to 4 Ohms with very high power capability. In such applications, special consideration must be give to cooling of the TP2050 power device. Paralleled Outputs For stereo mode operation, the TK2050 is a dual full bridge. For parallel mode operation, the TK2050 can be configured as a single full bridge with double current capability by connecting the CONFIG pin to the Vdd pin of the TP2050. Please refer to the Applications/Test Diagram for parallel operation. Output Voltage Offset The TK2050 does not have internal compensation for DC offset. If offset is a consideration for the intended application, trimming of the input offset voltage will be required. Tripath has had success with both active and passive circuits for this purpose; please consult with the Tripath applications team for further information. Output Filter Design Tripath amplifiers generally have a higher switching frequency than PWM implementations, allowing the use of higher cutoff frequency filters and reducing the load dependent peaking/drooping in the 20kHz audio band. This is especially important for applications where the end customer may attach any speaker to the amplifier (as opposed to a system where speakers are shipped with the amplifier), since speakers are not purely resistive loads and the impedance they present changes over frequency and from speaker model to speaker model. An RC network, or “Zobel” (RZ, CZ) should be placed at the filter output to control the impedance “seen” by the TP2050 when not attached to a 14 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on speaker load. The TK2050 works well with a 2nd order, 80kHz LC filter with LO = 10uH and CO = 0.47uF and RZ = 10 Ohm/1W and CZ = 0.47uF. NOTE: Output inductor selection is a critical design step. The core material and geometry of the output filter inductor affects the TK2050 distortion levels, efficiency, power dissipation and EMI output. Minimum and Maximum Supply Voltage Operating Range The TK2050 can operate over a wide range of power supply voltages from +12V to +30V. In order to optimize operation for either the low or high range, the user must select the proper values for RFBB, and RFBC. Protection Circuits The TK2050 is protected against over-current, over / under-voltage and over-temperature conditions. Over-temperature Protection An over-temperature fault occurs if the junction temperature of the part exceeds approximately 165°C. The thermal hysteresis of the part is approximately 30°C, therefore the fault will automatically clear when the junction temperature drops below 135°C. HMUTE The HMUTE pin is a 5V logic output that indicates various fault conditions within the device. It is not normally used in product applications. OVRLDB The OVRLDB pin is a 5V logic output that is asserted just at the onset of clipping. When low, it indicates that the level of the input signal has overloaded the amplifier resulting in increased distortion at the output. The OVRLDB signal can be used to control a distortion indicator light or LED through a simple buffer circuit, as the OVRLDB cannot drive an LED directly. There is a 20K resistor on chip in series with the OVRLDB output. Performance Measurements of the TK2050 The TK2050 operates by generating a high frequency switching signal based on the audio input. This signal is sent through a low-pass filter (external to the Tripath amplifier) that recovers an amplified version of the audio input. The frequency of the switching pattern is spread spectrum in nature and typically varies between 100kHz and 1MHz, which is well above the 20Hz – 20kHz audio band. The pattern itself does not alter or distort the audio input signal, but it does introduce some inaudible components. The measurements of certain performance parameters, particularly noise related specifications such as THD+N, are significantly affected by the design of the low-pass filter used on the output as well as the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just beyond the audio band or the bandwidth of the measurement instrument is limited, some of the inaudible noise components introduced by the TK2050 amplifier switching pattern will degrade the measurement. One feature of the TK2050 is that it does not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance measurements. Though using a multi-pole filter may remove high-frequency noise and improve THD+N type measurements (when they are made with wide-bandwidth measuring equipment), these same filters 15 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on degrade frequency response. The TK2050 Evaluation Board uses the Application/Test Circuit of this data sheet, which has a simple two-pole output filter and excellent performance in listening tests. Measurements in this data sheet were taken using this same circuit with a limited bandwidth setting in the measurement instrument. 16 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on PACKAGE INFORMATION – TC2000 17 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Package Information – TP2050 18 TK2050 – SB/1.0/8-02
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on Tripath and Digital Power Processing are trademarks of Tripath Technology Inc. Other trademarks referenced in this document are owned by their respective companies. Tripath Technology Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Tripath does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. TRIPATH’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THE PRESIDENT OF TRIPATH TECHNOLOGY INC. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in this labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. For more information on Tripath products, visit our web site at: www.tripath.com Other useful documents concerning the TK2050 available on the Tripath website. EB-TK2050 Six Channel Board – Six-channel reference design using the TK2050. Contact Information TRIPATH TECHNOLOGY, INC 2560 Orchard Parkway, San Jose, CA 95131 408.750.3000 - P 408.750.3001 - F For more Sales Information, please visit us @ www.tripath.com/cont_s.htm For more Technical Information, please visit us @ www.tripath.com/data.htm 19 TK2050 – SB/1.0/8-02

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Tk2050

  • 1.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on TK2050 STEREO 50W (8Ω) CLASS-T™ DIGITAL AUDIO AMPLIFIER DRIVER USING DIGITAL POWER PROCESSING (DPP™) TECHNOLOGY Technical Information Revision 1.1 – October 2002 GENERAL DESCRIPTION The TK2050 (TC2000/TP2050 chipset) is a 50W continuous average power per channel, Class-T Digital Audio Power Amplifier using Tripath’s proprietary Digital Power ProcessingTM technology. Class-T amplifiers offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers. The performance of the TK2050 is similar to the TK2051, but the TP2050 driver used in the TK2050 is a thermally enhanced PSOP package, which provides for a more effective and flexible heat removal solution. APPLICATIONS FEATURES 5.1-Channel DVD Class-T Architecture Mini/Micro Component Systems High Output power Home Theater 35W @ 6Ω, < 1% THD+N Stereo applications (6Ω / 8Ω) 50W @ 8Ω, < 3% THD+N Mono applications (4Ω) 117W @ 4Ω, < 10.0% THD+N (paralleled outputs) BENEFITS Audiophile Quality Sound Single Supply Operation 0.007% THD+N @ 30W 8Ω Very High Efficiency 0.005% THD+N @ 70W 4Ω Wide Dynamic Range (paralleled outputs) Compact layout High Efficiency 92% @ 60W 8Ω 85% @ 46W 6Ω 89% @ 117W 4Ω (paralleled outputs) Dynamic Range >100 dB 1 TK2050 – SB/1.0/8-02
  • 2.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on A B S O L U T E M A X I M U M R A T I N G S – T C 2 0 0 0 (Note 1) SYMBOL PARAMETER Value UNITS V5 5V Power Supply 6 V Vlogic Input Logic Level V5+0.3V V TA Operating Free-air Temperature Range -40 to 85 °C TSTORE Storage Temperature Range -55 to 150 °C TJMAX Maximum Junction Temperature 150 °C ESDHB ESD Susceptibility – Human Body Model (Note 2), all pins 2000 V Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. See the table below for Operating Conditions. Note 2: Human body model, 100pF discharged through a 1.5KΩ resistor. A B S O L U T E M A X I M U M R A T I N G S – T P 2 0 5 0 (Note 1) SYMBOL PARAMETER Value UNITS VCC Power Supply 40 V Vlogic Input Logic Level 5.5 V TA Operating Free-air Temperature Range 0 to 70 °C TSTORE Storage Temperature Range -40 to 150 °C TJMAX Maximum Junction Temperature 150 °C ESDHB ESD Susceptibility – Human Body Model (Note 2), all pins 2000 V O P E R A T I N G C O N D I T I O N S – T C 2 0 0 0 (Note 1) SYMBOL PARAMETER MIN. TYP. MAX. UNITS V5 Supply Voltage 4.5 5 5.5 V VHI Logic Input High V5-1.0 V VLO Logic Input Low 1 V TA Operating Temperature Range -40 25 85 °C O P E R A T I N G C O N D I T I O N S – T P 2 0 5 0 (Note 1) SYMBOL PARAMETER MIN. TYP. MAX. UNITS VCC Power Supply 10 36 V VHI Logic Input High Ibias/10 + 500mV V VLO Logic Input Low Ibias/5 + 1V V TA Operating Temperature Range 0 25 70 °C THERMAL CHARACTERISTICS TC2000 SYMBOL PARAMETER Value UNITS θJA Junction-to-ambient Thermal Resistance (still air) 80 °C/W TP2050 SYMBOL PARAMETER Value UNITS θJC Junction-to-case Thermal Resistance 2.5 °C/W 2 TK2050 – SB/1.0/8-02
  • 3.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on ELECTRICAL CHARACTERISTICS - TC2000 SYMBOL PARAMETER MIN. TYP. MAX. UNITS I5 Supply Current 60 mA fsw Switching Frequency 650 kHz VIN Input Sensitivity 0 1.5 V VOUTHI High Output Voltage V5-0.5 V VOUTLO Low Output Voltage 100 mV RIN Input Impedance 2 kΩ Input DC Bias 2.5 V ELECTRICAL CHARACTERISTICS - TP2050 TA = 25 °C. See Application/Test Circuit. Unless otherwise noted, the supply voltage is VCC = 28V. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS Quiescent Current VCC = +28V 125 mA Iq (No load, Mute = 0V) V5 = 5V 27 60 mA Mute Supply Current VCC = +31V 28 mA IMUTE (No load, Mute = 5V) V5 = 5V 7 mA VIH High-level input voltage (MUTE) IIH = See Mute Control Section 3.5 V VIL Low-level input voltage (MUTE) IIL = See Mute Control Section 1.0 V o ISC Short-circuit current limit VCC = +30V, T=25 C 3.5 5 6.5 A PERFORMANCE CHARACTERISTICS - TK2050 TA = 25 °C. Unless otherwise noted, VCC = 30V, f=1kHz, and the measurement bandwidth is 20kHz. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITS POUT Output Power VCC = +30V, RL = 8Ω (Continuous Average/Channel) THD+N < 0.01% 30 W (Note 13) THD+N < 3.0% 50 W THD+N < 10.0% 60 W VCC = +23.5V, RL = 6Ω THD+N < 0.05% 30 W THD+N < 5.0% 40 W THD+N < 10.0% 45 W VCC = +30V, RL = 4Ω (par. output) THD+N < 0.01% 75 W THD+N < 10% 117 W THD + N Total Harmonic Distortion Plus POUT = 40W/Channel, RL = 8Ω 0.03 % Noise VCC = +30V POUT = 30W/Channel, RL = 6Ω 0.03 % VCC = +23.5V IHF-IM IHF Intermodulation Distortion 19kHz, 20kHz, 1:1 (IHF), RL = 8Ω 0.05 % POUT = 30W/Channel SNR Signal-to-Noise Ratio A-Weighted 103 dB 0dB = 50W/Channel, RL = 8Ω CS Channel Separation 0dB = 10W, RL = 8Ω, f=1kHz 95 dB AV Amplifier Gain POUT = 10W/Channel, RL = 8Ω, 15 V/V See Application / Test Circuit AVERROR Channel to Channel Gain Error POUT = 10W/Channel, RL = 8Ω 0.5 dB See Application / Test Circuit η Power Efficiency POUT = 60W/Channel, RL = 8Ω 92 % POUT = 45W/Channel, RL = 6Ω 85 % eN Output Noise Voltage A-Weighted, input AC grounded 135 µV 3 TK2050 – SB/1.0/8-02
  • 4.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on TC2000 AUDIO SIGNAL PROCESSOR PIN DESCRIPTIONS Pin Function Description Bandgap reference times two (typically 2.5VDC). Used to set the common mode voltage 1 BIASCAP for the input op amps. This pin is not capable of driving external circuitry. 2, 6 FDBKP2, FDBKP1 Positive switching feedback. Internal mode selection. This pin must be grounded for proper device 3 DCMP operation. 4, 7 FDBKN2, FDBKN1 Negative switching feedback. 5 VPWR Test pin. Must be left floating. Logic output. A logic high indicates both amplifiers are muted, due to the mute pin state, or 8 HMUTE a “fault”. 9, 12 Y1, Y2 Non-inverted switching modulator outputs. 10, 11 Y1B, Y2B Inverted switching modulator outputs. 13 NC No connect 14 OCD2 Over Current Detect. 15 REF Internal reference voltage; approximately 1.2 VDC. Over Current Detect. This pin must be grounded for proper device 16 OCD1 operation. 17 VnnSense Negative power stage over/under supply voltage sense resistor tie point. 18 OVRLDB A logic low output indicates the input signal has overloaded the amplifier. 19 VppSense Positive power stage over/under supply voltage sense resistor tie point. 20 AGND Ground 21 V5 5 Volt power supply input. 22, 27 OAout1, OAout2 Input stage output pins. Single-ended inputs. Inputs are a “virtual” ground of an inverting opamp with 23, 28 INv1, INv2 approximately 2.4VDC bias. When set to logic high, both amplifiers are muted and in idle mode. When low (grounded), 24 MUTE both amplifiers are fully operational. If left floating, the device stays in the mute mode. Ground if not used. 25, 26 BBM0, BBM1 Break-before-make timing control to prevent shoot-through in the output FETs. TC2000 AUDIO SIGNAL PROCESSOR PINOUT BIASCAP 1 28 INv2 FDBKP2 2 27 OAout2 DCMP 3 26 BBM0 FDBKN2 4 25 BBM1 VPWR 5 24 MUTE FDBKP1 6 23 INv1 FDBKN1 7 22 OAout1 HMUTE 8 21 V5 Y1 9 20 AGND Y1B 10 19 VppSENSE Y2B 11 18 OVRLDB Y2 12 17 VnnSENSE NC 13 16 OCD1 OCD2 14 15 REF 4 TK2050 – SB/1.0/8-02
  • 5.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on TP2050 POWER STAGE PIN DESCRIPTIONS Pin Function Description 1 GND-SUB Substrate ground 35,36 VccSign Signal positive supply 15 Vcc1A Positive supply 12 Vcc1B Positive supply 7 Vcc2A Positive supply 4 Vcc2B Positive supply 14 GND1A Negative supply 13 GND1B Negative supply 6 GND2A Negative supply 5 GND2B Negative supply 16,17 OUT1A Output half bridge 1A 10,11 OUT1B Output half bridge 1B 8,9 OUT2A Output half bridge 2A 2,3 OUT2B Output half bridge 2B 29 IN1A Input of half bridge 1A 30 IN1B Input of half bridge 1B 31 IN2A Input of half bridge 2A 32 IN2B Input of half bridge 2B 21,22 Vdd 5V regulator referenced to ground 33,34 Vss 5V regulator referenced to Vcc 25 PWRDN Stand-by pin 26 TRI-STATE Hi-Z pin 27 FAULT Fault output 24 CONFIG Config input 28 TH-WAR Thermal warning output 19 GND-clean Logic ground 23 IBIAS Logic high voltage 18 NC Not connected 20 GND-Reg Ground for Vdd regulator TP2050 POWER STAGE PINOUT (Top view with heat slug up) VCCSIGN 36 1 GNDSUB VCCSIGN 35 2 OUT2B VSS 34 3 OUT2B VSS 33 4 VCC2B IN2B 32 5 GND2B IN2A 31 6 GND2A IN1B 30 7 VCC2A IN1A 29 8 OUT2A TH_WAR 28 9 OUT2A FAULT 27 10 OUT1B TRISTATE 26 11 OUT1B PWRDN 25 12 VCC1B CONFIG 24 13 GND1B IBIAS 23 14 GND1A VCC 22 15 VCC1A VCC 21 16 OUT1A GNDREG 20 17 OUT1A GNDCLEAN 19 18 NC 5 TK2050 – SB/1.0/8-02
  • 6.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on APPLICATION / TEST DIAGRAMS Inputs and TC2000 RREF 8.2K 15 14 REF OCD1 16 13 OCD0 NC 17 12 V5 VLO Y2 Y2 R53 18 11K 11 OVRLDB Y2B Y2B 1 19 ROFA 10 VHI Y1B Y1B 500K 20 ROFB 9 GND Y1 Y1 5K R54 22K 8 COF HMUTE HMUTE V5 RFBC .1u;50V 3 7 14K;1% RCA_RT_ANG ROFA 21 V5 FDBKN1 OUT1A J9 500K RF CI 20K 22 VP1 RFBB CFB 2.2u;10V 1 1.0K;1% 470p;50V 23 1 IN1 + RI V5 20K TC2000 2 JP RFBC IN1 1 2 14K;1% 24 6 2 1 MUTE FDBKP1 OUT1B ROFA JUMPER V5 2 500K ROFB RFBB CFB 5K 25 1.0K;1% BBM2 470p;50V COF RCA_RT_ANG .1u;50V 26 3 BBM1 J10 ROFA RF 500K 20K 27 5 VP2 VPWR RFBC 1 28 14K;1% 4 1 IN2 FDBKN2 OUT2A + RI CI 20K 2 2.2u;10V RFBB IN2 1.0K;1% CFB V5 V5 390p;50V 2 + CS CS .1u;50V 100u;16V 3 DCMP RFBC 2 14K;1% FDBKP2 OUT2B 1 BIASCAP RFBB CFB 1.0K;1% 390p;50V C7 .1u;50V TP2050 and Outputs VCC U2 O UT1A V5 15 VCC1A LO Y1 29 15u IN1A M3 17 O UT1A 23 IBIAS O UT1P 16 O UT1A C H BR CO C12 R37 24 CO NFIG .1u;50V .22u;50V .1u 10K M2 14 C SN (note 1) 25 G ND1A PW RDN 330p;100V;NPO C C ASE (note 2) 1000p;50V C18 PRO TECTIO N CZ R40 .1u 10K .22u;50V 27 & SPEAKER FAULT CDM LO G IC .1u;100V 26 TRISTATE C21 RZ .1u VCC 15;1W C C ASE (note 2) R SN (note 1) 12 20;1/4W 1000p;50V 28 VCC1B TH_W AR M5 C H BR CO 30 11 LO Y1B IN1B O U T1B .1u;50V .22u;50V 10 15u O UT1N O UT1B M4 VCC 13 18 G ND1B NC TP2050 O UT1B CS + VCC O UT2A 560u;50V 7 LO 31 VCC2A Y2 IN2A M17 15u 8 O UT2A O UT2P 21 9 C H BR VDD O UT2A CO .1u;50V .22u;50V 22 VDD M15 6 C SN (note 1) 33 REG ULATO RS G ND2A VSS 330p;100V;NPO C C ASE (note 2) 34 1000p;50V VSS CZ C31 .22u;50V C30 SPEAKER .1u .1u CDM 35 .1u;100V VCCSIG N 36 C14 VCCSIG N RZ .1u 20 VCC 15;1W R SN (note 1) C C ASE (note 2) G NDREG 4 20;1/4W 1000p;50V 32 VCC2B Y2B IN2B M16 C H BR CO 19 3 LO G NDCLEAN O UT2B .1u;50V .22u;50V 15u 2 O UT2N O UT2B 1 G NDSUB M14 5 G ND2B O UT2B NOTE 1: C SN /R SN are optional locations, loaded only if required to reduce overshoot NOTE 2: C CASE (4 locations) represent bypass capacitors m ounted at the exit of the speaker cable from the cabinet. They are optional and are used for EM I supression. Lead lengths on these com ponents m ust be kept short to be effective. They are shown in this schem atic for reference. 6 TK2050 – SB/1.0/8-02
  • 7.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on APPLICATION / TEST DIAGRAMS FOR PARALLEL OPERATION Inputs and TC2000 RREF 8.2K 15 14 REF OCD1 16 13 OCD0 NC 17 12 VLO Y2 Y2 R53 18 11K 11 OVRLDB Y2B Y2B 19 10 VHI Y1B 20 9 GND Y1 R54 RFBD 22K 8 HMUTE HMUTE 40K V5 7 21 V5 FDBKN1 RFBD 40K 22 VP1 23 IN1 V5 TC2000 JP 1 2 24 6 1 MUTE FDBKP1 ROFA JUMPER V5 2 500K ROFB 5K 25 BBM2 COF RCA_RT_ANG .1u;50V 26 3 BBM1 J10 ROFA RF 500K 20K 27 5 VP2 VPWR RFBC 1 28 14K;1% 4 1 IN2 FDBKN2 OUT2A + RI CI 20K 2 2.2u;10V RFBB 1.0K;1% CFB V5 V5 390p;50V 2 + CS CS .1u;50V 100u;16V 3 DCMP RFBC 2 14K;1% FDBKP2 OUT2B 1 BIASCAP RFBB CFB 1.0K;1% 390p;50V C7 .1u;50V TP2050 and outputs VCC U2 V5 15 VCC1A 29 IN1A M3 17 OUT1A 23 IBIAS 16 O UT1A CHBR C12 R37 24 CONFIG .1u;50V .1u 10K M2 14 25 G ND1A PWRDN C18 PROTECTION R40 .1u OUT2A 10K & LO 27 FAULT 15u LOG IC 26 TRISTATE O UT2P C21 .1u VCC CO .22u;50V 12 28 VCC1B TH_WAR M5 C H BR 30 11 Y2 IN1B OU T1B .1u;50V C C AS E (note 2) 10 OUT1B 1000p;50V M4 13 C SN (note1) CZ 18 G ND1B .22u;50V NC 330p;100V;NPO SPEAKER TP2050 CDM VCC .1u;100V 7 R SN (note1) VCC2A RZ 31 Y2B IN2A M17 20;1/4W 15;1W C C AS E (note 2) 8 OUT2A 1000p;50V 21 9 C H BR VDD O UT2A .1u;50V 22 VDD M15 6 33 REGULATORS G ND2A VSS CO 34 .22u;50V VSS C30 C31 LO .1u .1u 15u OUT2N 35 VCCSIG N 36 C14 VCCSIG N .1u 20 VCC OUT2B GNDREG 4 32 VCC2B VCC IN2B M16 CHBR 19 3 GNDCLEAN OUT2B .1u;50V 2 + O UT2B CS 1 GNDSUB M14 560u;50V 5 G ND2B NOTE 1: C SN /R SN are optional locations, loaded only if required to reduce overshoot NO TE 2: C CASE (4 locations) represent bypass capacitors mounted at the exit of the speaker cable from the cabinet. They are optional and are used for EM I supression. Lead lengths on these com ponents must be kept short to be effective. They are shown in this schem atic for reference. 7 TK2050 – SB/1.0/8-02
  • 8.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on E X T E R N A L C O M P O N E N T S D E S C R I P T I O N (Refer to the Application/Test Circuit) Component Description RI Inverting input resistance to provide AC gain in conjunction with RF. This input is biased at the BIASCAP voltage (approximately 2.5VDC). RF Feedback resistor to set AC gain in conjunction with RI. Please refer to the Amplifier Gain paragraph, in the Application Information section. CI AC input coupling capacitor, which, in conjunction with RI, forms a high pass filter at fC = 1 (2πRICI ) . RFBB Feedback divider resistor connected to AGND. The value of this resistor depends on the supply voltage setting and helps set the TK2050 gain in conjunction with RI, RF, RFBA, and RFBC. Please see the Modulator Feedback Design paragraphs in the Application Information Section. RFBC Feedback resistor connected from either the OUT1A/OUT2A to FDBKP1/FDBKP2 or OUT1B/OUT2B to FDBKN1/FDBKN2. The value of this resistor depends on the supply voltage setting and helps set the TK2050 gain in conjunction with RI, RF, RFBA, and RFBB. It should be noted that the resistor from OUT1/OUT2 to FBKOUT1/FBKOUT2 must have a power rating of greater than PDISS = VPP2 (2RFBC) . Please see the Modulator Feedback Design paragraphs in the Application Information Section. CFB Feedback delay capacitor that both lowers the idle switching frequency and filters very high frequency noise from the feedback signal, which improves amplifier performance. The value of CFB should be offset between channel 1 and channel 2 so that the idle switching difference is greater than 40kHz. Please refer to the Application / Test Circuit. ROFB Potentiometer used to manually trim the DC offset on the output of the TK2050. ROFA Resistor that limits the manual DC offset trim range and allows for more precise adjustment. RREF Bias resistor. Locate close to pin 15 and ground at pin 20. CS Supply decoupling for the power supply pins. For optimum performance, these components should be located close to the TC2000/TP2050 and returned to their respective ground as shown in the Application/Test Circuit. CZ Zobel capacitor, which in conjunction with RZ, terminates the output filter at high frequencies. Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. RZ Zobel resistor, which in conjunction with CZ, terminates the output filter at high frequencies. The combination of RZ and CZ minimizes peaking of the output filter under both no load conditions or with real world loads, including loudspeakers which usually exhibit a rising impedance with increasing frequency. The recommended power rating is 1 Watt. LO Output inductor, which in conjunction with CO, demodulates (filters) the switching waveform into an audio signal. Forms a second order filter with a cutoff frequency of f C = 1 ( 2 π L O C O ) and a quality factor of Q = R L C O L O C O . CO Output capacitor, which in conjunction with LO, demodulates (filters) the switching waveform into an audio signal. Forms a second order low-pass filter with a cutoff frequency of f C = 1 ( 2 π L O C O ) and a quality factor of Q = R L C O L O C O . Use a high quality film capacitor capable of sustaining the ripple current caused by the switching outputs. Electrolytic capacitors should not be used. CHBR High-frequency bypass capacitor for VCC – GND on each supply pin. A 50V rating is required for this component. CSN Optional snubber capacitor, which in conjunction with RSN, reduces overshoot on non-optimal layouts. Only required if switching output overshoot is above rated voltage of TP2500. Use low-dissipation type (NPO). RSN Optional snubber resistor, which in conjunction with CSN, reduces overshoot on non- optimal layouts. Only required if switching output overshoot is above rated voltage of TP2500. Required ¼ Watt rating. CDM Differential mode capacitor. 8 TK2050 – SB/1.0/8-02
  • 9.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on TYPICAL PERFORMANCE CHARACTERISTICS THD+N vs Output Power THD+N vs Output Power 10 10 f = 1kHz f = 1kHz RL= 6Ω RL= 8Ω 5 5 VDD=23.5 V VDD=30V AES 17 Filter AES 17 Filter 2 2 1 1 0.5 0.5 THD+N (%) THD+N (%) 0.2 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 0.01 0.005 0.005 1 2 5 10 20 50 100 1 2 5 10 20 50 100 Output Power (W) Output Power (W) THD+N vs Frequency THD+N vs Frequency 1 1 Po = 10W/ch Po = 10W/ch RL = 6Ω RL = 8Ω 0.5 0.5 Vcc=23.5V Vcc=30V 0.2 0.2 0.1 0.1 0.05 0.05 THD+N (%) THD+N (%) 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 BW = 22kHz BW = 22kHz 0.001 0.001 0.0005 0.0005 20 50 100 200 500 1k 2k 5k 10k 20k 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Frequency (Hz) Intermodulation Distortion +0 Intermodulation Distortion 19kHz, 20kHz 1:1 +0 -10 Po = 16.6W/ch, 6 Ω 19kHz, 20kHz 1:1 0dBr = 10.0Vrms -10 Po = 12.5W/ch, 8 Ω -20 Vcc=23.5V 0dBr = 10.0Vrms BW = 22Hz - 30kHz -20 Vcc=30V -30 BW = 22Hz - 30kHz -30 -40 -40 -50 Amplitude (dBr) -50 Amplitude (dBr) -60 -60 -70 -70 -80 -80 -90 -90 -100 -100 -110 -110 -120 -120 -130 -130 -140 -140 20 50 100 200 500 1k 2k 5k 10k 20k 20 50 100 200 500 1k 2k 5k 10k 20k Frequency (Hz) Frequency (Hz) 9 TK2050 – SB/1.0/8-02
  • 10.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on T Y P I C A L P E R F O R M A N C E C H A R A C T E R I S T I C S (cont’d) Efficiency vs Output Power Efficiency vs Output Power 100 100 Vcc=23.5V Vcc=30V RL = 6Ω RL = 8Ω 90 90 AES 17 Filter AES 17 Filter THD+N < 10% THD+N < 10% 80 80 70 70 Efficiency (%) Efficiency (%) 60 60 50 50 40 40 30 30 20 20 10 10 0 0 0 5 10 15 20 25 30 35 40 45 50 55 60 0 5 10 15 20 25 30 35 40 45 50 55 60 Output Power (W) Output Power (W) Channel Separation versus Frequency Channel Separation versus Frequency +0 +0 RL = 6 Ω RL = 8Ω -10 0dBr = 7.75V -10 0dBr = 8.95V VS = 23.5V V S = 30V -20 BW = 22Hz - 20kHz(AES17) -20 BW = 22Hz - 20kHz(AES17) -30 -30 -40 -40 d -50 d -50 B B r -60 r -60 A -70 A -70 -80 -80 -90 -90 -100 -100 -110 -110 -120 -120 30 50 100 200 500 1k 2k 5k 10k 20k 30 50 100 200 500 1k 2k 5k 10k 20k Hz Hz THD+N vs Output Power (paralleled outputs) Efficiency vs Output Power (paralleled outputs) 100 10 f=1kHz Vcc=30V 5 Vcc=30V RL = 4Ω 90 RL = 4 Ω AES 17 Filter AES 17 Filter THD+N < 10% 2 80 1 70 0.5 Efficiency (%) THD+N (%) 60 0.2 0.1 50 0.05 40 0.02 30 0.01 20 0.005 10 0.002 0.001 0 0 10 20 30 40 50 60 70 80 90 100 110 120 1 2 5 10 20 50 100 200 Output Power (W) Output Power (W) 10 TK2050 – SB/1.0/8-02
  • 11.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on APPLICATION INFORMATION TK2050 Basic Amplifier Operation The TC2000 is a 5V CMOS signal processor that amplifies the audio input signal and converts the audio signal to a switching pattern. This switching pattern is spread spectrum with a typical idle switching frequency of about 700kHz. The switching patterns for the two channels are not synchronized and the idle switching frequencies should differ by at least 40kHz to avoid increasing the audio band noise floor. The idle frequency difference can be accomplished by offsetting the value of CFB for each channel. Typical values of CFB are 470pF for channel 1 and 390pF for channel 2. The TP2050 is a MOSFET output stage that level-shifts the signal processor’s 5V switching patterns to the power supply voltages and drives the power MOSFETs. The power MOSFETs are N-channel devices configured in full-bridges and are used to supply power to the output load. The outputs of the power MOSFETs must be low pass filtered to remove the high frequency switching pattern. A residual voltage from the switching pattern will remain on the speaker outputs when the recommended output LC filter is used, but this signal is outside of the audio band and will not affect audio performance. Circuit Board Layout The TK2050 is a power (high current) amplifier that operates at relatively high switching frequencies. The output of the amplifier switches between VPP and VNN at high speeds while driving large currents. This high-frequency digital signal is passed through an LC low-pass filter to recover the amplified audio signal. Since the amplifier must drive the inductive LC output filter and speaker loads, the amplifier outputs can be pulled above the supply voltage and below ground by the energy in the output inductance. To avoid subjecting the TK2050 to potentially damaging voltage stress, it is critical to have a good printed circuit board layout. It is recommended that Tripath’s layout and application circuit be used for all applications and only be deviated from after careful analysis of the effects of any changes. The following components are important to place near their associated TC2000/TP2050 pins and are ranked in order of layout importance, either for proper device operation or performance considerations. - The capacitors CHBR provide high frequency bypassing of the amplifier power supplies and will serve to reduce spikes across the supply rails. CHBR should be kept within 1/8” (3mm) of the VCC pins. Please note that the four VCC pins must be decoupled separately. In addition, the voltage rating for CHBR should be 50V as this capacitor is exposed to the full supply range. Similarly, capacitor CS (one place) should be located as close as possible to the VCC pins on TP2050. - CFB removes very high frequency components from the amplifier feedback signals and lowers the output switching frequency by delaying the feedback signals. In addition, the value of CFB is different for channel 1 and channel 2 to keep the average switching frequency difference greater than 40kHz. This minimizes in-band audio noise. - To minimize noise pickup and minimize THD+N, RFBC should be located as close to the TC2000 as possible. Make sure that the routing of the high voltage feedback lines is kept far away from the input op amps or significant noise coupling may occur. It is best to shield the high voltage feedback lines by using a ground plane around these traces as well as the input section. In general, to enable placement as close to the TC2000/TP2050, and minimize PCB parasitics, the capacitors listed above should be surface mount types. 11 TK2050 – SB/1.0/8-02
  • 12.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on Some components are not sensitive to location but are very sensitive to layout and trace routing. - To maximize the damping factor and reduce distortion and noise, the modulator feedback connections should be routed directly to the pins of the output inductors, LO. - The modulator feedback resistors, RFBA and RFBB should all be grounded and attached to 5V together. These connections will serve to minimize common mode noise via the differential feedback. TK2050 Grounding Proper grounding techniques are required to maximize TK2050 functionality and performance. Parametric parameters such as THD+N, noise floor and cross talk can be adversely affected if proper grounding techniques are not implemented on the PCB layout. The following discussion highlights some recommendations about grounding both with respect to the TK2050 as well as general “audio system” design rules. The TK2050 is divided into two sections: the input section, and the output (high power) section. On the TK2050 evaluation board, the ground is also divided into distinct sections, one for the input and one for the output. To minimize ground loops and keep the audio noise floor as low as possible, the input and output ground must be only connected at a single point. Depending on the system design, the single point connection may be in the form of a ferrite bead or a PCB trace. Modulator Feedback Design The modulator converts the signal from the input stage to the high-voltage output signal. The optimum gain of the modulator is determined from the maximum allowable feedback level for the modulator and maximum supply voltage for the power stage. Depending on the maximum supply voltage, the feedback ratio will need to be adjusted to maximize performance. The values of RFBB and RFBC (see explanation below) define the gain of the modulator. Once these values are chosen, based on the maximum supply voltage, the gain of the modulator will be fixed even with as the supply voltage fluctuates due to current draw. For the best signal-to-noise ratio and lowest distortion, the maximum differential modulator feedback voltage should be approximately 4Vpp. This will keep the gain of the modulator as low as possible and still allow headroom so that the feedback signal does not clip the modulator feedback stage. The modulator feedback resistors are: RFBB = User specified; typically1kΩ  V CC ∗ R FBB  R FBC =   − R FBB  2V  TK2050 Amplifier Gain The gain of the TK2050 is the product of the input stage gain and the modulator gain. Please refer to the sections, Input Stage Design, and Modulator Feedback Design, for a complete explanation of how to determine the external component values. A VTK2050 = A VINPUTSTAG E * A V MODULATOR R F  R FBC + R FBB  A VTK2050 ≈   RI  R FBB  12 TK2050 – SB/1.0/8-02
  • 13.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on For example, using a TK2050 with the following external components, RI = 20kΩ RF = 20kΩ RFBB = 1kΩ RFBC = 14kΩ 20k Ω  14k Ω + 1k Ω )  V A VTK2050 ≈   = 15 20k Ω  1k Ω  V Input Stage Design The TC2000 input stage is configured as an inverting amplifier, allowing the system designer flexibility in setting the input stage gain and frequency response. Figure 1 shows a typical application where the input stage is a constant gain inverting amplifier. The input stage gain should be set so that the maximum input signal level will drive the input stage output to 4Vpp. TC2000 OAOUT1 V5 RF CI RI INV1 - INPUT1 + BIASCAP AGND V5 + INV2 - RF CI RI AGND OAOUT2 INPUT2 Figure 1: Input Stage The gain of the input stage, above the low frequency high pass filter point, is that of a simple inverting amplifier: It should be noted that the input amplifiers are biased at approximately 2.5VDC. Thus, the polarity of CI must be followed as shown in Figure 1 for a standard ground referenced input signal RF A VINPUTSTAG E =− RI Input Capacitor Selection CI can be calculated once a value for RI has been determined. CI and RI determine the input low frequency pole. Typically this pole is set below 10Hz. CI is calculated according to: 1 CI = 2π f P R I where: RI = Input resistor value in ohms. fP = Input low frequency pole (typically 10Hz or below) 13 TK2050 – SB/1.0/8-02
  • 14.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on Mute Control When a logic high signal is supplied to MUTE, both amplifier channels are muted (both high- and low- side transistors are turned off). When a logic level low is supplied to MUTE, both amplifiers are fully operational. There is a delay of approximately 200 milliseconds between the de-assertion of MUTE and the un-muting of the TK2050. To ensure proper device operation, including minimization of turn on/off transients that can result in undesirable audio artifacts, Tripath recommends that the TK2050 device be muted prior to power up or power down of the 5V supply. The “sensing” of the V5 supply can be easily accomplished by using a “microcontroller supervisor” or equivalent to drive the TC2000 mute pin high when the V5 voltage is below 4.5V. This will ensure proper operation of the TK2050 input circuitry. A micro-controller supervisor such as the MCP101-450 from Microchip Corporation has been used by Tripath to implement clean power up/down operation. If turn-on and/or turn-off noise is still present with a TK2050 amplifier, the cause may be other circuitry external to the TK2050. While the TK2050 has circuitry to suppress turn-on and turn-off transients, the combination of power supply and other audio circuitry with the TK2050 in a particular application may exhibit audible transients. One solution that will completely eliminate turn-on and turn-off pops and clicks is to use a relay to connect/disconnect that amplifier from the speakers with the appropriate timing during power on/off. TK2050 Output Capability The TK2050 can drive two 8 Ohm loads with 45 Watts each at less than 0.05% THD+N. The maximum sustained amplifier output power will be determined by a number of factors including the TC2000/TP2050 junction temperatures, the load impedance and the power supply voltage. Tripath does not recommend driving loads below 6 Ohms single ended as the amplifier efficiency will be reduced and the amplifier will reach it’s current limit at relatively low power output levels. With the outputs connected in parallel, however, the TK2050 is capable of driving single channel loads down to 4 Ohms with very high power capability. In such applications, special consideration must be give to cooling of the TP2050 power device. Paralleled Outputs For stereo mode operation, the TK2050 is a dual full bridge. For parallel mode operation, the TK2050 can be configured as a single full bridge with double current capability by connecting the CONFIG pin to the Vdd pin of the TP2050. Please refer to the Applications/Test Diagram for parallel operation. Output Voltage Offset The TK2050 does not have internal compensation for DC offset. If offset is a consideration for the intended application, trimming of the input offset voltage will be required. Tripath has had success with both active and passive circuits for this purpose; please consult with the Tripath applications team for further information. Output Filter Design Tripath amplifiers generally have a higher switching frequency than PWM implementations, allowing the use of higher cutoff frequency filters and reducing the load dependent peaking/drooping in the 20kHz audio band. This is especially important for applications where the end customer may attach any speaker to the amplifier (as opposed to a system where speakers are shipped with the amplifier), since speakers are not purely resistive loads and the impedance they present changes over frequency and from speaker model to speaker model. An RC network, or “Zobel” (RZ, CZ) should be placed at the filter output to control the impedance “seen” by the TP2050 when not attached to a 14 TK2050 – SB/1.0/8-02
  • 15.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on speaker load. The TK2050 works well with a 2nd order, 80kHz LC filter with LO = 10uH and CO = 0.47uF and RZ = 10 Ohm/1W and CZ = 0.47uF. NOTE: Output inductor selection is a critical design step. The core material and geometry of the output filter inductor affects the TK2050 distortion levels, efficiency, power dissipation and EMI output. Minimum and Maximum Supply Voltage Operating Range The TK2050 can operate over a wide range of power supply voltages from +12V to +30V. In order to optimize operation for either the low or high range, the user must select the proper values for RFBB, and RFBC. Protection Circuits The TK2050 is protected against over-current, over / under-voltage and over-temperature conditions. Over-temperature Protection An over-temperature fault occurs if the junction temperature of the part exceeds approximately 165°C. The thermal hysteresis of the part is approximately 30°C, therefore the fault will automatically clear when the junction temperature drops below 135°C. HMUTE The HMUTE pin is a 5V logic output that indicates various fault conditions within the device. It is not normally used in product applications. OVRLDB The OVRLDB pin is a 5V logic output that is asserted just at the onset of clipping. When low, it indicates that the level of the input signal has overloaded the amplifier resulting in increased distortion at the output. The OVRLDB signal can be used to control a distortion indicator light or LED through a simple buffer circuit, as the OVRLDB cannot drive an LED directly. There is a 20K resistor on chip in series with the OVRLDB output. Performance Measurements of the TK2050 The TK2050 operates by generating a high frequency switching signal based on the audio input. This signal is sent through a low-pass filter (external to the Tripath amplifier) that recovers an amplified version of the audio input. The frequency of the switching pattern is spread spectrum in nature and typically varies between 100kHz and 1MHz, which is well above the 20Hz – 20kHz audio band. The pattern itself does not alter or distort the audio input signal, but it does introduce some inaudible components. The measurements of certain performance parameters, particularly noise related specifications such as THD+N, are significantly affected by the design of the low-pass filter used on the output as well as the bandwidth setting of the measurement instrument used. Unless the filter has a very sharp roll-off just beyond the audio band or the bandwidth of the measurement instrument is limited, some of the inaudible noise components introduced by the TK2050 amplifier switching pattern will degrade the measurement. One feature of the TK2050 is that it does not require large multi-pole filters to achieve excellent performance in listening tests, usually a more critical factor than performance measurements. Though using a multi-pole filter may remove high-frequency noise and improve THD+N type measurements (when they are made with wide-bandwidth measuring equipment), these same filters 15 TK2050 – SB/1.0/8-02
  • 16.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on degrade frequency response. The TK2050 Evaluation Board uses the Application/Test Circuit of this data sheet, which has a simple two-pole output filter and excellent performance in listening tests. Measurements in this data sheet were taken using this same circuit with a limited bandwidth setting in the measurement instrument. 16 TK2050 – SB/1.0/8-02
  • 17.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on PACKAGE INFORMATION – TC2000 17 TK2050 – SB/1.0/8-02
  • 18.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on Package Information – TP2050 18 TK2050 – SB/1.0/8-02
  • 19.
    Tr i pathTechnol ogy, I nc. - Techni cal I nfor m ati on Tripath and Digital Power Processing are trademarks of Tripath Technology Inc. Other trademarks referenced in this document are owned by their respective companies. Tripath Technology Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Tripath does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. TRIPATH’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN CONSENT OF THE PRESIDENT OF TRIPATH TECHNOLOGY INC. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in this labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. For more information on Tripath products, visit our web site at: www.tripath.com Other useful documents concerning the TK2050 available on the Tripath website. EB-TK2050 Six Channel Board – Six-channel reference design using the TK2050. Contact Information TRIPATH TECHNOLOGY, INC 2560 Orchard Parkway, San Jose, CA 95131 408.750.3000 - P 408.750.3001 - F For more Sales Information, please visit us @ www.tripath.com/cont_s.htm For more Technical Information, please visit us @ www.tripath.com/data.htm 19 TK2050 – SB/1.0/8-02