The document discusses the evolution of the processor industry and the growth of RISC-V as an open source instruction set architecture. It notes that RISC-V is addressing the growing need for processor flexibility to enable innovation across various workloads and markets, including cloud/data centers, automotive, industrial IoT, mobile/wireless, and consumer/IoT devices. The RISC-V Foundation has grown significantly since 2015 and now includes over 290 members from 28 countries working to advance RISC-V adoption.
Huawei’s requirements for the ARM based HPC solution readiness - Joshua MoraLinaro
Talk Title: Huawei’s requirements for the ARM based HPC solution readiness
Talk Abstract:
A high level review of a wide range of requirements to architect an ARM based competitive HPC solution is provided. The review combines both Industry and Huawei’s unique views with the intend to communicate openly not only the alignment and support in ongoing efforts carried over by other ARM key players but to brief on the areas of differentiation that Huawei is investing towards the research, development and deployment of homegrown ARM based HPC solution(s).
Speaker: Joshua Mora
Speaker Bio:
20 years of experience in research and development of both software and hardware for high performance computing. Currently leading the architecture definition and development of ARM based HPC solutions, both hardware and software, all the way to the applications (ie. turnkey HPC solutions for different compute intensive markets where ARM will succeed !!).
Deep Learning Neural Network Acceleration at the Edge - Andrea GalloLinaro
Short
The growing amount of data captured by sensors and the real time constraints imply that not only big data analytics but also Machine Learning (ML) inference shall be executed at the edge. The multiple options for neural network acceleration in Arm-based platforms provide an unprecedented opportunity for new intelligent devices. It also raises the risk of fragmentation and duplication of efforts when multiple frameworks shall support multiple accelerators.
Andrea Gallo, Linaro VP of Segment Groups, will summarise the existing NN frameworks, accelerator solutions, and will describe the efforts underway in the Arm ecosystem.
Abstract
The dramatically growing amount of data captured by sensors and the ever more stringent requirements for latency and real time constraints are paving the way for edge computing, and this implies that not only big data analytics but also Machine Learning (ML) inference shall be executed at the edge. The multiple options for neural network acceleration in recent Arm-based platforms provides an unprecedented opportunity for new intelligent devices with ML inference. It also raises the risk of fragmentation and duplication of efforts when multiple frameworks shall support multiple accelerators.
Andrea Gallo, Linaro VP of Segment Groups, will summarise the existing NN frameworks, model description formats, accelerator solutions, low cost development boards and will describe the efforts underway to identify the best technologies to improve the consolidation and enable the competitive innovative advantage from all vendors.
Audience
The session will be useful for executives to engineers. Executives will gain a deeper understanding of the issues and opportunities. Engineers at NN acceleration IP design houses will take away ideas for how to collaborate in the open source community on their area of expertise, how to evaluate the performance and accelerate multiple NN frameworks without modifying them for each new IP, whether it be targeting edge computing gateways, smart devices or simple microcontrollers.
Benefits to the Ecosystem
The AI deep learning neural network ecosystem is starting just now and it has similar implications with open source as GPU and video accelerators had in the early days with user space drivers, binary blobs, proprietary APIs and all possible ways to protect their IPs. The session will outline a proposal for a collaborative ecosystem effort to create a common framework to manage multiple NN accelerators while at the same time avoiding to modify deep learning frameworks with multiple forks.
The most important interface in a computer system is the instruction set architecture (ISA) as it connects software to hardware. So, given the prevalence of open standards for almost all other important interfaces, why is the ISA still proprietary? We argue that a free ISA is a necessary precursor to future hardware innovation, and there's no good technical reason not to have free, open ISAs just as we have free, open networking standards and free, open operating systems.
Fusion Compiler is the next-generation RTL-to-GDSII implementation system architected to address the complexities of advanced node designs and deliver up to 20% improved PPA while reducing Time To Results (TTR) by 2X.
Huawei’s requirements for the ARM based HPC solution readiness - Joshua MoraLinaro
Talk Title: Huawei’s requirements for the ARM based HPC solution readiness
Talk Abstract:
A high level review of a wide range of requirements to architect an ARM based competitive HPC solution is provided. The review combines both Industry and Huawei’s unique views with the intend to communicate openly not only the alignment and support in ongoing efforts carried over by other ARM key players but to brief on the areas of differentiation that Huawei is investing towards the research, development and deployment of homegrown ARM based HPC solution(s).
Speaker: Joshua Mora
Speaker Bio:
20 years of experience in research and development of both software and hardware for high performance computing. Currently leading the architecture definition and development of ARM based HPC solutions, both hardware and software, all the way to the applications (ie. turnkey HPC solutions for different compute intensive markets where ARM will succeed !!).
Deep Learning Neural Network Acceleration at the Edge - Andrea GalloLinaro
Short
The growing amount of data captured by sensors and the real time constraints imply that not only big data analytics but also Machine Learning (ML) inference shall be executed at the edge. The multiple options for neural network acceleration in Arm-based platforms provide an unprecedented opportunity for new intelligent devices. It also raises the risk of fragmentation and duplication of efforts when multiple frameworks shall support multiple accelerators.
Andrea Gallo, Linaro VP of Segment Groups, will summarise the existing NN frameworks, accelerator solutions, and will describe the efforts underway in the Arm ecosystem.
Abstract
The dramatically growing amount of data captured by sensors and the ever more stringent requirements for latency and real time constraints are paving the way for edge computing, and this implies that not only big data analytics but also Machine Learning (ML) inference shall be executed at the edge. The multiple options for neural network acceleration in recent Arm-based platforms provides an unprecedented opportunity for new intelligent devices with ML inference. It also raises the risk of fragmentation and duplication of efforts when multiple frameworks shall support multiple accelerators.
Andrea Gallo, Linaro VP of Segment Groups, will summarise the existing NN frameworks, model description formats, accelerator solutions, low cost development boards and will describe the efforts underway to identify the best technologies to improve the consolidation and enable the competitive innovative advantage from all vendors.
Audience
The session will be useful for executives to engineers. Executives will gain a deeper understanding of the issues and opportunities. Engineers at NN acceleration IP design houses will take away ideas for how to collaborate in the open source community on their area of expertise, how to evaluate the performance and accelerate multiple NN frameworks without modifying them for each new IP, whether it be targeting edge computing gateways, smart devices or simple microcontrollers.
Benefits to the Ecosystem
The AI deep learning neural network ecosystem is starting just now and it has similar implications with open source as GPU and video accelerators had in the early days with user space drivers, binary blobs, proprietary APIs and all possible ways to protect their IPs. The session will outline a proposal for a collaborative ecosystem effort to create a common framework to manage multiple NN accelerators while at the same time avoiding to modify deep learning frameworks with multiple forks.
The most important interface in a computer system is the instruction set architecture (ISA) as it connects software to hardware. So, given the prevalence of open standards for almost all other important interfaces, why is the ISA still proprietary? We argue that a free ISA is a necessary precursor to future hardware innovation, and there's no good technical reason not to have free, open ISAs just as we have free, open networking standards and free, open operating systems.
Fusion Compiler is the next-generation RTL-to-GDSII implementation system architected to address the complexities of advanced node designs and deliver up to 20% improved PPA while reducing Time To Results (TTR) by 2X.
Innovation Begins With Great People
Join our team and unleash your creative genius! At Xilinx, we make the impossible possible. Together we can shape the future and enable great technology that changes the way people live and work.
Artificial Intelligence in Design Automations.rohit
Motivation behind this talk is to throw some light on use of machine intelligence in design automation; a topic that is largely absent from the media and academia. Machine Intelligence is advancing at a rapid pace and claim to this fame is that it is bound to enable an unprecedent degree of automation in every walk of life. Design automation, a field that has been automating semiconductor design for decades, continues to struggle successful applications of Machine Learning.
As the AI revolution gains momentum, NVIDIA founder and CEO Jensen Huang took the stage in Beijing to show the latest technology for accelerating its mass adoption.
His talk — to more than 3,500 scientists, engineers and press gathered for the three-day event — kicks off a GTC world tour where, in the months, ahead we’ll bring our story to an expected live audience of some 22,000 in Munich, Tel Aviv, Taipei, Washington and Tokyo.
Abdulrahman Alzaid
Cell: 424-230-4189
[email protected]
OBJECTIVE: To use my knowledge in computer skills and software programming to improve efficiency and hence maximize productivity.
EDUCATION
Loyola Marymount university- Los Angeles- CA
Current
Bachelor of Arts, computer science
· Recipient of Saudi Cultural Mission Scholarship
· Coursework in Web Design And Development
· Coursework in Computer Science And Information Technology
· Coursework in Business, Management And Marketing
Certifications
· Udemy Completion of the Swift - Apple's new programming language, 2014.
· Coursera (University of Maryland) Completion with Distinction of Developing Innovative Ideas for new Companies: The First Step in Entrepreneurship 2014.
WORK EXPERIENCE
Web Developer
05/2014- 10/2014
ELM– Saudi Arabia
· Coded three websites using JavaScript, HTML, and CSS.
· Strengthened developmental methodologies by introducing a code quality document.
· Wrote on Xcode for iOS development using Swift.
· Worked effectively with design teams to ensure software solutions elevated client side experience.
· Consulted with engineering staff to evaluate interface between hardware and software.
· Interfaced with business analysts, developers and technical support to determine the best requirement specifications
COMPUTER SKILLS
· Advanced knowledge of JavaScript, Java, HTML, and CSS
· Moderate knowledge of C, Swift, Python, C++, and GO
· Front-end web development
· Mobile development
· Knowledge in AngularJS, Backbone, and MarioneĴeJS
· Troubleshooting and debugging
· Agile
· Git
OTHER CAPABILITIES
· Fast learner
· Group work
12 INTECH MARCH/APRIL 2014 WWW.ISA.ORG
Industrial automation industry exploring and
implementing IoT
By Bill Lydon
T
he idea of the Internet of Things (IoT)
has been creating a great deal of ex-
citement in the computing and com-
munications industry for some time.
Currently, the industrial automation
industry is starting to explore and
implement IoT concepts and technology. Other
terms related to these concepts are machine to
machine (M2M), Internet of Everything, Inter-
net of Things, and IP (Internet protocol) to the
Edge. Kevin Ashton, a British technology pio-
neer, is generally attributed with inventing the
term “the Internet of Things” in 1999; although
the concept has been discussed in literature
since at least 1991 (www.en.wikipedia.org/
wiki/Kevin_Ashton). Commercially, in 2008
IBM launched its Smart Planet initiative. The
same year, the nonproft IP for Smart Objects
(IPSO) Alliance was started with more than 50
members from technology, communications,
and energy companies to promote the IP for
“smart object” communications.
The IoT vision is of a massively instrumented
world of intelligent sensors (analog and digi-
tal) and actuators (analog and digital) com-
municating using IP to improve performance
and effciency. Internet protocol is the primary
pr.
Mike McBride will provide a look at the Industrial IoT (IIoT) landscape and the OT/IT convergence. He will cover several use cases including healthcare, entertainment and smart buildings. He will cover the challenges IIoT networking faces with emerging technologies and how edge computing will provide increased performance, security and reliability. Mike will discuss the various Edge Computing standards & opensource forums along with proposed architectures. And Mike will present new solutions being proposed (ICN, slicing, Blockchain) to support the bandwidth, latency and security requirements within Industrial verticals.
About the speaker: As Sr. Director of Innovation & Strategy, within Huawei's IP Network BU, Mike leads Industrial IoT, Edge Computing and IP/SDN architecture, standardization, and strategy across product lines and industry forums. He leads architecture and standardization activities within the IIc and BBF and has served as an IETF Working Group chair for 15 years. Mike has led emerging technology projects within opensource communities and played a key role in the formation of OPEN-O (Now ONAP). He is an Ericsson alum where he developed and directed SDN/NFV network architectures. And for many years with Cisco, Mike supported customers, worked in development teams and managed mobility, wireless and video projects across BUs. Mike began his career supporting customers at Apple Computer. He resides in Orange County, CA
In this deck from the 2016 Stanford HPC Conference, Kurt Keville from R&D Labs at MIT presents: Introduction to RISC-V.
"Today’s server systems provide many knobs which influence energy efficiency and performance. Some of these knobs control the behavior of the operating systems, whereas others control the behavior of the hardware itself. Choosing the optimal configuration of the knobs is critical for energy efficiency. In this talk recent research results will be presented, including examples of big data applications that consume less energy when dynamic tuning is employed."
Kurt works on optimizing HPC codes for educational and institutional (R&D labs) purposes at MIT. He assesses new supercomputing hardware as part of his responsibilities. He has published in IEEE conferences and journals and he teaches embedded programming once a year. Kurt has a BS from West Point and an MS from MIT.
Learn more: http://soc.mit.edu
Sign up for our insideHPC Newsletter: http://insideHPC.com/newsletter
Fluttercon Berlin 23 - Dart & Flutter on RISC-VChris Swan
Arm has dominated the mobile space since the dawn of smartphones, but systems based on the open source RISC-V instruction set architecture will bring new choices for manufacturers and us, their customers. RISC-V SDKs showed up in the Dart dev channel in Apr 22, but it's still pretty hard to build stuff due to lots of missing dependencies. As always happens with new stuff, the hardware people are waiting for broader software support, and the software people are waiting for a larger hardware installed base. This talk examines the forces that are driving RISC-V forward, and what developers can expect from a world that will have RISC-V devices, mobile phones, tablets and cloud services.
Learning Objective: Discover the upcoming trends of information technology
This seminar looks at technology trends that should be on your radar. As a technology professional, staying on top of trends is crucial. Join us as our expert panelists discuss the upcoming trends and game-changing technologies of the future.
At the end of this seminar, participants will:
a. Learn how to identify the areas where technology changes are likely.
b. Identify resources to use to keep abreast of technology changes in their industry.
c. Learn how to analyze trends for opportunities to grow their careers.
GraphRAG is All You need? LLM & Knowledge GraphGuy Korland
Guy Korland, CEO and Co-founder of FalkorDB, will review two articles on the integration of language models with knowledge graphs.
1. Unifying Large Language Models and Knowledge Graphs: A Roadmap.
https://arxiv.org/abs/2306.08302
2. Microsoft Research's GraphRAG paper and a review paper on various uses of knowledge graphs:
https://www.microsoft.com/en-us/research/blog/graphrag-unlocking-llm-discovery-on-narrative-private-data/
Observability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdfPaige Cruz
Monitoring and observability aren’t traditionally found in software curriculums and many of us cobble this knowledge together from whatever vendor or ecosystem we were first introduced to and whatever is a part of your current company’s observability stack.
While the dev and ops silo continues to crumble….many organizations still relegate monitoring & observability as the purview of ops, infra and SRE teams. This is a mistake - achieving a highly observable system requires collaboration up and down the stack.
I, a former op, would like to extend an invitation to all application developers to join the observability party will share these foundational concepts to build on:
Elevating Tactical DDD Patterns Through Object CalisthenicsDorra BARTAGUIZ
After immersing yourself in the blue book and its red counterpart, attending DDD-focused conferences, and applying tactical patterns, you're left with a crucial question: How do I ensure my design is effective? Tactical patterns within Domain-Driven Design (DDD) serve as guiding principles for creating clear and manageable domain models. However, achieving success with these patterns requires additional guidance. Interestingly, we've observed that a set of constraints initially designed for training purposes remarkably aligns with effective pattern implementation, offering a more ‘mechanical’ approach. Let's explore together how Object Calisthenics can elevate the design of your tactical DDD patterns, offering concrete help for those venturing into DDD for the first time!
DevOps and Testing slides at DASA ConnectKari Kakkonen
My and Rik Marselis slides at 30.5.2024 DASA Connect conference. We discuss about what is testing, then what is agile testing and finally what is Testing in DevOps. Finally we had lovely workshop with the participants trying to find out different ways to think about quality and testing in different parts of the DevOps infinity loop.
PHP Frameworks: I want to break free (IPC Berlin 2024)Ralf Eggert
In this presentation, we examine the challenges and limitations of relying too heavily on PHP frameworks in web development. We discuss the history of PHP and its frameworks to understand how this dependence has evolved. The focus will be on providing concrete tips and strategies to reduce reliance on these frameworks, based on real-world examples and practical considerations. The goal is to equip developers with the skills and knowledge to create more flexible and future-proof web applications. We'll explore the importance of maintaining autonomy in a rapidly changing tech landscape and how to make informed decisions in PHP development.
This talk is aimed at encouraging a more independent approach to using PHP frameworks, moving towards a more flexible and future-proof approach to PHP development.
UiPath Test Automation using UiPath Test Suite series, part 3DianaGray10
Welcome to UiPath Test Automation using UiPath Test Suite series part 3. In this session, we will cover desktop automation along with UI automation.
Topics covered:
UI automation Introduction,
UI automation Sample
Desktop automation flow
Pradeep Chinnala, Senior Consultant Automation Developer @WonderBotz and UiPath MVP
Deepak Rai, Automation Practice Lead, Boundaryless Group and UiPath MVP
SAP Sapphire 2024 - ASUG301 building better apps with SAP Fiori.pdfPeter Spielvogel
Building better applications for business users with SAP Fiori.
• What is SAP Fiori and why it matters to you
• How a better user experience drives measurable business benefits
• How to get started with SAP Fiori today
• How SAP Fiori elements accelerates application development
• How SAP Build Code includes SAP Fiori tools and other generative artificial intelligence capabilities
• How SAP Fiori paves the way for using AI in SAP apps
Key Trends Shaping the Future of Infrastructure.pdfCheryl Hung
Keynote at DIGIT West Expo, Glasgow on 29 May 2024.
Cheryl Hung, ochery.com
Sr Director, Infrastructure Ecosystem, Arm.
The key trends across hardware, cloud and open-source; exploring how these areas are likely to mature and develop over the short and long-term, and then considering how organisations can position themselves to adapt and thrive.
State of ICS and IoT Cyber Threat Landscape Report 2024 previewPrayukth K V
The IoT and OT threat landscape report has been prepared by the Threat Research Team at Sectrio using data from Sectrio, cyber threat intelligence farming facilities spread across over 85 cities around the world. In addition, Sectrio also runs AI-based advanced threat and payload engagement facilities that serve as sinks to attract and engage sophisticated threat actors, and newer malware including new variants and latent threats that are at an earlier stage of development.
The latest edition of the OT/ICS and IoT security Threat Landscape Report 2024 also covers:
State of global ICS asset and network exposure
Sectoral targets and attacks as well as the cost of ransom
Global APT activity, AI usage, actor and tactic profiles, and implications
Rise in volumes of AI-powered cyberattacks
Major cyber events in 2024
Malware and malicious payload trends
Cyberattack types and targets
Vulnerability exploit attempts on CVEs
Attacks on counties – USA
Expansion of bot farms – how, where, and why
In-depth analysis of the cyber threat landscape across North America, South America, Europe, APAC, and the Middle East
Why are attacks on smart factories rising?
Cyber risk predictions
Axis of attacks – Europe
Systemic attacks in the Middle East
Download the full report from here:
https://sectrio.com/resources/ot-threat-landscape-reports/sectrio-releases-ot-ics-and-iot-security-threat-landscape-report-2024/
Smart TV Buyer Insights Survey 2024 by 91mobiles.pdf91mobiles
91mobiles recently conducted a Smart TV Buyer Insights Survey in which we asked over 3,000 respondents about the TV they own, aspects they look at on a new TV, and their TV buying preferences.
Securing your Kubernetes cluster_ a step-by-step guide to success !KatiaHIMEUR1
Today, after several years of existence, an extremely active community and an ultra-dynamic ecosystem, Kubernetes has established itself as the de facto standard in container orchestration. Thanks to a wide range of managed services, it has never been so easy to set up a ready-to-use Kubernetes cluster.
However, this ease of use means that the subject of security in Kubernetes is often left for later, or even neglected. This exposes companies to significant risks.
In this talk, I'll show you step-by-step how to secure your Kubernetes cluster for greater peace of mind and reliability.
2. Evolution of the processor industry
RISC-V Foundation2
1980s
Battle of unique, special-
purpose and simple
general-purpose chips.
Rise of Intel x86 CISC
chips for general purpose
and slower adoption of
RISC chips.
Drawbacks of patent
license costs with high
barriers to entry
Today
The industry driven by
diverse computing need
(IoT, AI), solved by custom
processor development.
Low barriers to entry with
open processor IP
(OpenPOWER, RISC-V,
and MIPs).
RISC-V specification is
free and open with
extensions, tools,
implementations, and
software underway.
1990s
The lifespan of CPU
designs began to shrink
from years to months, as
performance demands
accelerated. Moore’s law
often cited to double
transistors every 12-18
months relative to cost.
In parallel, computing
needs diverged across
implementations, from
servers to cars. ARM
became strong for
embedded.
2000s
Performance is critical as
physical limits are in sight,
age of accelerators and io
innovation.
World's first 2-billion
transistor microprocessor
Intel Itanium announced in
2008.
Grass roots of open cores
such as OpenRISC and
OpenSPARC.
3. Chip
outlook
growing to
US$490
billion in
2019
RISC-V Foundation3
In addition to baseline growth, major
technology shifts on the horizon include 5G,
autonomous vehicles, AR/VR, and AI.
What is 5G all about?
5G expands the mobile ecosystem to connect IoT devices to
the Internet with low latency and provide massive network
capacity, for faster transfer data between IoT and the cloud.
Consistent high speed data, even when users are
moving, makes AI-enabled applications like autonomous
cars a reality.
4. Global
trends
driving
processor
growth
RISC-V Foundation4
Cloud and data center
applications top cloud
providers like Amazon and Google
are designing their own chips.
Automotive is transforming
from autonomous vehicles to
infotainment to safety, the whole
vehicle relies on innovative
electronics.
Industrial IoT incorporating
artificial intelligence in
manufacturing and industrial
processes.
Mobile and wireless
continue rapid evolution with each
generation of hardware and
increased capability.
Consumer and IoT
devices bring incredible
innovation and volume with billions
of connected devices being
forecast in the next 5-10 years.
Memory was the largest
semiconductor category by sales
with $158 billion in 2018, and the
fastest-growing, with sales
increasing 27.4%.
5. New workloads demand processor flexibility for
innovation
Legacy ISAs Are
Decades Old
RISC-V Unlocks the
Architecture & Enables
Innovation
RISC-V is
Open Source,
transparent, and
royalty free
RISC-V Foundation
7. Welcome to the RISC-V revolution!
• RISC-V is the open-
source hardware
Instruction Set
Architecture (ISA)
• Frozen base user spec
released in 2014,
contributed, ratified,
and openly published
by the RISC-V
Foundation
RISC-V foundation summitRISC-V Foundation
The RISC-V Foundation is a non-profit entity
serving members and the industry
Our mission is to accelerate RISC-V adoption
with shared benefit to the
entire community of stakeholders.
Drive progression of ratified specs, compliance suite, and
other technical deliverables
Grow the overall ecosystem / membership, promoting
diversity while preventing fragmentation
Deepen community engagement and visibility
8. Right here.
Right now.
Mainstream
innovation on
RISC-V.
8
EU Is Progressing With The Processor For A
European Supercomputer
RISC-V was chosen as the basis for the supercomputer, and
the processor and platform developed with the European
Processor Initiative (EPI) consortium. – TechNews 5 June 2019
Alibaba announces roadmap of
RISC-V SoC from Embedded
to Cloud CPUs
– Alibaba. May 2019
Western Digital releases their RISC-V Cores to the world… they
will transition their consumption of silicon over to RISC-V, putting one Billion
RISC-V cores per year into the marketplace – Hackaday. 13 February 2019
AWS Announces RISC-V Support in the FreeRTOS Kernel
developers to create IoT applications – AWS 26 February 2019
GreenWaves Technologies
Named 2019 Cool Vendor in
AI Semiconductors
– Gartner 29 April 2019
SiFive Celebrates
Historic 100+
Design Wins
Milestone
– SiFive 6 June 2019
Amazfit Verge Smartwatch and Amazfit
Health Band First AI-Powered
Wearable Chipset launched in
India – Huami and SiFive 17 Sep 2018
RISC-V Foundation
11. RISC-V is
visibly
disrupting
the industry
RISC-V Foundation11
1,183 attendees at 2018 RISC-V
Summit
1,836 press articles
6,314 LinkedIn Followers
8,866 @RISC_V Twitter Followers
34,200+ articles mentioning RISC-V
Foundation, member companies and
ISA since January 2016
12. RISC-V Foundation12
RISC-V Foundation multiplies the investment members
are making in RISC-V
Technical
Deliverables
Compliance +
Certification
Advocacy +
Outreach
Learning + Talent
Visibility
Marketplace
2017
AI in the cloud and PC gaming drove growth in memory (Micron), GPU (NVIDIA), and FPGA makers. Samsung battles Intel as largest semiconductor company by revenue.
2018
AI spread to enterprise and industrial. Cloud infrastructure demand for server CPUs. PC chips grew in 2018 with upgrades to Microsoft Windows 10.
According to the World Semiconductor Trade Statistics (or WSTS), global semiconductor revenue rose 21.6% YoY in 2017 and is expected to rise 15.9% YoY in 2018. The WSTS forecasts global semiconductor revenue to rise by 2.6% YoY in 2019. Worldwide Semiconductor Market is forecasted to be US$ 478 billion in 2018 - an increase of 15.9 percent from 2017. ... WSTS expects the world semiconductor market to grow in 2018 and 2019 to US$ 478 billion and US$ 490 billion respectively. For 2018, this represents growth of 15.9 percent.Nov 27, 2018
WSTS Semiconductor Market Forecast Autumn 2018
https://www.wsts.org/76/103/WSTS-Semiconductor-Market-Forecast-Autumn-2018
https://marketrealist.com/2018/12/these-tech-trends-could-change-semiconductor-industry-in-2019/
Memory comment according to Semiconductor Industry Assoc SIA. Sales of DRAM products increased 36.4% and sales of NAND flash products increased 14.8%. Logic ($109.3 billion) and micro-ICs ($67.2 billion)—a category that includes microprocessors—rounded out the top three product categories in terms of total sales.
Legacy ISA’s have been around for decades and weren’t designed for today’s new workloads
RISC-V allows us to start with a clean sheet of paper and optimize for new workloads
RISC-V gives us the ability to innovate
Completely open source
Everything about the ISA is available to all
Anyone can access and implement it free of charge
Implementations can be shared
Two major legacy architectures are proprietary and are not easily modifiable
Simple
Far smaller than other commercial ISAs
Clean-slate design
Clear separation between user and privileged ISA
Avoids µarchitecture or technology-dependent features
A modular ISA
Small standard base ISA
Multiple standard extensions
Designed for extensibility/specialization
Variable-length instruction encoding
Vast opcode space available for instruction-set extensions
Stable
Base and standard extensions are frozen
Additions via optional extensions, not new versions
Talk about what an ISA is….
EPI targets
High Performance Computing
Data centres and servers
Autonomous vehicles
Smart phones, laptops 2 yearsServers 5 years
https://www.datacenterknowledge.com/hardware/sifive-ceo-says-risc-v-servers-are-five-years-away
Highlight the ecosystem. It is strong, but we need more!