This document discusses CPU architecture and instruction set design. It provides details on the components of a CPU including registers, ALU, control unit, memory, buses, and input/output. It explains how a CPU works by fetching instructions from memory, using the ALU to perform operations, and storing results. It also covers instruction set architecture, its importance, and classifications including CISC, RISC, VLIW, and EPIC.

1. Group 3
TOPICS
CPU Architecture & Instruction Set Design
Pipeline and Superscalar Processor
Names of Group Members
• Mohamed Sesay
• Peter Koroma
• Mullai Lagga
• Musa A. Kamara
• Momoh B Bangura

2. ARCHITECTURE OF A CPU
• CPU Definition
• Components of a CPU
Registers
ALU
CU
Memory
Buses
Input and Output
• How the CPU works

3. CPU DEFINITION
A central processing unit (CPU), also called a central
processor or main processor, which is the most important processor in
a given computer. The central processing unit (CPU) of a device acts like
its brain, telling other components what to do.
Central Processing Unit (CPU) consists of the following features −
• CPU is considered as the brain of the computer.
• CPU performs all types of data processing operations.
• It stores data, intermediate results, and instructions (program).
• It controls the operation of all parts of the computer.

4. DIAGRAM OF THE CPU

5. COMPONENTS OF A CPU
The CPU can be further divided into three main parts: the arithmetic logic unit (ALU), the
control unit (CU), and what are known as registers. You will look at these first.
Registers
ALU
CU
Memory
Buses
Input and Output
Registers: Registers are parts of the CPU that can store data. They operate a little like
RAM, but rather than use capacitor-based memory cells, the memory cells are only composed
of logic gates. Registers can’t hold as much data as RAM can, but they operate considerably
faster.
There are five different types of register within the CPU. The table below gives you some
basic details, and you will see how these registers operate in the next section.
Accumulator - Stores the results of calculations
Instruction Register - Stores the address in RAM of the instruction to be processed
Memory Address Register - Stores the address in RAM of the data to be processed
Memory Data Register - Stores the data that is being processed

6. COMPONENTS OF A CPU CONTINUES
The Arithmetic Logic Unit: The ALU is the core of the CPU. It is made up of all those
logic circuits that you have been learning about for the past three weeks.
The ALU uses these logic circuits to perform a variety of operations. It can perform
addition of binary numbers. It can also perform a variety of other arithmetic operations,
such as subtraction and incrementation. The ALU can also perform logical operations,
such as comparing two binary numbers to see if they are the same or not.
The Control Unit: The control unit decodes what each instruction means, and can
then controls how the other components operate. So when the control unit receives an
instruction, which is just a binary number, it will then signal what the ALU and memory
is supposed to do. It might be that the instruction is to add two numbers together, or it
might be that the instruction is to store a number in RAM. The control unit also
contains a clock. This is a tiny oscillating crystal, which controls the rate at which
calculations are performed by the CPU.
Memory: The RAM stores both the instructions that the computer needs to perform,
and the data on which to perform it. The idea of storing both data and instructions in
the same memory is the basis of what is known as the stored-program computer.
When reading from or writing to RAM, two registers are needed: one to store the
address in RAM that is being read from or written to, and another register to store the
data itself.

7. COMPONENTS OF A CPU CONTINUES
Buses: All of these components are connected together by bundles
of wires that are collectively known as buses. So there is a bus to
carry data, another for addresses, and another for instructions.
Input and Output: Additionally, a computer would usually have
some input and output devices that can receive external data and
then output the results of the calculation. This could be something
as simple as a data connection, or something more complicated
such as a keyboard and monitor.
This method of putting together a computer is known as the Von
Neumann Architecture. It was devised by John von Neumann in
about 1945, well before any of the components that would be
needed to produce it had actually been invented.

8. HOW DOES THE CPU WORKS
The CPU executes an instruction by fetching it from
memory, using its ALU to perform an operation, and then
storing the result to memory.
The CPU performs calculations, makes logical
comparisons and moves data up to billions of times per
second. It works by executing simple instructions one at a
time, triggered by a master timing signal that runs the
whole computer.

9. DIAGRAM ON HOW DOES THE CPU WORKS

10. INSTRUCTION SET DESIGN
• Introduction
•Overview
•Why ISA is important
•Classification of ISAs

11. INTRODUCTION
An Instruction Set Design (ISD) which is refer to as the Instruction Set
Architecture is part of the abstract model of a computer that defines how
the CPU is controlled by the software. The ISA acts as an interface
between the hardware and the software, specifying both what the
processor is capable of doing as well as how it gets done.
The ISA provides the only way through which a user is able to interact
with the hardware. It can be viewed as a programmer’s manual because
it’s the portion of the machine that’s visible to the assembly language
programmer, the compiler writer, and the application programmer.
The ISA defines the supported data types, the registers, how the
hardware manages main memory, key features (such as virtual memory),
which instructions a microprocessor can execute, and the input/output
model of multiple ISA implementations. The ISA can be extended by
adding instructions or other capabilities, or by adding support for larger
addresses and data values.

12. OVERVIEW
An instruction set architecture is distinguished from
a microarchitecture, which is the set of processor
design techniques used, in a particular processor, to implement
the instruction set. Processors with different microarchitectures
can share a common instruction set. For example, the Intel
Pentium and the AMD Athlon implement nearly identical
versions of the x86 instruction set, but they have radically
different internal designs.
The concept of an architecture, distinct from the design of a
specific machine, was developed by Fred Brooks at IBM during
the design phase of System/360.

13. WHY THE ISA IS IMPORTANT?
Understanding what the instruction set can do and how the compiler
makes use of those instructions can help developers write more
efficient code. It can also help them understand the output of the
compiler which can be useful for debugging. Arm is opening its
instruction set architecture for Cortex M cores. By allowing licensees
to build their own custom instructions, developers are able to
accelerate specialized workloads. The Arm ISA family allows
developers to write software and firmware that conforms to the Arm
specifications, secure in the knowledge that any Arm-based
processor will execute it in the same way.

14. CLASSIFICATION OF ISA
An ISA may be classified in a number of different ways. A
common classification is by architectural complexity.
complex instruction set computer (CISC)
reduced instruction set computer (RISC)
very long instruction word (VLIW)
 long instruction word (LIW)
 explicitly parallel instruction computing (EPIC)

15. CLASSIFICATION OF ISA CONTINUES
• A Complex Instruction Set Computer (CISC) has many specialized
instructions, some of which may only be rarely used in practical programs.
• A Reduced Instruction Set Computer (RISC) simplifies the processor
by efficiently implementing only the instructions that are frequently used in
programs, while the less common operations are implemented as
subroutines, having their resulting additional processor execution time offset
by infrequent use.
• Very Long Instruction Word (VLIW) architectures, and the closely
related long instruction word (LIW) and
• Explicitly Parallel Instruction computing (EPIC) architectures.
These architectures seek to exploit instruction-level parallelism with less
hardware than RISC and CISC by making the compiler responsible for
instruction issue and scheduling.
Architectures with even less complexity have been studied, such as the minimal
instruction set computer (MISC) and one-instruction set computer (OISC).
These are theoretically important types, but have not been commercialized