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James Goel
Director, Technical Specifications - Qualcomm Canada Inc.
Introduction and Overview of the
Forthcoming MIPI Touch Specifications
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Agenda
• Touch	Architectures	and	Topology
• Stack-up	of	Related	MIPI	Touch	Specifications
• Touch	Command	Layer	Model
• Overview	of	MIPI	Touch	Command	Set	(MIPI	TCSSM)
• Touch	Report	Data	Structure
– Micro-Frames
• Detailed	review	of	important	touch	commands
2
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Current	Industry	Touch	Status
• Current	status	– non-standard	touch	command	sets
• Non-standard	link-layer	protocols
– SPI/I2C
• Not	optimized
– Low-power	mobile	performance
– Low-cost	pin-count	interfaces
• More	touch	bandwidth	required
• Improved	touch	latency	required
3
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
New	MIPI	Touch	Standard
• MIPI	TCS	is	link-layer	and	physical-layer	agnostic
• Simplified	standard	commands
• MIPI	Touch	Adaptation	Layer	for	I3C	(MIPI	ALI3CSM)
– Works	seamlessly	with	MIPI	Specification	for	I3C	(MIPI	I3CSM)
– Fully	Utilizes	MIPI	I3C	In-Band-Interrupts
• Low-latency	(Link	to	motivational	example)
• High-Bandwidth
– Wide	touch	system	topology	supported
4
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Building	on	MIPI	Specifications
5
Touch	Commands	and	Registers
Maps	Touch	Commands	to	
HCI	and	MIPI	I3C	Link-Layer	Protocol
Host	Command	I/F	for	MIPI	I3C
MIPI	I3C	Bus	Interface	Specification
Applications and
OS Upper Layers
MIPI Touch Command Set
(Planned for 2017)
MIPI Touch Adaptation
Layer for I3C
Planned for 2017
I3C Host Controller Interface
(I3C HCI – Planned for 2017)
I3C
(Improved Inter Integrated Circuit)
(Available Now)
All MIPI
Specifications
for MIPI Touch
over I3C
Implementation
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Mixed	Topology
6
Application	Processor
I3C	Host	
Controller	(HCI)
I3C	Host	Bus
I3C	Host
Proprietary	Command
MIPI	Standard	Touch	
Command	Device	Driver
Display	with	Multi-Touch	Module
I2C	Device	
Controller
I2C	Slave	Bus
Device	0
Front-Main
Display	with	Touch	
Sensor	Overlay
I2C	Device	
Controller
I2C	Slave	Bus
Device	1
MIPI	Standard	Touch	
Commands	
Implementation
Vendor	Proprietary	
AFE/TC	
implementation
Touch	IC	0
MIPI	Standard	Touch	
Commands	
Implementation
Vendor	Proprietary	
AFE/TC	
implementation
Touch	IC	1
Back	
Display	w/	
Touch
MIPI	Standard	Touch	
Commands	
Implementation
Vendor	Proprietary	
AFE/TC	
implementation
Touch	IC	2
I3C	Device	
Controller
I3C	Slave	Bus
Device	2
I2C	Device	
Controller
I2C	Slave	Bus
Device	n
I2C	EEPROM	or	
other	I2C	Sensor
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Type	1	– Storage	on	Host	Touch	Architecture
7
Touch	Slave	Device
Touch	
Slave	
Device	
Processor
Application	Processor
Bus	Device	
I/F
Firmware
Configuration	
Data
Touch	
Report
Local	Memory
Touch	
Host	
Processor
Bus	Device	I/F
Bus	Physical	I/F
Storage	Memory
Configuration	Data
Firmware	
MIPI	Touch	Registers
MIPI	Touch	Commands
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Type	2- Storage	on	Slave	Touch	Processor	Architecture
8
Touch	Slave	
Device
Touch	
Slave	
Device	
Processor
Application	Processor
Bus	Device	
I/F
Firmware
Configuration	
Data
Touch	
Report
Local	Memory
Touch	
Host	
Processor
Bus	Device	I/F
Bus	Physical	I/F
Storage	Memory
Configuration	Data
Firmware
MIPI	Touch	Commands
MIPI	Touch	
Registers
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
MIPI	Touch	Command	Layer	Model
9
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
MIPI	Touch	Host	Commands
10
Command	Name Hex	
Code
Command	Payload Brief	Description Requires	
Command	Done
mtcs_get_touch_report 8’h40 Byte	Command	Code Request	touch	slave	device	to	return	a	
single	touch	report.
No
mtcs_write_firmware 8’h41 Maximum	write	length	
of	host
Transfers	firmware	from	the	host	to	the	
device.
Yes
mtcs_write_configuration_data 8’h42 Maximum	write	length	
of	host
Transfers	touch	configuration	data	from	
host	to	device.
Yes
mtcs_self_test 8’h43 Byte	Command	Code Activates	device	self-test. Yes
mtcs_soft_reset 8’h44 Byte	Command	Code Activates	device	soft	reset. No
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
MIPI	Touch	Host	Commands
11
Register Name Offset Description Access
mtcs_get_interrupt_type 00h Returns	interrupt	type RO
mtcs_set_get_configuration 04h Set	or	Get	Touch	slave	device	
Configuration
Read
modify
write
mtcs_get_capabilities_information 08h Get	the	capabilities	of	the	touch	slave	
device
RO
mtcs_get_current_touch_report_type 0Ch Get	the	type	of	the	latest	returned	
touch	report
RO
mtcs_get_micro_frame_size 0Dh Get	manufacturer	device	information RO
mtcs_get_manufacturer_information 12h Get	manufacturer	device	information RO
mtcs_get_device_version_information 16h Get	manufacturer	device	hardware	
and	firmware	revision	information
RO
mtcs_get_command_set_version_information 1Ah Get	MIPI	command	set	revision RO
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
MIPI	Micro-frame	Touch	Report	Structure
12
Touch	Frame	Report
uFrame	0 uFrame	1 uFrame	2
uFrame	
N-2
uFrame	
N-1
Total	M	bytes
m	bytes m	bytes m	bytes m	bytes m’	bytes
Total	m	x	(N-1)	+	m’	byte	=	M	byte
EH
EH
EH Enhanced	Header:	2	bytes
(noted:	m’	shall	be	equal	to	or	smaller	than	m)
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
MIPI	Basic	Touch	Report	Structure	Enhanced	Header
13
Bit
Byte
7 6 5 4 3 2 1 0
0 Reserved
Touch	data	report	type:
0	=	RAW_MANUFACTURER_REPORT
1	=	LINUX_ANDROID_REPORT
2	=	HID_REPORT
3	=	HID_DESCRIPTOR
4	=	HID_REPORT_DESCRIPTOR
5	=	HID_PHYSICAL_DESCRIPTOR
6..127	=	RESERVED
1
• transaction_id:	Monotonic	counter	incrementing	with	each	report.		Rolls-over	to	0	after	2^8-1.	[7:0]
2..N
• Rest	of	touch	report	up	to	N	bytes
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
POR	Initialization
14
Touch Slave Device
Power-On Reset
Load and Initialize Firmware
Load and Initialize Configuration Data
Touch Slave Device
Set mtcs_get_interrupt_type[ operational_status ]
to READY_FOR_OPERATION
Touch Slave Device
Ready for Touch Sensing
Touch Slave Device
Update FW Version Registers
mtcs_get_device_version_information
Touch Slave Device
Initialize Registers
mtcs_get_manufacturer_information
mtcs_get_device_version_information
mtcs_get_command_set_version_information
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
15
MIPI	I3C	Capability
Device	Profile
Legacy	I2C	Profile I3C	SDR	Profile I3C	DDR	Profile I3C	Ternary	Profile
Co-exists	with	other	Legacy	I2C	
Devices
Required Required Optional Not	allowed
I3C	Single	Data	Ratea Required Required Required Required
I3C	Double	Data	Rate N/A Not	allowed Required Optional
HDR-Ternary	Symbol	Legacy N/A Not	allowed Not	allowed Not	allowed
HDR-Ternary	Symbol	for	a	Pure	
Bus
N/A Not	allowed Not	allowed Required
Dynamic	Address
(I3C	Section	5.1.4)
N/A No	Provisional	ID	
Required
No	Provisional	ID	
Required
No	Provisional	ID	
Required
Hot-Join
(I3C	Section	5.1.5)
N/A Limitedd Limitedd Limitedd
In-Band	Interrupt	b
(I3C	Section	5.1.6)
N/A Required Required Required
Secondary	Master
(I3C	Section	5.1.7)
Not	allowed Not	allowed Not	allowed Not	allowed
Approximate	Bandwidth 1	Mb/s 12	Mb/s 25	Mb/s 39	Mb/s
Required	CCC	 Noc GETMWL
GETMRL
GETMWL
GETMRL
GETMWL
GETMRL
DCR	Human	machine	interface	
function	(see	4.6)	
No Required Required Required
MIPI	Touch	Adaptation	Layer	for	I3C	(MIPI	ALI3C)
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
16
Legacy	I2C	Interrupts
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
17
MIPI	I3C	Standard
*	MIPI	Specification	for	MIPI	I3C	– Section	5.1.6.2	MIPI	I3C	Slave	Interrupt	Request
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
18
MIPI	Touch	Adaptation	Layer	for	MIPI	I3C	(ALI3C)
MIPI	Touch	Adaptation	Layer	for	MIPI	I3C	– 4.4.1.2	In-Band	Interrupt	Mandatory	Data	Byte
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
19
MIPI	I3C	Host	Controller	Interface	– Draft	Specification
MIPI	I3C	Host	Controller	Interface	– Section	6.11	Auto-Command
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
MIPI	I3C	IBI	- Mandatory	Data	Byte	(MDB)
20
Bit	7 Bit	6 Bit	5 Bit	4 Bit	3 Bit	2 Bit	1 Bit	0
0:	Normal
1:	Timing	Control
0:	Normal
1:	Auto-
Command
Interrupt	Type,	defined	by	Command	Specification
(Unused	bits	default	to	0)
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Summary	and	Key	Take	Away	Points
• MIPI	Touch	=	4x	MIPI	Specifications
– MIPI	Touch	Command	Set
– MIPI	Adaptation	Layer	MIPI	I3C,	
– MIPI	HCI	for	MIPI	I3C	
– MIPI	I3C
• Improved	Touch	Performance
– Simplifies	Software	and	Hardware	design
– Improved	latency
– Highest	Throughput
– Compatibility	with	MIPI	Specifications	eco-system
21
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Background	Section
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
Traditional	I2C	
Transaction
23
Device Driver IO Driver Device
Interrupt
OS
Request Data
Read Request
Data Response
Data Response
Event: Data
Interrupt to OS
Request
Interrupt Type
Get Interrupt Type
Read Request
Interrupt Type
Interrupt to
Device Driver
Return
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
MIPI	Touch	MIPI	I3C	SDR	and	HDR	Transactions
24
Return
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
25
Return
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
26
©	2017	MIPI	Alliance,	Inc.
Information	ONLY	- Please	refer	to	full	technical	standard	– Not	to	be	used	in	a	standard.		This	is	not	a	Specifications	contribution.
27
Name:	mtcs_get_interrupt_type
Command	Description:	Returns	interrupt	type
Access:	Read	Only
Default	Value:	00h
Offset:00h
Bit Field	Name Brief	Description
4:0 interrupt_type	[4:0] 5’d0:	NO_INTERRUPT_PENDING
5’d1:	REPORT_DATA_AVAILABLE
5’d2:	COMMAND_DONE
5’d3:	ERROR_OCCURRED
5’d4:	
REPORT_DATA_AVAILABLE_END_OF_FRA
ME
5’D5-5’D15:	RESERVED
5’D16-5’D31:	MANUFACTURER_DEFINED
7:5 Reserved
Offset:01h
0 operational_status 1’b0:	NOT_READY_FOR_OPERATION
1’b1:	READY_FOR_OPERATION
1 configuration_status 1’b0:	
CONFIGURATION_DATA_WRITE_NO_REQ
UEST
1’b1:	
CONFIGURATION_DATA_WRITE_REQUEST
2 fatality_status 1’b0:	NON_FATAL_ERROR
1’b1:	FATAL_ERROR
3 invalid_firmware_err
or
1’b0:	VALID_FIRMWARE
1’b1:	INVALID_FIRMWARE_ERROR
4 invalid_configuration
_data_error
1’b0:	VALID_CONFIGURATION_DATA
1’b1:	INVALID_	
CONFIGURATION_DATA_ERROR
5 self_test_failed_erro
r
1’b0:	SELF_TEST_PASSED
1’b1:	SELF_TEST_FAILED_ERROR
6:7 Reserved
MIPI	Interrupt	Type	Handling	Register
MPI DevCon Hsinchu City 2017: Introduction and Overview of the Forthcoming MIPI Touch Specifications 


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MPI DevCon Hsinchu City 2017: Introduction and Overview of the Forthcoming MIPI Touch Specifications