Vinod Koul and Sanyog Kale of Intel explain the Linux Subsystem for SoundWire in detail, along with the core bus structures, Master(s) and Slave(s) interface (APIs, Structures) with bus and changes required by existing device drivers to add SoundWire support. They also explore the support for various architectures and underlying enumeration methods.
Sanjeev Kumar, Purva Joshi and Ritesh Jain of Qualcomm India discuss the vital role of SPMI protocol and elaborate on the multi-master multi-slave test bench and how verification challenges were handled and closed.
MIPI DevCon 2021: MIPI I3C Application and Validation Models for IoT Sensor N...MIPI Alliance
Presented by Eyuel Zewdu Teferi, David Schumacher and Souha Kouki, STMicroelectronics
This presentation provides a global overview of using MIPI I3C® protocol for on-board communication among subsystems of an IoT sensor node. It includes adoption of MIPI CTS by using SysML models of requirements and test cases as an approach to manage I3C application use cases requirement validation.
MIPI DevCon 2021: MIPI I3C Under the Spotlight: A Fireside Chat with the I3C ...MIPI Alliance
Panel discussion with Tim McKee, MIPI I3C Working Group chair; Matthew Schnoor; Eyuel Zewdu Teferi, MIPI I3C Basic Ad-hoc Working Group vice chair; and Radu Pitigoi-Aron
This session puts MIPI I3C® "under the spotlight" by assembling a panel of experts to talk about the latest developments in the world of I3C. The panel discusses the latest I3C specifications (including the latest HCI specification), how to address conformance in the absence of face-to-face plug fests, and how the MIPI I3C interface is being leveraged by other standards organizations.
MIPI DevCon 2021: MIPI I3C interface for the ETSI Smart Secure PlatformMIPI Alliance
Presented by Gulio Follero, ETSI
The ETSI Technical Committee Smart Card Platform (TC SCP) is developing the specification of the next generation secure element, the Smart Secure Platform (SSP). SCP is standardizing the MIPI I3C interface for SSP. This presentation describes the SSP architecture and its main use cases, followed by a discussion of how the MIPI I3C interface is adapted to the SSP and the main benefits in terms of speed, power and efficiency.
MIPI DevCon 2016: Meeting Demands for Camera and Sensor Interfaces in IoT and...MIPI Alliance
Enhanced IoT and automotive applications are driving demand for multiple camera interfaces to enable embedded vision use cases. In this presentation, Synopsys' Hezi Saar outlines typical camera and display use cases for automotive and IoT applications, and how multiple Rx and Tx image streams can be integrated into an SoC to create a flexible and reusable architecture. The presentation will also provide a quick overview of the MIPI CSI-2 and I3C specifications and their key features that are important to meeting the required functionality, performance and power targets.
MIPI DevCon 2021: MIPI HTI, PTI and STP: The Bases for Next-Generation Online...MIPI Alliance
Presented by Thomas B. Preußer and Alexander Weiss, Accemic Technologies GmbH
The key challenge for testing and debugging embedded multicore systems is their limited observability. MIPI trace protocols provide essential operational insights non-intrusively, and this presentation advocates for the continuous online analysis of these trace data. It also contrasts the challenges posed by the vigorously compressed MIPI trace protocols with the enormous benefits that can be gained by online processing.
Sanjeev Kumar, Purva Joshi and Ritesh Jain of Qualcomm India discuss the vital role of SPMI protocol and elaborate on the multi-master multi-slave test bench and how verification challenges were handled and closed.
MIPI DevCon 2021: MIPI I3C Application and Validation Models for IoT Sensor N...MIPI Alliance
Presented by Eyuel Zewdu Teferi, David Schumacher and Souha Kouki, STMicroelectronics
This presentation provides a global overview of using MIPI I3C® protocol for on-board communication among subsystems of an IoT sensor node. It includes adoption of MIPI CTS by using SysML models of requirements and test cases as an approach to manage I3C application use cases requirement validation.
MIPI DevCon 2021: MIPI I3C Under the Spotlight: A Fireside Chat with the I3C ...MIPI Alliance
Panel discussion with Tim McKee, MIPI I3C Working Group chair; Matthew Schnoor; Eyuel Zewdu Teferi, MIPI I3C Basic Ad-hoc Working Group vice chair; and Radu Pitigoi-Aron
This session puts MIPI I3C® "under the spotlight" by assembling a panel of experts to talk about the latest developments in the world of I3C. The panel discusses the latest I3C specifications (including the latest HCI specification), how to address conformance in the absence of face-to-face plug fests, and how the MIPI I3C interface is being leveraged by other standards organizations.
MIPI DevCon 2021: MIPI I3C interface for the ETSI Smart Secure PlatformMIPI Alliance
Presented by Gulio Follero, ETSI
The ETSI Technical Committee Smart Card Platform (TC SCP) is developing the specification of the next generation secure element, the Smart Secure Platform (SSP). SCP is standardizing the MIPI I3C interface for SSP. This presentation describes the SSP architecture and its main use cases, followed by a discussion of how the MIPI I3C interface is adapted to the SSP and the main benefits in terms of speed, power and efficiency.
MIPI DevCon 2016: Meeting Demands for Camera and Sensor Interfaces in IoT and...MIPI Alliance
Enhanced IoT and automotive applications are driving demand for multiple camera interfaces to enable embedded vision use cases. In this presentation, Synopsys' Hezi Saar outlines typical camera and display use cases for automotive and IoT applications, and how multiple Rx and Tx image streams can be integrated into an SoC to create a flexible and reusable architecture. The presentation will also provide a quick overview of the MIPI CSI-2 and I3C specifications and their key features that are important to meeting the required functionality, performance and power targets.
MIPI DevCon 2021: MIPI HTI, PTI and STP: The Bases for Next-Generation Online...MIPI Alliance
Presented by Thomas B. Preußer and Alexander Weiss, Accemic Technologies GmbH
The key challenge for testing and debugging embedded multicore systems is their limited observability. MIPI trace protocols provide essential operational insights non-intrusively, and this presentation advocates for the continuous online analysis of these trace data. It also contrasts the challenges posed by the vigorously compressed MIPI trace protocols with the enormous benefits that can be gained by online processing.
MIPI DevCon 2016: A Developer's Guide to MIPI I3C ImplementationMIPI Alliance
In this presentation, Intel's Ken Foust, MIPI Sensor Working Group Chair, provides early adopters of MIPI I3C with targeted guidance on how to ensure a successful and efficient implementation of MIPI I3C in their products.
Leveraging I2C as a foundation, many components of MIPI I3C will be familiar to implementers, but with guidance provided here, viewers will gain a clearer understanding of MIPI I3C’s new innovative features, how they will improve their systems, and what considerations should be made to fully leverage them.
MIPI DevCon 2016: Image Sensor and Display Connectivity DisruptionMIPI Alliance
The ability to leverage mobile technologies into new consumer, medical, industrial, and automotive markets creates challenges in image sensor and display interfacing. When interface types or number of the interfaces do not match between image sensors, displays and processors, a bridge is required to enable such connectivity. In this presentation, Grant Jennings of Lattice Semiconductor describes connectivity through programmable interface bridges to aid in the development of these systems that were unforeseen or previously could not be rationalized.
MIPI DevCon 2021: MIPI CSI-2 v4.0 Panel Discussion with the MIPI Camera Worki...MIPI Alliance
Panel discussion with Haran Thanigasalam, Intel Corporation, MIPI Camera Working Group chair; Natsuko Ibuki, Google, LLC;
Yuichi Mizutani, Sony Corporation; and Wonseok Lee, Samsung Electronics, Co.
MIPI DevCon 2016: MIPI I3C High Data Rate ModesMIPI Alliance
The MIPI I3C standardized sensor interface provides a number of significant advantages over existing digital sensor interfaces. One of the most advanced features is the ability to operate in I3C high data rate modes, HDR-DDR, HDR-TSP and HDR-TSL, which provides the best performance in both speed and power. Alex Passi of Cadence Design Systems presents I3C interface basics and focuses on various verification aspects of I3C HDR modes through an advanced verification methodology based on coverage driven verification and real-life scenarios.
Arasan Chip Systems develops and marketing interface IP that meets MIPI standards. Digital IP can typically be emulated in FPGA, but mixed signal IP for physical interface cannot. Arasan provides MIPI D-PHY and MIPI M-PHY is module form for application processor / system on a chip developers to use with their emulation boards.
XPDDS17: Keynote: Shared Coprocessor Framework on ARM - Oleksandr Andrushchen...The Linux Foundation
With the grown interest in virtualization from big players around the world there are more and more companies choose ARM SoCs as their target platform for running server environments. It is also known that majority of such SoCs come with broad coprocessors available on the die, e.g. GPU, DSP, security etc. But at the moment the only way to speed up guests with these is either using a para-virtualized approach or making that HW dedicated to a specific guest.
Shared coprocessor framework for Xen aims to allow all guest OSes to benefit from this companion HW with ease while running unmodified software and/or firmware on guest side. You don’t need to worry about setting up IO ranges, interrupts, scheduling etc.: it is all covered, making support of new shared HW way faster.
As an example of the shared coprocessor framework usage a virtualized GPU will be shown.
Modified Epc Global Network Architecture of Internet of Things for High Load ...IDES Editor
This paper proposes a flexible and novel
architecture of Internet of Things (IOT) in a high density and
mobility environment. Our proposed architecture solves the
problem of over-loading on the network by monitoring the
total number of changed objects changing global location
crossing the fringe boundaries rather than the actual number
of objects present or those that move within the local area. We
have modified the reader architecture of the EPCglobal
Architecture. The components and the working of the model
has been illustrated in detail. We have also discussed the
physical implementation of our model taking the examples of
a smart home sample application and the performance results
have been tabulated and represented graphically.
MIPI DevCon 2016: MIPI RFFE - Challenging the WiFi/Bluetooth Status Quo by Un...MIPI Alliance
Expecting the drive for an SoC solution optimized for both form factor, pin count, and routing complexity will push eFEM vendors in a new direction, Intel's John Oakley describes using the MIPI RFFE serial communication interface to control multiple RF components for Wi-Fi/Bluetooth-enabled products.
Since the serial communication adds an overhead time for each configuration, the suggested Master-Slave mapping helps minimize the number of telegrams for SISO, MIMO and Concurrent Dual Band (CDB) cases, while complying with the MIPI RFFE Specification.
Radu Pitigoi-Aron of Qualcomm Technologies Inc. discusses the MIPI I3C bus, its features that streamline various transactions, and how those features provide scalable and efficient interconnectivity solutions. The Flow Control and the Timing Control tools provided by MIPI I3C interface are the subject of this presentation. Elements of solved problems, their challenges and practical aspects are included.
Architecting the Most Advanced Automotive SoCs: Maximizing Safety and Perform...NetSpeed Systems
Next generation automotive SoCs have to deliver exploding performance to handle real-time processing of sensor data while ensuring ultra-high safety and security. Architecting those SoCs to include heterogeneous architectures with built-in cache coherency, better latency, end-to-end QoS, and FuSa (ISO 26262)-performance-area trade-offs is a major challenge for architects. The presentation takes through a proven methodology using the only ISO 26262 certified cache coherent interconnect fabric.
Presented by John Bainbridge at CDNLive Silicon Valley 2018 on April 11, 2018.
IO-Link is an independent sensor/actuator interface solution for use with several industrial fieldbus and industrial network solutions, including PROFIBUS and PROFINET. The presentation will provide an introduction to this technology, the types of devices available, how they are parameterised and how they are integrated within a programmable control system.
IO-Link – What is it?
• IO-Link is the first standardised IO technology worldwide (IEC 61131-9) for the communication with sensors and also actuators.
• It is typically used in an automation environment below the I/O level for individual linking of field devices
• It uses point-to-point communication based on the long established 3-wire sensor and actuator connection without additional requirements regarding cabling.
• IO-Link is not a fieldbus, nor is it a replacement for AS-i. It is however evidence of the further development of the existing, tried-and-tested connection technology for sensors and actuators.
• Since 2010, IO-Link has been incorporated within the PROFIBUS & PROFINET User Organisation (PNO)
PROFINET - The backbone of IIoT.
IOT, IIOT, Industrie 4.0 are becoming popular topics of conversation, but what do they mean and where does PROFINET fit into the equation? This presentation will try to explain this and provide a clearer idea of the benefits of using PROFINET as part of an overall move towards these concepts, collectively known as the 4th Industrial Revolution.
BIOGRAPHY
Peter Thomas is a Process Control and Automation Engineer with Control Specialists Ltd. He is Chairman of the PROFIBUS & PROFINET International Training Centre (PITC) Workgroup and is a member of the PROFIBUS UK Steering Committee.
MIPI DevCon 2016: Troubleshooting MIPI M-PHY Link and Protocol IssuesMIPI Alliance
The M-PHY specification is designed to allow mobile devices to have a low power, high performance interface. Several higher level protocols use the M-PHY physical layer for storage, I/O and memory in mobile devices. In this presentation, Gordon Getty of Teledyne LeCroy discusses how higher layer protocols, including UniPro and UFS, use the M-PHY physical layer to provide an efficient, low power storage protocol to be enabled on mobile platforms. It also covers debug and analysis techniques for UFS and UniPro technologies to allow root-cause analysis to be performed in an efficient and effective manner.
MIPI DevCon 2016: A Developer's Guide to MIPI I3C ImplementationMIPI Alliance
In this presentation, Intel's Ken Foust, MIPI Sensor Working Group Chair, provides early adopters of MIPI I3C with targeted guidance on how to ensure a successful and efficient implementation of MIPI I3C in their products.
Leveraging I2C as a foundation, many components of MIPI I3C will be familiar to implementers, but with guidance provided here, viewers will gain a clearer understanding of MIPI I3C’s new innovative features, how they will improve their systems, and what considerations should be made to fully leverage them.
MIPI DevCon 2016: Image Sensor and Display Connectivity DisruptionMIPI Alliance
The ability to leverage mobile technologies into new consumer, medical, industrial, and automotive markets creates challenges in image sensor and display interfacing. When interface types or number of the interfaces do not match between image sensors, displays and processors, a bridge is required to enable such connectivity. In this presentation, Grant Jennings of Lattice Semiconductor describes connectivity through programmable interface bridges to aid in the development of these systems that were unforeseen or previously could not be rationalized.
MIPI DevCon 2021: MIPI CSI-2 v4.0 Panel Discussion with the MIPI Camera Worki...MIPI Alliance
Panel discussion with Haran Thanigasalam, Intel Corporation, MIPI Camera Working Group chair; Natsuko Ibuki, Google, LLC;
Yuichi Mizutani, Sony Corporation; and Wonseok Lee, Samsung Electronics, Co.
MIPI DevCon 2016: MIPI I3C High Data Rate ModesMIPI Alliance
The MIPI I3C standardized sensor interface provides a number of significant advantages over existing digital sensor interfaces. One of the most advanced features is the ability to operate in I3C high data rate modes, HDR-DDR, HDR-TSP and HDR-TSL, which provides the best performance in both speed and power. Alex Passi of Cadence Design Systems presents I3C interface basics and focuses on various verification aspects of I3C HDR modes through an advanced verification methodology based on coverage driven verification and real-life scenarios.
Arasan Chip Systems develops and marketing interface IP that meets MIPI standards. Digital IP can typically be emulated in FPGA, but mixed signal IP for physical interface cannot. Arasan provides MIPI D-PHY and MIPI M-PHY is module form for application processor / system on a chip developers to use with their emulation boards.
XPDDS17: Keynote: Shared Coprocessor Framework on ARM - Oleksandr Andrushchen...The Linux Foundation
With the grown interest in virtualization from big players around the world there are more and more companies choose ARM SoCs as their target platform for running server environments. It is also known that majority of such SoCs come with broad coprocessors available on the die, e.g. GPU, DSP, security etc. But at the moment the only way to speed up guests with these is either using a para-virtualized approach or making that HW dedicated to a specific guest.
Shared coprocessor framework for Xen aims to allow all guest OSes to benefit from this companion HW with ease while running unmodified software and/or firmware on guest side. You don’t need to worry about setting up IO ranges, interrupts, scheduling etc.: it is all covered, making support of new shared HW way faster.
As an example of the shared coprocessor framework usage a virtualized GPU will be shown.
Modified Epc Global Network Architecture of Internet of Things for High Load ...IDES Editor
This paper proposes a flexible and novel
architecture of Internet of Things (IOT) in a high density and
mobility environment. Our proposed architecture solves the
problem of over-loading on the network by monitoring the
total number of changed objects changing global location
crossing the fringe boundaries rather than the actual number
of objects present or those that move within the local area. We
have modified the reader architecture of the EPCglobal
Architecture. The components and the working of the model
has been illustrated in detail. We have also discussed the
physical implementation of our model taking the examples of
a smart home sample application and the performance results
have been tabulated and represented graphically.
MIPI DevCon 2016: MIPI RFFE - Challenging the WiFi/Bluetooth Status Quo by Un...MIPI Alliance
Expecting the drive for an SoC solution optimized for both form factor, pin count, and routing complexity will push eFEM vendors in a new direction, Intel's John Oakley describes using the MIPI RFFE serial communication interface to control multiple RF components for Wi-Fi/Bluetooth-enabled products.
Since the serial communication adds an overhead time for each configuration, the suggested Master-Slave mapping helps minimize the number of telegrams for SISO, MIMO and Concurrent Dual Band (CDB) cases, while complying with the MIPI RFFE Specification.
Radu Pitigoi-Aron of Qualcomm Technologies Inc. discusses the MIPI I3C bus, its features that streamline various transactions, and how those features provide scalable and efficient interconnectivity solutions. The Flow Control and the Timing Control tools provided by MIPI I3C interface are the subject of this presentation. Elements of solved problems, their challenges and practical aspects are included.
Architecting the Most Advanced Automotive SoCs: Maximizing Safety and Perform...NetSpeed Systems
Next generation automotive SoCs have to deliver exploding performance to handle real-time processing of sensor data while ensuring ultra-high safety and security. Architecting those SoCs to include heterogeneous architectures with built-in cache coherency, better latency, end-to-end QoS, and FuSa (ISO 26262)-performance-area trade-offs is a major challenge for architects. The presentation takes through a proven methodology using the only ISO 26262 certified cache coherent interconnect fabric.
Presented by John Bainbridge at CDNLive Silicon Valley 2018 on April 11, 2018.
IO-Link is an independent sensor/actuator interface solution for use with several industrial fieldbus and industrial network solutions, including PROFIBUS and PROFINET. The presentation will provide an introduction to this technology, the types of devices available, how they are parameterised and how they are integrated within a programmable control system.
IO-Link – What is it?
• IO-Link is the first standardised IO technology worldwide (IEC 61131-9) for the communication with sensors and also actuators.
• It is typically used in an automation environment below the I/O level for individual linking of field devices
• It uses point-to-point communication based on the long established 3-wire sensor and actuator connection without additional requirements regarding cabling.
• IO-Link is not a fieldbus, nor is it a replacement for AS-i. It is however evidence of the further development of the existing, tried-and-tested connection technology for sensors and actuators.
• Since 2010, IO-Link has been incorporated within the PROFIBUS & PROFINET User Organisation (PNO)
PROFINET - The backbone of IIoT.
IOT, IIOT, Industrie 4.0 are becoming popular topics of conversation, but what do they mean and where does PROFINET fit into the equation? This presentation will try to explain this and provide a clearer idea of the benefits of using PROFINET as part of an overall move towards these concepts, collectively known as the 4th Industrial Revolution.
BIOGRAPHY
Peter Thomas is a Process Control and Automation Engineer with Control Specialists Ltd. He is Chairman of the PROFIBUS & PROFINET International Training Centre (PITC) Workgroup and is a member of the PROFIBUS UK Steering Committee.
MIPI DevCon 2016: Troubleshooting MIPI M-PHY Link and Protocol IssuesMIPI Alliance
The M-PHY specification is designed to allow mobile devices to have a low power, high performance interface. Several higher level protocols use the M-PHY physical layer for storage, I/O and memory in mobile devices. In this presentation, Gordon Getty of Teledyne LeCroy discusses how higher layer protocols, including UniPro and UFS, use the M-PHY physical layer to provide an efficient, low power storage protocol to be enabled on mobile platforms. It also covers debug and analysis techniques for UFS and UniPro technologies to allow root-cause analysis to be performed in an efficient and effective manner.
Rise of multimedia and network technologies, multimedia has become an indispensable feature on the Internet.
Animation, voice and video clips become more and more popular on the Internet. Multimedia networking products like Internet telephony, Internet TV, video conferencing have appeared on the market
Overview of Haystack's DASH7 technology, features, & applications. Includes information on real-time outdoor and indoor location. Discussion of Haystack support for Semtech's LoRa LPWAN radio.
An Introduction to BLUETOOTH TECHNOLOGYVikas Jagtap
“Bluetooth wireless technology is an open specification for a low-cost, low-power, short-range radio technology for ad-hoc wireless communication of voice and data anywhere in the world.”
“Bluetooth wireless technology is an open specification for a low-cost, low-power, short-range radio technology for ad-hoc wireless communication of voice and data anywhere in the world.”
MIPI DevCon 2021: MIPI I3C Signal Integrity Challenges on DDR5-based Server P...MIPI Alliance
Presented by Azusena Lupercio Ramirez, Juan Orozco and Nestor Hernandez Cruz, Intel Corporation
The MIPI I3C® protocol is first used in a server application for the DDR5 DIMM SPD function. MIPI I3C was defined for low capacitance applications, while DDR5 SPD exceeds by far the bus capacitance specification. This presentation covers the interoperability challenges of the dynamic push-pull and open-drain operating modes, on server applications with an in-depth analysis of the implications of long PCB traces, multiple DIMM routing branches, and multiple loads to the electrical and timing parameters.
MIPI DevCon 2021: MIPI Security for Automotive and IoT – Initial Focus on MASSMIPI Alliance
Presented by Philip Hawkes and Rick Wietfeldt, co-chairs of the MIPI Security Working Group
MIPI Automotive SerDes Solutions (MASS) allows transmission of sensor and display data between sensors, electronic control units (ECUs) and displays distributed around a vehicle. The MIPI Security Working Group is developing a MASS security framework for protecting this data against malicious attacks.
This session covers the objectives of the security framework and explains how the framework achieves those objectives.
MIPI DevCon 2021: Meeting the Needs of Next-Generation Displays with a High-P...MIPI Alliance
Presented by Alain Legault, Hardent Inc.; Joe Rodriguez, Rambus Inc.; and Justin Endo, Mixel, Inc.
Next-generation display applications have an insatiable appetite for bandwidth. Using a combination of VESA Display Stream Compression (DSC) and MIPI DSI-2℠ technology, designers can achieve display resolutions up to 8K without compromise to video quality, battery life or cost. This presentation discusses a fully integrated, off-the-shelf display IP subsystem solution, consisting of Mixel (MIPI C-PHY℠/D-PHY℠ combo), Rambus (MIPI DSI-2® controller) and Hardent (VESA DSC) IP, that can deliver this state-of-the-art performance in a power-efficient and compact footprint.
MIPI DevCon 2021: MIPI D-PHY and MIPI CSI-2 for IoT: AI Edge DevicesMIPI Alliance
Presented by Ashraf Takla, Mixel Inc.
This presentation covers the deployment of MIPI D-PHY℠ and MIPI CSI-2® in IoT and edge devices. While many mobile-influenced applications benefit from the low-power, small-form factor of MIPI specifications, AI edge processors in particular are seeing a surge in the use of MIPI specifications for their sensors as market trends shift from processing in the cloud or central location, to processing at the edge.
This presentation includes a high-level system overview of a specific use case, Perceive Ergo edge inference processor, and how Mixel was able to meet Perceive’s stringent requirements with its MIPI D-PHY CSI-2 TX and D-PHY CSI-2 RX IPs.
Presented by Licinio Sousa, Synopsys, Inc., and Edo Cohen, Valens Semiconductor
Synopsys and Valens Semiconductor outline how MIPI automotive solutions can enable safe and robust long-reach connectivity for cameras and sensors. The ability for high volumes of data to travel at a fast rate over a long reach infrastructure is now mandatory in automotive vision applications. In addition, maintaining a reliable link can be the difference between successful operation and system failure in a car. In this presentation, Synopsys and Valens present a Valens MIPI A-PHY℠ design for in-vehicle connectivity using Synopsys’ ISO 26262-ready MIPI CSI-2® and MIPI C-PHY℠/D-PHY℠ IP in the FinFET process to meet their latency and bandwidth requirements. The presentation also previews examples of display applications that can benefit from the same architecture.
Presented by James Goel, MIPI Technical Steering Group chair, and Rick Wietfeldt, Security Working Group co-chair
This session brings you up to speed on all the latest developments within MIPI Automotive SerDes Solutions (MASS) – a framework that provides a full-stack, end-to-end sensor/display-to-ECU solution for autonomous driving and ADAS systems that leverage existing MIPI CSI-2®, DSI-2℠ and VESA eDP/DP protocols running over MIPI A-PHY℠. The presentation also explains how recent developments make it easier for you to integrate MIPI A-PHY into your next automotive E/E architecture and how, through A-PHY's adoption as an IEEE standard, it can be accessed for evaluation without MIPI membership.
In addition, the presenters discuss how recently released MIPI Camera and Display Service Extensions (CSE and DSE) and their associated protocol adaptation layers (PALs) work together to embed functional safety and security enablers natively at the "edge" – ultimately within the sensor, display and ECU components themselves.
MIPI DevCon 2021: The MIPI Specification Roadmap: Driving Advancements in Mob...MIPI Alliance
Presented by James Goel, MIPI Technical Steering Group Chair
Despite the many challenges over the past year, MIPI Alliance is on track to release more specifications in 2021 than in any other year in the organization's history. This packed schedule covers updates to many of MIPI's most popular specifications, including all physical layer specifications, MIPI I3C® and I3C Basic℠, and those for camera and display, in addition to introducing several new specifications. James Goel, chair of the MIPI Technical Steering Group, highlights some of the key specifications released over the past year and then provides a look at what's still to come. He' also provides an overview of MIPI's development activity in particular focus areas, such as automotive, IoT, 5G and security.
MIPI DevCon 2021: State of the AllianceMIPI Alliance
Get an update on MIPI Alliance priority initiatives in mobile and in the beyond-mobile focus areas of automotive, IoT and 5G. Peter Lefkin, MIPI managing director, discusses collaborative efforts within the Alliance and industry, as well as progress toward strategic priorities, including the development of key specifications and resources, education opportunities, outreach and other activities to support the MIPI member ecosystem.
MIPI DevCon 2020 | Snapshot of MIPI RFFE v3.0 from a System-Architecture Per...MIPI Alliance
Lalan Mishra, vice-chair of the MIPI RFFE Working Group, presents the new features of MIPI RFFE v3.0 to help architecture and design engineers understand how the triggering features in the latest version work together to improve performance and to switch quickly among the various bands and band combinations in a 5G system.
MIPI DevCon 2020 | The Story Behind the MIPI I3C HCI Driver for LinuxMIPI Alliance
Nicolas Pitre of BayLibre covers the work that has been done to date to plan Linux support when new technology is developed and a quick overview of future development.
MIPI DevCon 2020 | Interoperability Challenges and Solutions for MIPI I3CMIPI Alliance
This presentation from Geoffrey Duerden of Introspect Technology features a case study of several specific interoperability challenges and solutions in terms of circuit and layout guidelines, protocol implementations and target applications.
MIPI DevCon 2020 | Why an Integrated MIPI C-PHY/D-PHY IP is EssentialMIPI Alliance
Licinio Sousa of Synopsys describes the key advantages of the latest MIPI C-PHY℠ and D-PHY℠ specifications and how designers are implementing them in multipixel cameras and high-resolution displays targeting mobile, drone and automotive applications.
MIPI DevCon 2020 | MIPI to Bluetooth LE: Leveraging Mobile Technology for Wir...MIPI Alliance
Grant Jennings of GOWIN Semiconductor shares use case examples in the wireless IoT space found while helping customers develop new types of solutions with the first SoC FPGA with built in Bluetooth Low Energy (LE) transceiver.
Kevin Yee, chair of MIPI Marketing Steering Group, and Ian Smith, MIPI technical content manager and author of the MIPI Alliance IoT White Paper, explain the advantages of using MIPI specifications within IoT devices and provide an overview of the MIPI specifications that are most relevant to the IoT market.
This presentation, from Gregor Sievers, Ph.D., of dSPACE GmbH, addresses how the MIPI CSI-2℠, D-PHY℠, CCS, and A-PHY℠ specifications simplify validation and testing and help bring autonomous driving to the streets.
James Goel, MIPI Technical Steering Group chair, shares a state-of-the-art MASS (MIPI Automotive SerDes Solutions) display architecture that leverages the latest MIPI DSI-2℠ protocols using VDC-M visually lossless compression algorithms to optimize pixel bandwidth within tightly constrained display systems.
This joint presentation from Ahmed Ella of Mixel and Serge Di Matteo of Renesas covers the deployment of MIPI D-PHY℠ in an autonomous driving use-case and the advantages of using MIPI specifications in functional safety applications.
MIPI DevCon 2020 | MIPI A-PHY: Laying the Groundwork for MIPI’s Automotive Se...MIPI Alliance
MIPI board member Ariel Lasry and A-PHY subgroup vice lead Edo Cohen share technical details of MIPI A-PHY, the cornerstone of MIPI Automotive SerDes Solutions (MASS).
MIPI DevCon 2020 | State of the AllianceMIPI Alliance
MIPI Managing Director Peter Lefkin shares an overview of progress on priority initiatives in mobile and in the beyond-mobile focus areas of automotive, IoT and 5G.