Magillem is a French company that provides EDA tools focused on system design using IP blocks. Their flagship product, MPA, is an integrated design environment that allows users to graphically assemble system architectures from IP blocks. MPA supports the IP-XACT standard for describing IP and integrates with various EDA tools through different connectors. MPA offers features like IP browsing, parameter configuration, netlisting to HDL or ESL formats, and connectivity to simulation, synthesis and verification tools from major EDA vendors.

1. Magillem:
Architecture Exploration
Marcos AV Silva

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Magillem (www.magillem.com)
 Magillem Design Services is a new French
company that acts in EDA tools market.
 Magillem headquarters are located in Paris,
with US Operations based in New YorkCity
and Dallas, and distribution in India and Asia.
 Expanding the vision towards a complete
system design capture.

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Magillem
 Magillem has established partnerships
with EDA vendors, universities and top
European ESL R&D consortiums.
 Adopted standard: IP-XACT from the
SPIRIT Consortium.

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Magillem over the years

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IP-XACT
 IP-XACT is a standard for describing and
handling intellectual property (IP), created
by The SPIRIT Consortium, that enables
automated configuration and integration
through tools.

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Goals for IP-XACT
 Ensure delivery of compatible intellectual
property descriptions from multiple
intellectual property vendors.
 Better enable importing and exporting
complex intellectual property sets to, from
and between Eletronic Design
Automation (EDA) tools for SoC design
(design environments).

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More info. about IP-XACT:
Website of the SPIRIT Consortium :
www.spiritconsortium.org

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MPA: Magillem Platform Assembly
Magillem presents MPA, the center piece of a
powerful intuitive Integrated Design
Environment (IDE).
The user friendly interface guides the designer
during platform assembly and configuration,
and streamlines exploration and
implementation of IP-based systems.

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Features
 Analog and system platform viewer;
 Version and configuration management;
 Certification requirements traceability;
 Verification tool kit

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Features (cont.)
 Checkbox Interface to connect IP (bus,
signal, split, tie);
 Drag and drop IP into design;
 Various EDA tools connectors;
 RTL and ESL Netlisters.

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MPA FEATURES Premium Platinum
 IP-XACT v1.0, v1.2, v1.4, v1.5 X X
 Statistic reporting X X
 Design Rules Checker
 Digital design Rules X X
 Analog design Rules X
 Support for Custom Rules X X
 QA Rules Support X X

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MPA FEATURES Premium Platinum
 Netlister
 Flat VHDL/Verilog netlister X
 Hierarchical VHDL/Verilog netlister X
 SystemC netlister X
 VHDL-AMS netlister X
 Verilog -AMS netlister X
 SystemC-AMS netlister X

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MPA FEATURES Premium Platinum
 Graphical Edition
 System graphical front-end editor X X
 Analogue graphical front-end editor X X
 IP browser X X
 Parameters view (all/filtered) X X
 Dynamic Hierarchy view X X
 Component Generator launcher X X

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MPA FEATURES Premium Platinum
 EDA Tool Connectors
 IC and system simulation
 Modelsim connector (Mentor) X X
 Incisive connector (Cadence) X X
 VCS connector (Synopsys) X X
 ESL synthesis
 Catapult C connector(Mentor) X
 C-to-Silicon connector(Cadence) X

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MPA FEATURES Premium Platinum
 IC synthesis
 Design Compiler connector
(Synopsys) X
 Encounter RTL compiler (Cadence) X
 FPGA synthesis
 ISE connector (Xilinx) X X
 Quartus II connector (Altera) X X
 Sinplify connector (Synopsys) X X
 Precision connector (Mentor) X X

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MPA FEATURES Premium Platinum
 Analog IC simulation
 HSpice connector (Synopsys) X
 Eldo connector (Mentor) X
 Virtuoso connector (Cadence) X

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Benefits
To the HW System architect Engineer:
 Fast architecture exploration and definition

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Benefits (cont.)
To the IP provider:
 Package IP in a reusable format that will
guide the IP integrator through the
configuration, implementation, and
verification.

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Benefits (cont.)
To the IP integrator:
 Heterogeneous architecture integration;
 Easy configurable and reusable IP library
management;
 Auto Generation of ESL/HDL code

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Benefits (cont.)
To the Project lead:
 Synchronization of collaborative work,
verification, tracking, reporting.

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Benefits (cont.)
To the verification Engineer:
 Fast verification of the HW implementation of
IP;
 Validation plan and coverage scoring;
 Easy monitoring, configuration and
initialization.

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Conclusion
 MAGILLEM 4.0 offers an innovative tool
for IPs Import and Packaging, Design
Assembly and Flow Control.
 MAGILLEM’s unique solution, already
chosen and used by the most prominent
IP-XACT adopters worldwide, allows the
users to create an IP-XACT representation
from their current IP repository.

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The End
© 2009 MAVS.