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iPhone 7 full schematic ok

The document contains a list of reference designators (refdes) including components such as capacitors, inductors, resistors, connectors, and other parts. There are hundreds of unique refdes listed with no other context provided.

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BS0402 TP0424 TP0411 TP0400TP0401 TP0420TP0422 TP0415 TP0416 TP0407 TP0406 TP0405TP0404 TP0403 TP0402 TP0421 TP0419 TP8000_RF ZT0401 ZT0404 J4101 QPOET_RF LBPA_RF TDDPA_RF MLBPA_RF L8007_RF L8009_RF U SPD T_R F USPDT2_RF CL0401 BS0405 SUAT2_RF SUAT1_RF SGND_RF BS0403 U2402 M2600 R4401 U2404 J_SIM_RF MBHBPA_RF UATDI_RF LATDI_RF C4421 C4417 XW5616_RF XW2700 XW 2201 XW2404 XW3801 XW3333 XW2707 no_refdes+2 no_refdes+3 no_refdes+4 no_refdes+5 no_refdes+6 no_refdes+7 no_refdes+9 J3801 U3801 L3903L3902L3901 J2201 M2800 JLAT3_RF JLAT1_RF J4502 BS0406 FD0403 FD0402 FD 0408 FD0409 DZ4402 DZ4401 C 7730_RF L6707_RF R6706_RF L8008_RF R2001 C6704_RF DZ4404 DZ4403 FL3803 FL3910 C2443 C4106 C4109 C4105 C6716_RF C 8008_RF C6714_RF C6700_RF C4401 C4418 FL4112 FL3904 FL3915 FL3922 R4104 FL3919 FL4742 FL3801 FL3924 FL3806 FL3916 FL3804FL3802 FL4741 FL4405 FL4402 FL4403 FL4732 FL4404 FL4406 FL4731 FL4401 FL4120FL4116 FL4108 FL4101 FL4115 FL4119 FL4117 FL4118 FL4102 FL4407 FL4105 R2404 R3923 R4806 R4807 R3805 R4110 R4109 R4712 R4711 R2441 R3901 R3908 R3802 R2201 R4405 R4402 R4406 R4102 R4710 R4709 C2619 C4136 C4730 C4135 C2202 C3924C4507C3805 C3922 C3925 C3919 C4810 C4809 C3825 C3818 C3817 C3816 C2201 C3807 C3806 C3926 C4712 R4501 C4742 C4741 C3923 C0404 C4415 C4732 C0410 C4731 C4405 C4404 C4111 C4108 C4132C4128C4729 C4110 C4131 C4129 C2620 C4126 C4101 C4102 C4134 C3902 C2204 C3912 C3914 C3913 C3911 C3910 C3909 C3916 C4103 C3936 C3930 C3802 C3811 C3935 C3931 C3804 C3915 C0402 C0401 C4414 C4410 C4402 C0408 C4411 C4407C4403 C4406 C4104 C4127C4133 C4120 C4119 C4130 C3542 C3529 C3434 C2445 C2442 C3822 C2401 C2449 C2203 C3927 C3918 C3819 C3801 C3826 C3928 C0403 C4419 C2007 C0409 C4420 C4117 C4118 C1905 C6721_RF C 8005_RF C4122 C4121 C3803 C4107 C0405 C0411 C0406 C4413 C4408 C4409 C4412 C4116 C4422 C6720_RF C 8007_RF C3934 C3932 C2448 C2117 C2118 C3814 C3828 C3813 C3821 C3815 C2418 C4416 SH0403 PP2440 PP4501 PP3801 PP2403 PP2402 PP8000_RF PP2404 PP2401 PP3601 PP3602 PP2003 PP6919_RF PP6917_RF PP6918_RF PP6969_RF PP6979_RF PP6953_RF PP6973_RF PP6972_RF PP6921_RF PP6945_RF PP7601_RF PP7600_RF PP6942_RF PP6941_RF PP6920_RF PP6933_RF PP6905_RF PP6977_RF PP6974_RF PP6944_RF PP6943_RF PP6952_RF PP7000_RF PP6936_RF PP1702 PP1701 PP6940_RF PP6935_RF PP6939_RF PP6938_RF PP6980_RF no_refdes+1 U0700 L2301 NFCSW_RF TP0414 TP7505_RF TP0423 TP0413 TP7500_RF U3301 L1803 XW3202 BALUN_RF L1813 L1809 L1807 L1808 L1812 L1811 C7518_RF J4503 TUNFX_RF R3332 R3333 J4501 C5632_RF C5616_RF C5633_RF C5617_RF C5618_RF C5634_RF L5602_RF L5604_RF L5603_RF L5605_RF SWPMX_RF XW2001 XW1801 XW1802 XW1803 XW1403XW 1805 XW5614_RF XW5615_RF XW1402 XW1401 XW1902 XW1901 XW3203 XW1807 XW2002 XW 2005 XW 2004 XW2003 no_refdes+5 no_refdes+8 no_refdes+10 L7500_RF L7501_RF L5601_RF C1914 C1911 C1910 C1907 C3532 C3326 C1512 C3313 C3328 C3531 C3308 C3324 C3306 C3325 C3327 C1901 C1808 C1804 C1810 C1806 C5624_RF C5620_RF L3302 L1806 L1814 L1810 L1816 L1817 L1804 L1801 L1818 L1815 FD0407 R2002 R7508_RF R7509_RF R7520_RF DZ2906 DZ2905 DZ2907 FL2505 FL2901 FL2902 C7515_RF C7507_RF C7508_RF C3311 C7509_RF C7510_RF C7516_RF C7512_RF C7514_RF FL4815 FL2911 FL2910 FL6700_RF FL6703_RF FL2904 FL2909 FL2501 FL2504 FL2913 FL2908 FL2907 FL2906 R2905 FL2914 FL2903 R1306 R1305 FL6701_RF R4708 R2904 R2903 R4813 R4812 FL6702_RF R4707 R3301 R2008 R4815 R4808 R4809 R7512_RF R4604 R4603 R4706 R4811 R4810 R4705 R2915 R0901 R6900_RF R5911_RF C2513 C4708 C2924 C4803 C2520 C2910 C2905 C4804 C4707 C2906 C4813 C4812 C3312 C3333 C3332 C2503 C2514 C2904 C2926 C2902 C2911 C2933 C2921 C2908 C2934 C2935 C2903 C2931 C2932 C1867 C1871 C1869 C1811 C1872C1873 C0909 C0905 C0908 C0904 C1861 C1860 C3323 C3331 C2523 C2526 C2524 C2525 C2530 C2901 C2914 C2915 C7525_RF C3315 C0801 C0818 C0817 C0816 C0815 C2512 C0413 C2008 C5903_RF C2522 C2529 C2528 C6702_RF C6701_RF C6703_RF C6705_RF C3319 C2521 C3501 C3329 C2916 C2917 C2927 C2508 C2909 C2510 C2506 C1923 C1930 C1615 C3316 C5730_RF C0805 BB_RF U5801_RF C5614_RF C3318 SH0401 PP7608_RF PP7604_RF PP7603_RF PP5301 PP7501_RF PP1410PP0902 PP1411 PP6931_RF PP6971_RF PP6915_RF PP0802PP6916_RF PP0801 PP6970_RF PP6923_RF PP7502_RF PP6929_RF PP6906_RF PP6914_RF C4711 U2710 U3502 U3402 TP0409 TP0408 TP0412 TP0410 C3405 C2702 C2114 C3722 C3424 C2113 C4601 C3525 C3702C3724 C3718 C2611 C2612 C2609 C2610 C3710 C3407 C3404 C3403 C3539 C3538 C3524 C3432 C3929 C3713C3712C3714 C3901 C3530 C3707 C3715 C3716 C3823 C3537C3431 C1716 C1748 C1721 C1713 C1701 C1702 C1730 C1729 C1722 C1733 C1719C1704C1705C1707C1727 FD0400 FD0404 FD0410 FD0405 DZ6900_RF R7103_RF C6610_RF L6304_RF R2003 R2711 R6405_RF R6400_RF R7105_RF C6310_RF L6311_RF R7102_RF R7511_RF R6705_RF R6710_RF R6715_RF R6708_RF R6709_RF R6703_RF R6601_RF R6606_RF DZ6901_RF FL3903 FL3901 FL3902 C7013_RF C6415_RF C6417_RF C7010_RF C7014_RF C7125_RF R7101_RF C7124_RF C6405_RF C6404_RF C7118_RF C6403_RF C7122_RF C6410_RF C6402_RF C7009_RF C7112_RF C7121_RF C6728_RF C6713_RF C6726_RF C6711_RF C6727_RF C6602_RF C6614_RF C6601_RF C6611_RF C6613_RF C7731_RF C7011_RF C7012_RF R6301_RF C6338_RF C3535 C3428 C3703 C3903 FL4114 FL4730 FL4103 FL3920 FL3917 FL3913 FL3918 FL3811 FL3807 FL4121 FL4107 FL4729 FL4604 FL6603_RF FL6602_RF FL6401_RF FL6402_RF R7114_RF R6003_RF R7109_RF R3809 R6001_RF R6005_RF R6006_RF R7107_RF R6004_RF R6008_RF R7112_RF R7111_RF R6002_RF R7002_RF R7108_RF R7113_RFR6007_RF R7110_RF R6201_RF R2422 R7702_RF R7711_RF R1702 R1707 R2705 R2702 R4002 R2710 R2101 R2102 R2701 R3508 R2403 R0805 R0802 R3811 R3801 R2103 R3101 R1304 C4702 C4701 C3727C3726 C3921 C3920 C4710 C4709 C4608 C0420 C2617 C2104 C3938 C3717 C2102 C3939 C3917 C3812 C2703 C3526 C3427 C4008 C4007 C0418 C0417 C2613 C2614 C0407 C1715 C1703C1708 C1735 C1714 C3937 C3422 C3425 C6008_RF C6409_RF C4807 C2701 C6408_RF C6018_RF C6019_RF C6020_RF C7001_RF C3527 C4002 C6009_RF C6022_RF C6007_RF C6502_RF C6501_RFC6021_RF C7501_RF C2405 C6627_RF C6629_RF C2413 C6201_RF C1710 C2009 C6806_RF C6734_RF C0419 C1736 C1712 C6901_RF C1720 C1709 C1734 C5909_RF C5908_RF C5907_RF C7126_RFC7128_RF C2103C2112 C3709C3708 C3904 C3905 C7114_RF C7108_RF C6406_RF C6407_RF C7008_RF C6414_RF C7104_RF C7117_RF C7105_RF C6505_RF C6514_RF C6506_RF C6504_RF C6513_RF C6420_RF C6419_RFC7110_RF C6515_RF C6622_RF C6625_RF C6619_RF C6617_RF C0421 C2420 C0422 C0412 C6014_RF C7017_RF C7005_RF C6013_RF C6010_RF C6012_RF C6011_RF C6017_RF C6015_RF C6016_RF C7101_RF C3528 C5906_RF C4004 C4001 C3430 C1724 C1725 C2707C3534 C7007_RF C3536 C2115 C3940 C3933 C3824 C2700 C6804_RF C7006_RF C3426 C3429 C6006_RF C6024_RF C7529_RF C7530_RF C6023_RF C6801_RF C6803_RF C6805_RF C6802_RF C2414 C2408 C2505 C2705 C1726 PP4001 PP6978_RF U2700L2700 D2700 Q2701 Q2700 U1701 C2708 U2701 U4805 U4806 XCVR1_RF U2403 Q2102 GPIO_RF U4802 U4001 UPPDI_RF GFILT_RF C2110 C2106 C2108 SE2LDO_RF JUAT2_RF JUAT1_RF MHBLN_RF MLBLN_RF GLNA_RF PPLXR_RF LBLN_RF W5BPF_RF MCEW_RF DZ6903_RF DZ6905_RF DZ6902_RF DZ6904_RF UATCP_RF LATCP_RF MCNS_RF C2111 C2109 C2101 U2101 Q2101 U3703 U3702 L3703 U3701 D3701D3702 SE2_RF XCVR0_RF SWDSM_RF GSMPA_RF RXFIL_RF GSMRX_RF C6001_RF L3704 L6710_RF L6321_RF L6308_RF L6307_RF L6313_RF L6312_RF R6404_RF R6402_RF R7106_RF R7104_RF R6401_RF C6307_RF L6328_RF L7709_RF L6301_RF L6309_RF L6306_RF C6301_RF L6320_RF C6305_RF L6305_RF L6322_RF C7111_RF C6311_RF L6310_RF R6501_RF L6318_RF L6319_RF L6324_RF L6323_RF L6325_RF C6349_RF FL3906 FL3911 FL3908 FL3912 FL3909 FL7001_RF FL4106 L4022 L4021 L6700_RF L6200_RF L6101_RF L6104_RF L6102_RF L6103_RF L6110_RF L6109_RF L6111_RF L6201_RF L7122_RF C6729_RF C6508_RF C6511_RF C6332_RF C6507_RFC6510_RF C6509_RF C6512_RF C6302_RF C7120_RF C6002_RF C6003_RF C2105 C6416_RF C7123_RF C6411_RF C7119_RF C6309_RF C6308_RF C6306_RF C6348_RF C6350_RF R6605_RF R6502_RF R6503_RF C4005 C7106_RF C7004_RF C4003 C7103_RF C7113_RF C1751 C1753 C1743 C1746 C1738 C1750 C1749 C1747C1745 C1737 C1741 C1739 C1740 C1754 C1752 C1744 C1742 C7523_RF C7524_RF C7528_RF C7201_RF R2104 R2703 R2704 R2105 R4803 R4804 R4805 R3808 R3807 R3701 R3915 R4001 R7131_RF R7130_RF R7132_RF R1704 R1703 R6904_RFR1701 C2710 C6351_RF C6101_RF C6104_RF C6317_RF C6342_RF C6316_RF C6314_RF C6315_RF C6323_RF C6325_RF C6335_RF C6346_RF C6343_RF C6318_RF C6319_RF C6320_RF C6106_RF C6107_RF C6108_RF C6340_RF C6103_RF C6102_RF C6329_RF C6352_RF C6341_RF C6328_RF C6105_RF C6807_RF C6336_RF C6337_RF C6324_RF C6344_RF C6345_RF C6334_RF L7123_RF C6112_RF C6004_RF C6005_RF C2706 C6418_RF C6735_RF C6400_RF C6401_RF C7133_RF C7127_RFC7129_RF C6503_RF C6620_RF C6113_RF C6114_RF C 6116_RF C6115_RF C1718 C1711 C1706 C7016_RF C7015_RF C6333_RF C6204_RF C6205_RF C6203_RF C6117_RF C6118_RF C6111_RF C7531_RF C6109_RF C6110_RF C7131_RF C7130_RF C7132_RF C 7710_RF C7729_RF C7711_RF C7709_RF C6732_RF C2422 C2421 C6731_RF C6733_RF C6730_RF C2423 R6711_RF C1723 C1732 C1728 C1756 C1731 C1717 C3711 C4006 SWLATCP_RF C3719 C3706 C3721 C3704 C3705 C3720C3725 MHBDSM_RF LBDSM_RF SH0402 C7504_RF C0809 C0810 C0807 C0808 XW1804 XW1806 C1513 C1602 C1853 C1458 C1528 C1403 C1459 C1506 C1857 C1444 C1436 C1501C7602_RF C2309 C3208 C3211 C1850C1846 C2302 C2308 C7517_RF C1408 C1434 C2307 C7511_RF C1863 C1401 C1414 C1862 C1865 C1839 C1834 C1843 C1832 C1826 C1838 C1842 C1844C1807 C1837 C1819 C1845 C1831 C1818 C1825 C1829 C1840 C1822 C1864 C1801 C1803 C1813 C1814 C1866 C1827 C1833 C1821 C1828 C1820 C1915 C1805 C2304 C1912 C2303 C1809 C1823 C1830 C1835 C1874 C1836 C1802 C1841 C1816 C5621_RF C5701_RF C5622_RF C5625_RF C5703_RF C5702_RF C5623_RF FD0406 R2004 R1901 R5511_RF FL2506 FL2502 FL2500 FL2503 R7703_RF L7700_RF R7700_RF R4817 R4816 R0804 R2009 R7502_RF R7510_RF R7701_RF R1602 R1601 R1116 R0702 R1101 R0803 R5909_RF R5910_RF R5601_RF R1118 R1210 R1113 R1114 R2012 R7600_RF R3602 R3605 R2006 R3304 R0801 R0807 R0806 R3202 R2005 R2700 R2020 R1303 R0907 R0906 R1103 R3604 R3607 R3601 R7599_RF R0504 R0508 R0501 R0503 R0505 R0509 R3201 R4714 R4713 R5807_RF R2000 R6921_RF R6922_RF R5907_RF R5908_RF R4716 R4715 R4801 R4802 R1503 R1501 R1505 R1504 R1506 R1502 R5802_RF R5801_RF R4703 R4704 R0900 R5806_RF R4702 R4701 R5912_RF R5502_RF C0414 C4817 C4816 C4704 C4703 C2501 C2504 C2518 C2511 C2515 C4143 C1870 C2618 C2306 C3113 C3112 C0910 C1868 C1909 C2001 C2013 C0700 C0903 C0902 C7503_RF C1606C0701 C1601 C1609C1613 C0803 C1004 C0813 C0814 C0811 C0812 C3215 C3213 C3214 C3220 C3212 C5750_RF C3607 C0704 C3602 C3606 C0804 C0802 C3601 C5801_RF C5501_RF C7522_RF C2010 C2011 C1006 C7521_RF C7603_RF C3106 C3107 C5635_RF C1011 C1010 C0907 C0906 C0415 C0416 C7600_RF C7607_RF C1005 C7601_RF C7606_RF C1002 C2531 C2519 C2507 C2527 C1507 C1921 C1519 C1875 C1515 C1614C0900C1449 C1529 C1608 C7526_RFC7506_RF C1522 C0901 C7527_RF C1448 C1927 C1913 C1504 C1908 C1877 C1852 C0705 C0806 C1607 C1922 C1604 C1918 C1904 C1013C1518 C1851 C1610 C1611 C1514C1612 C1848 C1859 C1849C1847 C1001C1605 C1511 C1466 C5746_RF C1919 C2704 C5748_RF C5752_RF C5751_RF C5747_RF C5749_RF C5742_RF C5739_RF C3205 C1855 C1856 C5755_RF C5736_RF C1603 C1926 C1916 C3209 C5743_RF C5740_RF C5732_RF C5729_RF C5754_RF C5737_RF C5735_RF C5753_RF C3603 C1858 C5733_RF C1854 C5731_RF C5744_RF C5704_RF C5734_RF C5745_RF C3604C1876 C5738_RF C6900_RF PP7605_RF PP7615_RF PP7614_RF PP7613_RF PP7616_RF PP7612_RF PP7606_RF PP7607_RF PP7503_RF PP7504_RF PP7509_RF PP1402PP1401 PP1408 PP1403 PP7610_RF PP7624_RF PP6981_RF PP7500_RFPP7505_RF PP7617_RFPP7506_RF PP7507_RF PP7508_RF PP0701 PP7620_RF PP7622_RF PP7623_RF PP7621_RF PP7611_RF PP1409 PP2002 PP7619_RFPP7618_RF PP7609_RF PP6913_RF PP5304 PP2001 PP6926_RF PP6911_RF PP6925_RF PP6924_RF PP6909_RF PP6930_RF PP6900_RF PP6908_RF PP5303 PP6904_RF PP6903_RF PP6907_RF PP6912_RF RFBUF_RF C3605 U3602 L1802 U2301 U3603 WLAN_RF U2501 W2BPF_RF W25DI_RF L1805 NFC_RF U1801 Y2001 NFBST_RF C1435 C1439 L7600_RF C1405 C1412 C1422 C1430 C1402 C1427 C1502 C1465 C1409 C1452 C1454 L7502_RF C1433 C1417 C1460 C1461 C1411 C1407 C1503 C1437 C1416 C1404 C7604_RF C1421 C1432 C1426 C1440 C1413 C1406 C1442 C1456 C1419 C1424 C1457C1425 C1429 C1418 C1423 C1431 C1438 C1415 C1410 C1428 C1527C1420 U3601 C5627_RF C5604_RF C2301 C3203 C3201 C3202 C3204 C5608_RF Y0700 U1101 U3101 EPROM_RF R2010 R2011 C7702_RF L7701_RF L7702_RF L7703_RF R7704_RF C2002 C2006 C5804_RF C5629_RF C2509 C1101 C1925 C0800 C1933 C3217 C3221 C3222 C3223 C3224 C3225 C1935 C7502_RF C7505_RF C7500_RF C7520_RF C5605_RF C5626_RF C5628_RF C5611_RF C5607_RF C5613_RF C5602_RF C5603_RF C5609_RF C5610_RF C5612_RF C5901_RF C5726_RF C5720_RF C5711_RF C5715_RF C5719_RF C5728_RF C5721_RF C5708_RF C5714_RF C5707_RF C5716_RF C5724_RF C5712_RF C5710_RF C5705_RF C5727_RF C5717_RF C5709_RF C5713_RFC5725_RF C5706_RF C5722_RF C5723_RF C5718_RF FL1501 FL0700 R2301 R0701 R3603 R0413 R0800 R2015 R2007 R7506_RF R0700 R1001 R5906_RF R5206 R5503_RF R3104 R3103 R3611 R5803_RF R5505_RF R5504_RF R5501_RF C1902 C5636_RF C2502 C2004 C2003 C5502_RF C5905_RF C7703_RF C7706_RF C7705_RF C7700_RF C7704_RF C7707_RF C7701_RF C1509 C1523 C1510 C1508 C1932 C7708_RF C0702 C0703 C5902_RF C5741_RF C5904_RF C5601_RF BBPMU_RF Y5501_RF C5630_RF C5631_RF C5615_RF SH0400 Q4001 R2706 J4504 XW4501 PP5302 D10 PCB: 820-00188-08 VIETMOBILE.VN
D10 MLB - DVT Schematic & PCB Callouts <rdar://problem/16684269> MCO 056-01342 System Block Diagram: BRD 820-00188 SCH 051-00419 SOC:MIPI AND ISP 48 SMALL FORM FACTOR SPECIFIC <SYNC_DATE43> LAST_MODIFICATION=Tue Jun 14 15:20:28 2016 62 <CSA_PAGE60> WIFI FRONT-END [77] <SYNC_MASTER1> SOC:LPDP <SYNC_MASTER48> <SYNC_MASTER47> <SYNC_MASTER51> <SYNC_MASTER62> <SYNC_MASTER61> <SYNC_DATE59> <SYNC_DATE58> SOC:PCIE <CSA_PAGE7> page1 [1] <CSA_PAGE1> 1 <CSA_PAGE5> page1 <SYNC_MASTER59> I2C MAP AOP <SYNC_MASTER60> <SYNC_MASTER18> <SYNC_DATE15> <CSA_PAGE57> <CSA_PAGE53> spare SYSTEM:BOARDID SYSTEM:MECHANICAL, TESTPOINTS 7 <SYNC_MASTER12> <SYNC_MASTER13> PMU: CONTROL AND CLOCKS PMU: SWITCHERS AND LDOS <SYNC_MASTER73> <SYNC_MASTER74> TRANSCEIVER0/1: PRX PORTS TRANSCEIVER0/1: POWER 65 <SYNC_MASTER78> 32 <SYNC_MASTER65> <SYNC_DATE55> SOC:POWER (1/3) <CSA_PAGE13> B2B FILTERS: UTAH B2B:DOCK FLEX ARC:DRIVER <SYNC_DATE47> <SYNC_MASTER4> <CSA_PAGE72> <SYNC_MASTER28> <SYNC_MASTER26> <CSA_PAGE87> <SYNC_DATE33> <SYNC_MASTER22> <CSA_PAGE3> <CSA_PAGE90> <CSA_PAGE86> <SYNC_MASTER43> <SYNC_MASTER50><SYNC_MASTER5> <SYNC_MASTER7> SYSTEM POWER:PMU (2/3) <CSA_PAGE64> <SYNC_DATE63> <SYNC_DATE65> <SYNC_DATE67> <SYNC_MASTER75> PMU: ET MODULATOR B2B:FOREHEAD <SYNC_MASTER38> B2B: SMALL FF SPECIFIC AUDIO:CALTRA CODEC (1/2) Accessory: Buck Circuit 8 <CSA_PAGE9> 59 24 21 SYSTEM POWER:PMU (1/3) BASEBAND GPIOS <SYNC_MASTER25> <SYNC_DATE9> SYSTEM POWER:PMU (3/3) AUDIO:CALTRA CODEC (2/2) 70 SOC:JTAG,USB,XTAL <CSA_PAGE6> B2B:ORB & MESA B2B FILTERS: DISPLAY & TOUCH 33 <CSA_PAGE25> <SYNC_MASTER37> 2 <SYNC_MASTER15> <SYNC_MASTER14> <SYNC_DATE8> 50 SYSTEM POWER:BATTERY CONN <SYNC_MASTER17> SOC:SERIAL spare <SYNC_DATE14> <SYNC_DATE37> <CSA_PAGE88> NAND 56 SOC:AOP 14 BOM_OMIT_TABLE 64 SOC:POWER (2/3) SOC:POWER (3/3) <CSA_PAGE24> <SYNC_MASTER19> AUDIO:SPEAKER AMP 2 <SYNC_MASTER86> <SYNC_MASTER80> <SYNC_MASTER63> <SYNC_MASTER76> spare <SYNC_MASTER42> UPPER ANTENNA FEEDS <SYNC_MASTER70> <SYNC_DATE64> <SYNC_MASTER66> <SYNC_MASTER69> <CSA_PAGE59> <SYNC_DATE66> <SYNC_MASTER29> <SYNC_DATE76> 75 DIVERSITY RECEIVE LNA'S <SYNC_DATE1> spare <SYNC_MASTER8> <SYNC_MASTER6> CELL,WIFI,NFC MLB UNIQUE <SYNC_MASTER20> <SYNC_MASTER21> <SYNC_MASTER24> <SYNC_MASTER32> <SYNC_MASTER11> <SYNC_MASTER10> BOM LIST 6 <SYNC_MASTER36> <SYNC_MASTER39> <SYNC_MASTER40> <SYNC_MASTER9> BASEBAND: POWER2 page1 26 39 <SYNC_DATE57> <SYNC_MASTER35> 44 <SYNC_MASTER31> 13 47 67 <CSA_PAGE68> ARC:MAGGIE NFC <SYNC_DATE74> <SYNC_DATE11> <SYNC_MASTER57> 66 <SYNC_MASTER58> <SYNC_DATE61> <SYNC_DATE46> <SYNC_DATE50> <SYNC_DATE48> <SYNC_DATE49> <SYNC_DATE53> <SYNC_DATE51> <SYNC_DATE52> <SYNC_DATE56> <SYNC_DATE62> <SYNC_DATE60> <SYNC_DATE69> <SYNC_DATE68> <SYNC_DATE75> <SYNC_DATE77> <SYNC_DATE73> <SYNC_DATE72> <SYNC_DATE71> <SYNC_DATE81> <SYNC_DATE80> <SYNC_DATE79> <SYNC_DATE78> <SYNC_DATE82> <SYNC_DATE83> <SYNC_DATE84> <SYNC_DATE89> <SYNC_DATE90> <SYNC_DATE88> <SYNC_DATE87> <SYNC_DATE86> <SYNC_DATE85> <SYNC_MASTER49> <SYNC_MASTER52> <SYNC_MASTER53> <SYNC_MASTER71> <SYNC_MASTER64> <SYNC_MASTER90> <SYNC_MASTER89> <SYNC_MASTER88> <SYNC_MASTER87> <SYNC_MASTER85> <SYNC_MASTER84> <SYNC_MASTER83> <SYNC_MASTER82> <SYNC_MASTER81> <SYNC_MASTER79> <CSA_PAGE48> <CSA_PAGE49> <CSA_PAGE50> <CSA_PAGE46> <CSA_PAGE47> <CSA_PAGE55> <CSA_PAGE51> <CSA_PAGE52> <CSA_PAGE58> <CSA_PAGE56> <CSA_PAGE54> <CSA_PAGE62> <CSA_PAGE63> <CSA_PAGE61> <SYNC_DATE5> <SYNC_DATE3> <SYNC_DATE2> <SYNC_DATE4> <SYNC_DATE6> <SYNC_DATE13> <SYNC_DATE12> <SYNC_DATE10> <SYNC_DATE17> <SYNC_DATE16> <SYNC_DATE18> <SYNC_DATE7> <SYNC_DATE19> <CSA_PAGE65> <CSA_PAGE66> <CSA_PAGE67> <CSA_PAGE69> <CSA_PAGE70> <CSA_PAGE71> <CSA_PAGE73> <CSA_PAGE74> <CSA_PAGE75> <CSA_PAGE76> <CSA_PAGE77> <CSA_PAGE82> <CSA_PAGE81> <CSA_PAGE80> <CSA_PAGE79> <CSA_PAGE78> <CSA_PAGE83> <CSA_PAGE84> <CSA_PAGE85> <CSA_PAGE89> <SYNC_DATE20> <SYNC_DATE26> <SYNC_DATE28> <SYNC_DATE31> <SYNC_DATE32> <SYNC_DATE30> <SYNC_DATE29> <SYNC_DATE23> <SYNC_DATE40> <SYNC_DATE39> <SYNC_DATE38> <SYNC_DATE35> <SYNC_DATE36> <SYNC_DATE42> <SYNC_DATE41> <SYNC_DATE44> <CSA_PAGE4> <SYNC_MASTER16> <SYNC_MASTER27> <SYNC_MASTER30> <SYNC_MASTER41> <CSA_PAGE8> <CSA_PAGE10> <CSA_PAGE11> <CSA_PAGE12> <CSA_PAGE14> <CSA_PAGE15> <CSA_PAGE17> <CSA_PAGE18> <CSA_PAGE19> <CSA_PAGE20> <CSA_PAGE33> <CSA_PAGE32> <CSA_PAGE31> <CSA_PAGE30> <CSA_PAGE28> <CSA_PAGE27> <CSA_PAGE26> <CSA_PAGE23> <CSA_PAGE22> <CSA_PAGE21> <CSA_PAGE34> <CSA_PAGE45> <CSA_PAGE44> <CSA_PAGE43> <CSA_PAGE42> <CSA_PAGE41> <CSA_PAGE40> <CSA_PAGE39> <CSA_PAGE38> <CSA_PAGE36> <CSA_PAGE35> 79 78 77 76 72 69 63 61 60 58 57 53 52 51 49 46 45 43 42 41 38 37 35 31 29 28 27 22 20 19 17 16 11 10 9 4 3 TDD TRANSMIT LOWER ANTENNA & COUPLERS RECEIVE MATCHING I2C TABLE I2C MAP: AP, TOUCH, HOMER, I2C5 spare <SYNC_MASTER77> DIVERSITY RECEIVE ASM'S <SYNC_DATE24> 40 <SYNC_MASTER33> <SYNC_MASTER45> 74 73 54 55 5 81 ICEFALL, SIM, DEBUG_CONN FDD TRANSMIT 34 25 18 12 TRISTAR 2 <CSA_PAGE29> 30 MLB SPECIFIC: BOM TABLE <CSA_PAGE2> <SYNC_DATE45> AUDIO:SPEAKER AMP 1 TRINITY: FF SPECIFIC SOC:GPIO & UART TRANSCEIVER0/1: TX PORTS 71 SYSTEM POWER:CHARGER 15 <SYNC_MASTER2>SYSTEM:BOM TABLES <CSA_PAGE16> DISPLAY & MESA:POWER BASEBAND: CONTROL 68 <SYNC_DATE25> <CSA_PAGE37> spare <SYNC_MASTER54> <SYNC_MASTER67> CAMERA:STROBE DRIVER 36 <SYNC_MASTER34> <SYNC_MASTER68> <SYNC_MASTER72> TEST POINTS & BOOT CONFIG 80 <SYNC_DATE34> <SYNC_MASTER23> TABLE OF CONTENTS UAT MATCH AND TUNER CONNECTOR [2] <SYNC_DATE22> <SYNC_DATE21> SENSORS 23 <SYNC_MASTER56> <SYNC_MASTER55> <SYNC_DATE54> <SYNC_DATE70> PERENNIAL <SYNC_MASTER3> <SYNC_MASTER44>B2B FILTERS: RIGHT BUTTON FLEX <SYNC_DATE27> SYSTEM POWER:BOOST WIFI_MLB SCHEMATIC <SYNC_MASTER46> 2016-06-1400064008778 ENGINEERING RELEASED TABLE OF CONTENTS TABLE OF CONTENTS CRITICALPCB1820-00188 PCBF,MLB,D10 ? CRITICAL ?SCH1 SCH,MLB,D10051-00419 CONTENTSPAGE <CSA> SYNC DATESYNC<CSA> CONTENTSPAGEDATE ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
NAND BOM Options Carbon Alternates Magnesium Alternates DDR PLL Alternate Mamba LDO Alternates I2C5 Alternate Global R/C Alternates ACC BUCK CIRCUIT Alternates Global Ferrite Alternates For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts reverted 11/13 UT LDO Alternates Except BUCK5 LX (BUCK5 LX is Taiyo only) #22686038:See Radar Global Varistor Alternates Active Diode Alternate Power Inductor Alternates updated 11/12 updated 11/12 152S00120 152S00077 ALTERNATE For Chestnut inductor onlyALL ALTERNATE152S00398 152S00204 ALL IND,PWR,0.22UH,20%,6.7a,23MOHM,2012 ALTERNATE152S00297 ALL152S00365 CYNTEC 2012 1UH 152S1843 CYNTEC 2012 1UHALTERNATE152S00297 ALL IND,MULT,1UH,1.2A,0.320 OHM,0603152S00366152S00402 ALLALTERNATE IND,PWR,SHLD,15 UH,0.72A,0.900 OHM,3225ALTERNATE152S1936152S00123 ALL 152S00121 152S00081 IND,PWR,SHLD,0.47 UH,3.8A,0.048 OHM,2012ALTERNATE ALL ALTERNATE IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016152S00077 ALL152S00397 ALTERNATE ALL IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016152S00118 152S00075 IC,LOAD SWITCH,WLCSP4353S01039 ALTERNATE U2710353S01007 PFET,12V,CSP4376S00164 ALTERNATE Q2700,Q2701376S00166 L2700 IND,MLD,0.47UH,2.5A,80Mohm,1608152S00557152S00558 ALTERNATE ALTERNATE371S00087 D2700 DIODE,SHOTTKY,30V,200MA,0201371S00064DIODES INC. ACT DIODEALTERNATE376S00047376S00106 Q2101 NAND,H,128GB,16nm,TLC335S00182 1 U1701 CRITICAL NAND_128G FERR, 240OHM, 0.38OHM DCR, 0201ALTERNATE155S0581 ALL155S00067 FLTR, 65 OHMS, 0605155S00012 ALLALTERNATE155S00168 FERR BD, 150OHM, TYALLALTERNATE155S00200 155S0610 FERR BD, 0.47UH, TY152S00489 ALLALTERNATE152S00456 ALLALTERNATE155S00194 FERR BD, 150OHM, TDK155S0610 377S0140 ALL377S0168 ALTERNATE VARISTOR, 6.8V, 100PF, 01005 138S0648 CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO138S0652 ALTERNATE ALL 138S00003 ALTERNATE138S00005 ALL CAP,X5R,15UF,6.3V,0.65MM,0402,TAIYO 132S0436132S0400 ALTERNATE ALL CAP,X5R,0.22UF,6.3V,01005,TDK 152S00117 152S00074 IND,PWR,SHLD,1.0 UH,3.0A,0.060 OHM,2016ALTERNATE L1806,L1810,L1814,L1816,L1817 ALTERNATE138S00003138S00048 CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERAALL ALTERNATE CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK138S0986 ALL138S00024 FERR, 240OHM, 0.38OHM DCR, 0201155S0581 ALTERNATE ALL155S00067 ALTERNATE FL1501 FERR BD,100OHM,25%,100MA,2OHM,01005155S00068155S00095 U1701335S00182 ALTERNATE335S00179 SD,15nm,TLC,128GB 132S0436 132S0400 CAP,CER,X5R,0.22UF,20%,6.3V,20%ALLALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,KYOCERAALL138S0945 ALTERNATE138S0739 138S0739 ALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,MURATAALL138S0706 138S0702 ALTERNATE ALL CAP, X5R, 4.3UF, 4V, 0610138S0657 118S0764 ALTERNATE ALL RES, 3.92K, 0.1%, 0201118S0717 138S00006 CAP, 3-TERM, 4.3UF, 4V, 0402ALTERNATE138S0835 ALL I2C5 ALTERNATEALTERNATE335S00234 335S00233 U1101 U3801353S00932 353S00576 ALTERNATE ST, LDO REG, 2.75V 335S00180 T,15nm,TLC,128GBALTERNATE U1701335S00182 335S00182335S00195 U1701ALTERNATE SS,1Ynm,TLC,128GB 335S00169 ALTERNATE U1701 S,16nm,MLC,32GB335S00209 U1701ALTERNATE335S00183 SS,3Dv3,TLC,256GB335S00190 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C17335 NAND_128G138S00003 CRITICAL 138S0867 5 CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C1733 CRITICAL NAND_32G NAND,H,256GB,3Dv3,TLC335S00156 1 U1701 CRITICAL NAND_256G NAND,H,32GB,16nm,MLC1 CRITICALU1701335S00169 NAND_32G ST, LDO REG, 2.925V, CSP 0.65x0.65ALTERNATE U2501353S00015353S00889 Updated version of CarbonALTERNATE338S00087 338S00226 U2401,U2404 ALTERNATE Larger Wafer (-29 flow) Magnesium338S00203338S00173 U2402 335S00183 U1701 SD,3Dv2,TLC,256GBALTERNATE335S00148 335S00169335S00201 U1701 T,15nm,MLC,32GBALTERNATE C1748,C1713,C1716,C1721,C17335 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402138S00003 CRITICAL NAND_256G TABLE_5_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D10x Specific BOM Callouts Cap 2.2UF Alternates CAYMAN DDR Alternates #24629229 #25634778: Exclude Kyocera as 2.2UF alt at only C2507/C2531 REFDES (other refdes no impact) #24681501 D10 EEEE CALLOUTS R4808,R4809 UTAH_CRES,MF,1K OHM, 5%, 1/32W, 01005117S0156 2 CRITICAL EEEE_SUPREMECRITICALEEEE_GXD6825-6838 1 EEEE CODE FOR 639-01755 EEEE_BEST1 EEEE CODE FOR 639-01754 EEEE_GXD5 CRITICAL825-6838 CRITICAL EEEE_SUPREME_ROWEEEE_H6TGEEEE CODE FOR 639-02373825-6838 TAIYO,IND,PWR,SHLD,1UH,3.6A,0.060OHM,20161152S00117 CRITICALL1803 EEEE_EXTREME_ROWEEEE CODE FOR 639-02374 EEEE_H6TH825-6838 CRITICAL1 EEEE_BEST_ROW1 CRITICALEEEE_H6TFEEEE CODE FOR 639-02372825-6838 825-6838 EEEE_EXTREMEEEEE_GXD7 CRITICAL1 EEEE CODE FOR 639-01756 ALTERNATE ALL DDR-S, 2G, B1 ALTERNATE ALL339S00253 DDR-H, 2G, B1 B5LX_TAIYO 339S00253 1 339S00255 339S00254 (C2507,C2531)138S00032 CAP,CER,X5R,2,2UF,20%6.3V,20%, KYOCERAALTERNATE138S00049 CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATAALLALTERNATE138S00032138S0831 TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
Current as of D10 MCO 056-01342-78 Back Shields DFU FORCE DFU O TP IS TO HELP WITH USB SI IN THE FACTORY FIXTURE. #25244799 MOJAVE ANALOG MUX A OUTPUT 100k to 200k ANALOG MUX B OUTPUT FOR DIAGS E75 Contained in radio_mlb pages Front Shields O O TOP SIDE FIDUCIALS LCM POWER GROUND VBUS LCM BACKLIGHT SINK2 LCM BACKLIGHT SINK1 LCM BACKLIGHT SOURCE AMUX TESTPOINTS VBATT ACCESSORY ID AND POWER Note: Fiducial used as test pointVDD_MAIN POWER GND TP 1TP0408 1 FD0408 1 FD0400 1TP0419 1 ZT0404 1 ZT0401 2 1 R0413 1TP0413 1TP0423 1TP0424 1TP0410 1TP0409 1TP0411 1TP0400 1TP0401 1TP0412 1TP0416 1TP0407 1TP0406 1TP0405 1TP0404 1TP0403 1TP0402 1TP0414 1TP0422 1TP0415 1TP0421 1TP0420 1 FD0407 2 1 C0413 2 1 C0414 2 1 C0415 2 1 C0416 2 1 C0418 2 1 C0419 2 1 C0420 2 1 C0421 2 1 C0422 2 1 C0417 2 1 C0408 2 1 C0409 2 1 C0410 2 1 C0411 2 1 C0412 2 1 C0407 2 1 C0402 2 1 C0406 2 1 C0405 2 1 C0404 2 1 C0403 2 1 C0401 1 BS0406 1 SH0403 1 SH0401 1 SH0400 1 SH0402 1CL0401 1 BS0405 1 BS0403 1 BS0402 1 FD0410 1 FD0409 1 FD0406 1 FD0405 1 FD0404 1 FD0403 1 FD0402 CHASSIS_GND_BS403 PP_LCM_BL_ANODE_CONN PP_LCM_BL_CAT2_CONN 90_TRISTAR_DP2_CONN_P CHASSIS_GND_BS402 PMU_AMUX_BY PP16V0_MESA CHASSIS_GND_BS402 90_TRISTAR_DP1_CONN_N PP_LCM_BL_CAT1_CONN PP_TRISTAR_ACC2 PP5V0_USB PP_BATT_VCC PP_VDD_MAIN PMU_AMUX_AY TRISTAR_CON_DETECT_L MESA_TO_BOOST_EN CHASSIS_GND_BS401 PP_TRISTAR_ACC1 90_TRISTAR_DP2_CONN_N 90_TRISTAR_DP1_CONN_P PMU_TO_AP_FORCE_DFU NORTH_SCREW_EXPOSED CHASSIS_GND_BS403 STDOFF-2.9OD1.9ID-0.85H-SM SM SHLD-EMI-LOWER-FRT-D10 SM SHLD-EMI-UPPER-FRT-D10 SM SHLD-EMI-UPPER-BK-D10 SM SHLD-EMI-LOWER-BK-D10 SM-SP CLIP-MLB-COAX-RETENTION-D10 STDOFF-2.56OD1.4ID.99H-SM STDOFF-2.56OD1.4ID.99H-SMSTDOFF-2.56OD1.4ID-1.10H-SM FID 0P5SM1P0SQ-NSP ROOM=ASSEMBLY ROOM=ASSEMBLY FID 0P5SM1P0SQ-NSP 0P5SQ-SMP3SQ-NSP FID ROOM=ASSEMBLY FID 0P5SM1P0SQ-NSP ROOM=ASSEMBLY FID 0P5SQ-SMP3SQ-NSP ROOM=ASSEMBLY FID ROOM=ASSEMBLY 0P5SQ-SMP3SQ-NSP 0P5SQ-SMP3SQ-NSP ROOM=ASSEMBLY FID ROOM=TEST TP-P55 ROOM=TEST FID 0P5SM1P0SQ-NSP FID ROOM=TEST 0P5SQ-SMP3SQ-NSP TP-P55 ROOM=TEST 2.70R1.80-NSP 2.70R1.80-NSP 1% 1/32W 200K MF 01005 ROOM=PMU TP-P55 ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST FID 0P5SM1P0SQ-NSP 5% 01005 100PF 16V NP0-C0G 25V 01005 5% 56PF NP0-C0G-CERM 16V 2% CERM 01005 18PF 4PF 16V 01005 NP0-C0G +/-0.1PF C0G-CERM 10V 5% 220PF 01005 100PF 16V NP0-C0G 5% 01005 25V 5% 56PF NP0-C0G-CERM 01005 2% 18PF CERM 01005 16V NP0-C0G 16V 4PF +/-0.1PF 01005 220PF C0G-CERM 5% 10V 01005 220PF 01005 5% C0G-CERM 10V 5% 100PF 16V NP0-C0G 01005 NP0-C0G-CERM 01005 25V 5% 56PF CERM 2% 18PF 01005 16V 4PF 16V +/-0.1PF 01005 NP0-C0G 10V 01005 5% 220PF C0G-CERM 01005 10V 5% C0G-CERM 220PF NP0-C0G 16V +/-0.1PF 01005 4PF CERM 01005 16V 18PF 2% 01005 25V 5% 56PF NP0-C0G-CERM 100PF 5% NP0-C0G 16V 01005 C0G-CERM 01005 5% 10V 220PF 4 45 39 45 39 41 40 4 20 38 37 4 41 40 45 39 41 40 41 40 21 22 21 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 20 41 40 38 37 44 41 40 41 40 41 40 20 12 4 A A A A A A A A A A A A A A A A A A A A A A A 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
01101 D101 DEV SELECTED --> 1101 PROTO2 1100 PROTO2v5 1011 EVT1 1010 EVT2 xxxx SPARE 1000 CARRIER xxxx SPARE SELECTED --> 01000 D10 MLB 01110 D111 MLB 01111 D111 DEV 01100 D101 MLB 01011 D11 DEV 01010 D11 MLB 01001 D10 DEV 0=EUREKA, 1=KAROO 0=MLB, 1=DEV 0=FORM FACTOR A, 1=FORM FACTOR B FLOAT=LOW, PULLUP=HIGH 000 SPI0 001 SPI0 TEST MODE 010 NVME0_X2 BOOT_CONFIG[2:0] FLOAT=LOW, PULLUP=HIGH xxxx SPARE 0000 PVT 0010 DVT 1110 PROTO1 1111 Pre-Proto w/D520 (non enclosure) FLOAT=LOW, PULLUP=HIGH BOARD_REV[3:0] 0=FORM FACTOR A, 1=FORM FACTOR B BOOT_CONFIG1=No connect BOOT_CONFIG0=No connect SELECTED --> 111 FAST SPI0 TEST BOARD_ID[4:0] 110 SLOW SPI0 TEST 100 NVME0 X1 101 NVME0 X1 TEST 011 NVME0 X2 TEST BOARD_ID0=No connect 0=EUREKA, 1=KAROO BOARD_ID4=No connect BOARD ID BOOT CONFIG BOOTSTRAPPING:BOARD REV PP1V811 PP1V812 21R0509 21R0505 21R0508 21R0504 21R0503 21R0501 BOARD_ID2 BOARD_ID1 BOARD_REV0 BOARD_REV3 MAKE_BASE=TRUE MAKE_BASE=TRUE PP1V8 BOARD_REV1 BOARD_REV2 NOSTUFF 01005 5%MF 1/32W ROOM=SOC 1.00K MF ROOM=SOC 5% NOSTUFF 1.00K 1/32W01005 5%MF01005 ROOM=SOC 1/32W 1.00K ROOM=SOC MF 1/32W5%01005 1.00K NOSTUFF 01005 MF 5% ROOM=SOC 1/32W 1.00K NOSTUFF ROOM=SOC 1/32W01005 MF 1.00K 5% NOSTUFF 11 11 12 12 5248474639 2925181716131211987 12 12 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
tbd - tbd V @5mA MAX 3.14-3.46V @20mA MAX VDD18_USB: 1.71-1.89V @20mA MAXSOC - USB, JTAG, XTAL Dev ONLY VDD18_AMUX: 1.62-1.98V @1mA MAX VDD11_XTAL:1.06-1.17V @TBD mA MAX CL42 CM42 CK35 CC25 CG26 CE25 AJ60 CL20 CG50 CH26 CK26 CJ26 CM26 CL26 CM20 CM22 BJ2 BL3 BL65 CL29 CK33 CG37 CJ35 CH37 CL31 BJ4 CM14 BJ3 N64 U0700 1 PP0701 2 1 R0700 2 1 C0705 2 1 C0702 2 1 R0701 21 R0702 31 42 Y0700 2 1 C0703 21 FL0700 2 1 C0704 2 1 C0701 2 1 C0700 SWD_DOCK_TO_AP_SWCLK PP1V8 PP3V3_USB PP1V8 AP_TO_PMU_TEST_CLKOUT SWD_DOCK_BI_AP_SWDIO PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_AOP_TRISTAR_ACTIVE_READY AP_TO_NAND_RESET_L XTAL_AP_24M_IN PP1V1 AP_USB_REXT SOC_24M_O XTAL_AP_24M_OUT USB_VBUS_DETECT AP_TO_PMU_AMUX_OUT 90_USB_AP_DATA_P AP_TO_PMU_WDOG_RESET PP1V1_XTAL PP0V9_SOC_FIXED 90_USB_AP_DATA_N CKPLUS_WAIVE=PWRTERM2GND CSP CAYMAN-2GB-20NM-DDR-M P2MM-NSM SM 01005 1/32W MF 1% 200 ROOM=SOC ROOM=SOC 0201-1 X5R-CERM 20% 6.3V 2.2UF 16V CERM 12PF 5% 01005 ROOM=SOC MF ROOM=SOC 1/32W 01005 1% 511K 01005 0% MF 0.00 1/32W ROOM=SOC ROOM=SOC CRITICAL 1.60X1.20MM-SM 24.000MHZ-30PPM-9.5PF-60OHM 16V 5% 01005 CERM 12PF ROOM=SOC 01005 240-OHM-25%-0.20A-0.9DCR ROOM=SOC 01005 ROOM=SOC X5R-CERM 20% 6.3V 0.1UF 01005 X5R-CERM 20% 6.3V 0.1UF ROOM=SOC 01005 X5R-CERM ROOM=SOC 6.3V 0.1UF 20% 40 5248474639 29251817161312119875 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 20 40 20 13 40 37 20 13 17 1815 21 20 40 20 18151098 40 NC NC NC NC NC SYM 1 OF 16 VDD12_UH1_HSIC0 VDD_FIXED_USB VDD33_USB VDD11_XTAL ANALOGMUX_OUT WDOG XO0 XI0 USB_REXT USB_ID UH1_HSIC0_DATA UH1_HSIC0_STB JTAG_TRST* JTAG_TDO JTAG_SEL CFSB COLD_RESET* TST_CLKOUT S3E_RESET* JTAG_TMS JTAG_TDI JTAG_TCK TESTMODE HOLD_RESET VDD18_USB VDD18_AMUX USB_DM USB_DP USB_VBUS PP NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF #24557655:replace with 20% caps. SI no negative impact VDD12_PCIE_REFBUF:1.08-1.26V @40mA MAX WLAN RX PP's are now managed on Page 52 PCIELINK3PCIELINK2 PCIELINK1PCIELINK0 LINK 1 USED ON AP_DEV ONLY VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX SOC - PCIE INTERFACES VDD12_PCIE: 1.14-1.26V @10mA MAX PCIE_WLAN_BI_AP_CLKREQ_L 52 90_PCIE_AP_TO_WLAN_REFCLK_P 52 PCIE_AP_TO_WLAN_RESET_L52 90_PCIE_AP_TO_WLAN_REFCLK_N 52 PCIE_BB_BI_AP_CLKREQ_L 52 90_PCIE_AP_TO_BB_REFCLK_P 52 PCIE_AP_TO_BB_RESET_L52 90_PCIE_AP_TO_BB_REFCLK_N 52 CC47 BW55 CA60 CA55 CE60 CE55 CC62 CC53 CE49 CC49 CE58 CK63 CJ63 CM57 CL57 CM50 CL50 CK44 CJ44 CM61 CL61 CK56 CJ56 CK52 CJ52 CM46 CL46 CG63 CL64 CM64 CK59 CJ59 CL54 CM54 CJ48 CK48 BJ66 BE64BG64 BJ65 CH57 CG57 BE66 BE65BG66 BC64 U0700 2 1 R0801 2 1 C0804 21 R0803 21 R0804 2 1 R0806 2 1 R0800 2 1 R0802 2 1 R0805 21 C0810 21 C0809 21 C0808 21 C0807 2 1 C0806 2 1 C0805 2 1 C0803 2 1 C0802 2 1 C0801 2 1 C0800 PCIE_AP_TO_NAND_RESET_L 90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_N 90_PCIE_NAND_TO_AP_RXD_N 90_PCIE_NAND_TO_AP_RXD_C_N 90_PCIE_AP_TO_NAND_TXD_C_P 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_AP_TO_NAND_REFCLK_P PCIE_NAND_BI_AP_CLKREQ_L 90_PCIE_AP_TO_NAND_TXD_C_N 90_AP_PCIE3_TXD_C_N 90_AP_PCIE3_TXD_C_P 90_AP_PCIE3_RXD_C_N 90_AP_PCIE3_RXD_C_P 90_AP_PCIE2_RXD_C_P AP_PCIE_RCAL PP1V2_SOC_PCIE_REFBUF PP0V9_SOC_FIXED_PCIE_REFBUF PP0V9_SOC_FIXED PP1V8 PP1V2_SOC 90_AP_PCIE2_TXD_C_N 90_AP_PCIE2_TXD_C_P 90_AP_PCIE2_RXD_C_N 90_PCIE_AP_TO_NAND_REFCLK_N 90_PCIE_NAND_TO_AP_RXD_C_P CAYMAN-2GB-20NM-DDR-M CSP 100K ROOM=SOC 5% MF 01005 1/32W 0.1UF ROOM=SOC 6.3V 20% X5R-CERM 01005 ROOM=SOC MF 01005 1/32W 0.00 0% MF 01005 0.00 ROOM=SOC 0% 1/32W 100K 5% ROOM=SOC MF 01005 1/32W 3.01K ROOM=SOC 1% MF 01005 1/32W 1/32W 100K 5% ROOM=SOC MF 01005 ROOM=SOC 100K 5% MF 01005 1/32W 20% X5R 0.22UF ROOM=SOC 01005 6.3V GND_VOID=TRUE 20% X5R ROOM=SOC 01005 GND_VOID=TRUE 0.22UF 6.3V 0.22UF GND_VOID=TRUE 20% X5R 6.3V 01005 ROOM=SOC 20% X5R 01005 0.22UF GND_VOID=TRUE 6.3VROOM=SOC ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC 0.1UF 6.3V 20% X5R-CERM 01005 01005 ROOM=SOC X5R-CERM 6.3V 20% 0.1UF 0.1UF ROOM=SOC 6.3V 20% X5R-CERM 01005 1.0UF 0201-1 X5R ROOM=SOC 6.3V 20% 17 17 17 17 17 17 17 52 52 52 52 52 18151097 5248474639 2925181716131211975 19 16 10 52 52 52 17 NC NC NC NC NC NC NC NC LINK2 LINK3LINK0 LINK1 SYM 2 OF 16 VDD_FIXED_PCIE_CLK VDD_FIXED_PCIE_ANA VDD12_PCIE_REFBUF PCIE_CLKREQ3* PCIE_REF_CLK3_P VDD12_PCIE VDD_FIXED_PCIE_REFBUF PCIE_TX1_N PCIE_TX1_P PCIE_PERST1* PCIE_EXT_REF_CLK_N PCIE_EXT_REF_CLK_P PCIE_RX1_N PCIE_RX1_P PCIE_REF_CLK1_P PCIE_REF_CLK1_N PCIE_CLKREQ1* PCIE_PERST0* PCIE_TX0_N PCIE_TX0_P PCIE_RX0_P PCIE_RX0_N PCIE_CLKREQ0* PCIE_REF_CLK0_P PCIE_REF_CLK0_N PCIE_PERST3* PCIE_TX3_N PCIE_TX3_P PCIE_RX3_N PCIE_RX3_P PCIE_REF_CLK3_N PCIE_PERST2* PCIE_RX2_P PCIE_RX2_N PCIE_TX2_P PCIE_TX2_N PCIE_REF_CLK2_N PCIE_CLKREQ2* PCIE_REF_CLK2_P PCIE_REXT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D11/111 ONLY <--- Needed for Cayman debug; this pin cannot be input D11/111 ONLY 1.62-1.98V @7mA MAX SOC - MIPI & ISP INTERFACES Spare Dev ONLY Radar 20511449 D11/111 ONLY Dev only Per Radar 21221938 0.825-0.94V @25mA MAX Radar 21203307 AC return path for LCM MIPI which is referenced to GND and VDD_MAIN 2 1 C0909 2 1 C0905 2 1 C0910 G6 G17 G13 G21 G19 G15 G10 AA64 AC65 AE64 AA65 C48 B48 E50 D50 A48 C50 A50 E52 B50 E11 A11 C9 B5 B4 B7 B11 B9 C5 A4 A7 E16 B16 B12 B14 C16 C12 A14 E24 A26 C24 B20 A18 B22 B26 B24 C20 B18 A22 W66 W64 U66 U65 R65 U64 N66 N65 BR4 BR2 BN4 U0700 2 1 C0907 2 1 C0906 1 PP0902 2 1 C0904 2 1 C0908 21 R0907 21 R0906 2 1 C0903 2 1 C0902 2 1 C0901 2 1 R0901 2 1 R0900 2 1 C0900 90_MIPI_AP_TO_LCM_DATA1_N NC_MIPI_AP_TO_LCM_DATA2_P 90_MIPI_NH_TO_AP_CLK_P 90_MIPI_NH_TO_AP_CLK_N 90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_N AP_TO_STROBE_DRIVER_HWEN SPI_AP_TO_MAGGIE_CS_L MIPID_REXT NC_MIPI_AP_TO_LCM_DATA2_N 90_MIPI_NH_TO_AP_DATA1_N NC_MIPI_AP_TO_LCM_DATA3_P 90_MIPI_NH_TO_AP_DATA1_P 90_MIPI_NH_TO_AP_DATA0_N 90_MIPI_NH_TO_AP_DATA0_P I2C_ISP_UT_SDA PP0V9_SOC_FIXED AP_TO_UT_SHUTDOWN_L AP_TO_NH_SHUTDOWN_L NC_AP_TO_NV_SHUTDOWN_L NC_AP_TO_NV_CLK_R I2C_ISP_UT_SCL I2C_ISP_NV_SDA I2C_ISP_NV_SCL I2C_ISP_NH_SCL I2C_ISP_NH_SDA AP_TO_MUON_BL_STROBE_EN AP_TO_NH_CLK AP_TO_UT_CLK PP1V8 MIPI0C_REXT 90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_N 90_MIPI_AP_TO_LCM_DATA1_P AP_TO_UT_CLK_R AP_TO_NH_CLK_R TP_SENSOR3_RST NC_SENSOR0_ISTRB NC_MIPI_AP_TO_LCM_DATA3_N PP_VDD_MAIN 01005 ROOM=SOC 5% 10V 220PF C0G-CERM 01005 ROOM=SOC 5% 10V 220PF C0G-CERM 220PF C0G-CERM 10V 5% ROOM=SOC 01005 CAYMAN-2GB-20NM-DDR-M CSP 100PF NOSTUFF 01005 NP0-C0G 35V 5% NP0-C0G 01005 100PF 5% 35V NOSTUFF SM P2MM-NSM ROOM=SOC ROOM=SOC 220PF 01005 5% 10V C0G-CERM 10V 220PF 5% 01005 ROOM=SOC C0G-CERM ROOM=SOC 33.2 1% 1/32W 01005 MF 01005 33.2 1/32W MF 1% ROOM=SOC ROOM=SOC 01005 20% 6.3V X5R-CERM 0.1UF ROOM=SOC 01005 20% 6.3V X5R-CERM 0.1UF ROOM=SOC 20% 6.3V 0201-1 X5R-CERM 2.2UF 4.02K 01005 MF 1/32W 1% ROOM=SOC MF 01005 1% 4.02K 1/32W ROOM=SOC ROOM=SOC 0201-1 20% 6.3V X5R-CERM 2.2UF 39 45 45 39 39 26 36 45 45 45 45 48 18 15 10 8 7 25 29 48 46 46 48 48 37 29 25 5248474639 2925181716131211875 39 39 39 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 4 NC NC NC NC NC SYM 3 OF 16 SENSOR0_XSHUTDOWN SENSOR1_XSHUTDOWN MIPI1C_DPDATA0 SENSOR1_ISTRB MIPI1C_REXT SENSOR0_ISTRB MIPI1C_DPCLK MIPI1C_DPDATA1 MIPI1C_DNDATA0 MIPI1C_DNDATA1 MIPI1C_DNCLK ISP_I2C3_SCL ISP_I2C2_SDA ISP_I2C2_SCL ISP_I2C1_SCL ISP_I2C1_SDA ISP_I2C0_SCL ISP_I2C3_SDA SENSOR0_CLK SENSOR1_CLK SENSOR2_CLK SENSOR1_RST SENSOR3_RST SENSOR4_RST SENSOR2_RST SENSOR0_RST MIPID_DPCLK DISP_TOUCH_BSYNC0 DISP_TOUCH_BSYNC1 DISP_TOUCH_EB MIPID_REXT VDD18_MIPI VDD_FIXED_MIPI ISP_I2C0_SDA SENSOR_INT MIPID_DNCLK MIPI0C_DPDATA0 MIPI0C_DNDATA0 MIPI0C_DNDATA1 MIPI0C_DPDATA1 MIPI0C_DPDATA2 MIPI0C_DPDATA3 MIPI0C_DNDATA2 MIPI0C_DNDATA3 MIPI0C_DPCLK MIPI0C_DNCLK MIPI0C_REXT MIPID_DPDATA0 MIPID_DNDATA0 MIPID_DNDATA1 MIPID_DPDATA3 MIPID_DNDATA3 MIPID_DPDATA1 MIPID_DPDATA2 MIPID_DNDATA2 NC NC PP NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
VDD12_LPDP:1.14-1.26V @60mA MAX Desense for Wifi frequencies D11/111 ONLY Reserved for PanelID[1:0] on ap_dev board Reserved for PanelID[1:0] on ap_dev board Dev ONLY #24401637:Unconnect LPDPRX_EXT_C AC return path for LCM LPDP which is referenced to GND and VDD_MAIN GND ON MLB; other on Dev GND ON MLB; other on Dev D11/111 ONLY VDD12_PLL_LPDP:1.14-1.26V @3mA MAX LPDP Lanes swapped between D10 and D11 90_LPDP_UT_TO_AP_D0_N25 90_LPDP_UT_TO_AP_D0_P25 NC_90_LPDP_NV_TO_AP_D2_N46 90_LPDP_UT_TO_AP_D1_N25 90_LPDP_UT_TO_AP_D1_P25 LPDP_UT_BI_AP_AUX25 NC_90_LPDP_NV_TO_AP_D3_P46 NC_90_LPDP_NV_TO_AP_D3_N46 NC_AP_LPDP_AUX246 NC_90_LPDP_NV_TO_AP_D2_P46 2 1 C1013 2 1 C1001 G23 G30 G28 G25 G62 G60 G58 G55 A64 B64 B63 C63 A61 B61 B56 C56 A54 B54 A57 B57 D57 B59 C59 D64 E63 D61 E56 D54 A33 B33 B31 C31 A29 B29 B27 C27 E31 E35 D33 E33 BN3 AP2 U0700 2 1 C1010 2 1 C1011 2 1 C1002 2 1 C1005 2 1C1006 2 1 R1001 2 1 C1004 PP_VDD_MAIN AP_LPDPRX_RCAL_NEG PP1V2_SOC PP0V9_SOC_FIXED ROOM=SOC 0201-1 2.2UF X5R-CERM 20% 6.3V ROOM=SOC 0201-1 2.2UF X5R-CERM 20% 6.3V CKPLUS_WAIVE=PWRTERM2GND CSP CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND CAYMAN-2GB-20NM-DDR-M 33PF NP0-C0G-CERM 16V 5% ROOM=SOC 01005 33PF NP0-C0G-CERM 16V 5% ROOM=SOC 01005 01005 15PF NP0-C0G-CERM 16V 5% ROOM=SOC 0.01UF ROOM=SOC X5R 6.3V 10% 01005 ROOM=SOC 0.1UF X5R-CERM 6.3V 20% 01005 100PF 5% 16V ROOM=SOC 01005 NP0-C0G 300 1% 01005-1 MF ROOM=SOC 1/32W 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 9 4 18 15 9 8 7 NC NC NC NC NC NC NC NC SYM 4 OF 16 VDD12_LPDP_TX VDD12_LPDP_RX VDD12_PLL_LPDP LPDPRX_EXT_C LPDPRX_RCAL_N LPDPRX_BYP_CLK_P LPDPRX_BYP_CLK_N LPDPRX_RCAL_P LPDPRX_RX_D4_N LPDPRX_AUX_D0_P LPDPRX_AUX_D2_P LPDPRX_AUX_D4_P LPDPRX_AUX_D1_P LPDPRX_AUX_D3_P LPDPRX_RX_D4_P LPDPRX_RX_D2_N LPDPRX_RX_D3_P LPDPRX_RX_D3_N LPDPRX_RX_D2_P LPDPRX_RX_D1_P LPDPRX_RX_D0_N LPDPRX_RX_D1_N LPDPRX_RX_D0_P LPDP_TX3P LPDP_TX3N LPDP_TX2N LPDP_TX2P LPDP_TX0P LPDP_TX1N LPDP_TX0N LPDP_TX1P DP_WAKEUP EDP_HPD LPDP_AUX_P LPDP_CAL_VSS_EXT LPDP_AUX_N LPDP_CAL_DRV_OUT NC NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
To Cayman I2S1/2/3 MCLK NC #24559456 BOARD_ID0 SOC - SERIAL INTERFACES Route as daisy-chain. No T's allowed. I2C5 See Radar#25316444 for Details PP1V85 B2A1 A2B1 U1101 CJ12 CM9 CG22 CJ14 CH16 CH22 CH20 C42 E44 A42 B42 D44 A44 B44 C44 R3 N4 N3 N2 CB4 BY3 BY4 CB2 AG4 AH65 AK64 AH66 BN66 CH11 CK9 CJ9 CG18 CM7 BU66 BN64 BJ64 BN65 BR66 D48 A46 E46 C46 E48 BV65 BU64 BU65 BR64 BY66 AE65 AE66 U4 U3 AG66 AG64 CG12 CK7 BY2 AM64 AK65 AE3 AM66 U0700 21 R1116 2 1 R1113 2 1 R1114 21 R1101 21 R1118 2 1 C1101 21 R1103 BOARD_ID1 I2S_AP_TO_BT_BCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK AP_TO_NAND_SYS_CLK SPI_AP_TO_CODEC_MAGGIE_MOSI AP_TO_CUMULUS_CLK32K I2S_AP_TO_CODEC_MCLK SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_CODEC_MAGGIE_SCLK_R SPI_CODEC_MAGGIE_TO_AP_MISO I2S_AP_TO_CODEC_MSP_LRCLK DWI_PMGR_TO_BACKLIGHT_CLK I2C2_AP_SCL I2C2_AP_SDA I2C1_AP_SDA I2C1_AP_SCL I2C0_AP_SDA I2C0_AP_SCL I2C3_AP_SCL I2C3_AP_SDA AP_TO_NAND_SYS_CLK_R SPI_TOUCH_TO_AP_MISO SPI_AP_TO_MESA_MOSI I2S_BB_TO_AP_LRCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK SPI_AP_TO_CODEC_MAGGIE_SCLK SPI_AP_TO_MESA_SCLK SPI_MESA_TO_AP_MISO SPI_AP_TO_TOUCH_CS_L SPI_AP_TO_CODEC_CS_L DWI_PMGR_TO_BACKLIGHT_DATA PP1V8 I2S_MAGGIE_TO_AP_DIN PMU_TO_AP_THROTTLE_GPU_L AP_TO_PMU_SOCHOT_L PMU_TO_AP_PRE_UVLO_L I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SPI_PMGR_TO_PMU_MOSI SPI_PMU_TO_PMGR_MISO SPI_PMGR_TO_PMU_SCLK I2C5_SDA I2C5_SCL BOARD_ID2 SPI_AP_TO_TOUCH_SCLK_R MESA_TO_AP_INT I2C5_SDA PP1V8 I2C5_SCL CRITICAL ROOM=SOC WLCSP CSP CAYMAN-2GB-20NM-DDR-M 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC ROOM=SOC 1.0UF 0201-1 X5R 20% 6.3V 1/32W 01005 MF 1% 33.2 ROOM=SOC 5 53 53 53 32 32 32 36 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 36 35 34 33 32 20 20 20 4711 4711 5 38 4711 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK I2S_AP_TO_CODEC_MCLK I2S_AP_TO_CODEC_MSP_LRCLK I2C2_AP_SCL I2C2_AP_SDA I2C1_AP_SDA I2C1_AP_SCL I2C0_AP_SDA I2C0_AP_SCL I2C3_AP_SCL I2C3_AP_SDA I2S_BB_TO_AP_LRCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 CRITICAL WLCSP CSP CAYMAN-2GB-20NM-DDR-M 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC ROOM=SOC 1.0UF 0201-1 X5R 20% 6.3V MF 5 53 53 53 32 32 32 36 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 4711 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_BB_TO_AP_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 CRITICAL WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 0201-1 5 53 53 53 32 32 32 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 47 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_AP_TO_BT_LRCLK I2S_BB_TO_AP_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 5 53 53 53 32 32 32 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 47 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2C5_SDA I2C5_SCL BOARD_ID2 WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 5 53 53 53 32 32 32 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 34 33 32 20 20 20 4711 4711 5 38 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 SDASCL VCC VSS NC NC NC NC NC NC NC NC SYM 6 OF 16 I2C1_SCL SPI3_SSIN SPI3_SCLK SPI2_SSIN SPI2_MISO SPI3_MOSI SPI2_SCLK SPI3_MISO SPI2_MOSI SPI1_SSIN SPI1_SCLK SPI1_MOSI SPI1_MISO SPI0_SSIN SPI0_MOSI SPI0_SCLK I2S3_BCLK I2S3_LRCK I2S3_DOUT SPI0_MISO I2S3_MCK I2S3_DIN I2S2_MCK I2S1_DIN I2S2_DIN I2S2_BCLK I2S2_LRCK I2S2_DOUT I2S1_DOUT I2S0_MCK I2S0_DIN I2S1_MCK I2S0_DOUT I2S0_LRCK I2S1_LRCK I2S0_BCLK I2S1_BCLK DROOP SOCHOT DWI_DO CLK32K_OUT NAND_SYS_CLK GPU_TRIGGER DWI_CLK PMU_SCLK PMU_MISO PMU_MOSI SPI4_SCLK I2C3_SDA I2C3_SCL SPI4_MISO I2C5_SCL GPIO_42 GPIO_43 I2C5_SDA SPI4_MOSI I2C2_SCL I2C2_SDA I2C1_SDA I2C0_SDA I2C0_SCL NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
RESERVERD FOR SSHB ID ON DEV BOARD BOOT_CONFIG1 DEV ONLY Nostuff per #24511702 D101/D111 ONLY D101/D111 ONLY D101/D111 ONLY; for GNSS D101/D111 ONLY BOARD_ID4 SOC - GPIO INTERFACES D10/D11 ONLY #24608280 D101/D111 ONLY #24557547:Delete R1204 BOOT_CONFIG0 Dev only #25120460:REQUEST_DFU Assignment PP1V85 AP_TO_ICEFALL_FW_DWLD_REQ53 2 1 R1210 AM2 AP3 CG14 CG16 BG4 A37 B37 C37 D37 U2 W4 W2 AA4 AH2 AK4 AK3 AM4 B39 C39 D39 E39 CJ7 CL5 AH3 AH4 AG2 BU3 BU2 AY3 AY2 AV3 AT2 AT4 A39 E41 C41 A41 E42 D42 AA3 AA2 CG20 CK11 CH14 CL9 CJ11 BG2 BE3 BE4 BE2 BC4 BC3 BB4 BB2 AE2 AC3 AE4 AH64 AP65 AP66 AT64 AT66 AT67 AV67 AV65 AY66 AY65 BB66 BC65 BB64 U0700 AP_TO_TOUCH_MAMBA_RESET_L BOARD_REV0 UART_AP_TO_NFC_TXD AP_TO_BB_COREDUMP PMU_TO_AP_BUF_VOL_DOWN_L PMU_TO_AP_BUF_POWER_KEY_L AP_TO_BB_MESA_ON AP_TO_BB_IPC_GPIO1 NC_DFU_STATUS AP_TO_ACC_BUCK_VSEL AP_TO_MAGGIE_CRESETB_L AP_TO_LCM_RESET_L AP_BI_HOMER_BOOTLOADER_ALIVE AP_TO_NAND_FW_STRAP ALS_TO_AP_INT_L AP_TO_SPKAMP2_RESET_L AP_TO_BB_TIME_MARK MAGGIE_TO_AP_CDONE PP1V8 TOUCH_TO_AP_INT_L PMU_TO_AP_THROTTLE_CPU_L BB_TO_AP_RESET_DETECT_L NC_AP_TO_GNSS_TIME_MARK AP_TO_BB_RESET_L BUTTON_VOL_UP_L AP_TO_BBPMU_RADIO_ON_L AP_TO_NFC_FW_DWLD_REQ PMU_TO_AP_FORCE_DFU BOARD_REV3 UART_AP_DEBUG_TXD PROX_BI_AP_AOP_INT_PWM_L UART_AP_DEBUG_RXD BOARD_REV1 BOARD_REV2 AP_TO_BT_WAKE PMU_TO_AP_BUF_RINGER_A AP_TO_WLAN_DEVICE_WAKE AP_TO_NFC_DEV_WAKE NC_BB_TO_AP_RESET_ACT_L NC_AP_UART2_RTS_L NC_AP_UART2_CTS_L UART_AP_TO_BT_TXD UART_BT_TO_AP_CTS_L UART_NFC_TO_AP_RXD UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_WLAN_TO_AP_RXD SWI_AP_BI_TIGRIS UART_AP_TO_WLAN_RTS_L UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD UART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 UART_NFC_TO_AP_RXD UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_WLAN_TO_AP_RXD SWI_AP_BI_TIGRIS UART_AP_TO_WLAN_RTS_L UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD UART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 NC NC NC SYM 5 OF 16 TMR32_PWM1 UART0_RXD GPIO_4 REQUEST_DFU2 REQUEST_DFU1 GPIO_41 GPIO_40 GPIO_36 GPIO_38 GPIO_37 GPIO_39 GPIO_35 GPIO_32 GPIO_31 GPIO_34 GPIO_33 GPIO_30 GPIO_27 GPIO_26 GPIO_28 GPIO_29 GPIO_25 GPIO_24 GPIO_23 GPIO_21 GPIO_22 GPIO_20 GPIO_19 GPIO_18 GPIO_15 GPIO_16 GPIO_17 GPIO_11 GPIO_13 GPIO_14 GPIO_10 GPIO_9 GPIO_7 GPIO_8 GPIO_5 GPIO_6 GPIO_1 GPIO_2 GPIO_3 GPIO_0 TMR32_PWM0 TMR32_PWM2 UART2_RTS* UART2_CTS* UART1_TXD UART0_TXD UART1_CTS* UART3_TXD UART3_RXD UART7_TXD UART7_RXD UART4_TXD UART4_RXD UART5_RTXD UART4_RTS* UART6_TXD UART6_RXD UART4_CTS* UART1_RXD UART1_RTS* UART2_RXD UART3_CTS* UART3_RTS* UART2_TXD GPIO_12 NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
Use internal pullup in SOC (AOP side). SOC - AOP BB_SWDIO has pullup in Radio_MLB pages #25756894:South Carbon R2 #24512059: Remove R1300 PU Internal pullup in AOP. Radar 21210869 #25756894:North Carbon R1 (+Mg,P) DOCK_CONNECT can be GPIO, but input only. Radar 21680759 21 R1306 BV3 BU4 CM33 CL37 CG41 CH35 CJ37 CM31 CH29 CG29 CL11 CJ22 CJ20 CK14 CG35 CL16 CL14 CJ16 CJ27 CJ18 CK39 CH41 CM37 CM35 CK37 CG39 CJ39 CL35 CJ24 CM11 CJ33 CG33 CK31 CM12 CK22 CK29 CK24 CK27 CJ31 CK20 CH31 CG31 CJ29 CK18 CK16 CK12 CM29 CM16 U0700 21 R1305 21 R1303 2 1 R1304 I2S_AOP_TO_MAGGIE_L26_MCLK PROX_BI_AP_AOP_INT_PWM_L UART_BB_TO_AOP_RXD I2S_CODEC_XSP_TO_AOP_LRCLK UART_TOUCH_TO_AOP_RXD PP1V8 PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_AOP_TRISTAR_ACTIVE_READY AOP_TO_MESA_BLANKING_EN AOP_TO_PMU_ACTIVE_REQUEST AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_CLK32K SWD_AP_BI_HOMER_SWDIO SWD_AOP_BI_BB_SWDIO HOMER_TO_AOP_WAKE_INT SWD_AP_TO_MANY_SWCLK I2C_AOP_SCL AUDIO_TO_AOP_INT_L AOP_TO_MESA_I2C_ISO_EN SPI_IMU_TO_AOP_MISO PMU_TO_AOP_IRQ_L SPI_AOP_TO_IMU_MOSI I2C_AOP_SDA LCM_TO_MANY_BSYNC ACCEL_GYRO_TO_AOP_INT SPI_AOP_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_AOP_DATARDY AOP_TO_MAGGIE_EN PHOSPHORUS_TO_AOP_INT_L I2S_CODEC_XSP_TO_AOP_BCLK MESA_TO_AOP_FDINT UART_AOP_TO_BB_TXD MAGGIE_TO_AOP_INT UART_AOP_TO_MAGGIE_TXD I2S_AOP_TO_CODEC_XSP_DOUT BOT_ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L TRISTAR_TO_AOP_INT SPI_AOP_TO_PHOSPHORUS_CS_L SWD_AP_BI_NAND_SWDIO AOP_TO_WLAN_CONTEXT_A SPI_AOP_TO_IMU_SCLK PMU_TO_AOP_SLEEP1_READY COMPASS_TO_AOP_INT SPI_AOP_TO_COMPASS_CS_L SPI_AOP_TO_IMU_SCLK_R1 SPI_AOP_TO_IMU_SCLK_R2 UART_AOP_TO_TOUCH_TXD I2S_CODEC_XSP_TO_AOP_DIN I2S_AOP_TO_MAGGIE_L26_MCLK_R AOP_TO_SPKAMP1_ARC_RESET_L AOP_TO_WLAN_CONTEXT_B 49.9 1% ROOM=SOC 01005 1/32W MF CAYMAN-2GB-20NM-DDR-M CSP 1% 1/32W 01005 ROOM=SOC MF 49.9 33.2 1/32W 1% ROOM=SOC MF 01005 1.00K 5% ROOM=SOC MF 01005 1/32W NOSTUFF 36 35 34 33 29 12 53 32 39 52484746 39292518171612119875 207 4037207 38 20 20 20 36 53 36 533617 48 35 34 33 32 48 24 20 24 48 53 39 23 20 24 24 24 36 24 32 38 53 36 36 32 24 24 40 24 17 53 20 15 24 24 24 24 39 32 3534 53 SYM 7 OF 16 CFSB_AOP AWAKE_RESET* AOP_PDM_CLK0 AOP_PDM_DATA0 AWAKE_REQ AOP_DDR_REQ AOP_DDR_RESET* DOCK_ATTENTION DOCK_CONNECT AOP_PDM_DATA1 RT_CLK32768 SWD_TMS2 SWD_TMS3 AOP_SWD_TMS1 AOP_SWD_TMS0 AOP_SWD_TCK_OUT AOP_UART1_TXD AOP_UART0_RXD AOP_UART0_TXD AOP_UART1_RXD AOP_I2C0_SCL AOP_FUNC_13 AOP_FUNC_14 AOP_SPI_SCLK AOP_SPI_MISO AOP_FUNC_15 AOP_SPI_MOSI AOP_I2C0_SDA AOP_FUNC_7 AOP_FUNC_5 AOP_FUNC_4 AOP_FUNC_3 AOP_FUNC_6 AOP_FUNC_11 AOP_FUNC_9 AOP_FUNC_8 AOP_FUNC_10 AOP_FUNC_12 AOP_FUNC_0 AOP_FUNC_1 AOP_FUNC_2 AOP_I2S_MCK AOP_I2S_LRCK AOP_I2S_DOUT AOP_I2S_DIN AOP_I2S_BCLK AOP_UART2_RXD AOP_UART2_TXD 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
1.06V @1.0A MAX 0.9V @tbd A MAX 0.67V @TBDA MAX 0.92V @10.7A MAX 1.03V @12.9A MAX 0.80V @TBD A MAX 0.80V @TBDA MAX 0.80V @4.1A MAX SOC - CPU, GPU & SOC RAILS 1.06V @17.4A MAX 0.625V @tbd A MAX 1.03V @1.44A MAX 0.92V @1.50A MAX 0.67V @TBD A MAX 0.80V @TBD A MAX 2 1 C1414 AW25 J60 BF40 Y60 Y36 Y10 V30 T60 T10 P55 J34 J21 J13 CE45 CE17 CE13 CA47 CA43 CA38 CA34 CA30 CA25 CA21 CA17 CA13 BW10 BT55 BT51 BT47 BT43 BT38 BT34 BT30 BT25 BT21 BT17 BT13 BP58 BP53 BP49 BP45 BP40 BP36 BP32 BP28 BP23 BP19 BP15 BM55 BK53 BK49 BK45 BK40 BK36 BK32 BK28 BF58 BF53 BF49 BF45 BF36 BF32 BF28 BD60 BD6 BD55 BD51 BD47 BD43 BD38 BD34 BD30 BD25 AW60 AW55 AW51 AW47 AW43 AW38 AW34 AW30 AR55 AR51 AR47 AR43 AR38 AR34 AR30 AR25 AN58 AN53 AN49 AN45 AN40 AN36 AN32 AN28 AL6 AJ36 AJ32 AJ28 AF60 AD32 AD28 U0700 AJ47 BK21 AL47 Y53 Y49 Y45 Y40 Y23 Y19 Y15 P51 P47 P43 P38 P34 P30 P25 P21 P17 AF51 AF47 AF43 AJ45 Y28 V55 V51 V38 V34 V25 V13 T53 T40 T36 T15 P13 L53 L49 L45 L40 L36 L32 L28 L23 L19 L15 J51 J47 J43 J38 J30 J25 AJ53 AJ49 AJ40 AF55 AD53 AD49 AD45 AD40 AB55 AB51 AB47 AB43 AB25 AB21 AB17 AB13 BH8 BA19 BA15 AW8 AU19 AR8 AN15 AF8 BK23 AJ10 BK15 BK10 BH21 BH17 BH13 BF23 BF10 BD8 BD21 BA23 BA10 AW21 AW17 AW13 AU15 AU10 AR21 AR17 AR13 AN23 AN19 AN10 AL8 AL21 AJ23 AF17 AF13 AD23 AD19 AD15 AD10 U0700 2 1 C1434 2 1 C1408 2 1 C1401 2 1 C1403 4 3 2 1 C1407 1 PP1411 1 PP1410 1PP1402 1 PP1403 1 PP1409 1 PP1408 4 3 2 1 C1435 4 3 2 1 C1439 1 PP1401 2 1 C1444 21 XW1401 2 1 C1436 4 3 2 1 C1402 4 3 2 1 C1410 4 3 2 1 C1415 4 3 2 1 C1420 4 3 2 1 C1409 4 3 2 1 C1452 4 3 2 1 C1454 4 3 2 1 C1416 2 1 C1466 4 3 2 1 C1425 4 3 2 1 C1429 4 3 2 1 C1456 4 3 2 1 C1457 4 3 2 1 C1421 4 3 2 1 C1426 2 1 C1448 4 3 2 1 C1432 4 3 2 1 C1437 4 3 2 1 C1433 2 1 C1459 2 1 C1458 4 3 2 1 C1465 4 3 2 1 C1460 4 3 2 1 C1461 21 XW1403 2 1 XW1402 2 1 C1449 4 3 2 1 C1442 4 3 2 1 C1438 4 3 2 1 C1440 4 3 2 1 C1418 4 3 2 1 C1423 4 3 2 1 C1428 4 3 2 1 C1431 4 3 2 1 C1427 4 3 2 1 C1430 4 3 2 1 C1404 4 3 2 1 C1411 4 3 2 1 C1417 4 3 2 1 C1422 4 3 2 1 C1406 4 3 2 1 C1413 4 3 2 1 C1419 4 3 2 1 C1424 4 3 2 1 C1405 4 3 2 1 C1412 PP_GPU_VAR PP_CPU_VAR PP_GPU_SRAM_VAR PP_CPU_SRAM_VAR PP_CPU_VAR AP_VDD_GPU_SENSE PP_SOC_VAR PP_GPU_VAR AP_VDD_CPU_SENSE TP_AP_VSS_CPU_SENSE BUCK0_PP_CPU_FB BUCK2_PP_SOC_FB BUCK1_PP_GPU_FB TP_VDD_SOC_SENSE TP_VSS_SENSE 15UF 6.3V X5R 0402-1 ROOM=SOC 20% CSP CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CSP 0402-1 X5R 6.3V 20% 15UF X5R 15UF 20% 6.3V 0402-1 6.3V X5R 0402-1 20% 15UF 6.3V 20% 10UF CERM-X5R ROOM=SOC 0402-9 20% 0402 4V CERM ROOM=SOC 7.5UF ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM SM ROOM=SOC P2MM-NSM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM 0402 4V CER 7.5UF ROOM=SOC 20% 0402 4V CER 20% 7.5UF ROOM=SOC SM P2MM-NSM ROOM=SOC ROOM=SOC CERM-X5R 10UF 0402-9 6.3V 20% SHORT-20L-0.05MM-SM OMIT ROOM=SOC NO_XNET_CONNECTION ROOM=SOC CERM-X5R 10UF 0402-9 6.3V 20% 0402 4V 20% CERM 4.3UF ROOM=SOC ROOM=SOC 4V 20% 1UF CERM 0402 4V 20% 0402 CERM ROOM=SOC 1UF ROOM=SOC 0402 4V 1UF 20% CERM 4.3UF ROOM=SOC 4V 20% CERM 0402 ROOM=SOC 20% 4.3UF 4V CERM 0402 ROOM=SOC 4.3UF 20% CERM 0402 4V ROOM=SOC 7.5UF 0402 CERM 4V 20% ROOM=SOC 0201-1 20% 2.2UF X5R-CERM 6.3V 0.47UF 0402 6.3V 20% CERM ROOM=SOC ROOM=SOC 0402 0.47UF 6.3V 20% CERM 0402 ROOM=SOC 6.3V 20% CERM 0.47UF ROOM=SOC 0.47UF 0402 6.3V 20% CERM 7.5UF ROOM=SOC 4V 0402 20% CERM 7.5UF 20% ROOM=SOC 4V 0402 CERM 6.3V 20% 2.2UF 0201-1 ROOM=SOC X5R-CERM 20% ROOM=SOC 7.5UF 4V CERM 0402 4V ROOM=SOC 20% 0402 CERM 7.5UF 20% 4V ROOM=SOC CERM 0402 7.5UF ROOM=SOC CERM-X5R 6.3V 20% 0402-9 10UF 0402-9 CERM-X5R ROOM=SOC 10UF 6.3V 20% ROOM=SOC 0402 4V 4.3UF 20% CERM 7.5UF ROOM=SOC 4V 20% CERM 0402 ROOM=SOC 7.5UF 0402 4V 20% CERM NO_XNET_CONNECTION OMIT ROOM=SOC SHORT-20L-0.05MM-SM ROOM=SOC OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION ROOM=SOC 0201-1 2.2UF20% 6.3V X5R-CERM 0402 ROOM=SOC 0.47UF 6.3V 20% CERM ROOM=SOC 1UF 0402 4V 20% CERM 4V 0402 7.5UF 20% ROOM=SOC CERM ROOM=SOC 20% 1UF 4V 0402 CERM 20% CERM 0402 4V 1UF ROOM=SOC 0402 4V 20% CERM ROOM=SOC 1UF 1UF 0402 20% CERM ROOM=SOC 4V ROOM=SOC 0402 4V 20% CERM 4.3UF 4V 20% ROOM=SOC 4.3UF CERM 04020402 4V 20% 7.5UF ROOM=SOC CERM CERM 20% 4V 0402 7.5UF ROOM=SOC 7.5UF 0402 4V 20% CERM ROOM=SOC 4.3UF ROOM=SOC 0402 20% 4V CERM 0.47UF 6.3V 20% ROOM=SOC CERM 0402 ROOM=SOC 0402 0.47UF 6.3V 20% CERM ROOM=SOC 0402 6.3V 20% 0.47UF CERM 20% 6.3V CERM ROOM=SOC 0.47UF 0402 ROOM=SOC 0402 4V 4.3UF 20% CERM 0402 4V 4.3UF 20% ROOM=SOC CERM 1814 1814 18 18 1814 20 18 1814 20 18 18 18 SYM 9 OF 16 VDD_SOCVDD_SOC SYM 8 OF 16 VDD_GPU_SRAM VDD_CPU_SRAM VDD_CPU VDD_GPU VDD_GPU_SENSE VSS_SENSE VDD_SOC_SENSE VSS_CPU_SENSE VDD_CPU_SENSE PP PP PP PP PP PP PP |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
1.06 - 1.17V @4mA MAX (CURRENT INCLUDED IN VDD2) 0.797-0.945V @9 mA MAX 1.06-1.17V @0.85A MAX DDR IMPEDANCE CONTROL 0.765-0.840V @60mA MAX TBD-TBDV @1.9A MAX SOC - POWER SUPPLIES 1.06 - 1.17V @1.74A MAX H64 H4 CD65 CG3 P58 J8 BW60 CE8 Y62 V60 T62 P60 K67 E67 AH67 AE67 AD62 AC67 AB60 Y6 V8 T6 P8 L6 K1 E1 AH1 AE1 AC1 AB8 CH67 CD67 BW62 BT60 BP62 BM60 BL67 BK62 BJ67 BH60 BE67 CH1 CD1 CC6 CA8 BW6 BT8 BP6 BM8 BL1 BJ1 BE1 W67 W1 R67 R1 N67 N1 D66 D2 CK66 CK2 CJ66 CJ2 C66 C2 BY67 BY1 BV67 BV1 BR67 BR1 BB65 BB3 AM65 AM3 AA66 H65 K65 K64 H3 K3 K4 CB64 BY64 CB65 BN2 CF4 CD3 CF3 U0700 CE40 CE30 CC36 AW23 Y8 Y58 T8 T58 T32 L60 L58 L10 J62 J55 J23 J17 G36 G32 CC45 CC32 CC28 CC23 CC19 CC15 CC10 BW8 BW58 BW53 BW49 BW45 BW40 BW36 BW32 BW28 BW23 BW19 BW15 BP60 BP10 BM51 BM47 BM43 BM38 BM34 BM30 BM25 BM21 BM17 BM13 BK6 BK58 BH55 BH51 BH47 BH43 BH38 BH34 BH30 BH25 BA58 BA53 BA49 BA45 BA40 BA36 BA32 BA28 AU6 AU58 AU53 AU49 AU45 AU40 AU36 AU32 AU28 AR60 AL60 AL55 AL51 AL43 AL38 AL34 AL30 AL25 AJ58 AF62 AF38 AF34 AF30 AF25 AD58 AB38 AB34 AB30 U0700 2 1 C1512 2 1 C1513 2 1 C1510 2 1 C1501 2 1 C1508 2 1 C1509 2 1 C1507 2 1 C1529 2 1 C1511 2 1 C1515 4 3 2 1 C1527 2 1 C1528 2 1 C1522 21 FL1501 2 1 C1519 2 1 C1504 2 1 C1518 2 1 C1523 2 1 R1505 2 1 R1506 4 3 2 1 C1503 2 1 C1514 2 1 C1506 2 1 R1504 2 1 R1503 2 1 R1502 2 1 R1501 4 3 2 1 C1502 PP0V9_SOC_FIXED PP1V1_SDRAM PP0V8_AOP PP1V1 PP1V1 PP1V1 PP1V1_SDRAM PMU_TO_AOP_SLEEP1_READY PP1V1_DDR_PLL DDR2_RREF DDR3_RREF DDR0_RREF DDR1_RREF DDR0_ZQ DDR3_ZQ SYSTEM_ALIVE CAYMAN-2GB-20NM-DDR-M CSP CSP CAYMAN-2GB-20NM-DDR-M CERM-X5R 10UF ROOM=SOC 0402-9 6.3V 20% CERM-X5R 0402-9 10UF 6.3V 20% ROOM=SOC 20% 6.3V ROOM=SOC 01005-1 0.22UF X5R 20% 6.3V 10UF 0402-9 ROOM=SOC CERM-X5R 20% 6.3V 0.22UF ROOM=SOC 01005-1 X5R 20% 6.3V 01005-1 0.22UF ROOM=SOC X5R ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 6.3V 20% 2.2UF X5R-CERM ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 20% 4V 1UF 0402 ROOM=SOC CERM 10UF 20% 6.3V 0402-9 CERM-X5R ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC 100OHM-25%-0.12A ROOM=SOC 01005 ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC X5R-CERM 2.2UF 20% 6.3V 0201-1 ROOM=SOC 20% 6.3V ROOM=SOC 0.22UF 01005-1 X5R 240 1% ROOM=SOC MF 01005 1/32W ROOM=SOC 240 1% MF 01005 1/32W 20% ROOM=SOC 7.5UF 4V 0402 CERM 2.2UF 20% 6.3V X5R-CERM ROOM=SOC 0201-1 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=SOC ROOM=SOC 1% 240 MF 01005 1/32W 1% 240 ROOM=SOC MF 01005 1/32W 1% ROOM=SOC 240 MF 01005 1/32W 1% ROOM=SOC 240 MF 01005 1/32W 20% 4.3UF ROOM=SOC 4V CERM 0402 18 10 9 8 7 191815 19 18157 18 15 7 18 15 7 191815 2013 212017 SYM 11 OF 16 DDR1_SYS_ALIVE DDR0_SYS_ALIVE DDR3_SYS_ALIVE DDR2_SYS_ALIVE VDD2 VDDIO11_PLL_DDR0 VDDIO11_PLL_DDR3 DDR3_ZQ DDR0_ZQ DDR1_RREF DDR1_RET* DDR0_RREF DDR0_RET* DDR3_RREF DDR2_RREF DDR2_RET* VDDIO11_RET_DDR0 VDDIO11_RET_DDR2 VDDIO11_RET_DDR3 VDDIO11_RET_DDR1 VDDIO11_DDR0 VDDIO11_DDR1 VDDIO11_DDR2 VDDIO11_DDR3 VDDIO11_PLL_DDR1 VDDIO11_PLL_DDR2 DDR3_RET* SYM 10 OF 16 VDD_FIXED VDD_LOW VDD_FIXED_CPU VDD_FIXED =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
VDD12_PLL_SOC:1.14-1.26V @31mA MAX VDD12_PLL_CPU:1.14-1.26V @13mA MAX 1.70-1.95V @134mA MAX SOC - POWER SUPPLIES 1.62-1.98V @10mA MAX 1.62-1.98V @43mA MAX TBD-TBDV @30mA MAX 1.62-1.98V @1mA MAX 1.62-1.98V @1mA MAX 1.62-1.98V @2mA MAX J58 BF38 Y55 Y51 Y47 Y43 Y30 Y25 Y21 Y17 Y13 W65 W3 V62 V6 V58 V53 V40 V36 V32 V28 V15 V10 U67 U1 T55 T51 T38 T34 T25 T13 R66 R64 R4 R2 P62 P6 P53 P49 P45 P40 P36 P32 P28 P23 P19 P15 P10 M67 M66 M65 M64 M4 M3 M2 M1 L8 L62 L55 L51 L47 L43 L38 L34 L30 L25 L21 L17 L13 K66 K2 J6 J53 J49 J45 J40 J32 J28 J19 J15 J10 H67 H66 H2 H1 G8 G51 G47 G43 G38 F67 F66 F65 F64 F4 F3 F2 F1 E9 E7 E66 E65 E64 E61 E59 E57 E54 E5 E4 E37 E3 E29 E27 E26 E22 E20 E2 E18 E14 E12 D9 D7 D67 D65 D63 D59 D56 D52 D5 D46 D41 D4 D35 D31 D3 D29 D27 D26 D24 D22 D20 U0700 D18 D16 D14 D12 D11 D1 CM66 CM63 CM59 CM56 CM52 CM5 CM48 CM44 CM41 CM4 CM39 CM27 CM24 CM2 CM18 CL7 CL67 CL65 CL63 CL59 CL56 CL52 CL48 CL44 CL41 CL4 CL39 CL33 CL3 CL27 CL24 CL18 CL12 CL1 CK64 CK61 CK57 CK54 CK50 CK5 CK46 CK42 CK41 CK4 CJ67 CJ65 CJ64 CJ61 CJ57 CJ54 CJ50 CJ5 CJ46 CJ42 CJ41 CJ4 CJ3 CJ1 CH9 CH7 CH66 CH65 CH64 CH63 CH61 CH59 CH56 CH54 CH52 CH5 CH48 CH46 CH44 CH42 CH4 CH39 CH33 CH3 CH27 CH24 CH2 CH18 CH12 CG67 CG66 CG65 CG64 CG61 CG59 CG56 CG54 CG52 CG5 CG48 CG46 CG44 CG42 CG4 CG27 CG24 CG2 CG11 CG1 CF67 CF66 CF65 CF64 CF2 CF1 CE62 CE6 CE53 CE47 CE15 CE10 CD66 CD64 CD4 CD2 CC8 T30 CL22 CC43 CC38 CC34 CC30 CC21 CC17 CC13 CB67 CB66 CB3 CB1 CA62 CA6 CA58 CA53 CA49 CA45 CA40 CA36 CA32 CA28 CA23 CA19 CA15 U0700 CA10 C7 C64 C61 C57 C54 C52 C4 C35 C33 C29 C26 C22 C18 C14 C11 BY65 CE51 BW51 BW47 BW43 BW38 BW34 BW30 BW25 BW21 BW17 BW13 BV66 BV64 BV4 BV2 BU67 BU1 BT62 BT6 BT58 BT53 BT49 BT45 BT40 BT36 BT32 BT28 BT23 BT19 BT15 BT10 BR65 BR3 BP8 BP55 BP51 BP47 BP43 BP38 BP34 BP30 BP25 BP21 BP17 BP13 BN67 BN1 BM62 BM6 BM58 BM53 BM49 BM45 BM40 BM36 BM32 BM28 BM23 BM19 BM15 BM10 BL66 BL64 BL4 BL2 BK8 BK60 BK55 BK51 BK47 BK43 BK38 BK34 BK30 BK25 AL49 BK17 BK13 BH62 BH6 BH58 BH53 BH49 BH45 BH40 BH36 BH32 BH28 BH23 BH19 BH15 BH10 BG67 BG65 BG3 BG1 BF8 BF55 BF51 BF47 BF43 BF34 BF30 BF25 BF21 BD62 BD58 BD53 BD49 BD45 BD40 BD36 BD32 BD28 BD23 BD10 BC67 BC66 BC2 BC1 BA8 BA60 BA55 BA51 BA47 BA43 BA38 BA34 BA30 BA21 BA17 BA13 B67 B65 B52 B46 B41 B35 B3 B1 U0700 AY67 AY64 AY4 AY1 AW62 AW6 AW58 AW53 AW49 AW45 AW40 AW36 AW32 AW28 CH50 AW19 AW15 AW10 AV66 AV64 AV4 AV2 AV1 AU8 AU60 AU55 AU51 AU47 AU43 AU38 AU34 AU30 AU25 AU21 AU17 AU13 AT65 AT3 AT1 AR62 AR6 AR58 AR53 AR49 AR45 AR40 AR36 AR32 AR28 AR19 AR15 AR10 AP67 AP64 AP4 AP1 AN8 AN60 AN55 AN51 AN47 AN43 AN38 AN34 AN30 AN25 AN21 AN17 AN13 AL62 AL58 AL53 AL45 AL40 AL36 AL32 AL28 AL23 AK67 AK66 AK2 AK1 AJ8 AJ55 AJ51 AL10 AJ43 AJ38 AJ34 AJ30 AJ25 AJ21 AG67 AG65 AG3 AG1 AF6 AF58 AF53 AF49 AF45 AF40 AF36 AF32 AF28 AF23 AF19 AF15 AF10 AD8 AD60 AD55 AD51 AD47 AD43 AD34 AD30 AD25 AD21 AD17 AD13 AC66 AC64 AC4 AC2 AB62 AB6 AB58 AB53 AB49 AB45 AB40 AB36 AB32 AB28 AB23 AB19 AB15 AB10 AA67 AA1 A9 A66 A63 A59 A56 A52 A5 A35 A31 A27 A24 A20 A2 A16 A12 U0700 CE43 CE38 CE36 CE34 CE32 CE28 CE23 CE19 BF6 BA6 AN6 AJ6 AD6 G53 G49 G45 G40 BF62 BA62 AU62 AN62 AJ62 BF60 CE21 J36 AF21 BK19 AR23 CC40 CG9 G34 CG7 Y38 Y34 AD38 AD36 Y32 BA25 T28 AU23 CK65 CK3 C65 C3 BB67 BB1 AM67 AM1 U0700 2 1 C1606 2 1 C1604 21 R1602 2 1 C1615 2 1 C1609 2 1 C1613 2 1 C1601 2 1 C1603 2 1 C1611 21 R1601 2 1 C1605 2 1 C1614 2 1 C1610 2 1 C1607 2 1 C1612 2 1 C1608 2 1 C1602 PP1V2_SOC PP1V8_SDRAM PP1V8_SDRAM PP1V2_REF PP1V2_PLL_CPU PP1V2_PLL_SOC PP1V8 CAYMAN-2GB-20NM-DDR-M CSPCSP CAYMAN-2GB-20NM-DDR-MCAYMAN-2GB-20NM-DDR-M CSP CAYMAN-2GB-20NM-DDR-M CSP CSP CAYMAN-2GB-20NM-DDR-M CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND 20% 01005 0.1UF 6.3V X5R-CERM ROOM=SOC ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC MF 01005 1/32W 0.00 0% 6.3V 2.2UF 0201-1 20% X5R-CERM ROOM=SOC ROOM=SOC 20% 01005 6.3V X5R-CERM 0.1UF ROOM=SOC 0.1UF 6.3V 20% X5R-CERM 01005 20% 0.1UF 6.3V X5R-CERM 01005 ROOM=SOCROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 01005 1/32W ROOM=SOC MF 0.00 0% ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 6.3V 20% 2.2UF ROOM=SOC X5R-CERM 0201-1 ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 10UF 6.3V 20% 0402-9 CERM-X5R ROOM=SOC 19 10 8 53 52 48 47 41 40 37 36 32 21 20 18 16 53 52 48 47 41 40 37 36 32 21 20 18 16 19 52 48 47 46 39 29 25 18 17 13 12 11 9 8 7 5 SYM 16 OF 16 VSSVSS SYM 15 OF 16 VSSVSS SYM 14 OF 16 VSS VSS SYM 13 OF 16 VSS VSS SYM 12 OF 16 VDD18_EFUSE1 VDD18_EFUSE2 VDD1 VDDIO18_GRP2 VDDIO18_GRP1 VDDIO18_GRP10 VDD18_TSADC1 VDD18_TSADC0 VDD18_TSADC2 VDD18_LPOSC VDD12_GPU_UVD VDD12_CPU_UVD VDD18_TSADC5 VDD18_TSADC4 VDD18_FMON VDD18_TSADC3 VDD12_PLL_SOC VDD12_SOC_UVD VDD12_PLL_CPU VDDIO18_GRP4 VDDIO18_GRP3 =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
315mA MAX PROBE POINTS 1007mA MAX 1230mA MAX (1us peak power) #24543147:10uF for 32GB #26326159:10uF for C1719 2 1 C1713 D6 B2 P6 P4 P2 OE10 OE0 OC10 OC0 L7 L5 L3 G7 B6 B4 E5 R5 OF10 OF0 OB10 OB0 A5 R7 R3 J9 J1 F2 A7 A3 OG10 OG0 OD10 OD0 OA10 OA0 D8 F8 M2 K2 P8 N7 N5 N3 M8 K8 H8 H6 G9 K6 K4 M6 J7 J5 M4 G5 C5 F4 G1 B8 C7 F6 E7 E3 H2 J3 G3 H4 D4 D2 C3 U1701 2 1 C1704 2 1 C1748 2 1 C1736 2 1 C1739 2 1 C1741 2 1 C1754 2 1 C1753 2 1 C1752 2 1 C1735 2 1 C1734 2 1 C1732 2 1 C1708 2 1 C1711 2 1 C1717 2 1 C1747 2 1 C1745 2 1 C1743 2 1 C1723 2 1 C1712 2 1 C1730 2 1 C1703 2 1 C1706 2 1 C1709 2 1 C1714 2 1 C1720 2 1 C1728 2 1 C1737 2 1 C1738 2 1 C1740 2 1 C1742 2 1 C1744 2 1 C1746 2 1 C1731 2 1 C1749 2 1 C1750 2 1 C1751 2 1 C1729 2 1 C1733 1 PP1701 1 PP1702 21 R1707 21 R1702 2 1 C1724 2 1 C1727 2 1 C1722 2 1 C1726 2 1 C1725 2 1 R1701 2 1 C1721 2 1 C1719 2 1 C1716 2 1 C1705 2 1 C1702 2 1 C1701 2 1 C1710 21 R1703 2 1 C1718 2 1 C1715 2 1 C1707 2 1 R1704 PP1V8 NAND_AGND PP0V9_NAND PP1V8 90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N NAND_AGND SWD_AP_NAND_SWCLK_R PP1V8_NAND_AVDD SWD_AP_BI_NAND_SWDIO_R PCIE_AP_TO_NAND_RESET_L AP_TO_NAND_FW_STRAP PMU_TO_NAND_LOW_BATT_BOOT_L NAND_ZQ AP_TO_NAND_RESET_L SWD_AP_BI_NAND_SWDIO SWD_AP_TO_MANY_SWCLK SYSTEM_ALIVE 90_PCIE_AP_TO_NAND_TXD_N 90_PCIE_AP_TO_NAND_TXD_P PCIE_NAND_RESREF PCIE_NAND_BI_AP_CLKREQ_L 90_PCIE_AP_TO_NAND_REFCLK_N 90_PCIE_AP_TO_NAND_REFCLK_P AP_TO_NAND_SYS_CLK NAND_VREF 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_NAND_TO_AP_RXD_N PP3V0_NAND 0402-1 15UF OMIT ROOM=NAND X5R 6.3V 20% VLGA THGBX6T1T82LFXF ROOM=NAND CRITICAL BOMOPTION=OMIT_TABLE X5R 0402-1 ROOM=NAND 15UF 6.3V 20% 6.3V OMIT 15UF 20% ROOM=NAND 0402-1 X5R 100PF 01005 NP0-C0G 16V 5% ROOM=NAND 1.0UF ROOM=NAND X5R 0201-1 6.3V 20% 0201-1 6.3V 1.0UF X5R ROOM=NAND 20% 0201-1 6.3V 20% ROOM=NAND 1.0UF X5R 20% 6.3V X5R 0201-1 ROOM=NAND 1.0UF 20% 6.3V X5R 1.0UF ROOM=NAND 0201-1 C0G-CERM ROOM=NAND 01005 220PF 10V 5% ROOM=NAND 01005 100PF 16V 5% NP0-C0G ROOM=NAND 01005 NP0-C0G 16V 39PF 5% 5% 01005 220PF C0G-CERM 10V ROOM=NAND 16V 5% 01005 22PF CERM ROOM=NAND 16V 5% 01005 NP0-C0G 68PF ROOM=NAND 1.0UF X5R 0201-1 ROOM=NAND 6.3V 20% 1.0UF X5R ROOM=NAND 6.3V 20% 0201-1 1.0UF X5R 20% ROOM=NAND 0201-1 6.3V 16V 5% 01005 NP0-C0G 39PF ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND X5R 15UF ROOM=NAND 0402-1 6.3V 20% 5% 01005 10V 220PF ROOM=NAND C0G-CERM 16V 5% 01005 22PF CERM ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND 5% 01005 10V 220PF C0G-CERM ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND 16V 5% 01005 NP0-C0G ROOM=NAND 68PF 0201-1 1.0UF ROOM=NAND 6.3V 20% X5R 1.0UF X5R 0201-1 ROOM=NAND 6.3V 20% 1.0UF X5R ROOM=NAND 6.3V 20% 0201-1 1.0UF X5R 6.3V 20% ROOM=NAND 0201-1 1.0UF X5R ROOM=NAND 20% 6.3V 0201-1 0201-1 ROOM=NAND 20% 1.0UF 6.3V X5R 01005 NP0-C0G 16V 5% ROOM=NAND 68PF 20% 6.3V X5R 0201-1 ROOM=NAND 1.0UF 1.0UF 20% 6.3V X5R 0201-1 ROOM=NAND 0201-1 X5R 20% 6.3V 1.0UF ROOM=NAND X5R ROOM=NAND 0402-1 15UF 6.3V 20% OMIT 15UF 20% 6.3V X5R ROOM=NAND 0402-1 SM P2MM-NSM ROOM=NAND SM P2MM-NSM ROOM=NAND 01005 MF ROOM=NAND 1/32W 0% 0.00 01005 MF1/32W ROOM=NAND 0% 0.00 01005 ROOM=NAND 10% 6.3V 0.01UF X5R 0402-1 ROOM=NAND 15UF 20% 6.3V X5RX5R 15UF 0402-1 ROOM=NAND 6.3V 20% ROOM=NAND 0201-1 X5R-CERM 6.3V 20% 2.2UF 01005 ROOM=NAND X5R 10% 0.01UF 6.3V 01005 1/32W MF 0.5% 34.8 ROOM=NAND OMIT 20% 6.3V X5R 15UF 0402-1 ROOM=NAND 0402-9 10UF 6.3V CERM-X5R 20% ROOM=NANDROOM=NAND X5R 15UF 20% OMIT 0402-1 6.3V 6.3V 0402-1 X5R ROOM=NAND 15UF 20% 0402-1 X5R 15UF 6.3V 20% ROOM=NAND 0402-1 15UF X5R ROOM=NAND 6.3V 20% 01005 0.1UF ROOM=NAND 6.3V 20% X5R-CERM 01005 1/32W MF ROOM=NAND 1% 24.9 ROOM=NAND 01005 22PF CERM 16V 5% ROOM=NAND 01005 220PF C0G-CERM 10V 5% X5R 15UF 0402-1 ROOM=NAND 6.3V 20% 01005 1/32W MF 3.01K ROOM=NAND 1% 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 17 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 17 8 17 8 17 8 12 20 7 13 533613 212015 8 8 8 17 8 17 8 11 8 8 VER-1 VDD VDD PCI_AVDD_H PCIE_TX1_M PCIE_TX1_P PCIE_CLKREQ* TRST* RESET* PCIE_RX1_M PCIE_TX0_P PCIE_TX0_M VSS VSS PCIE_RX0_P PCIE_RX0_M PCI_RESREF PCIE_RX1_P ZQ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSA EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7 EXT_NCE EXT_NRE EXT_NWE EXT_RNB EXT_CLE EXT_ALE VDD VDD VDD VDD VDD AVDD1 VCC VCC VCC VCC VCC VDDIO VCC VDDIO VDDIO VDDIO VDDIO VDDIO VREF PCI_VDD2 PCI_VDD1 PCIE_REFCLK_M PCIE_REFCLK_P CLK_IN PCI_AVDD_CLK2 PCI_AVDD_CLK1 NC NC NC NC PP PP NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
BUCK9 BUCK2BUCK0 4.7AMAX13.4AMAX BUCK8 13.4AMAX BUCK3BUCK4 4.7AMAX 0.67V/0.80V 0.67V - 0.92V 1.7AMAX (pendingvendorqual) BUCK5 3.2AMAX 1.5AMAX BUCK6 1.5AMAX 0.75AMAX 1.5AMAX 0.80V - 1.06V 0.80V - 0.92V BUCK7 BUCK1 1.03V for overdrive only 0.625V - 1.06V Voltages per Cayman Power Spec, Sec. 2.2, rev 0.9.2, #24557869 D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor 2 1 L1803 2 1 L1801 2 1 L1804 21 L1802 2 1 L1805 2 1 L1818 21 L1811 2 1 C1840 2 1 XW1807 2 1 C1802 2 1 C1874 2 1 C1875 2 1 C1876 2 1 C1877 2 1 C1864 2 1 C1801 H13 H14 R13 M8 F11 H6 N7 L19 L18 F19 F18 V6 U6 K19 K18 D1 C1 B1 M3 M2 M1 T3 T2 H3 H2 H1 D13 C13 B13 A13 D17 C17 B17 A17 D9 C9 B9 A9 D5 C5 B5 A5 V5 U5 V2 U2 M19 M18 P16 G19 G18 H15 V7 U7 R8 J19 J18 H16 A2 D2 C2 B2 F5 V4 U4 L3 L2 L1 N3 N2 N1 K5 V3 U3 U1 T1 R1 R3 R2 R7 J3 J2 J1 G3 G2 G1 J5 D12 C12 B12 A12 D14 C14 B14 A14 D16 C16 B16 A16 A18 D18 C18 B18 F12 D10 C10 B10 A10 D8 C8 B8 A8 D6 C6 B6 A6 A4 D4 C4 B4 F10 U1801 21 XW1805 21 L1817 2 1 C1830 2 1 C1836 2 1 C1861 21 L1816 21 XW1804 21 L1814 2 1 L1815 2 1 C1816 2 1 C1823 2 1 C1822 2 1 C1829 2 1 C1835 2 1 C1860 2 1 C1841 2 1 C1871 21 L1813 2 1 L1812 21 L1810 2 1 C1814 2 1 C1821 2 1 C1828 2 1 C1834 2 1 C1866 2 1 C1873 2 1 C1813 2 1 C1820 2 1 C1827 2 1 C1833 2 1 C1839 2 1 C1865 2 1 XW18062 1 C1870 2 1 C1862 2 1 C1863 2 1 C1869 2 1 C1868 2 1 C1867 2 1 C1872 2 1 C1811 21 L1809 21 L1807 2 1 L1808 21 L1806 2 1 C1856 2 1 C1849 2 1 C1859 2 1 C1855 2 1 C1852 2 1 C1848 2 1 C1858 2 1 C1854 2 1 C1851 2 1 C1847 2 1 C1810 2 1 C1809 2 1 C1808 2 1 C1807 2 1 C1806 2 1 C1805 2 1 C1804 2 1 C1803 2 1 C1845 2 1 C1843 2 1 C1838 2 1 C1832 2 1 C1826 2 1 C1819 2 1 C1844 2 1 C1842 2 1 C1837 2 1 C1831 2 1 C1825 2 1 C1857 2 1 XW1801 2 1 XW1803 2 1 XW1802 2 1 C1853 2 1 C1850 2 1 C1846 2 1 C1818 BUCK5_LX0PP0V9_SOC_FIXED BUCK5_FB PP2V8_UT_AF_VAR PP_GPU_SRAM_VAR PP_CPU_SRAM_VAR PP1V1 PP1V8_MAGGIE_IMU PP1V8_TOUCH BUCK2_PP_SOC_FB BUCK1_PP_GPU_FB BUCK0_PP_CPU_FB PP1V8 BUCK9_LX0 BUCK7_LX0 BUCK6_LX0 BUCK9_FB BUCK6_FB BUCK4_FB BUCK4_LX1 BUCK4_LX0 BUCK3_LX0 BUCK3_FB BUCK2_LX1 BUCK2_LX0 BUCK1_LX3 BUCK1_LX2 BUCK1_LX1 BUCK1_LX0 BUCK0_LX3 BUCK0_LX1 BUCK0_LX0 PP_SOC_VAR PP1V8_SDRAM PP1V1_SDRAM PP_GPU_VAR BUCK0_LX2 PP_CPU_VAR VDD_MAIN_SNS BUCK8_LX0 BUCK8_FB PP_VDD_MAIN PP1V25_BUCK BUCK7_FB ROOM=PMU 1UH-20%-2.1A-0.12OHM CRITICAL PIQA20121T-SM CRITICAL ROOM=PMU PIQA20121T-SM 1UH-20%-2.1A-0.12OHM 0603 1.0UH-20%-1.5A-0.161OHM CRITICAL MCFE2016T-SM 1.0UH-20%-2.25A-0.086OHM CRITICAL ROOM=PMU PIQA20121T-SM 0.47UH-20%-3.8A-0.048OHM NO_XNET_CONNECTION=1 CRITICAL ROOM=PMU CRITICALPINA20121T-SM 0.22UH-20%-6.7A-0.023OHM NO_XNET_CONNECTION=1 ROOM=PMU 0402-1ROOM=PMU 15UF X5R 6.3V 20% OMIT ROOM=SOC SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=PMU 0402-1 X5R 6.3V 20% 15UF ROOM=PMU 0402-1 X5R 6.3V 20% 15UF 20% 6.3V 2.2UF ROOM=PMU 0201-1 X5R-CERM 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 ROOM=PMU 0402-1 15UF X5R 6.3V 20% 0402-1ROOM=PMU 15UF X5R 6.3V 20% D2333A1 WLCSP ROOM=PMU OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=SOC PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 ROOM=PMU 0402-1 X5R 6.3V 20% 15UF ROOM=PMU 0402-1 X5R 6.3V 20% 15UF 5% 10V C0G-CERM ROOM=PMU 01005 220PF PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM ROOM=PMU CRITICAL PIQA20121T-SM 0.47UH-20%-3.8A-0.048OHM CRITICALNO_XNET_CONNECTION=1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 01005 220PF C0G-CERM 10V 5% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 01005 220PF C0G-CERM 10V 5% PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 0.22UH-20%-6.7A-0.023OHM PINA20121T-SM CRITICAL ROOM=PMUNO_XNET_CONNECTION=1 PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 20% 6.3V X5R 15UF ROOM=PMU 0402-1 5% 10V C0G-CERM 220PF ROOM=PMU 01005 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 5% 10V C0G-CERM 220PF ROOM=PMU 01005 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 5% 10V C0G-CERM 220PF ROOM=PMU 01005 5% 10V C0G-CERM 220PF ROOM=PMU 01005 5% 10V C0G-CERM 220PF ROOM=PMU 01005 01005 ROOM=PMU 220PF C0G-CERM 10V 5% 220PF C0G-CERM 10V 5% 01005 ROOM=PMU NO_XNET_CONNECTION=1 PINA20121T-SM CRITICAL 0.22UH-20%-6.7A-0.023OHM ROOM=PMU PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 CRITICAL ROOM=PMU 1.0UH-3.6A-0.06OHM NO_XNET_CONNECTION=1 MEKK2016T-SM NO_XNET_CONNECTION=1 PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM CRITICAL ROOM=PMU 1.0UH-20%-3.6A-0.060OHM PIQA20161T-SM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 2.2UF20% 6.3V X5R-CERM ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% X5R-CERM 6.3V 2.2UF 0201-1 ROOM=PMU 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 2.2UF ROOM=PMU 0201-1 X5R-CERM 6.3V 20% 6.3V X5R-CERM 2.2UF 20% 0201-1 ROOM=PMU X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 20% 15UF 6.3V 0402-1 ROOM=PMU X5R 6.3V 20% 15UF ROOM=PMU 0402-1 6.3V 15UF 20% 0402-1ROOM=PMU X5R 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 0402-1ROOM=PMU 6.3V 20% 15UF X5R 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 20% X5R 15UF ROOM=PMU 6.3V 0402-1 20% X5R 15UF ROOM=PMU 6.3V 0402-1 20% 6.3V X5R 15UF ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 20% 6.3V CERM-X5R 10UF ROOM=PMU 0402-9 OMIT ROOM=SOC SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 NO_XNET_CONNECTION=1ROOM=SOC SHORT-20L-0.05MM-SM OMIT 20% 6.3V CERM-X5R 10UF ROOM=PMU 0402-9 ROOM=PMU 20% 6.3V CERM-X5R 10UF 0402-9 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 15 10 9 8 7 25 14 14 157 3624 47463938 14 14 14 52484746 39292517161312119875 14 53524847 4140373632212016 1915 14 14 19 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 10 9 4 19 SYM 2 OF 4 BAT/USBBUCKINPUT SWITCHOUTPUTS VDD_BUCK6 VBUCK4_SW BUCK3_SW1 BUCK3_SW2 BUCK3_SW3 BUCK4_SW1 BUCK3_FB VBUCK3_SW BUCK3_LX0 BUCK4_LX0 BUCK4_LX1 BUCK4_FB BUCK2_FB BUCK2_LX0 BUCK1_FB BUCK1_LX3 BUCK2_LX1 BUCK0_LX3 BUCK1_LX1 BUCK0_FB BUCK1_LX2 BUCK1_LX0 BUCK0_LX1 BUCK0_LX0 BUCK0_LX2 VDD_BUCK1_01 VDD_MAIN VDD_MAIN_SW VDD_BUCK0_23 VDD_BUCK2 VDD_BUCK1_23 VDD_BUCK4 VDD_BUCK3 VDD_BUCK5 VDD_BUCK7 VDD_BUCK8 VDD_BUCK9 BUCK5_LX0 BUCK5_FB BUCK6_LX0 BUCK6_FB BUCK7_LX0 BUCK7_FB BUCK8_LX0 BUCK8_FB BUCK9_LX0 BUCK9_FB VDD_MAIN_E VDD_MAIN_N VDD_BUCK0_01 VDD_MAIN_W VDD_MAIN_W VDD_MAIN_SNS 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
#24989262 #24989262:OTP-AO LDO17 default off,50mA Iout_max VPUMP: 10nF min. @4.6V VBUF_1V2 LDO17 LDO3 LDO6 LDO9 +/-4.5% LDO10 LDO11 LDO8 1.2-2.475V 1.2-2.475V LDO1 (Ca) LDO2 (Ca) 1.2-2.475V 2.4-3.675V 2.4-3.675V 0.7-1.2V 2.5-3.6V(tbc) 1.2-2.475V LDO7 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA LDO14 LDO13 LDO12 LDO7 LDO15 0.7-1.4V 1.2-2.475V 250mA LDO19 LDO16 LDO18 LDO4 LDO5 LDO1 LDO_RTC 250mA 1150mA0.7-1.2V LDO11 (Cb) LDO# +/-75mV LDO6 (Cb) LDO9 (Cb) LDO5 (F) LDO# LDO3 (Ca) LDO4 (D) ADJ.RANGE, LOW 1.2-2.475V ADJ.RANGE, HI 2.4-3.675V 2.4-3.675V 2.4-3.675V +/-2.5% +/-30mV +/-25mV 250mA 1000mA MAX.CURRENT +/-2.5% 50mA +/-1.4% 60mA+/-2.5% 50mA ACCURACY 50mA +/-2.5% (500/100mA in bypass) LDO15 (Ca) LDO14 (Gb) LDO13 (Cb) LDO12 (E) +/-30mV +/-2.5% 2.4-3.675V 2.4-3.675V 400mA 250mA 250mA 10mA 50mA 250mA 400mA 10mA 50mA 400mA 10mA MAX.CURRENT 2.4-3.675V 2.4-3.675V ADJ.RANGE, HI +/-3.0% +/-30mV +/-30mV ACCURACY +/-5% +/-2.5% +/-3.0% +/-2.0% +/-3.0% +/-5.0% 2.4-3.675V ADJ.RANGE, LOW 1.2-2.475V 1.2-2.475V 1.8V 0.7-1.4V 1.2-2.475V 1.2-2.475V 1.2V 0.7-1.4V 2.5V LDO17 (Ca) BUF_1V2 LDO19 (Gb) LDO16 (Cb) LDO18 (Gb) ADELYN LDO SPECS U15 = PMU XTAL GND 1.2-2.475V 2.4-3.675V LDO8 (Cb) LDO10 (Ga) LDO2 NewforADELYN 2 1 R1901 2 1 C1923 2 1 C1930 2 1 C1904 2 1 C1905 2 1 C1915 2 1 C1912 2 1 C1919 2 1 C1909 2 1 C1902 2 1 XW1902 V8 V19 V12 V1 U8 T13 U15 T8 T7 T6 T4 T15 T5 R4 R17 P15 P4 P3 P2 P1 N4 N19 N18 N17 M4 M17 L8 L4 L17 K8 K4 K3 K2 K17 K1 J8 J4 J17 H4 H19 H18 H17 G4 G17 F4 F3 F2 F17 F1 E9 E8 E7 E6 E5 E4 E3 E2 E19 E18 E17 E16 E15 E14 E13 E12 E11 E10 E1 D7 D3 D19 D15 D11 C7 C3 C19 C15 C11 B7 B3 B19 B15 B11 A7 P14 A3 P13 A19 H8 A15 A11 A1 U1801 R5 G15 U18 U17 T11 T18 U12 U16 U14 P7 U13 T9 P17 R18 P18 T17 T14 U10 U9 T16 T10 U11 T12 U19 V18 V17 T19 V16 V13 R9 R19 P19 R14 V10 V9 R16 R10 V11 R12 R15 P8J6 U1801 2 1 C1935 2 1 C1933 2 1 C1932 2 1 XW1901 2 1 C1922 2 1 C1913 2 1 C1908 2 1 C1925 2 1 C1926 2 1 C1927 2 1 C1921 2 1 C1918 2 1 C1916 2 1 C1901 2 1 C1907 2 1 C1911 2 1 C1910 2 1 C1914 PP2V9_NH_AVDD PP0V9_NAND PP0V8_AOP PP3V3_USB PP1V8_HAWKING PP1V2_REF PMU_VPUMP PP_VDD_MAIN PMU_VSS_RTC PMU_PRE_UVLO_DET VDD_MAIN_SNS PP_VDD_MAIN PP1V1_SDRAM PP1V25_BUCK PP_VDD_MAIN PP_VDD_BOOST PP3V0_TRISTAR_ANT_PROX PP1V2_NH_NV_DVDD PP1V2_UT_DVDD PP_LDO17 PP1V8_ALWAYS PP3V0_MESA PP1V2_SOC PP1V8_MESA PP_ACC_VAR PP3V0_NAND PP3V0_ALS_APS_CONVOY PP1V8_VA 0.00 0201 NOSTUFFMF 1% 1/20W 20% 2.2UF 6.3V X5R-CERM 0201-1 ROOM=PMU 0201-1 ROOM=PMU X5R-CERM 20% 2.2UF 6.3V 2.2UF 6.3V 20% X5R-CERM 0201-1 ROOM=PMU 5% 16V 33PF 01005 ROOM=PMU NP0-C0G-CERM 6.3V X5R ROOM=PMU 15UF20% 0402-1 X5R ROOM=PMU 20% 6.3V 0402-1 15UF 20% 0201-1 X5R-CERM 2.2UF ROOM=PMU 6.3V 220PF C0G-CERM 10V 5% 01005 ROOM=PMU 47NF X5R-CERM ROOM=PMU 6.3V 01005 20% ROOM=PMU SHORT-20L-0.05MM-SM OMIT WLCSP D2333A1 WLCSP D2333A1 ROOM=PMU 20% 6.3V X5R 0201-1 1.0UF 20% 6.3V X5R 0201-1 1.0UF ROOM=PMU 0.22UF 20% 6.3V X5R ROOM=PMU 01005-1 NO_XNET_CONNECTION ROOM=PMU OMIT SHORT-20L-0.05MM-SM 2.2UF ROOM=PMU 0201-1 X5R-CERM 6.3V 20% 20% 6.3V ROOM=PMU X5R-CERM 0201-1 2.2UF 20% X5R-CERM ROOM=PMU 0201-1 6.3V 2.2UF X5R 0201-1 20% 6.3V ROOM=PMU 1.0UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 2.2UF 20% 6.3V X5R-CERM ROOM=PMU 2.2UF X5R-CERM ROOM=PMU 20% 6.3V 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 ROOM=PMU 6.3V ROOM=PMU 20% 0201-1 X5R-CERM 2.2UF X5R 20% 6.3V 0402-1 ROOM=PMU 15UF 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=PMUROOM=PMU 20% 6.3V 0402-9 10UF CERM-X5RCERM-X5R 0402-9 6.3V 10UF 20% ROOM=PMU 6.3V CERM-X5R 20% 0402-9 ROOM=PMU 10UF 29 17 15 7 44 16 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 20 20 18 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 18 15 18 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 38 37 32 25 23 53414029 29 25 2120 38 16108 4838 464027 5217 2925 35343332 NC NC NC SYM 4 OF 4 VSS VSS SYM 1 OF 4 LDO LDOINPUT VDD_LDO4 VPP_OTP VLDO2 VLDO8 VDD_LDO19 VDD_LDO19 TP_DET VDD_LDO10 VDD_LDO11_13 VDD_LDO14 VDD_LDO7_8 VDD_LDO16 VDD_LDO18 VDD_LDO6_BYP VDD_LDO9 VDD_LDO5 VDD_LDO1 VDD_LDO2_15 VPUMP VBUF_1V2 VLDO19 VLDO18 VLDO14 VLDO13 VLDO17 VLDO16 VLDO15 VLDO12 VLDO9_FB VLDO10 VLDO11 VLDO9 VBYPASS VLDO7 VLDO6 VLDO4 VLDO3 VDD_LDO3_17 VLDO5_1 VLDO5_0 VLDO1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
GPIO21 = I2C SCL is for Chestnut dark current mitigation RS = requires sequencer Sequencer controllable #24511807: Stuff for Carrier TBD Button for two-finger reset: 20711463 and 21196187 RS RS RS BUTTON PULL-UP RESISTORS NOTE:VDROOP_DET filtering is now inside Adelyn RADIO PA NTC AP NTC FOREHEAD NTC NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC Reserved for MENU key on dev board REAR CAMERA NTC Active high with int 200k PD HIGH=FORCE PWM MODE D101/D111 ONLY: TCXO_RF Supplies 32K #24825674: Add R2020 to meet timing spec #26169957: R2020 to 100ohm (D10x only) I2C1_AP_SCL47 I2C0_AP_SCL 37 47 I2C1_AP_SDA47 21 R2020 2 1 C2013 2 1 C2001 1 PP2002 1 PP2001 1 PP2003 21 R2009 2 1 R2012 2 1 R2007 2 1 R2008 2 1 R2015 21 R2000 V15 V14 J7 F7 G7 F6 G6 N9 M7 L6 L5 P6 M6 R6 G16 H5 M9 R11 L11 P12 M13 N6 N13 P11 P10 P9 M5 N8 N10 M10 N5 P5 G5 K6 L7 L9 K10 K9 J10 J9 H10 H9 G8 F8 G9 F9 G10 G11 H12 G12 G13 F13 F14 G14 F15 F16 L13 L10 K11 J11 H11 N11 M11 N12 M12 H7 N14 N15 N16 M14 M15 M16 L16 L15 L14 K12 K13 J13 K14 K15 K16 J16 J15 J14 K7 L12 J12 U1801 21 Y2001 2 1 R2005 2 1 R2006 2 1 C2006 2 1 R2011 21 XW2001 2 1 C2002 2 1 C2004 2 1 C2003 2 1 C2011 2 1 R2010 2 1 R2004 2 1 R2003 2 1 R2002 2 1C2007 2 1 C2008 2 1 C2009 2 1C2010 2 1 R2001 21 XW2005 21 XW2004 21 XW2002 21 XW2003 FOREHEAD_NTC PMU_ADC_IN SPI_PMU_TO_PMGR_MISO PMU_TO_AOP_CLK32K PMU_VSS_RTC NC_GNSS_TO_PMU_HOST_WAKE PMU_TO_WLAN_REG_ON PMU_TO_BB_USB_VBUS_DETECT PMU_TO_NFC_EN PMU_TO_AP_FORCE_DFUPMU_TO_AP_FORCE_DFU_R PMUGPIO_TO_WLAN_CLK32K AP_TO_PMU_SOCHOT_L RADIO_PA_NTC REAR_CAMERA_NTC PMU_IREF CHESTNUT_TO_PMU_ADCMUX PMU_PRE_UVLO_DET BUTTON_POWER_KEY_L BUTTON_RINGER_A PP1V2_MAGGIE PMU_AMUX_AY BBPMU_TO_PMU_AMUX2 PMUGPIO_TO_WLAN_CLK32K AP_TO_PMU_TEST_CLKOUT TRISTAR_TO_PMU_USB_BRICK_ID AP_NTC PMU_TO_CODEC_DIGLDO_PULLDN PMU_TO_BT_REG_ON NC_PMU_TO_GNSS_EN PMU_TO_NAND_LOW_BATT_BOOT_L NFC_TO_PMU_HOST_WAKE PMU_TO_BBPMU_RESET_R_L BBPMU_TO_PMU_AMUX1 FOREHEAD_NTC_RETURN PMU_XTAL2 PMU_TO_BOOST_EN BT_TO_PMU_HOST_WAKE PMU_AMUX_BY PMU_TO_ACC_BUCK_SW_EN PMU_VREF PMU_TO_AP_PRE_UVLO_L PMU_TO_AP_THROTTLE_GPU_L PMU_TO_AP_THROTTLE_CPU_L AP_VDD_GPU_SENSE AP_VDD_CPU_SENSE TRISTAR_TO_PMU_USB_BRICK_ID PMU_ADC_IN BUTTON_VOL_DOWN_L PMU_TO_AP_BUF_RINGER_A PMU_TO_AP_BUF_POWER_KEY_L PMU_TO_AP_BUF_VOL_DOWN_L TIGRIS_TO_PMU_INT_L BB_TO_PMU_PCIE_HOST_WAKE_L WLAN_TO_PMU_HOST_WAKE PMU_TO_HOMER_RESET_L PMU_TO_LCM_PANICBPMU_VDD_RTC LCM_TO_CHESTNUT_PWR_EN SPI_PMGR_TO_PMU_MOSI SPI_PMGR_TO_PMU_SCLK PP1V8_SDRAM PP1V8_SDRAM AP_NTC_RETURN PMU_TO_BBPMU_RESET_L BUTTON_POWER_KEY_L RCAM_NTC_RETURN PP1V8_ALWAYS PP1V8_SDRAM BUTTON_RINGER_A BUTTON_VOL_DOWN_L PP1V8_ALWAYS PA_NTC_RETURN LCM_TO_MANY_BSYNC AP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AOP_TO_PMU_ACTIVE_REQUEST PMU_TO_SYSTEM_COLD_RESET_L BUTTON_VOL_UP_L AP_TO_PMU_AMUX_OUT ACC_BUCK_TO_PMU_AMUX BBPMU_TO_PMU_AMUX3 PMU_XTAL1 PMU_TCAL AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_SLEEP1_READY PMU_TO_AOP_TRISTAR_ACTIVE_READY SYSTEM_ALIVE PMU_TO_AOP_IRQ_L I2C_PMU_SDA_R SHORT-20L-0.05MM-SM OMIT ROOM=SOC 100 01005 MF 1/32W 5% ROOM=PMU ROOM=PMU X5R 10% 01005 PLACE_NEAR=U1801:2mm 10V 1000PF X5R ROOM=PMU 01005 1000PF 10V 10% ROOM=SOC SHORT-20L-0.05MM-SM OMIT SM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM ROOM=PMU P2MM-NSM 0% 1/32W 01005 MF 0.00 NO_XNET_CONNECTION 10K MF 1/32W 5% ROOM=PMU 01005 MF 01005 5% ROOM=PMU 1/32W 220K NOSTUFF 100K ROOM=PMU MF 1/32W 01005 5% NOSTUFF 220K ROOM=PMU MF 1/32W 01005 5% NOSTUFF 1.00K MF 01005 5% 1/32W ROOM=PMU D2333A1WLCSP 32.768KHZ-20PPM-12.5PF CRITICAL ROOM=PMU 1.60X1.00-SM ROOM=PMU 100K MF 1/32W 01005 5% 100K MF 1/32W 01005 5% ROOM=PMU OMIT ROOM=SOC SHORT-20L-0.05MM-SM 0201 6.3V 20% ROOM=PMU X5R 0.22UF ROOM=PMU 1% 200K 201 1/20W MF OMIT ROOM=PMU SHORT-20L-0.05MM-SM 0.22UF 6.3V 0201 X5R ROOM=PMU 20% 22PF 16V 5% 01005 CERM ROOM=PMU 22PF 16V 5% CERM 01005 ROOM=PMU ROOM=PMU NP0-C0G 01005 100PF 5% 16V NP0-C0G 5% ROOM=PMU 01005 16V 100PF 3.92K 0201 0.1% ROOM=PMU 1/20W MF ROOM=PMU 10KOHM-1% 01005 ROOM=PMU 01005 10KOHM-1% ROOM=PMU 10KOHM-1% 01005 5% 01005 ROOM=PMU NP0-C0G 100PF 16V ROOM=PMU NP0-C0G 01005 100PF 5% 16V 5% ROOM=PMU 01005 NP0-C0G 16V 100PF 10KOHM-1% ROOM=PMU 01005 ROOM=SOC SHORT-20L-0.05MM-SM OMIT 20 11 13 19 53 53 53 124 5320 11 37 19 4420 4420 36 4 53 53 20 7 40 20 32 53 17 53 53 23 53 4 27 11 11 12 14 14 4020 20 4420 12 12 12 21 53 53 36 39 39 37 11 11 53 52 48 47 41 40 37 36 32 21 20 18 16 535248 47414037363221201816 53 44 20 212019 535248 47414037363221201816 44 20 44 20 212019 53 39 23 13 7 40 13 13 7 44 12 7 27 53 13 15 13 40 37 13 7 21 17 15 13 NC NC NC PP PP PP NC NC NC NC NC NC NC SYM 3 OF 4 REFS RESETS COMPARATORADC PMGR BUTTONS AMUX GPIO NTCXTAL GPIO3 SHDN RESET* RESET_IN3 RESET_IN2 SLEEP1_REQ CRASH* OUT_32K SLEEP_32K ACTIVE_RDY SYS_ALIVE FORCE_SYNC ACTIVE_REQ SLEEP1_RDY IRQ* SDA SCLK SCL MISO MOSI AMUX_A1 AMUX_A0 AMUX_A3 AMUX_A2 AMUX_A4 AMUX_A5 AMUX_B1 AMUX_B0 AMUX_B2 AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B7 AMUX_B3 AMUX_BY TDEV3 TDEV2 TDEV1 XTAL1 TCAL TDEV5 TDEV4 XTAL2 VDD_RTC RESET_IN1 GPIO21 GPIO17 GPIO18 GPIO19 GPIO20 GPIO16 GPIO15 GPIO14 GPIO12 GPIO13 GPIO11 GPIO10 GPIO6 GPIO8 GPIO7 GPIO9 GPIO4 GPIO5 GPIO2 GPIO1 BUTTON2 BUTTON3 BUTTON4 BUTTONO1 BUTTONO2 BUTTONO3 BUTTON1 AMUX_A6 AMUX_A7 AMUX_AY ADC_IN IBAT VBAT BRICK_ID VDROOP0_DET VDROOP1_DET PRE_UVLO_DET VDROOP0* VDROOP1* PRE_UVLO* IREF VREF 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
See Charger C2113 on Pg46 #25112685,Remove Snub TO TRINITY F4: 100 kOhm pullup to VLDO (regulated output voltage) TIGRIS CHARGER #24558610: Change to 100ohm I2C1_AP_SDA47 I2C1_AP_SCL47 21 R2103 2 1 3 Q2102 2 1 C2103 2 1 R2105 2 1C2102 C2 D2 B2 A2 F4 F1 E5 C5 D5 B5 A5 F3 E3 G3 E4 F5 C3 D3 B3 A3 G4 G2 G1 F2 C4 D4 B4 A4 G5 E1 C1 D1 B1 A1 E2 U2101 2 1 C2114 2 1 R2102 21 C2105 B3 B2 B1 A3 A2 A1 C3 C2 C1 Q2101 21 R2104 2 1 C2104 2 1 C2118 2 1 C2117 2 1 C2115 2 1 C2112 2 1 C2111 2 1 C2109 2 1 C2108 2 1 C2110 2 1C2106 2 1 R2101 2 1 C2101 PP5V0_USB PP1V8_ALWAYS PP1V8_SDRAM PP_BATT_VCC TIGRIS_TO_BATTERY_SWI TIGRIS_TO_BATTERY_SWI_1V8 SWI_AP_BI_TIGRIS TIGRIS_BOOT TIGRIS_LDO TIGRIS_VBUS_DETECT TIGRIS_TO_PMU_INT_R_L VBATT_SENSE SYSTEM_ALIVE TRISTAR_TO_TIGRIS_VBUS_OFF TIGRIS_TO_PMU_INT_L TIGRIS_ACTIVE_DIODE USB_VBUS_DETECT TIGRIS_BUCK_LX TIGRIS_PMID PP_VDD_MAIN ROOM=CHARGER 4.2UF 0402-1 10% 16V X5R-CERM 01005 10% 16V CER-X7R 330PF ROOM=CHARGER 01005 10% 16V CER-X7R 330PF ROOM=CHARGER 330PF 16V 10% ROOM=CHARGER 01005 CER-X7R 5% 1/32W 01005 ROOM=CHARGER 100K MF 0402-1 10% 16V X5R-CERM 4.2UF ROOM=CHARGER 100 ROOM=CHARGER 5% 01005 1/32W MF DFN RV3C002UN ROOM=CHARGER 10% 330PF CER-X7R 16V 01005 40.2K MF 1/32W 01005 1% ROOM=CHARGER C0G-CERM 01005 5% 10V 220PFSN2400AB0 ROOM=CHARGER CRITICAL WCSP 10UF ROOM=CHARGER 20% 6.3V CERM-X5R 0402-9 100K 01005 ROOM=CHARGER MF 1/32W 5% NOSTUFF X5R ROOM=CHARGER NO_XNET_CONNECTION 10% 16V 0.047UF 0201 BGA CSD68827W ROOM=CHARGER CRITICAL ROOM=CHARGER 1% MF 1/32W 30.1K 01005 C0G-CERM 01005 5% 10V 220PF ROOM=CHARGER 0201-1 20% 6.3V X5R-CERM ROOM=CHARGER 2.2UF 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=CHARGER 2.2UF 6.3V 0201-1 X5R-CERM ROOM=CHARGER 20% ROOM=CHARGER 16V 10% 330PF CER-X7R 01005 ROOM=CHARGER 4.2UF 10% 16V X5R-CERM 0402-1 40 4 20 19 53 52 48 47 41 40 37 36 32 20 18 16 224 22 12 22 20 17 15 40 20 7 28 53524641403937353433 31282726252319181094 S D SYM_VER_1 G PMID VBUS PGND PGND PGND PGND HDQ_HOST HDQ_GAUGE ACT_DIODE BAT_SNS BAT BAT BAT BAT BUCK_SW BUCK_SW BUCK_SW BUCK_SW BOOT LDO TEST VBUS_DET INT VBUS_OVP_OFF SCL SDA SYS_ALIVE VBUS VBUS VBUS VBUS VDD_MAIN VDD_MAIN VDD_MAIN VDD_MAIN G S D 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
516S00172 (matches d10 mlb MCO rev 27)THIS ONE ON MLB ---> BATTERY CONNECTOR 2 1 C2204 21 XW2201 12 11 109 87 6 5 4 3 2 1 J2201 21 R2201 2 1 C2201 2 1 C2203 2 1 C2202 VBATT_SENSE TIGRIS_TO_BATTERY_SWI PP_BATT_VCC TIGRIS_BATTERY_SWI_CONN ROOM=BATTERY_B2B 100PF NP0-C0G 16V 5% 01005 ROOM=BATTERY_B2B 56PF NP0-C0G-CERM 25V 5% 01005 C0G-CERM 220PF 10V 5% ROOM=BATTERY_B2B 01005 SHORT-20L-0.05MM-SM ROOM=BATTERY_B2B NO_XNET_CONNECTION=1 PLACE_NEAR=J2201:2mm RCPT-BATT-SHORT ROOM=BATTERY_B2B CRITICAL ALLOW_APPLE_PREFIX F-ST-SM ROOM=BATTERY_B2B 5% MF 1/32W 100 01005 ROOM=BATTERY_B2B 56PF NP0-C0G-CERM 25V 5% 01005 21 21 214 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
Control details from Radar 19634006 HIGH=FORCE PWM MODE BOOST When VDD_MAIN < 3.4, boosts to 3.4 Otherwise tracks VDD_MAIN I2C0_AP_SDA47 I2C0_AP_SCL47 B1 B4 B3 A4 A3 C4 C3 C2 B2 D4 D3 D2 A2 A1 C1 D1 U2301 2 1 C2309 21 L2301 2 1 R2301 2 1 C2307 2 1 C2308 2 1 C2306 2 1 C2301 2 1 C2302 2 1 C2304 2 1 C2303 PP_VDD_MAIN LCM_TO_MANY_BSYNC SYS_BOOST_LX PP_VDD_BOOST PMU_TO_BOOST_EN 01005 5% 10V C0G-CERM 220PF ROOM=BOOST 4.7UF X5R-CERM1 6.3V 20% 402 ROOM=BOOST 15UF X5R 6.3V 20% 0402-1 ROOM=BOOST 15UF X5R 6.3V 20% 0402-1 ROOM=BOOST DSBGA ROOM=BOOST SN61280D ROOM=BOOST 0402-9 20% 6.3V 10UF CERM-X5R 0.47UH-20%-4.2A-0.048OHM ROOM=BOOST PIUA20121T-SM 511K MF 01005 1/32W 1% 15UF X5R 6.3V 20% 0402-1 ROOM=BOOST 15UF X5R 6.3V 20% ROOM=BOOST 0402-1 15UF X5R 6.3V 20% 0402-1 ROOM=BOOST 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 21 19 18 10 9 4 53 39 20 13 533837322519 20 VOUT AGND PGND SCL BYP* EN SW VOUT SW GPIO VIN VIN SDA VSEL 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
#25782019:Add 0ohm MAGNESIUM - COMPASS BOSCH: Internal PU 114K INT PU 114K INT PD1.09M INT PU XW2404 to balance Via/Cu at INT pin CARBON - ACCEL & GYRO INVENSENSE, MPU-6800: C2403=0.1UF BOMOPTION: CARBON_1 #25765850:Update Carbon APN BOSCH (APN:338S00188): nostuff C2420/C2421/C2422/C2423 and R2403 PU #24593845, #25691124 #25740540:PP for South Carbon MOSI PHOSPHORUS 21 R2404 1 16 2 4 3 14 7 15 13 12 11 10 9 8 6 5 U2404 1 16 2 4 3 14 7 15 13 12 11 10 9 8 6 5 U2401 1 PP2440 21 XW2404 2 1 C2442 2 1 C2418 2 1 C2448 2 1 C2445 2 1 C2449 2 1 C2443 2 1 R2441 2 1 C2419 21 R2422 2 1 R2403 6 8 53 4 7 1 2 U2403 2 1 C2421 2 1 C2422 2 1 C2408 2 1 C2415 2 1 C2420 2 1 C2423 2 1 R2401 C1 C2 C4 C3 B4 A4 A3 D2 D1 B3 B1 D4 A1 A2 U2402 2 1 C2401 1PP2404 2 1 C2403 1 PP2403 1 PP2402 1 PP2401 2 1 C2405 2 1 C2414 2 1 C2413 2 1 C2402 SPI_IMU_TO_AOP_MISO PP1V8_MAGGIE_IMUPP1V8_MAGGIE_IMU_FILT SPI_AOP_TO_IMU_SCLK_R2 PP1V8_MAGGIE_IMU PP1V8_MAGGIE_IMU_R SPI_AOP_TO_ACCEL_GYRO_CS_L GYRO_CHARGE_PUMP ACCEL_GYRO_TO_AOP_INT PP1V8_MAGGIE_IMU_R PP1V8_MAGGIE_IMU SPI_AOP_TO_IMU_SCLK_R1 PP1V8_MAGGIE_IMU_FILT BOT_ACCEL_GYRO_TO_XW_INT BOT_ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_IMU_MOSI SPI_IMU_TO_AOP_MISO ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_IMU_MOSI SPI_IMU_TO_AOP_MISO SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L BOT_GYRO_CHARGE_PUMP SPI_AOP_TO_IMU_SCLK_R1 SPI_AOP_TO_PHOSPHORUS_CS_L SPI_AOP_TO_IMU_SCLK_R1 COMPASS_TO_AOP_INT SPI_AOP_TO_IMU_MOSI SPI_IMU_TO_AOP_MISO PP1V8_MAGGIE_IMU_FILT SPI_AOP_TO_IMU_MOSI PHOSPHORUS_TO_AOP_INT_L PP1V8_MAGGIE_IMU_FILT SPI_AOP_TO_COMPASS_CS_L PP1V8_MAGGIE_IMU ROOM=BOT_CARBON 0% 1/32W 01005 MF 0.00 CRITICAL MPU-6900-21 ROOM=BOT_CARBON LGA LGA CRITICAL ROOM=CARBON MPU-6900-21 BOMOPTION=CARBON_1 ROOM=HOMER P2MM-NSM SM SHORT-20L-0.05MM-SM ROOM=BOT_CARBON NO_XNET_CONNECTION=1 OMIT 0.1UF 6.3V X5R-CERM 01005 20% ROOM=BOT_CARBON 6.3V 0201-1 20% X5R-CERM 2.2UF ROOM=CARBON 6.3V 20% 2.2UF ROOM=BOT_CARBON 0201-1 X5R-CERM X5R-CERM 01005 6.3V 20% 0.1UF ROOM=BOT_CARBON ROOM=BOT_CARBON NOSTUFF 5PF +/-0.1PF 16V NP0-C0G 01005 0.1UF ROOM=BOT_CARBON 6.3V 0201 10% X6S 100K 5% 1/32W ROOM=SOC 01005 MF +/-0.1PF 5PF 01005 16V NP0-C0G ROOM=CARBON BOMOPTION=CARBON_1 ROOM=PHOSPHORUS 01005 0% 1/32W 0.00 MF 1/32W ROOM=SOC 01005 100K 5% MF NOSTUFF BMP284AA LGA NP0-C0G-CERM ROOM=PHOSPHORUS 20PF 5% 16V 01005 NOSTUFF NOSTUFF 20PF NP0-C0G-CERM 16V ROOM=PHOSPHORUS 01005 5% X5R-CERM 6.3V 0201-1 2.2UF 20% ROOM=MAGNESIUM 20% 6.3V 01005 0.1UF BOMOPTION=CARBON_1 ROOM=CARBON X5R-CERM 01005 4PF +/-0.1PF 16V ROOM=PHOSPHORUS NOSTUFF NP0-C0G ROOM=PHOSPHORUS 5.6PF NP0-C0G-CERM 16V 01005 +/-0.1PF NOSTUFF 100K 5% 1/32W MF 01005 ROOM=SOC BOMOPTION=CARBON_1 CRITICAL ROOM=MAGNESIUM LGA HSCDTD601A-19A 20% 0.1UF 6.3V X5R-CERM 01005 ROOM=MAGNESIUM ROOM=MAGNESIUM P2MM-NSM SM 0.1UF 10% 0201 X6S 6.3V ROOM=CARBON BOMOPTION=CARBON_1 SM P2MM-NSM ROOM=MAGNESIUM ROOM=MAGNESIUM SM P2MM-NSM SM ROOM=MAGNESIUM P2MM-NSM ROOM=PHOSPHORUS 6.3V 01005 0.1UF 20% X5R-CERM 2.2UF 6.3V ROOM=PHOSPHORUS 0201-1 20% X5R-CERM 6.3V 0.1UF 20% ROOM=PHOSPHORUS 01005 X5R-CERM X5R-CERM 20% 6.3V BOMOPTION=CARBON_1 01005 0.1UF ROOM=CARBON 2413 36241824 13 36 24 18 24 13 13 24 36 24 18 2413 24 13 2413 2413 13 2413 2413 13 24 13 13 2413 13 2413 2413 24 24 13 13 24 13 36 24 18 VDD VDDIO SPC SDI SDO DRDY GND GND GND GND GND GND CS FSYNC INT REGOUT VDD VDDIO SPC SDI SDO DRDY GND GND GND GND GND GND CS FSYNC INT REGOUT PP NC CS* SDI SDO VDD VDDIO IRQ GND SCK VPP RSV RSV RSV VDD VSS SDO SCL/SCK SDA/SDI CSB TRG/SE DRDY RSV RST* PP PP PP PP NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
IO FILTERS THIS PAGE UNIQUE TO SMALL FORM FACTOR Desense for Wifi frequencies See Page46: D10x C2531/C2507 are 2.2UF VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC. NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM UTAH POWER TI:353S00015 ST:353S00889 LPDP FILTERS AC return path for LPDP which is referenced to GND and VDD_MAIN #24543254: Need to Scrub C2520 Value VOLTAGE=2.925V LPDP_UT_BI_AP_AUX10 90_LPDP_UT_TO_AP_D0_P10 90_LPDP_UT_TO_AP_D0_N10 90_LPDP_UT_TO_AP_D1_P10 90_LPDP_UT_TO_AP_D1_N10 2 1 C2502 2 1 C2527 21C2523 21C2524 21C2525 21C2526 21 C2530 2 1 C2522 2 1 C2528 2 1 C2529 2 1 C2519 2 1 C2505 2 1 C2521 2 1 C2520 21 FL2502 2 1 C2518 A2A1 B1 B2 U2501 21 FL2506 21 FL2500 21 FL2505 2 1 C2501 2 1 C2509 2 1 C2511 2 1 C2506 2 1 C2508 2 1 C2510 2 1 C2503 2 1 C2504 21 FL2503 2 1 C2512 21 FL2501 21 FL2504 2 1 C2515 2 1 C2514 2 1 C2513 AP_TO_UT_SHUTDOWN_CONN_L UT_AND_NV_TO_STROBE_DRIVER_STROBE UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN 90_LPDP_UT_TO_AP_D1_CONN_P PP2V9_UT_AVDD_CONN PP2V8_UT_AF_VAR PP_VDD_BOOST PP1V8 90_LPDP_UT_TO_AP_D0_CONN_P 90_LPDP_UT_TO_AP_D0_CONN_N 90_LPDP_UT_TO_AP_D1_CONN_N PP1V2_UT_VDD_CONN PP3V0_UT_SVDD_CONN AP_TO_UT_CLK_CONN LPDP_UT_BI_AP_AUX_CONN 90_LPDP_UT_TO_AP_D0_N MAKE_BASE=TRUE MAKE_BASE=TRUE 90_LPDP_UT_TO_AP_D1_N MAKE_BASE=TRUE 90_LPDP_UT_TO_AP_D1_P LPDP_UT_BI_AP_AUX MAKE_BASE=TRUE PP2V8_UT_AF_VAR_CONN AP_TO_UT_SHUTDOWN_L PP1V8_UT_CONN PP1V2_UT_DVDD PP3V0_ALS_APS_CONVOY 90_LPDP_UT_TO_AP_D0_P MAKE_BASE=TRUE PP_VDD_MAIN AP_TO_UT_CLK 01005 5% 220PF 10V ROOM=RCAM_B2B C0G-CERM DSBGA ROOM=RCAM_B2B LP5907UVX2.925-S 33-OHM-25%-1500MA 0201ROOM=RCAM_B2B 0201 ROOM=RCAM_B2B 33-OHM-25%-1500MA 0201 ROOM=RCAM_B2B 33-OHM-25%-1500MA 220PF C0G-CERM 10V ROOM=RCAM_B2B 01005 5% 220PF 5% 10V C0G-CERM 01005 ROOM=RCAM_B2B 0201-1 ROOM=RCAM_B2B X5R 1.0UF 6.3V 20% ROOM=RCAM_B2B C0G-CERM 220PF 10V 01005 5% ROOM=RCAM_B2B 6.3V 20% X5R-CERM 0201-1 2.2UF 6.3V 20% 0201-1 X5R-CERM 2.2UF ROOM=RCAM_B2B 220PF C0G-CERM ROOM=RCAM_B2B 01005 10V 5% ROOM=RCAM_B2B 6.3V 20% X5R-CERM 2.2UF 0201-1 C0G-CERM 10V 01005 5% 220PF ROOM=RCAM_B2B C0G-CERM 01005 220PF 5% 10V ROOM=RCAM_B2B 150OHM-25%-200MA-0.7DCR 01005 ROOM=RCAM_B2B 10% CER-X5R 0.22UF 6.3V 01005 ROOM=RCAM_B2B 6.3V X5R-CERM 20% ROOM=RCAM_B2B 0201-1 2.2UF ROOM=RCAM_B2B 01005 NP0-C0G 100PF 5% NOSTUFF 16V 01005 0.1UF 6.3V20% X5R-CERM ROOM=RCAM_B2B 01005 0.1UF 6.3V20% X5R-CERM ROOM=RCAM_B2B X5R-CERM ROOM=RCAM_B2B 20% 01005 6.3V 0.1UF 6.3V 01005 0.1UF 20%ROOM=RCAM_B2B X5R-CERM 6.3V 01005 20% 0.1UF X5R-CERM ROOM=RCAM_B2B 150OHM-25%-200MA-0.7DCR 01005 ROOM=RCAM_B2B 01005 NP0-C0G-CERM ROOM=RCAM_B2B 5% 16V 33PF NP0-C0G-CERM 16V 5% 01005 ROOM=RCAM_B2B 33PF 5% 01005 33PF 16V ROOM=RCAM_B2B NP0-C0G-CERM 0201-1 6.3V 20% X5R-CERM ROOM=RCAM_B2B 2.2UF 6.3V 2.2UF 20% X5R-CERM 0201-1 ROOM=RCAM_B2B ROOM=RCAM_B2B 01005 5% 16V 15PF NP0-C0G-CERM 150OHM-25%-200MA-0.7DCR ROOM=RCAM_B2B 01005 5% 01005 25V ROOM=RCAM_B2B NP0-C0G-CERM 56PF 33-OHM-25%-1500MA 0201 ROOM=RCAM_B2B 56PF 01005 25V 5% NP0-C0G-CERM ROOM=RCAM_B2B 45 26 45 45 4645 18 53 38 37 32 23 19 52 48 47 46 39 29 18 17 16 13 12 11 9 8 7 5 45 45 45 45 45 45 45 45 9 45 19 29 19 53 52 46 41 40 39 37 35 34 33 31 28 27 26 23 21 19 18 10 9 4 9 GND VOUT VEN VIN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
AC return path for plane edge termination, which occurs near the Strobe modules. STROBE DRIVERS INSIDE NEO SIP MODULE D10/sip_neo I2C_ISP_NV_SDA46 I2C_ISP_UT_SCL48 I2C_ISP_NV_SCL46 I2C_ISP_UT_SDA48 E19 E18 E17 E16 E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D19 D18 D17 D16 D15 D14 D5 D4 D1 C20 C19 C18 C17 C16 C15 C14 C7 C6 C5 C4 C3 C2 C1 B20 B17 B16 B7 B6 B5 B4 B3 B2 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 D20 E20 B1 A1 M2600D13 B19 B18 C13 D12 D11 C11 B15 B14 B12 B11 C12 B13 M2600 D3 D2 B8 C8 B9 B10 C10 D7 D6 D10 D9 C9 D8 M2600 2 1 C2617 2 1 C2618 2 1C2614 2 1C2613 2 1C2611 2 1C2612 2 1C2609 2 1C2610 PP_VDD_MAIN PP_VDD_MAIN PP_VDD_MAIN PP_STROBE_DRIVER2_WARM_LED PP_STROBE_DRIVER1_WARM_LED PP_STROBE_DRIVER1_COOL_LED PP_STROBE_DRIVER2_COOL_LED STROBE_MODULE_NTC UT_AND_NV_TO_STROBE_DRIVER_STROBE BB_TO_STROBE_DRIVER_GSM_BURST_IND AP_TO_STROBE_DRIVER_HWEN SIP NEO NEO SIP CRITICAL NEO ROOM=STROBE SIP 01005 10V 220PF ROOM=STROBE2 5% C0G-CERM 01005 5% 10V C0G-CERM 220PF ROOM=STROBE2 01005 5% 10V C0G-CERM 220PF ROOM=STROBE 01005 5% 10V C0G-CERM 220PF ROOM=STROBE 0402-9 20% 6.3V CERM-X5R 10UF ROOM=STROBE2 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=STROBE2 20% CERM-X5R ROOM=STROBE 0402-9 6.3V 10UF 0402-9 6.3V CERM-X5R 10UF ROOM=STROBE 20% 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 4544 4544 4544 4544 44 25 53 37 9 SYM 3 OF 3 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND2 GND1 GND2S GND1S GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 2 OF 3 LED1 LED1 LED2 LED2 NTC VDD VDD VDD HWEN0 SDA2 GSM0 STB0 SCL2 SYM 1 OF 3 HWEN1 LED1 LED2 LED1 LED2 NTC VDD VDD VDD GSM1 SDA1 STB1 SCL1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
From PMU GPIO14 #25761020:Add Bypass 0ohm ACCESSORY BUCK #26434500: Divider to all 200kohm,0.1% #25741319: Change to 4UF #25172498 #25987909: To Resistor Divider To Tristar on Pg40 From PMU LDO6 PMU_AMUX_B3 FOR NOW From AP GPIO1 #25370332: For EMC #25919133: C2707 on P46 FET Changes per #25687842 4/12/2016 VOLTAGE=1.9V A1A2 B2 B1 U2710 6 15 2 4 3 U2701 2 1 R2702 2 1 R2704 2 1 R2703 2 1 R2706 2 1 C2710 2 1 R2710 21 R2711 2 1 C2708 2 1 XW2707 21 XW2700 A2 B2 A1 B1 Q2701 A2 B2 A1 B1 Q2700 2 1 C2700 2 1 R2700 21 L2700 2 1 C2701 A1 A2 B1 C2 C1 B2 U2700 2 1 R2705 2 1 C2703 2 1 C2705 2 1 C2704 2 1C2706 2 1 C2702 2 1 R2701 K A D2700 ACC_BUCK_FB ACC_BUCK_SW ACC_BUCK_TO_PMU_AMUX ACC_BUCK_FB AP_TO_ACC_BUCK_VSEL PP_ACC_BUCK_VAR ACT_DIODE_TO_COMP_NEG PP_ACC_VAR ACT_DIODE_TO_COMP_POS ACT_DIODE_TO_COMP_OUT PP_ACC_VAR PP_VDD_MAIN PMU_TO_ACC_BUCK_SW_EN ACC_BUCK_EN PP_VDD_MAIN_ACC_BUCK_VIN 10K 01005 MF 5% 1/32W ROOM=ACC_BUCK 220PF C0G-CERM 10V 5% ROOM=ACC_BUCK 01005 0201-1 X5R-CERM ROOM=PMU 2.2UF 20% 6.3V ROOM=PMU 0201-1 X5R-CERM 2.2UF 20% 6.3V 0.22UF 01005 6.3V ROOM=ACC_BUCK CER-X5R 10% 10UF 20% ROOM=ACC_BUCK 0402-9 6.3V CERM-X5R 100K 5% 01005 MF 1/32W ROOM=ACC_BUCK SOD962-2 ROOM=ACC_BUCK PMEG3002ESF ROOM=ACC_BUCK WLCSP-COMBO FPF1204UCX SCY992200A ROOM=ACC_BUCK UDFN 0.1% ROOM=ACC_BUCK TF 01005 1/32W 200K 200K 0.1% 1/32W TF 01005 ROOM=ACC_BUCK 200K 0.1% 1/32W TF 01005 ROOM=ACC_BUCK 200K 0.1% 1/32W TF 01005 ROOM=ACC_BUCK 6.3V 10% 0.22UF 01005 CER-X5R ROOM=ACC_BUCK ROOM=ACC_BUCK 01005 1% MF 100K 1/32W NOSTUFF 1% 0.00 1/20W MF 0201 ROOM=ACC_BUCK 6.3V 4UF ROOM=TRISTAR 0201 CER-X5R 20% OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=TRISTAR ACT_DIODE_TO_COMP_SENSE PLACE_NEAR=Q2700:2mm SHORT-20L-0.05MM-SM OMIT ROOM=ACC_BUCK NO_XNET_CONNECTION=1 PMCM4401VPE WLCSP ROOM=TRISTAR PMCM4401VPE ROOM=TRISTAR WLCSP 6.3V 20% ROOM=ACC_BUCK 0201-1 X5R-CERM 2.2UF 5% 100K ROOM=ACC_BUCK 01005 MF 1/32W 0.47UH-20%-2.52A-0.08OHM PIGA1608-SM ROOM=ACC_BUCK CRITICAL X5R-CERM 20% 01005 6.3V 0.1UF ROOM=ACC_BUCK FAN53612-1.5V-1.9V WLCSP 27 20 27 12 46 40 27 19 46402719 53 52 46 41 40 39 37 35 34 33 31 28 26 25 23 21 19 18 10 9 4 20 NC VIN GND VOUT ON VEE VCC VOUT NC IN- IN+ D G S D G S 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THIS PAGE UNIQUE TO SMALL FORM FACTOR P5 P4 P3 P2 P1 N7 N4 N1 M7 M6 M5 M4 M3 M2 M1 L7 L4 L1 K7 K6 K5 K4 K3 K2 K1 J7 J5 J4 J3 J1 H7 H5 H4 H3 H1 G7 G5 G4 G3 G1 F7 F5 F4 F3 F1 E7 E6 E5 E4 E3 E2 E1 D7 D4 D1 C7 C6 C5 C4 C3 C2 C1 B7 B4 B1 A7 A6 A5 A4 A3 P6 P7 A2 A1 M2800 J2 H2 G2 F2 D3 D2 B3 B2 J6 H6 G6 F6 M2800 D6 D5 B6 B5 M2800 L3 L2 N3 N2 M2800 L6 L5 N6 N5 M2800 PP_VDD_MAIN PP_VDD_MAIN BL_SW1_LX SPEAKERAMP1_LX BL_SW2_LX TIGRIS_BUCK_LX ARC1_LX SIP TRINITY SIP TRINITYTRINITY SIP TRINITY SIP SIP TRINITY 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 37 34 37 21 35 SYM 5 OF 5 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND1 GND1S GND2 GND2S GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 4 OF 5 BL1 BL2 BL1 BL2 BL1 BL1 VDD VDD VDD VDD VDD VDD SYM 1 OF 5 VDD VDD TIG TIG SYM 2 OF 5 VDD VDD ARC ARC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
CONVOY I/O SPEAKER2 #24511567: Remove C2918 PROX, ALS, & CONVOY POWER MIC3 NEW HAMPSHIRE POWER NEW HAMPSHIRE I/O #25170697: R2915 to 240ohm/C2921 to 220pF PROX/ALS I/O #25657495: Update FL2905 to 100ohm 21 R2905 2 1 C2926 2 1 C2935 2 1 C2934 2 1 C2933 2 1C2931 2 1 C2932 2 1 C2916 21 R2915 21 FL2903 21 R2904 21 R2903 2 1 C2917 21 FL2910 2 1 C2927 2 1 C2908 2 1 FL2909 21 FL2904 21 FL2914 2 1 DZ2907 2 1 DZ2906 2 1 DZ2905 21 FL2906 2 1 C2906 2 1 C2905 2 1 C2909 2 1 C2904 2 1 C2903 2 1 C2902 21 FL2902 21 FL2908 2 1 C2911 21 FL2907 2 1 C2910 2 1 C2901 2 1 C2914 2 1 C2915 21 FL2901 2 1 C2924 2 1 FL2911 21 FL2913 2 1 C2921 PROX_BI_AP_AOP_INT_PWM_L_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N SPEAKER_TO_SPEAKERAMP2_VSENSE_P PP1V2_NH_DVDD_CONN FRONTMIC3_TO_CODEC_AIN4_P FRONTMIC3_TO_CODEC_AIN4_N PP_CODEC_TO_FRONTMIC3_BIAS ALS_TO_AP_INT_L ALS_TO_AP_INT_CONN_L PDM_CONVOY_TO_ADARE_DATA PP1V2_NH_NV_DVDD PP1V8_NH_IO_CONN AP_TO_NH_CLK_CONN PP1V8 PP2V9_NH_AVDD PDM_CONVOY_TO_ADARE_DATA_CONN PP3V0_TRISTAR_ANT_PROX PP3V0_ALS_APS_CONVOY FRONTMIC3_TO_CODEC_AIN4_CONN_P FRONTMIC3_TO_CODEC_AIN4_CONN_N PP_CODEC_TO_FRONTMIC3_BIAS_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_N PP3V0_PROX_CONN PP3V0_ALS_CONVOY_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P SPEAKERAMP2_TO_SPEAKER_OUT_NEG SPEAKERAMP2_TO_SPEAKER_OUT_POS PROX_BI_AP_AOP_INT_PWM_L AP_TO_NH_CLK AP_TO_NH_SHUTDOWN_CONN_LAP_TO_NH_SHUTDOWN_L PP2V9_NH_AVDD_CONN PDM_ADARE_TO_CONVOY_CLK_CONNPDM_ADARE_TO_CONVOY_CLK 1/32W 5% 100 01005 MF ROOM=FOREHEAD 5% 01005 NO_XNET_CONNECTION=1 ROOM=FOREHEAD C0G-CERM 10V 220PF 5% NO_XNET_CONNECTION=1 220PF 10V C0G-CERM 01005 ROOM=FOREHEAD C0G-CERM 220PF 5% 10V NO_XNET_CONNECTION=1 01005 ROOM=FOREHEAD C0G-CERM ROOM=FOREHEAD 5% 10V 01005 220PF NO_XNET_CONNECTION=1 C0G-CERM 01005 220PF 10V ROOM=FOREHEAD 5% NO_XNET_CONNECTION=1 2.2UF 6.3V X5R-CERM ROOM=FOREHEAD 20% 0201-1 240 1% 1/32W ROOM=FOREHEAD 01005 MF 10-OHM-750MA ROOM=FOREHEAD 01005-1 ROOM=FOREHEAD 0% MF 1/32W 01005 0.00 ROOM=FOREHEAD MF 01005 1/32W 0% 0.00 X5R-CERM 6.3V 20% ROOM=FOREHEAD 0201-1 2.2UF 5% 01005 220PF 10V C0G-CERM ROOM=FOREHEAD ROOM=FOREHEAD 01005 150OHM-25%-200MA-0.7DCR 2.2UF X5R-CERM 6.3V 20% ROOM=FOREHEAD 0201-1 C0G-CERM 10V 5% 01005 ROOM=FOREHEAD 220PF 150OHM-25%-200MA-0.7DCR 01005 ROOM=FOREHEAD 150OHM-25%-200MA-0.7DCR ROOM=FOREHEAD 01005 ROOM=FOREHEAD 01005 150OHM-25%-200MA-0.7DCR NO_XNET_CONNECTION=1 ROOM=FOREHEAD 6.8V-100PF01005 NO_XNET_CONNECTION=1 6.8V-100PF01005ROOM=FOREHEAD 6.8V-100PF ROOM=FOREHEAD 01005 ROOM=FOREHEAD 150OHM-25%-200MA-0.7DCR 01005 ROOM=FOREHEAD 56PF 5% NP0-C0G-CERM 25V 01005 01005 NP0-C0G-CERM ROOM=FOREHEAD 56PF 25V 5% ROOM=FOREHEAD 0201-1 2.2UF X5R-CERM 6.3V 20% ROOM=FOREHEAD 01005 220PF C0G-CERM 10V 5% 5% 10V C0G-CERM 220PF 01005 ROOM=FOREHEAD ROOM=FOREHEAD 5% 10V C0G-CERM 220PF 01005 33-OHM-25%-1500MA 0201 ROOM=FOREHEAD ROOM=FOREHEAD 150OHM-25%-200MA-0.7DCR 01005 10V 01005 ROOM=FOREHEAD C0G-CERM 220PF 5% 01005 ROOM=FOREHEAD 150OHM-25%-200MA-0.7DCR 01005 25V 5% NP0-C0G-CERM 56PF ROOM=FOREHEAD ROOM=FOREHEAD 0.1UF X5R-CERM 6.3V 20% 01005 ROOM=FOREHEAD 0.1UF X5R-CERM 6.3V 20% 01005 ROOM=FOREHEAD X5R-CERM 6.3V 0.1UF 20% 01005 ROOM=FOREHEAD 33-OHM-25%-1500MA 0201 ROOM=FOREHEAD 56PF NP0-C0G-CERM 25V 5% 01005 150OHM-25%-200MA-0.7DCR ROOM=FOREHEAD 01005 ROOM=FOREHEAD 01005 150OHM-25%-200MA-0.7DCR C0G-CERM 10V 5% 01005 ROOM=FOREHEAD 220PF 45 45 33 45 31 31 32 12 45 33 19 45 45 48 47 46 39 25 18 13 12 11 9 8 7 5 19 45 53 41 40 19 25 19 45 45 45 33 45 45 464533 46 45 33 13 12 9 9 45 4533 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
WAS FOR RECEIVER; REPLACED BY SPEAKER IN D1xy CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS) AC return path for Mikeybus which is referenced to GND and VDD_MAIN For Borealis Radar 21203307 2 1 R3101 2 1 C3112 2 1 C3113 B9 A9 G10 D1 E1 M10 M4 L10 M5 K11 K10 J9 J12 H12 B2 A2 B3 A3 C3 C4 B4 A4 L8 M8 L9 M9 G2 G3 F2 F3 F1 G1 J3 J4 K2 K1 K3 L3 L2 L1 U3101 21 C3106 21 R3103 21 R3104 21 C3107 MIKEYBUS_REFERENCE PDM_CODEC_TO_SPKAMP2_CLK LOWERMIC1_TO_CODEC_AIN1_P LOWERMIC1_TO_CODEC_AIN1_N LOWERMIC4_TO_CODEC_AIN2_N FRONTMIC3_TO_CODEC_AIN4_N REARMIC2_TO_CODEC_AIN3_P 90_MIKEYBUS_DATA_P 90_MIKEYBUS_DATA_N PP_VDD_MAIN 90_MIKEYBUS_CALTRA_DATA_N 90_MIKEYBUS_CALTRA_DATA_P REARMIC2_TO_CODEC_AIN3_N FRONTMIC3_TO_CODEC_AIN4_P PDM_CODEC_TO_SPKAMP2_DATA HAWKING_TO_CODEC_AIN7_P HAWKING_TO_CODEC_AIN7_N LOWERMIC4_TO_CODEC_AIN2_P ROOM=CODEC NP0-C0G 01005 100PF 5% 16V MF 01005 5% ROOM=CODEC 1/32W 20.0 20.0 MF 1/32W 5% 01005 ROOM=CODEC NP0-C0G 01005 100PF 5% 16V ROOM=CODEC 5% 01005 1/32W MF 100 ROOM=CODEC ROOM=CODEC C0G-CERM 220PF 10V 01005 5% ROOM=CODEC C0G-CERM 220PF 10V 01005 5% CRITICAL CS42L71 WLCSP-1 ROOM=CODEC 41 33 41 41 41 29 44 40 40 53 52 46 41 40 39 37 35 34 33 28 27 26 25 23 21 19 18 10 9 4 44 29 33 44 44 41 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NCSYM 1 OF 3 HS3_REF HS4_REF HPDETECT HPOUTB HS3 HS4 AOUT2- HSIN+ HSIN- HPOUTA AOUT1+ AOUT1- AOUT2+ MBUS_REF DN DP AIN1+ AIN1- AIN2+ AIN2- AIN3+ AIN3- AIN4- AIN4+ AIN5- AIN5+ AIN6- AIN6+ AIN7+ AIN7- DMIC3_DATA DMIC3_CLK DMIC2_CLK DMIC2_DATA DMIC4_CLK DMIC1_DATA DMIC1_CLK PDM_CLK DMIC4_DATA PDM_DATA NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
CALTRA AUDIO CODEC (POWER & I/O) 2 1 XW3203 2 1 R3202 2 1 C3222 2 1 C3223 2 1 C3224 2 1 C3225 2 1 XW3202 2 1 C3221 A10 A11 B11 C11 K8 K4 E7 E6 E5 D6 D5 B10 D11 M1 H4 G11 E9 E8 D9 D7 D10 C10 H3 A7 D8 B7 C7 B8 A8 C12 D3 C2 D2 D4 K9 J8 H9 H8 H7 H6 G9 G8 G7 G6 G5 G4 F10 F9 F8 F7 F6 F5 F4 E10 E4 E3 E2 B12 A12 A1 H5 J5 C9 C8 B6 B5 C6 C5 U3101 H11 H10 M7 A5 E12 C1 G12 D12 J11 J1 J10 K5 J6 L5 K6 J7 L6 K7 M6 M11 F12 M2 M3 L7 L4 F11 E11 B1 A6 L11 J2 K12 M12 L12 H1 H2 U3101 2 1 C3205 2 1 C3209 2 1 C3212 2 1 C3214 2 1 C3217 21 C3202 2 1 C3215 2 1 C3213 2 1 C3220 2 1 C3211 21 C3201 21 C3204 21 C3203 2 1 C3208 2 1 R3201 I2S_L26_CODEC_TO_MAGGIE_DIN I2S_AOP_TO_CODEC_XSP_DOUT I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_XSP_TO_AOP_DIN I2S_AP_TO_CODEC_MSP_BCLK SPI_CODEC_MAGGIE_TO_AP_MISO SPI_AP_TO_CODEC_MAGGIE_SCLK I2S_CODEC_XSP_TO_AOP_LRCLK I2S_CODEC_XSP_TO_AOP_BCLK AUDIO_TO_AOP_INT_L I2S_AP_TO_CODEC_MSP_DOUT CODEC_RESET_L PP1V8_SDRAM I2S_CODEC_TO_AP_MSP_DIN SPI_AP_TO_CODEC_MAGGIE_MOSI PMU_TO_CODEC_DIGLDO_PULLDN SPI_AP_TO_CODEC_CS_L CODEC_AGND I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2S_MAGGIE_TO_L26_CODEC_DOUT CALTRA_LP_FILTP PP1V2_VD_FILT PP_VDD_BOOST PP1V8_VA PP_CODEC_TO_FRONTMIC3_BIAS PP1V8_SDRAM FRONTMIC3_TO_CODEC_BIAS_FILT_RET REARMIC2_TO_CODEC_BIAS_FILT_RET LOWERMIC1_TO_CODEC_BIAS_FILT_RET FRONTMIC3_BIAS_FILT_IN PP_CODEC_TO_LOWERMIC1_BIAS LOWERMIC1_BIAS_FILT_IN PP_CODEC_TO_REARMIC2_BIAS REARMIC2_BIAS_FILT_IN LOWERMIC4_TO_CODEC_BIAS_FILT_RET LOWERMIC4_BIAS_FILT_IN PP_CODEC_TO_LOWERMIC4_BIAS I2S_AP_TO_CODEC_MCLK I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK CALTRA_FILTP CODEC_AGND 2.2UF X5R-CERM 6.3V 20% 0201-1 ROOM=CODEC 2.2UF 6.3V 20% 0201-1 ROOM=CODEC X5R-CERM 0.1UF X5R-CERM 6.3V 20% 01005 ROOM=CODEC X5R-CERM 01005 0.1UF 6.3V 20% ROOM=CODEC 1.0UF X5R 6.3V 20% 0201-1 ROOM=CODEC 402 20% 6.3V X5R-CERM1 4.7UF ROOM=CODEC ROOM=CODEC 6.3V 20% 01005 0.1UF X5R-CERM 01005 ROOM=CODEC X5R-CERM 6.3V 20% 0.1UF 0.1UF X5R-CERM 6.3V 20% 01005 ROOM=CODEC ROOM=CODEC 10UF CERM-X5R 6.3V 20% 0402-9 402 20% 6.3V ROOM=CODEC 4.7UF X5R-CERM1 ROOM=CODEC 6.3V 20% 402 4.7UF X5R-CERM1 4.7UF 6.3V 20% 402 X5R-CERM1 ROOM=CODEC ROOM=CODEC CERM-X5R 10UF 6.3V 20% 0402-9 ROOM=CODEC 1.00K 5% 1/32W MF 01005 NO_XNET_CONNECTION OMIT ROOM=FOREHEAD SHORT-20L-0.05MM-SM ROOM=CODEC 100K 5% 1/32W MF 01005 ROOM=CODEC 1.0UF X5R 6.3V 20% 0201-1 1.0UF ROOM=CODEC X5R 6.3V 20% 0201-1 0201-1 ROOM=CODEC 1.0UF 20% X5R 6.3V ROOM=CODEC 1.0UF X5R 6.3V 20% 0201-1 ROOM=CODEC SHORT-10L-0.1MM-SM 1.0UF X5R 6.3V 20% 0201-1 ROOM=CODEC WLCSP-1 CRITICAL CS42L71 ROOM=CODEC WLCSP-1 ROOM=CODEC CS42L71 CRITICAL 36 35 34 33 13 11 13 11 36 11 36 11 13 13 35 34 33 13 11 53 52 48 47 41 40 37 36 32 21 20 18 16 11 36 11 20 11 32 36 35 34 33 11 36 35 34 33 53 38 37 25 23 19 35 34 33 19 29 53 52 48 47 41 40 37 36 32 21 20 18 16 45 41 41 44 41 41 11 36 35 34 33 11 32 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC SYM 3 OF 3 DIGLDO_PDN GND TSTO TSTO TSTO RESET* GND MSP_LRCK/FSYNC MCLK XSP_SDIN/DAC2B_MUTE XSP_SDOUT GND TSTI TSTI MOSI GND DIGLDO_PULLDN MSP_SCLK MSP_SDOUT MSP_SDIN ASP_LRCK/FSYNC ASP_SDIN ASP_SCLK MISO CCLK CS* WAKE* GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND TSTI TSTI TSTI TSTI TSTI TSTO TSTO TSTI TSTI TSTO TSTO JTAG_TCK JTAG_TDI JTAG_TDO TSTO JTAG_TMS XSP_LRCK/FSYNC XSP_SCLK ASP_SDOUT INT* SYM 2 OF 3 VP_MBUS VPROG_CP HS_BIAS_FILT HS_BIAS_FILT_REF MIC4_BIAS_FILT MIC2_BIAS MIC2_BIAS_FILT MIC3_BIAS MIC3_BIAS_FILT MIC1_BIAS_FILT MIC1_BIAS GNDP GNDA FILT- FILT+ FLYP GNDCP FLYN LP_FILT+ -VCP_FILT +VCP_FILT FLYC VCP VD VD VL VD_FILT VD_FILT VP VA MIC4_BIAS GNDHS GNDD GNDD GNDD GNDD NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(North)SPEAKER AMPLIFIER 2 Pg46: Compass Compensation Coil I2C2_AP_SCL47 PDM_ADARE_TO_CONVOY_CLK I2C2_AP_SDA47 2 1 C3318 E2 E3 A5 B1 A1 D1 C1 F5 B2 A2 B6 D7 D6 C7 E6 A6 D5 E7 F7 D2 C2 B7 C6 F1 E1 A7 D4 D3 C5 C4 C3 B4 B3 A4 A3 F2 E4 B5 F4 F6 F3 E5 U3301 2 1 R33042 1 R3301 2 1 C3319 2 1C3331 2 1 C3323 2 1 C3311 2 1 C3312 2 1C3327 2 1 C3324 2 1 C3325 2 1 C3306 2 1 C3308 21 L3302 2 1C3326 2 1C3328 2 1 C3316 2 1C3329 2 1 C3315 2 1C3313 SPKAMP1_TO_SPKAMP2_SYNC AP_TO_SPKAMP2_RESET_L SPEAKERAMP2_ISENSE_P SPEAKERAMP2_ISENSE_N SPEAKERAMP2_TO_SPEAKER_OUT_NEG SPEAKERAMP2_TO_SPEAKER_OUT_POS PP_SPKR2_VBOOST PP1V8_VA I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK PDM_ADARE_TO_CONVOY_CLK MAKE_BASE=TRUE PDM_CODEC_TO_SPKAMP2_CLK SPEAKERAMP2_FILT SPEAKER_TO_SPEAKERAMP2_VSENSE_P I2S_AOP_TO_MAGGIE_L26_MCLK I2S_MAGGIE_TO_L26_CODEC_DOUT I2S_L26_CODEC_TO_MAGGIE_DIN PDM_CODEC_TO_SPKAMP2_DATA PDM_CONVOY_TO_ADARE_DATA SPEAKERAMP2_LX AUDIO_TO_AOP_INT_L PP_VDD_MAIN SPEAKER_TO_SPEAKERAMP2_VSENSE_N ROOM=SPKAMP2 0402-9 20% 6.3V CERM-X5R 10UF 402-1 10% 10V X5R 1UF ROOM=SPKAMP2 WLCSP ROOM=SPKAMP2 CS35L26-A1 CRITICAL 01005 MF 1/32W 5% 100K ROOM=SPKAMP2 01005 5% ROOM=SPKAMP2 100K 1/32W MF 6.3V 0.01UF 01005 10% X5R ROOM=SPKAMP2 NO_XNET_CONNECTION 1000PF 10V ROOM=SPKAMP2 01005 X5R 10% ROOM=SPKAMP2 01005 10% 10V 1000PF X5R 0201 10% 16V X5R-CERM 0.1UF ROOM=SPKAMP2 5% 10V C0G-CERM 220PF ROOM=SPKAMP2 01005 0402-8 20% 10V X5R-CERM 10UF ROOM=SPKAMP2 0402-8 10V X5R-CERM ROOM=SPKAMP2 10UF 20% 10UF X5R-CERM 20% 10V ROOM=SPKAMP2 0402-8 ROOM=SPKAMP2 X5R-CERM 20% 10V 10UF 0402-8 10V X5R-CERM 20% 10UF 0402-8 ROOM=SPKAMP2 1.2UH-20%-3.0A-0.080OHM ROOM=SPKAMP2 PIQA20161T-SM CRITICAL 0402-9 20% 6.3V CERM-X5R 10UF ROOM=SPKAMP2 0402-9 20% 6.3V CERM-X5R 10UF ROOM=SPKAMP2 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=SPKAMP2 2.2UF 6.3V 0201-1 20% ROOM=SPKAMP2 X5R-CERM 01005 20% 6.3V 0.1UF ROOM=SPKAMP2 X5R-CERM 34 12 464529 464529 35343219 36 35 34 32 11 36 35 34 32 11 29 31 29 36 35 34 13 36 35 34 32 36 35 34 32 31 29 35 34 32 13 53 52 46 41 40 39 37 35 34 31 28 27 26 25 23 21 19 18 10 9 4 29 VP PDM_CLK0 AD0/PDM_CLK1 VBST_A SW SW FILT+ GNDP GNDA ISNS+ ISNS- VSNS+ VSNS- OUT+ OUT- VBST_A VBST_B VBST_B SDA ALIVE/SYNC MCLK SCLK LRCK/FSYNC SDIN SDOUT SCL VA PDM_DATA0 PDM_DATA1 AD1 INT* RESET* 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
TO TRINITY SPEAKER AMPLIFIER 1 (South) PULLED LOW ON PG 35 #25112685,Remove C3414 See SPKAMP1 C3424 on Pg46 MAKE_BASE=TRUE I2C_AOP_SCL48 GND I2C_AOP_SDA48 2 1 C3429 E2 E3 A5 B1 A1 D1 C1 F5 B2 A2 B6 D7 D6 C7 E6 A6 D5 E7 F7 D2 C2 B7 C6 F1 E1 A7 D4 D3 C5 C4 C3 B4 B3 A4 A3 F2 E4 B5 F4 F6 F3 E5 U3402 2 1 C3430 2 1C3407 2 1C3405 2 1 C3427 2 1 C3425 2 1 C3426 2 1 C3428 2 1 C3403 2 1 C3404 2 1 C3431 2 1C3422 2 1 C3434 2 1 C3432 I2S_MAGGIE_TO_L26_CODEC_DOUT SPEAKERAMP1_LX SPEAKER_TO_SPEAKERAMP1_VSENSE_P I2S_AOP_TO_MAGGIE_L26_MCLK SPEAKERAMP1_ISENSE_N SPEAKERAMP1_ISENSE_P PP_SPKR1_VBOOST AOP_TO_SPKAMP1_ARC_RESET_L AUDIO_TO_AOP_INT_L I2S_L26_CODEC_TO_MAGGIE_DIN SPKAMP1_TO_SPKAMP2_SYNC SPEAKER_TO_SPEAKERAMP1_VSENSE_N I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK PP1V8_VA SPEAKERAMP1_TO_SPEAKER_OUT_NEG SPEAKERAMP1_TO_SPEAKER_OUT_POS SPEAKERAMP1_FILT PP_VDD_MAIN 1000PF X5R 10V 10% 01005 ROOM=SPKAMP1 ROOM=SPKAMP1 1000PF X5R 10V 10% 01005 ROOM=SPKAMP1 X5R-CERM 0201-1 6.3V 20% 2.2UF CS35L26-A1 CRITICAL WLCSP ROOM=SPKAMP1 0.01UF X5R 6.3V 10% 01005 ROOM=SPKAMP1 NO_XNET_CONNECTION X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 10UF CERM-X5R 6.3V 20% 0402-9 ROOM=SPKAMP1 10UF 10UF X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 220PF C0G-CERM 10V 5% 01005 ROOM=SPKAMP1 01005 X5R-CERM 6.3V 0.1UF20% ROOM=SPKAMP1 2.2UF X5R-CERM 6.3V 20% 0201-1 ROOM=SPKAMP1 0.1UF X5R-CERM 16V 10% 0201 ROOM=SPKAMP1 10UF X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 10UF X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 10UF X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 36 35 33 32 28 41 36 35 33 13 35 13 35 33 32 13 36 35 33 32 33 41 36 35 33 32 11 36 35 33 32 11 35333219 41 41 53 52 46 41 40 39 37 35 33 31 28 27 26 25 23 21 19 18 10 9 4 VP PDM_CLK0 AD0/PDM_CLK1 VBST_A SW SW FILT+ GNDP GNDA ISNS+ ISNS- VSNS+ VSNS- OUT+ OUT- VBST_A VBST_B VBST_B SDA ALIVE/SYNC MCLK SCLK LRCK/FSYNC SDIN SDOUT SCL VA PDM_DATA0 PDM_DATA1 AD1 INT* RESET* NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
TO TRINITY ARC DRIVER NC FROM HOMER PER #25452686 #25742582,Add back C3531 for D10x at Pg46 0201 C3525 is at Pg46 See ARC1 C3530 at Pg46 VOLTAGE=8.0V PP1V8_VA I2C_AOP_SDA48 VOLTAGE=8.0V VOLTAGE=8.0V I2C_AOP_SCL48 2 1 C3536 2 1C3501 E2 E3 A5 B1 A1 D1 C1 F5 B2 A2 B6 D7 D6 C7 E6 A6 D5 E7 F7 D2 C2 B7 C6 F1 E1 A7 D4 D3 C5 C4 C3 B4 B3 A4 A3 F2 E4 B5 F4 F6 F3 E5 U3502 2 1 C3528 2 1 R3508 2 1C3532 2 1 C3526 2 1 C3527 2 1 C3534 2 1 C3535 2 1 C3537 2 1 C3524 2 1 C3538 2 1C3529 2 1 C3542 2 1 C3539 MAKE_BASE=TRUEPP1V8_VA PP1V8_VA I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK PP_ARC1_VBOOST SOLENOID1_TO_ARC1_VSENSE_NEG SOLENOID1_TO_ARC1_VSENSE_POS ARC1_ISENSE_N ARC1_ISENSE_P ARC1_FILT I2S_L26_CODEC_TO_MAGGIE_DIN I2S_MAGGIE_TO_AP_L26_CODEC_BCLK AOP_TO_SPKAMP1_ARC_RESET_L ARC1_TO_SOLENOID1_OUT_POS ARC1_TO_SOLENOID1_OUT_NEG I2S_MAGGIE_TO_L26_CODEC_DOUT I2S_AOP_TO_MAGGIE_L26_MCLK AUDIO_TO_AOP_INT_L ARC1_LX PP_VDD_MAIN 1000PF X5R 10V 10% 01005 ROOM=ARC1 ROOM=ARC1 X5R-CERM 0201-1 6.3V 20% 2.2UF 16V ROOM=ARC1 01005 CERM 5% 10PF NOSTUFF CRITICAL CS35L26-A1 WLCSP ROOM=SPKAMP2 X5R-CERM 0402-8 10UF 10V 20% ROOM=ARC1 NO_XNET_CONNECTION 01005 0.01UF X5R 6.3V 10% ROOM=ARC1 01005 MF 1/32W 5% 100K ROOM=ARC1 0402-9 10UF 6.3V ROOM=ARC1 20% CERM-X5R 220PF C0G-CERM 10V 5% 01005 ROOM=ARC1 ROOM=ARC1 0.1UF X5R-CERM 6.3V 20% 01005 0201-1 X5R-CERM ROOM=ARC1 2.2UF 6.3V 20% 0.1UF X5R-CERM 16V 10% 0201 ROOM=ARC1 10UF X5R-CERM 10V 20% 0402-8 ROOM=ARC1 10UF 0402-8 X5R-CERM 20% ROOM=ARC1 10V 20% 10UF X5R-CERM 10V 0402-8 ROOM=ARC1 1000PF 10V 10% 01005 ROOM=ARC1 X5R 35 34 33 32 19 3534333219 36 34 33 32 11 41 41 36 34 33 32 36 34 33 32 11 34 13 41 41 36 34 33 32 36 34 33 13 34 33 32 13 28 53 52 46 41 40 39 37 34 33 31 28 27 26 25 23 21 19 18 10 9 4 NC NC NC VP PDM_CLK0 AD0/PDM_CLK1 VBST_A SW SW FILT+ GNDP GNDA ISNS+ ISNS- VSNS+ VSNS- OUT+ OUT- VBST_A VBST_B VBST_B SDA ALIVE/SYNC MCLK SCLK LRCK/FSYNC SDIN SDOUT SCL VA PDM_DATA0 PDM_DATA1 AD1 INT* RESET* 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
NOTE: RESET HAS INTERNAL 65K PULLUP #24543115: Scrub Value MAGGIE LDO MAGGIEAPN: 336S00020 STM32L03 APN: 337S00231 MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC MAGGIE <-> AP (SDOUT) APN: 353S00842 MAGGIE <-> ARC, SPKRS, CODEC (SDOUT) MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC MAGGIE <-> AP (SDIN) MAGGIE <-> ARC, SPKRS, CODEC (SDIN) VPP_2V5 must be > 1.71V for SPI Slave programming HOMER STM32L0 MICRO D4 B3 C4 A4 A5 C3 A6 B6 C6 A2 B5 F1 E1 D1 F2 B2 C1 E2 D2 B1 C2 E3 F3 E4 F4 B4 E5 F5 D5 D6 E6 F6 A1 C5 A3 D3 U3602 1PP3602 1PP3601 2 1 R3611 21 R3607 2 1C3603 A2A1 B2 B1 U3603 E1 C4 D1 D5 C5 B5 A4 A3 B2 D2 E2 A2 A1 C2 B1 C1 C3 E3 D3 B3 E4 D4 B4 E5 A5 U3601 2 1 R3603 2 1 C3607 2 1 C3606 2 1 R3605 21 R3604 2 1 R3602 2 1 C3602 2 1 C3605 21 R3601 2 1 C3604 2 1 C3601 MAGGIE_TO_HOMER_WAKE PP1V2_MAGGIE AP_TO_MAGGIE_CRESETB_L SPI_AP_TO_MAGGIE_CS_L I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK SPI_CODEC_MAGGIE_TO_AP_MISO SPI_AP_TO_CODEC_MAGGIE_MOSI I2S_AP_TO_MAGGIE_DOUT I2S_L26_CODEC_TO_MAGGIE_DIN SPI_AP_TO_CODEC_MAGGIE_SCLK PP1V2_MAGGIE_PLL MAGGIE_TO_AP_CDONE I2S_MAGGIE_TO_AP_L26_CODEC_BCLK_R UART_AOP_TO_MAGGIE_TXD I2S_MAGGIE_TO_AP_DIN I2S_AOP_TO_MAGGIE_L26_MCLK I2S_MAGGIE_TO_L26_CODEC_DOUT PP1V8_MAGGIE_IMU PP1V8_SDRAM I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SPI_HOMER_TO_MAGGIE_POS_MISO SWD_AP_TO_MANY_SWCLK SWD_AP_BI_HOMER_SWDIO SPI_MAGGIE_TO_HOMER_POS_MOSI AP_BI_HOMER_BOOTLOADER_ALIVEI2C_HOMER_SDA SPI_MAGGIE_TO_HOMER_POS_SCLK PMU_TO_HOMER_RESET_L MAGGIE_TO_HOMER_WAKE UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD PP1V8_SDRAM I2C_HOMER_SCL HOMER_TO_AOP_WAKE_INT AP_BI_HOMER_BOOTLOADER_ALIVE_R PP1V8_MAGGIE_IMU MAGGIE_TO_AOP_INT AOP_TO_MAGGIE_EN ICE5LP4K-SWG36I CRITICAL WLCSP ROOM=ARC_CTRL SM P2MM-NSM ROOM=HOMER SM ROOM=HOMER P2MM-NSM 01005 5% MF 1/32W 27K ROOM=HOMER 1/32W MF ROOM=HOMER 5% 100 01005 6.3V 20% ROOM=HOMER 2.2UF X5R-CERM 0201-1 CSP LD39130S-1.2V/AP ROOM=HOMER WLCSP STM32L031E6Y6D 511K 1% MF 01005 1/32W 2.2UF X5R-CERM 20% 6.3V ROOM=ARC_CTRL 0201-1 ROOM=HOMER X5R-CERM 6.3V 20% 0.1UF 01005 ROOM=ARC_CTRL 0.1UF X5R-CERM 6.3V 20% 01005 20% 0.1UF 01005 ROOM=ARC_CTRL X5R-CERM 6.3V MF 5% 1/32W 01005 10K 01005 33.2 1/32W MF 1% ROOM=ARC_CTRL 10K 5% 1/32W MF 01005 20% 01005 ROOM=ARC_CTRL X5R-CERM 6.3V 0.1UF 0201 20% ROOM=ARC_CTRL 6.3V CER-X5R 4UF MF 1/32W 100 5% ROOM=ARC_CTRL 01005 36 12 9 35 34333211 3211 3211 11 35343332 3211 12 13 11 35343313 35343332 362418 53 52 48 47 41 40 37 36 32 21 20 18 16 3534333211 53 17 13 13 12 47 41 20 36 12 12 53 52 48 47 41 40 37 36 32 21 20 18 16 47 41 13 36 24 18 13 13 BANK2BANK0 BANK1 RGB1 RGB2 GND_LED IOB_7B GND VCCIO_2 VCCIO_0 VPP_2V5 VCC CRESET_B IOB_32A_SPI_SO IOB_31B IOB_30A IOB_29B IOB_27B IOB_26A IOB_25B_G3 IOB_20A IOB_16A IOB_11B_G5 IOB_12A_G4_CDONE IOB_10A SPI_VCCIO1 IOB_6A IOB_5B IOB_4A IOB_3B_G6 IOB_2A IOT_46B_G0 RGB0 IRLED GND VCCPLL IOB_34A_SPI_SCK IOB_35B_SPI_CSN IOB_33B_SPI_SI PP PP EN OUT GND IN VDDAVDD PC15_OSC32_OUT PC14_OSC32_IN PB1 PB0 PB7 PB6 PB3 RST* BOOT0 VSSA PA1 PA6 PA5 PA4 PA3 PA2 PA0_CLK_IN PA7 PA13 PA10 PA9 PA8 PA14 NC NC NC NC NC NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
#26634069:D1x, C3715/C3716 to 138S0719 0402 4.7uF 6.3V LED BACKLIGHT DRIVER - 6LED APN:353s00640 TO TRINITY #24543286: Densense Cap for Chestnut Charge Pump MOJAVE MESA BOOST APN:353S00671 CHESTNUT DISPLAY PMU 25V 25V APN:338S1172 200K INT PD NO INT PULL DISPLAY & TOUCH - POWER SUPPLIES NO INT PULL C3722 See Page46 I2C0_AP_SDA47 I2C0_AP_SCL2047 I2C0_AP_SCL47 I2C0_AP_SDA47 2 1 C3726 2 1 C3727 2 1 C3711 2 1 C3703 2 1 C3721 2 1 C3705 2 1 C3706 2 1 C3704 2 1 C3725 2 1C3724 2 1 R3701 2 1 C3709 KA D3701 A K D3702 2 1C3702 D3 D1 A4 A3 C4 C2 B2 A2 C3 A1 B1 C1 D2 D4 B4 B3 U3701 2 1 C3717 2 1 L3704 21 L3703 2 1 C3708 C3A2 B1 C1 A1 C2 A3 B2 B3 U3702 2 1 C3715 2 1 C3719 2 1 C3720 2 1C3718 2 1 C3712 2 1 C3713 2 1 C3714 2 1C3710 2 1 C3716 E2 E3 D1 A2 B2 D2 D3 C2 D4 B1 B3 C3 A1 A3 A4 B4 E4 C4 C1 E1 U3703 2 1 C3707 PP6V0_LCM_BOOST AP_TO_MUON_BL_STROBE_EN PP_LCM_BL_CAT1 MESA_TO_BOOST_EN BL_SW1_LX PP16V0_MESA PP17V0_MOJAVE_LDOIN PP_VDD_MAIN POS18V0_MESA_LX PP_VDD_BOOST PP_VDD_MAIN PP1V8_SDRAM DWI_PMGR_TO_BACKLIGHT_DATA PP_LCM_BL_CAT2 BL_SW2_LX DWI_PMGR_TO_BACKLIGHT_CLK CHESTNUT_TO_PMU_ADCMUX PMU_TO_AOP_TRISTAR_ACTIVE_READY BB_TO_STROBE_DRIVER_GSM_BURST_IND PP_CHESTNUT_CP LCM_TO_CHESTNUT_PWR_EN PP_VDD_MAIN CHESTNUT_LX PN_CHESTNUT_CN PP5V7_MESON_AVDDH PN5V7_LCM_MESON_AVDDN PP_LCM_BL_ANODE PP5V7_LCM_AVDDH PP5V1_TOUCH_VDDH X5R-CERM VOLTAGE=10V 20% 0402-8 10UF ROOM=CHESTNUT NP0-C0G-CERM 5% 25V 01005 56PF ROOM=CHESTNUT NOSTUFF 5% 25V 01005 NP0-C0G-CERM NOSTUFF ROOM=CHESTNUT 56PF ROOM=CHESTNUT 0201 16V 20% 1UF CER-X5R 0201 PLACE_NEAR=U3701:2MM ROOM=BACKLIGHT C0G 220PF 2% 50V 35V 0402 X5R 2.2UF 20% 35V X5R 2.2UF 20% 0402 35V 2.2UF 20% 0402 X5RX5R 35V 0402 2.2UF 20% 2.2UF 35V 0402 X5R 20% 10UF CERM-X5R 6.3V 20% 0402-9 ROOM=MOJAVE 01005 1/32W MF ROOM=BACKLIGHT 1% 200K 100PF NP0-C0G 35V 5% ROOM=MOJAVE 01005 CRITICAL ROOM=BACKLIGHT NSR05F30NXT5G DSN2 CRITICAL NSR0530P2T5G ROOM=BACKLIGHT SOD-923-1 0402-9 20% VOLTAGE=6.3V 10UF ROOM=BACKLIGHT CERM-X5R CRITICAL LM3539A1 DSBGA ROOM=BACKLIGHT C0G-CERM 10V 5% 01005 ROOM=CHESTNUT 220PF CRITICAL 1.0UH-20%-2.25A-0.15OHM PIXB2016FE-SM ROOM=CHESTNUT ROOM=MOJAVE 1.0UH-20%-0.4A-0.636OHM 0403 CRITICAL ROOM=MOJAVE 100PF NP0-C0G 35V 5% 01005 ROOM=MOJAVE CRITICAL BGA LM3638A0 X5R-CERM 4.7UF ROOM=CHESTNUT 10V 20% 0402 20% 35V X5R 2.2UF ROOM=MOJAVE 0402 20% 35V X5R 2.2UF ROOM=MOJAVE 0402 10UF CERM-X5R 6.3V 20% 0402-9 ROOM=MOJAVE 10UF X5R-CERM ROOM=CHESTNUT 10V 20% 0402-8 10V 10UF 20% X5R-CERM 0402-8 ROOM=CHESTNUT 20% ROOM=CHESTNUT 0402-8 10UF 10V X5R-CERM 10UF CERM-X5R 6.3V 20% 0402-9 ROOM=CHESTNUT 20% 10V X5R-CERM ROOM=CHESTNUT 4.7UF 0402 BGA ROOM=CHESTNUT TPS65730A0PYFF CRITICAL 9 39 38 4 28 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 38 32 25 23 19 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 48 47 41 40 36 32 21 20 18 16 11 39 28 11 20 40 20 13 7 53 26 39 20 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 39 39 39 39 39 SDI VIO/HWEN SCK SDA TRIG SW2_1 SW2_2 SCL SW1 IN OUT LED1 LED2 INHIBIT GND GND PMID VOUT EN_S LDOIN EN_M SW VIN PGND AGND HVLDO3 HVLDO2 HVLDO1 VNEG(SUB) VNEG AGND PGND2 PGND1 CPUMP LCMBST CF1 CF2 ADCMUX RESET* LCM_EN SDA SCL SYNC SW VIN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
GUARD MESA POWER MESA DIGITAL I/O MAMBA AND MESA CONNECTOR FLEX: 516S00142 (PLUG) MLB: 516S00141 (RCPT) MAMBA DIGITAL I/O #24543342: stuff 100pF Matches flex_x452_acf, schematic revision 1.5.0 pinout VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC. TI:353S00576 ST:353S00932 MAMBA POWER I2C_TOUCH_TO_MAMBA_SCL47 I2C_TOUCH_BI_MAMBA_SDA47 2 1 C3826 2 1 C3807 21 R3811 21 FL3811 21 FL3806 21 R3809 21 FL3802 21 FL3801 21 FL3803 2 1 R3808 2 1 R3807 21 XW3801 1 PP3801 2 1 C3825 2 1 C3806 21 FL3804 2 1C3805 21 R3801 21 R3802 2 1 C3819 2 1 C3801 2 1 C3816 2 1 C3817 2 1 C3818 21 FL3807 2 1 C3812 2 1 C3811 2 1 C3824 2 1 C3823 21 R3805 14 5 2 3 U38012 1C3828 2 1 C3804 2 1 C3822 2 1 C3821 2 1 C3815 2 1 C3813 2 1 C3802 2 1 C3803 2 1 C3814 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 J3801 LCM_TO_MAMBA_MSYNC_CONN PP2V75_MAMBA_CONN I2C_MESA_TURTLE_SCL_CONN MESA_TO_BOOST_EN_CONN SPI_AP_TO_MESA_MOSI_CONN PP_VDD_BOOST PP1V8_TOUCH MESA_TO_AOP_FDINT MESA_TO_AOP_FDINT_CONN PP1V8_TOUCH_TO_MAMBA_CONN TP_MAMBA_HINT_L PP3V0_MESA_CONN AP_TO_TOUCH_MAMBA_RESET_CONN_L SPI_AP_TO_MESA_SCLK_CONN PP3V0_MESA MAMBA_TO_LCM_MDRIVE_CONN_MESA MAMBA_TO_LCM_MDRIVE_CONN_MESA PP1V8_TOUCH_TO_MAMBA_CONN PP1V8_TOUCH PP1V8_MESA_CONN MESA_TO_AOP_FDINT_CONN I2C_MESA_TURTLE_SDA_CONN MESA_TO_AP_INT_CONN SPI_MESA_TO_AP_MISO_CONN AOP_TO_MESA_BLANKING_EN_CONN MESA_TO_AP_INT_CONN MESA_TO_BOOST_EN SPI_MESA_TO_AP_MISO SPI_MESA_TO_AP_MISO_CONN SPI_AP_TO_MESA_SCLK PP16V0_MESA_CONN AOP_TO_MESA_BLANKING_EN AOP_TO_MESA_BLANKING_EN_CONN MESA_TO_AP_INT MAMBA_TO_LCM_MDRIVE PP16V0_MESA_CONNPP16V0_MESA PP1V8_MESA_CONNPP1V8_MESA PP3V0_MESA_CONN MAMBA_LDO_EN SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_MOSI_CONN MESA_TO_BOOST_EN_CONN SPI_AP_TO_MESA_SCLK_CONN PP2V75_MAMBA_CONN ROOM=MAMBA_MESA 100PF NP0-C0G 16V 5% 01005 25V ROOM=MAMBA_MESA 01005 56PF 5% NP0-C0G-CERM 1% 1/32W ROOM=MAMBA_MESA 33.2 MF 01005 150OHM-25%-200MA-0.7DCR 01005 01005 ROOM=MAMBA_MESA 150OHM-25%-200MA-0.7DCR 1/32W ROOM=MAMBA_MESA MF 0.00 0% 01005 ROOM=MAMBA_MESA 150OHM-25%-200MA-0.7DCR 01005 150OHM-25%-200MA-0.7DCR 01005 ROOM=MAMBA_MESA 0201 ROOM=MAMBA_MESA 80-OHM-25%-0.52A-0.17OHM 1% ROOM=MAMBA_MESA 511K 1/32W MF 01005 ROOM=MAMBA_MESA 511K 1% 1/32W MF 01005 OMIT SHORT-20L-0.05MM-SM ROOM=PMU SM P2MM-NSM 56PF 25V 5% 01005 ROOM=MAMBA_MESA NP0-C0G-CERM 5% 25V 56PF 01005 NP0-C0G-CERM NOSTUFF ROOM=MAMBA_MESA 01005 ROOM=MAMBA_MESA 150OHM-25%-200MA-0.7DCR ROOM=MAMBA_MESA 56PF NP0-C0G-CERM 25V 5% 01005 1% 681 ROOM=MAMBA_MESA MF 1/32W 01005 ROOM=MAMBA_MESA 1% MF 1/32W 681 01005 01005 5% 16V NP0-C0G 100PF ROOM=MAMBA_MESA 100PF NP0-C0G 16V 5% 01005 ROOM=MAMBA_MESA 56PF 25V 5% 01005 NP0-C0G-CERM ROOM=MAMBA_MESA 5% ROOM=MAMBA_MESA 56PF NP0-C0G-CERM 25V 01005 56PF NP0-C0G-CERM 25V 5% 01005 ROOM=MAMBA_MESA 150OHM-25%-200MA-0.7DCR ROOM=MAMBA_MESA 01005 ROOM=MAMBA_MESA C0G-CERM 220PF 10V 5% 01005 220PF C0G-CERM 10V 5% 01005 ROOM=MAMBA_MESA 6.3V 20% 0201-1 2.2UF X5R-CERM ROOM=MAMBA_MESA 0402-8 X5R-CERM 20% 10V 10UF ROOM=MAMBA_MESA 0% 01005 ROOM=MAMBA_MESA MF 1/32W 0.00 LP5907SNX-2.75 ROOM=MAMBA_MESA X2SON X5R-CERM 6.3V 20% 0201-1 ROOM=MAMBA_MESA 2.2UF ROOM=MAMBA_MESA 01005 5% 10V C0G-CERM 220PF ROOM=MAMBA_MESA 01005 20% 6.3V X5R-CERM 0.1UF 0201-1 20% 6.3V 2.2UF ROOM=MAMBA_MESA X5R-CERM ROOM=MAMBA_MESA 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=MAMBA_MESA 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=MAMBA_MESA 5% 01005 10V C0G-CERM 220PF 5% 35V 100PF NP0-C0G 01005 ROOM=MAMBA_MESA ROOM=MAMBA_MESA 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=MAMBA_MESA F-ST-SM BB35C-RA24-3A CRITICAL 45 38 48 38 38 53 37 32 25 23 19 47 46 39 38 18 13 38 38 38 45 39 38 19 38 38 38 47 46 39 38 18 38 38 48 38 38 38 38 37 4 11 38 11 38 13 38 11 45 3837 4 3848 19 38 11 38 38 38 38 PP VIN EN EPADGND VOUT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
#26634069: nostuff C3903 to help desense AOP/TOUCH INTERFACE To Display B2B AP/TOUCH INTERFACE DISPLAY POWER DISPLAY MIPI For placement "along the way" as we route from SOC to B2B. BACKLIGHT AC Coupling Caps AC return path for LCM MIPI which is referenced to GND and VDD_MAIN To Mamba/Mesa B2B VOLTAGE=25.0V 2 1 C3929 2 1C3901 2 1 C3940 2 1 C3937 2 1 R3901 2 1 C3903 2 1 C3938 2 1 C3936 2 1 C3935 2 1 C3905 2 1 R3908 21 FL3915 2 1 FL3906 2 1 FL3908 21 FL3910 21 FL3903 21 FL3902 21 FL3901 21 R3923 2 1 C3902 2 1 FL3904 2 1 C3915 2 1 C3939 2 1 C3930 2 1 C3931 2 1 C3924 2 1 C3923 2 1 C3925 2 1 FL3922 2 1 FL3924 2 1C3922 2 1 C3926 2 1 C3927 2 1 FL3919 2 1 FL3920 2 1 C3928 2 1 C3916 2 1 FL3913 2 1 C3917 2 1 C3918 21 R3915 2 1 C3904 2 1 C3912 2 1 C3913 2 1 C3914 2 1 C3933 2 1 C3934 2 1 C3909 2 1 FL3912 2 1 FL3909 2 1 C3910 2 1 C3911 2 1C3932 2 1 FL3911 4 3 2 1 L3903 4 3 2 1 L3902 4 3 2 1 L3901 2 1 FL3917 2 1 C3920 2 1 FL3918 2 1 C3921 2 1 FL3916 2 1 C3919 PN5V7_LCM_MESON_AVDDN PP5V7_MESON_AVDDH PP5V7_LCM_AVDDH PP1V8 PP5V7_MESON_AVDDH_CONN PMU_TO_LCM_PANICB_CONN LCM_TO_MANY_BSYNC_CONN PMU_TO_LCM_PANICB 90_MIPI_AP_TO_LCM_CLK_CONN_P 90_MIPI_AP_TO_LCM_CLK_CONN_N90_MIPI_AP_TO_LCM_CLK_N 90_MIPI_AP_TO_LCM_DATA0_CONN_P 90_MIPI_AP_TO_LCM_DATA1_CONN_N PP1V8_TOUCH PP1V8_LCM_CONN SPI_AP_TO_TOUCH_MOSI_CONN LCM_TO_MANY_BSYNC PP_LCM_BL_CAT1 PP_LCM_BL_ANODE PP1V8_TOUCH_CONN 90_MIPI_AP_TO_LCM_CLK_P SPI_TOUCH_TO_AP_MISO_CONN 90_MIPI_AP_TO_LCM_DATA1_N 90_MIPI_AP_TO_LCM_DATA0_P AP_TO_LCM_RESET_L TOUCH_TO_AP_INT_L_CONN PP5V1_TOUCH_VDDH UART_TOUCH_TO_AOP_RXD SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI LCM_TO_CHESTNUT_PWR_EN_CONN 90_MIPI_AP_TO_LCM_DATA0_CONN_N AP_TO_CUMULUS_CLK_32K_CONN SPI_AP_TO_TOUCH_CS_CONN_L AP_TO_TOUCH_MAMBA_RESET_L PP_LCM_BL_CAT2_CONN UART_TOUCH_TO_AOP_RXD_CONN 90_MIPI_AP_TO_LCM_DATA1_CONN_P TOUCH_TO_AP_INT_L AP_TO_CUMULUS_CLK32K SPI_AP_TO_TOUCH_CS_L LCM_TO_CHESTNUT_PWR_EN AP_TO_LCM_RESET_CONN_L UART_AOP_TO_TOUCH_TXD 90_MIPI_AP_TO_LCM_DATA1_P AP_TO_TOUCH_MAMBA_RESET_CONN_L PP_LCM_BL_CAT2 PN5V7_LCM_MESON_AVDDN_CONN PP_VDD_MAIN UART_AOP_TO_TOUCH_TXD_CONN SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_SCLK_CONN PP5V7_LCM_AVDDH_CONN 90_MIPI_AP_TO_LCM_DATA0_N PP_LCM_BL_CAT1_CONN PP5V1_TOUCH_VDDH_CONN PP_LCM_BL_ANODE_CONN 0402-8 X5R-CERM 10V 20% 10UF ROOM=DISPLAY_B2B 0402-8 10UF X5R-CERM 10V 20% ROOM=DISPLAY_B2B 2.2UF 0201-1 20% 6.3V X5R-CERM ROOM=DISPLAY_B2B 220PF 10V 5% ROOM=DISPLAY_B2B C0G-CERM 01005 5% 01005 1/32W MF 100K ROOM=DISPLAY_B2B 220PF NOSTUFF ROOM=DISPLAY_B2B 0201 2% 50V C0G 10V 5% ROOM=DISPLAY_B2B C0G-CERM 01005 220PF220PF ROOM=DISPLAY_B2B 01005 5% 10V C0G-CERM 220PF 01005 C0G-CERM 10V 5% ROOM=DISPLAY_B2B 5% 35V 100PF 01005 ROOM=DISPLAY_B2B NP0-C0G MF 33.2 1/32W 1% 01005 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR 01005 0201 240-OHM-25%-0.42A-0.31DCR ROOM=DISPLAY_B2B 0201 ROOM=DISPLAY_B2B 240-OHM-25%-0.42A-0.31DCR ROOM=DISPLAY_B2B 0201 33-OHM-25%-1500MA 0201 ROOM=DISPLAY_B2B 33-OHM-25%-1500MA ROOM=DISPLAY_B2B 33-OHM-25%-1500MA 0201 33-OHM-25%-1500MA ROOM=DISPLAY_B2B 0201 ROOM=DISPLAY_B2B 0% 1/32W 01005 MF 0.00 220PF C0G-CERM ROOM=MAMBA_MESA 5% 01005 10V 01005 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 220PF 5% C0G-CERM 10V C0G-CERM 5% 220PF 01005 10V ROOM=DISPLAY_B2B C0G-CERM 01005 5% 10V 220PF 220PF C0G-CERM 10V 5% 01005 ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B 56PF NP0-C0G-CERM 25V 5% 01005 ROOM=DISPLAY_B2B 56PF NP0-C0G-CERM 25V 5% 01005 5% ROOM=DISPLAY_B2B 01005 56PF NP0-C0G-CERM 25V 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 150OHM-25%-200MA-0.7DCR 01005 ROOM=DISPLAY_B2B NOSTUFF ROOM=DISPLAY_B2B 01005 NP0-C0G-CERM 25V 56PF 5% 01005 ROOM=DISPLAY_B2B 56PF NP0-C0G-CERM 25V 5% ROOM=DISPLAY_B2B 100PF NP0-C0G 16V 5% 01005 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 01005 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B 100PF NP0-C0G 16V 5% 01005 ROOM=DISPLAY_B2B 220PF C0G-CERM 10V 5% 01005 ROOM=DISPLAY_B2B 01005 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 10V C0G-CERM 220PF 5% 01005 100PF 5% 01005 ROOM=DISPLAY_B2B NP0-C0G 16V MF 5% 01005 1/32W 10 ROOM=DISPLAY_B2B 5% 35V 100PF ROOM=DISPLAY_B2B NP0-C0G 01005 ROOM=DISPLAY_B2B C0G-CERM 220PF 01005 10V 5% ROOM=DISPLAY_B2B 220PF 10V 01005 C0G-CERM 5% C0G-CERM 5% 10V 01005 220PF ROOM=DISPLAY_B2B 0201-1 X5R-CERM 6.3V 20% ROOM=DISPLAY_B2B 2.2UF ROOM=DISPLAY_B2B 2.2UF 20% 6.3V 0201-1 X5R-CERM 220PF 5% ROOM=DISPLAY_B2B 10V C0G-CERM 01005 0201 ROOM=DISPLAY_B2B 240-OHM-25%-0.42A-0.31DCR 0201 ROOM=DISPLAY_B2B 240-OHM-25%-0.42A-0.31DCR ROOM=DISPLAY_B2B 220PF C0G-CERM 10V 5% 01005 5% ROOM=DISPLAY_B2B 220PF 10V 01005 C0G-CERM ROOM=DISPLAY_B2B 2.2UF X5R-CERM 6.3V 20% 0201-1 0201 ROOM=DISPLAY_B2B 240-OHM-25%-0.42A-0.31DCR CRITICAL ROOM=DISPLAY_B2B TAM0605 65OHM-0.7-2GHZ-3.4OHM TAM0605 65OHM-0.7-2GHZ-3.4OHM ROOM=DISPLAY_B2B CRITICAL ROOM=DISPLAY_B2B TAM0605 CRITICAL65OHM-0.7-2GHZ-3.4OHM 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 5% ROOM=DISPLAY_B2B 56PF 25V 01005 NP0-C0G-CERM 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 56PF NP0-C0G-CERM 01005 ROOM=DISPLAY_B2B 25V 5% 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 56PF NP0-C0G-CERM ROOM=DISPLAY_B2B 5% 25V 01005 37 37 37 52 48 47 46 29 25 18 17 16 13 12 11 9 8 7 5 45 45 20 45 459 45 45 47 46 38 18 45 45 53 23 20 13 37 37 9 45 9 9 12 45 37 13 11 11 45 45 45 45 12 45 45 12 11 11 37 20 45 13 9 4538 37 53 52 46 41 40 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 45 11 45 45 9 SYM_VER-1 SYM_VER-1 SYM_VER-1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
AC return path for USB pairs which is referenced to GND and VDD_MAIN POW_GATE_EN* is 6V-tolerant z=0.45mm Sm Footprint: 376S00135 TRISTAR 2 <rdar:/24285280> EVT: 343S00091 (P2:343S00078) #25714843: Remove R4003 Weak PD I2C0_AP_SDA 47 I2C0_AP_SCL 47 1 PP4001 2 1 3 Q4001 F4 F3 A1 B1 A3 B3 D2 D1 F2 F1 E2 E1 E4 D3 D4 D6 F6 B5 A5 C6 B6 F5 C1 A6 A4 A2 B4 B2 C3 C4 E3 E6 C2 D5 E5 C5 U4001 2 1 C4006 2 1 C4008 2 1 C4007 21 L4021 21 L4022 2 1 R4002 21 R4001 2 1 C4001 2 1 C4002 2 1 C4003 2 1 C4005 2 1 C4004 PP5V0_USB_RVP TRISTAR_CON_DETECT_L PP_TRISTAR_ACC1 90_TRISTAR_DP1_CONN_P PP_TRISTAR_ACC2 PP3V0_TRISTAR_ANT_PROX TRISTAR_USB_BRICK_ID_R 90_USB_AP_DATA_L_P TRISTAR_TO_PMU_HOST_RESET PMU_TO_AOP_TRISTAR_ACTIVE_READY TRISTAR_REVERSE_GATE TRISTAR_TO_TIGRIS_VBUS_OFF TRISTAR_TO_AOP_INT 90_TRISTAR_DP1_CONN_N 90_TRISTAR_DP2_CONN_P 90_TRISTAR_DP2_CONN_N 90_USB_BB_DATA_P 90_USB_BB_DATA_N 90_USB_AP_DATA_P 90_USB_AP_DATA_N PP_VDD_MAIN TRISTAR_BYPASS PP1V8_SDRAM UART_AP_DEBUG_RXD UART_ACCESSORY_TO_AP_RXD UART_AP_DEBUG_TXD SWD_DOCK_TO_AP_SWCLK 90_USB_AP_DATA_L_N SWD_DOCK_BI_AP_SWDIO UART_AP_TO_ACCESSORY_TXD PP_ACC_VAR 90_MIKEYBUS_DATA_N 90_MIKEYBUS_DATA_P PP5V0_USB TRISTAR_TO_PMU_USB_BRICK_ID 20% 6.3V X5R 1.0UF 0201-1ROOM=TRISTAR 10% ROOM=TRISTAR 6.3V X5R 0.01UF 01005 P2MM-NSM SM DFN ROOM=TRISTAR RV3CA01ZP CRITICAL WLCSP CBTL1610A3BUK 1UF 16V 20% 0201 CER-X5R ROOM=TRISTAR 220PF ROOM=SOC 01005 5% 10V C0G-CERM ROOM=SOC 5% 10V C0G-CERM 220PF 01005 0201 ROOM=TRISTAR 15NH-250MA 0201 15NH-250MA ROOM=TRISTAR MF 10K 5% 1/32W 01005 ROOM=TRISTAR ROOM=PMU 01005 6.34K 1/32W MF 1% ROOM=PMU 01005 10% 6.3V X5R 0.01UF 01005 20% 6.3V X5R-CERM 0.1UF ROOM=TRISTARROOM=TRISTAR 0201-1 20% 6.3V X5R 1.0UF 414 414 414 414 53 41 29 19 20 3720137 21 13 414 414 414 53 53 7 7 53 52 46 41 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 48 47 41 37 36 32 21 20 18 16 12 12 12 7 7 12 462719 31 31 41214 20 PP S D G BRICK_ID POW_GATE_EN* BYPASS SCL INT SDA SWITCH_EN HOST_RESET CON_DET_L DN2 DP2 DN1 DP1 ACC2 ACC1 P_IN VDD_1V8 VDD_3V0 ACC_PWR JTAG_DIO UART2_RX JTAG_CLK UART1_RX UART2_TX UART0_RX UART1_TX USB0_DN UART0_TX USB0_DP USB1_DN USB1_DP DIG_DN DVSS DVSS DVSS DIG_DP NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
when changing these components! #22499940:Change Net Name to POS/NEG SPEAKER1 Please loop in Matt Mow (Antenna Team) ANTENNA LOWER MIC1/4 USB AC CouplingAC return path for USB pairs which is referenced to GND and VDD_MAIN ARC1 DOCK FLEX CONNECTOR Antenna GPIO TRISTAR #25098110: Decrease DCR #25429221:Carrier Dock flex to add +1 ACC2 pin Per ANT Erdinc, change to cap ARC CONTROL #26118161: Update FL4104 to 49.9ohm CKPLUS_WAIVE=I2C_PULLUP CKPLUS_WAIVE=I2C_PULLUP VOLTAGE=4.3V VOLTAGE=3.0V VOLTAGE=4.3V VOLTAGE=14.0V 21 FL4112 21 R4104 21 FL4106 2 1 C4111 2 1 C4136 2 1 C4135 54 53 5251 5049 4847 4645 4443 4241 4039 3837 3635 3433 3231 3029 2827 2625 2423 2221 2019 1817 1615 1413 1211 109 87 65 43 21 J4101 2 1 FL4102 2 1 C4110 2 1 FL4101 2 1 C4143 2 1C4109 2 1C4105 2 1C4106 2 1C4107 2 1C4108 21 R4110 21 R4109 2 1 C4127 2 1 C4103 2 1 C4104 2 1 FL4115 2 1C4102 2 1C4101 2 1 C4118 2 1 C4134 2 1 FL4103 2 1 C4128 2 1 C4129 2 1 FL4116 2 1 FL4117 2 1 FL4118 2 1 C4130 2 1 C4131 2 1 C4132 2 1 FL4119 2 1 FL4120 2 1 FL4121 2 1 C4133 2 1 C4126 2 1 FL4114 2 1 C4119 2 1 C4120 2 1 FL4107 2 1 FL4108 2 1 C4121 2 1 C4122 2 1 C4116 2 1 C4117 21 FL4105 2 1 R4102 I2C_HOMER_SDA_CONN PP_CODEC_TO_LOWERMIC1_BIAS I2C_HOMER_SCL_CONNPP3V0_LAT_CONN I2C_HOMER_SCL BB_TO_LAT_ANT_SCLK_CONN BB_TO_LAT_GPO1_CONN ARC1_TO_SOLENOID1_OUT_NEG ARC1_TO_SOLENOID1_OUT_POS PP_TRISTAR_ACC2_CONN BB_TO_LAT_GPO2_CONN LOWERMIC4_TO_CODEC_AIN2_CONN_POS BB_TO_LAT_GPO1_CONN BB_TO_LAT_ANT_SCLK_CONN LOWERMIC4_TO_CODEC_BIAS_FILT_RET BB_TO_LAT_ANT_DATA_CONN PP1V8_LAT_ARC_CONN PP3V0_LAT1_CONN LOWERMIC4_TO_CODEC_AIN2_CONN_NEG SPEAKERAMP1_TO_SPEAKER_OUT_NEG PP_CODEC_TO_LOWERMIC4_BIAS_CONN ARC1_TO_SOLENOID1_OUT_NEG TRISTAR_CON_DETECT_CONN_L PP_TRISTAR_ACC2 PP_TRISTAR_ACC2_CONN PP_TRISTAR_ACC1 PP3V0_TRISTAR_ANT_PROX BB_TO_LAT_ANT_DATA_CONNBB_TO_LAT_ANT_DATA BB_TO_LAT_ANT_SCLK PP1V8_SDRAM BB_TO_LAT_GPO2 BB_TO_LAT_GPO1 PP3V0_LAT1_CONN PP_CODEC_TO_LOWERMIC1_BIAS_CONN LOWERMIC1_TO_CODEC_AIN1_N LOWERMIC4_TO_CODEC_AIN2_P PP_VDD_MAIN PP_CODEC_TO_LOWERMIC4_BIAS_CONN SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS SPEAKERAMP1_TO_SPEAKER_OUT_POS SPEAKER_TO_SPEAKERAMP1_VSENSE_N LOWERMIC4_TO_CODEC_AIN2_N PP_CODEC_TO_LOWERMIC4_BIAS SPEAKER_TO_SPEAKERAMP1_VSENSE_P PP1V8_LAT_ARC_CONN PP_TRISTAR_ACC1_CONN 90_TRISTAR_DP2_CONN_P 90_TRISTAR_DP2_CONN_N LOWERMIC4_TO_CODEC_AIN2_CONN_NEG LOWERMIC4_TO_CODEC_AIN2_CONN_POS LOWERMIC1_TO_CODEC_AIN1_CONN_NEG LOWERMIC1_TO_CODEC_AIN1_CONN_POS SPEAKERAMP1_TO_SPEAKER_OUT_POS PP3V0_LAT_CONN MIKEYBUS_REFERENCE BB_TO_LAT_GPO2_CONN PP_TRISTAR_ACC1_CONN SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG I2C_MIC1_SDA_CONN BB_TO_LAT_GPO3_CONN 90_TRISTAR_DP1_CONN_N 90_TRISTAR_DP1_CONN_P ARC1_TO_SOLENOID1_OUT_POS SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS LOWERMIC1_TO_CODEC_BIAS_FILT_RET LOWERMIC1_TO_CODEC_AIN1_CONN_POS LOWERMIC1_TO_CODEC_AIN1_CONN_NEG PP_CODEC_TO_LOWERMIC1_BIAS_CONN I2C_MIC1_SCL_CONN ARC1_TO_SOLENOID1_OUT_POS SOLENOID1_TO_ARC1_VSENSE_POS I2C_HOMER_SCL_CONN I2C_HOMER_SDA_CONN SOLENOID1_TO_ARC1_VSENSE_NEG SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG TRISTAR_CON_DETECT_CONN_L SPEAKERAMP1_TO_SPEAKER_OUT_NEG TRISTAR_CON_DETECT_L LOWERMIC1_TO_CODEC_AIN1_P I2C_HOMER_SDA PP5V0_USB C0G-CERM 220PF ROOM=DOCK_B2B 5% 10V 01005 01005 ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR NP0-C0G-CERM 25V 01005 ROOM=DOCK_B2B 5% 56PF 25V ROOM=DOCK_B2B 01005 NP0-C0G-CERM 56PF5% 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 01005 ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 10V ROOM=DOCK_B2B 5% C0G-CERM 220PF 01005 56PF 25V NP0-C0G-CERM 5% 01005 ROOM=DOCK_B2B 56PF NP0-C0G-CERM 25V 01005 ROOM=DOCK_B2B 5% ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR 01005 ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 01005 10V C0G-CERM 220PF 5% ROOM=DOCK_B2B 220PF C0G-CERM 10V 01005 5% ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 220PF C0G-CERM 5% 10V 01005 ROOM=DOCK_B2B 10-OHM-1.1A 01005 220PF ROOM=DOCK_B2B 10V C0G-CERM 5% 01005 150OHM-25%-200MA-0.7DCR 01005 ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 01005 NP0-C0G-CERM ROOM=DOCK_B2B 5% 01005 16V 33PF 33PF NP0-C0G-CERM ROOM=DOCK_B2B 16V 01005 5% 01005 1/32W ROOM=DOCK_B2B MF 5% 1.00K 01005 150OHM-25%-200MA-0.7DCR 49.9 1% MF 01005 ROOM=DOCK_B2B 1/32W ROOM=DOCK_B2B 0201 22-OHM-25%-1800MA 5% 25V NP0-C0G-CERM 01005 ROOM=DOCK_B2B 56PF 01005 25V NP0-C0G-CERM ROOM=DOCK_B2B 5% 56PF 01005 5% 25V ROOM=DOCK_B2B NP0-C0G-CERM 56PF 245857 F-ST-SM ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR 25V 5% 56PF NP0-C0G-CERM 01005 ROOM=DOCK_B2B 01005 ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR ROOM=SOC 01005 C0G-CERM 220PF 5% 10V 10% ROOM=DOCK_B2B 0.1UF 25V 0201 X5R ROOM=DOCK_B2B X5R 0.1UF 25V 10% 0201 ROOM=DOCK_B2B X5R 0201 25V 0.1UF 10% ROOM=DOCK_B2B 01005 16V CER-X7R 330PF 10% 10% 330PF CER-X7R 16V 01005 ROOM=DOCK_B2B ROOM=DOCK_B2B 01005 0.00 0% 1/32W MF 27PF 5% 16V 01005 NP0-C0G ROOM=DOCK_B2B 0.00 ROOM=DOCK_B2B 01005 0% 1/32W MF ROOM=DOCK_B2B 01005 10V C0G-CERM 220PF 5% 10V C0G-CERM 220PF 01005 ROOM=DOCK_B2B 5% 01005 220PF C0G-CERM 10V ROOM=DOCK_B2B 5% ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR 01005 5% 10V C0G-CERM 220PF ROOM=DOCK_B2B 10V C0G-CERM 220PF 01005 ROOM=DOCK_B2B 5% 5% ROOM=DOCK_B2B 01005 NP0-C0G 16V 100PF ROOM=DOCK_B2B 01005 NP0-C0G 5% 16V 100PF 41 32 41 41 47 36 41 41 41 35 41 35 41 41 41 41 41 32 41 41 41 41 41 34 41 4135 41 40 4 41 40 4 53 40 29 19 4153 53 53 52 48 47 40 37 36 32 21 20 18 16 53 53 41 41 31 31 53 52 46 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 41 41 41 34 34 31 32 34 41 41 40 4 40 4 41 41 41 41 41 34 41 31 41 41 41 47 46 40 4 40 4 4135 41 32 41 41 41 47 41 35 35 41 41 35 41 41 41 34 40 4 31 47 36 40 21 4 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
MIC2 (ANC REF) BUTTONSSTROBE2STROBE1 HAWKING #24544474: Can R4401 be changed to 5%? #24678255:DOE with 10% and/20% cap CKPLUS_WAIVE=MISS_N_DIFFPAIR 21 FL4407 2 1 C4422 21 R4402 21 R4405 21 R4406 2 1C4420 2 1C4419 2 1C4418 2 1 DZ4404 2 1 DZ4403 2 1 DZ4402 2 1 R4401 21 C4417 21 C4421 2 1 C4416 2 1 C4414 21 FL4406 21 FL4405 2 1 C4415 2 1 FL4402 2 1 C4405 2 1 C4404 2 1 FL4401 2 1 FL4403 2 1 C4403 2 1 C4407 21 FL4404 2 1C4406 2 1C4402 2 1 C4408 2 1 C4409 2 1C4411 2 1C4410 2 1 C4412 2 1 C4413 2 1C4401 2 1 DZ4401 HAWKING_TO_CODEC_AIN7_N PP_CODEC_TO_REARMIC2_BIAS_CONN HAWKING_TO_CODEC_AIN7_N_CONN HAWKING_TO_CODEC_AIN7_C_PHAWKING_TO_CODEC_AIN7_P REARMIC2_TO_CODEC_AIN3_CONN_P REARMIC2_TO_CODEC_AIN3_CONN_NREARMIC2_TO_CODEC_AIN3_N PP_CODEC_TO_REARMIC2_BIAS BUTTON_VOL_DOWN_L BUTTON_VOL_UP_L CHASSIS_GND_BS401 BUTTON_VOL_UP_CONN_L CHASSIS_GND_BS401 BUTTON_VOL_DOWN_CONN_L CHASSIS_GND_BS401 BUTTON_POWER_KEY_CONN_L PP1V8_HAWKING PP_STROBE_DRIVER2_COOL_LED PP_STROBE_DRIVER2_WARM_LED BUTTON_RINGER_A_CONNBUTTON_RINGER_A BUTTON_POWER_KEY_L CHASSIS_GND_BS401 STROBE_MODULE_NTC_CONN REARMIC2_TO_CODEC_AIN3_P PP_STROBE_DRIVER1_WARM_LED PP_STROBE_DRIVER1_COOL_LED STROBE_MODULE_NTC PP1V8_HAWKING_CONN HAWKING_TO_CODEC_AIN7_P_CONN 20% X5R ROOM=RIGHT_BUTTON 01005 6.3V 0.22UF X5R-CERM 6.3V 20% ROOM=RIGHT_BUTTON 0201-1 2.2UF C0G-CERM 5% 01005 10V ROOM=RIGHT_BUTTON 220PF 150OHM-25%-200MA-0.7DCR ROOM=RIGHT_BUTTON 01005 ROOM=RIGHT_BUTTON 27PF NP0-C0G 16V 5% 01005 150OHM-25%-200MA-0.7DCR ROOM=RIGHT_BUTTON 01005 ROOM=RIGHT_BUTTON 56PF 25V 5% 01005 NP0-C0G-CERM 27PF NP0-C0G 16V 5% 01005 ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON 150OHM-25%-200MA-0.7DCR 01005 ROOM=RIGHT_BUTTON 56PF NP0-C0G-CERM 25V 5% 01005 01005 ROOM=RIGHT_BUTTON NP0-C0G-CERM 25V 56PF 5% 150OHM-25%-200MA-0.7DCR 01005 ROOM=RIGHT_BUTTON 150OHM-25%-200MA-0.7DCR ROOM=RIGHT_BUTTON 01005 ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 5% 01005 27PF ROOM=RIGHT_BUTTON NP0-C0G 6.3V 5% 0201 0201 5.5V-6.2PF ROOM=RIGHT_BUTTON 01005 ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 5% 150OHM-25%-200MA-0.7DCR 01005 ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 5% 01005 ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 5% 01005 ROOM=RIGHT_BUTTON 27PF 16V NP0-C0G 5% 01005 27PF NP0-C0G 16V 5% 01005 ROOM=RIGHT_BUTTON ROOM=LEFT_BUTTON 120-OHM-0.220A 01005 ROOM=RIGHT_BUTTON NOSTUFF 180PF 01005 10V 10% CERM ROOM=RIGHT_BUTTON 01005 100 1/32W MF 5% ROOM=LEFT_BUTTON 01005 100 1/32W MF 5% 01005 100 1/32W MF 5% ROOM=LEFT_BUTTON 220PF C0G-CERM 10V 5% 01005 ROOM=RIGHT_BUTTON 100PF NP0-C0G 16V 5% 01005 ROOM=LEFT_BUTTON ROOM=LEFT_BUTTON 100PF NP0-C0G 16V 5% 01005 ROOM=LEFT_BUTTON 27PF NP0-C0G 6.3V 5% 0201 5% ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 01005 12V-33PF01005-1 ROOM=LEFT_BUTTON 01005-1 12V-33PF ROOM=LEFT_BUTTON 0201 5.5V-6.2PF ROOM=LEFT_BUTTON ROOM=RIGHT_BUTTON 0.5% 1/32W 01005 MF 27K 0.22UF ROOM=RIGHT_BUTTON 20% X5R 01005 6.3V 31 45 45 31 45 4531 32 20 20 12 444 45 444 45 444 45 19 4526 4526 4520 20 444 45 31 4526 4526 26 45 45 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
#25614112: Remove PP1V8_EEPROM Support 200MA 516S00151 PLUG FOREHEAD FLEX CONNECTOR FLEX APN: 516S00149 MLB APN: 516S00150 COMBINED BUTTON FLEX CONNECTOR #24543369: Keep PP 20MA DISPLAY / TOUCH FLEX CONNECTOR 516S00138 RCPT (USED ON MLB) 516S00137 PLUG 10MA 10MA 50MA 20MA 70MA 100MA 100MA THIS ONE ---> 516S00152 RCPT (USED ON MLB) THIS ONE ---> THIS PAGE UNIQUE TO SMALL FORM FACTORUTAH-C FLEX CONNECTOR THIS ONE ---> 516S00145 PLUG 516S00146 RCPT (USED ON MLB) GND I2C_TOUCH_BI_MAMBA_SDA 47 MAKE_BASE=TRUE I2C_TOUCH_TO_MAMBA_SCL472 1 R4501 1PP4501 2 1 C4507 21 XW4501 2221 2019 1817 1615 1413 1211 109 87 65 43 21 J4504 46 45 4443 4241 4039 3837 3635 3433 3231 3029 2827 2625 2423 2221 2019 1817 1615 1413 1211 109 87 65 43 21 J4502 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 J4501 3635 3433 3231 3029 2827 2625 2423 2221 2019 1817 1615 1413 1211 109 87 65 43 21 42 41 4039 3837 J4503 AP_TO_UT_CLK_CONN 90_LPDP_UT_TO_AP_D1_CONN_P 90_LPDP_UT_TO_AP_D1_CONN_N 90_LPDP_UT_TO_AP_D0_CONN_P PP3V0_ALS_CONVOY_CONN ALS_TO_AP_INT_CONN_L I2C_ALS_CONVOY_SCL_CONN 90_MIPI_NH_TO_AP_DATA0_P PDM_ADARE_TO_CONVOY_CLK_CONN PDM_CONVOY_TO_ADARE_DATA_CONN SPEAKERAMP2_TO_SPEAKER_OUT_POS 90_MIPI_NH_TO_AP_CLK_P 90_MIPI_NH_TO_AP_CLK_N 90_MIPI_NH_TO_AP_DATA0_N SPEAKERAMP2_TO_SPEAKER_OUT_NEG PP3V0_PROX_CONN I2C_PROX_SCL_CONN FRONTMIC3_TO_CODEC_AIN4_CONN_P 90_LPDP_UT_TO_AP_D0_CONN_N AP_TO_NH_SHUTDOWN_CONN_L PP1V2_NH_DVDD_CONN PP2V9_NH_AVDD_CONN PP2V9_UT_AVDD_CONN STROBE_MODULE_NTC_CONN PP1V8_HAWKING_CONN REARMIC2_TO_CODEC_BIAS_FILT_RET REARMIC2_TO_CODEC_AIN3_CONN_N PP_CODEC_TO_REARMIC2_BIAS_CONN PP_STROBE_DRIVER2_COOL_LED HAWKING_TO_CODEC_AIN7_N_CONN PP_CODEC_TO_FRONTMIC3_BIAS_CONN FRONTMIC3_TO_CODEC_AIN4_CONN_N SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P I2C_NH_SCL_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N I2C_PROX_SDA_CONN I2C_ALS_CONVOY_SDA_CONN I2C_NH_SDA_CONN I2C_UT_SCL_CONN UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN AP_TO_UT_SHUTDOWN_CONN_L I2C_UT_SDA_CONN PP3V0_UT_SVDD_CONN PP2V8_UT_AF_VAR_CONN PP1V8_UT_CONN I2C_DISP_EEPROM_SCL_CONN 90_MIPI_AP_TO_LCM_CLK_CONN_N 90_MIPI_AP_TO_LCM_DATA1_CONN_P AP_TO_CUMULUS_CLK_32K_CONN SPI_AP_TO_TOUCH_MOSI_CONN SPI_TOUCH_TO_AP_MISO_CONN I2C_MIC2_SDA_CONN I2C_MIC2_SCL_CONN BUTTON_POWER_KEY_CONN_L PP_STROBE_DRIVER1_COOL_LED BUTTON_VOL_UP_CONN_L HAWKING_TO_CODEC_AIN7_P_CONN BUTTON_RINGER_A_CONN PP_STROBE_DRIVER2_WARM_LED PP_STROBE_DRIVER1_WARM_LED PP1V8_NH_IO_CONN AP_TO_NH_CLK_CONN 90_MIPI_NH_TO_AP_DATA1_P 90_MIPI_NH_TO_AP_DATA1_N PROX_BI_AP_AOP_INT_PWM_L_CONN PP1V2_UT_VDD_CONN LPDP_UT_BI_AP_AUX_CONN TOUCH_TO_AP_INT_L_CONN PP5V1_TOUCH_VDDH_CONN PP1V8_TOUCH_CONN PP1V8_LCM_CONN PN5V7_LCM_MESON_AVDDN_CONN PP5V7_MESON_AVDDH_CONN PP5V7_LCM_AVDDH_CONN LCM_TO_CHESTNUT_PWR_EN_CONN PP_LCM_BL_CAT2_CONN UART_TOUCH_TO_AOP_RXD_CONN 90_MIPI_AP_TO_LCM_DATA0_CONN_P 90_MIPI_AP_TO_LCM_CLK_CONN_P PP_LCM_BL_ANODE_CONN MAMBA_TO_LCM_MDRIVE AP_TO_LCM_RESET_CONN_L PP_LCM_BL_CAT1_CONN PMU_TO_LCM_PANICB_CONN LCM_TO_MAMBA_MSYNC_CONN TP_LCM_PIFA UART_AOP_TO_TOUCH_TXD_CONN SPI_AP_TO_TOUCH_CS_CONN_L SPI_AP_TO_TOUCH_SCLK_CONN 90_MIPI_AP_TO_LCM_DATA0_CONN_N LCM_TO_MANY_BSYNC_CONN I2C_DISP_EEPROM_SDA_CONN 90_MIPI_AP_TO_LCM_DATA1_CONN_N AP_TO_TOUCH_MAMBA_RESET_CONN_L I2C_TOUCH_SCL_CONN BUTTON_VOL_DOWN_CONN_L REARMIC2_TO_CODEC_AIN3_CONN_P 1/32W 1% 49.9 01005 MF ROOM=DISPLAY_B2B P2MM-NSM SM ROOM=TEST ROOM=DISPLAY_B2B 5% 01005 56PF 25V NP0-C0G-CERM ROOM=RIGHT_BUTTON SHORT-20L-0.05MM-SM AA37D-S014SVA1 F-ST-SM BB35C-RA40-3A F-ST-SM AA26D-S022VA1 F-ST-SM ROOM=RCAM_B2B 245858036201829 CRITICAL ROOM=FOREHEAD F-ST-SM 25 25 25 25 29 29 47 9 29 29 463329 9 9 9 463329 29 48 29 25 29 29 29 46 25 44 44 32 44 44 4426 44 29 29 29 48 29 48 47 48 48 25 25 48 25 25 25 47 39 39 39 39 39 47 47 44 44 26 44 44 44 4426 44 26 29 29 9 9 29 25 25 39 39 39 39 39 39 39 39 39 4 39 39 39 39 4 38 39 39 4 39 38 39 39 39 39 39 47 39 3938 44 44 PP 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
UT B2B Dock B2B (Pg 41) Top Speaker Compass Coil OTHER SMALL FORM FACTOR SPECIFIC PAGES: THIS PAGE UNIQUE TO SMALL FORM FACTOR 4 - MECHANICAL ISP I2C1 NC Nets in Small FF ACC Buck Caps #26682438:Move to Page 46 TOUCH I2C #25742582,Add back C3531 in layout at ARC Pg37Pg35Pg21 #26104509:C3525 Change to 1UF 0201 in DVT Pg34 #26634069:D10x Only, 5x VDD_MAIN CAPS Change to 10UF/10V VDD_MAIN Cap I2C_ISP_NV_SDA 26 I2C_ISP_NV_SCL 26 NC_AP_LPDP_AUX210 NC_90_LPDP_NV_TO_AP_D3_P10 NC_90_LPDP_NV_TO_AP_D3_N10 NC_90_LPDP_NV_TO_AP_D2_N10 NC_90_LPDP_NV_TO_AP_D2_P10 2 1C3424 2 1C2113 2 1C3530 2 1C3722 2 1 R4711 2 1C3525 2 1 C2707 2 1C3531 2 1 R3333 2 1 C3333 2 1 XW3333 2 1 R3332 2 1 C3332 2 1 FL4604 2 1 C4608 2 1 C2531 2 1 C2507 2 1 R4604 2 1 R4603 2 1C4601 PP2V9_UT_AVDD_CONN PP_VDD_MAIN PP_VDD_MAINPP_VDD_MAIN I2C_TOUCH_TO_MAMBA_SCL PP1V8_TOUCH PP_ACC_VAR MAKE_BASE=TRUEI2C_ISP_NV_SDA MAKE_BASE=TRUE NC_AP_LPDP_AUX2 NC_90_LPDP_NV_TO_AP_D2_N MAKE_BASE=TRUE NC_90_LPDP_NV_TO_AP_D2_P MAKE_BASE=TRUE PP1V8 MAKE_BASE=TRUEI2C_ISP_NV_SCL NEG_COMPASS_COIL_COMP POS_COMPASS_COIL_COMP MAKE_BASE=TRUE NC_90_LPDP_NV_TO_AP_D3_N NC_90_LPDP_NV_TO_AP_D3_P MAKE_BASE=TRUE BB_TO_LAT_GPO3 SPEAKERAMP2_TO_SPEAKER_OUT_POS SPEAKERAMP2_TO_SPEAKER_OUT_NEG BB_TO_LAT_GPO3_CONN 10V X5R-CERM ROOM=SPKAMP1 20% 10UF 0402-8 10V X5R-CERM ROOM=CHARGER 20% 10UF 0402-8 10UF 20% 10V X5R-CERM ROOM=ARC1 0402-8 X5R-CERM 10V 20% 10UF ROOM=CHESTNUT 0402-8 NOSTUFF ROOM=MAMBA_MESA 10K 01005 1/32W 5% MF 6.3V 20% ROOM=ARC1 0201-1 X5R 1.0UF 0201-1 ROOM=TRISTAR 20% 2.2UF X5R-CERM 6.3V 10UF X5R-CERM 0402-8 10V ROOM=ARC1 20% 01005 1% 1/32W ROOM=SPKAMP2 TK 910 01005 5% 10V 220PF ROOM=SPKAMP2 C0G-CERM SHORT-20L-0.05MM-SM OMIT ROOM=MAMBA_MESA NO_XNET_CONNECTION 910 1% 1/32W 01005 ROOM=SPKAMP2 TK 220PF 5% ROOM=SPKAMP2 01005 C0G-CERM 10V ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR 01005 25V ROOM=DOCK_B2B NP0-C0G-CERM 5% 56PF 2.2UF 20% 6.3V 0201-1 ROOM=RCAM_B2B X5R-CERM 6.3V ROOM=RCAM_B2B 2.2UF 20% X5R-CERM 0201-1 ROOM=SOC 1/32W 2.2K MF 5% 0100501005 1/32W 5% ROOM=SOC MF 2.2K X5R-CERM VOLTAGE=10V 20% 10UF ROOM=BACKLIGHT 0402-8 45 25 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 47 47 39 38 18 40 27 19 9 52 48 47 39 29 25 18 17 16 13 12 11 9 8 7 5 9 53 453329 453329 41 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
TO FOREHEAD FLEX I2C3 #26633265:mitigate MIC1 undershoot #24544426 D11/111 ONLY #26682438:Move to Page 46 ADDING R3803, R3804 AS OPTION FOR TWEAKING VALUE NOTE:MAMBA I2C 2.2K PULL-UPS TO PP1V8_TOUCH INSIDE GALILEO TOUCH I2C5 TO DOCK FLEX TO MAMBA / MESA FLEX TO DISPLAY FLEX AP TO DISPLAY / TOUCH FLEX I2C0 TO COMBINED BUTTON FLEX I2C2 #24544434 I2C1 HOMER I2C1_AP_SDA 20 I2C1_AP_SCL 20 I2C0_AP_SCL 37 I2C0_AP_SCL 40 I2C0_AP_SDA 40 I2C0_AP_SDA 23 I2C0_AP_SCL 20 37 I2C0_AP_SDA 37 I2C0_AP_SDA 37 I2C_TOUCH_TO_MAMBA_SCL 38 I2C2_AP_SCL 33 I2C2_AP_SDA 33 I2C0_AP_SCL 23 I2C1_AP_SCL 21 I2C1_AP_SDA 21 I2C1_AP_SCL I2C1_AP_SDA I2C_TOUCH_TO_MAMBA_SCL 45 I2C_TOUCH_BI_MAMBA_SDA 45 I2C_TOUCH_BI_MAMBA_SDA 38 ckplus_waive=I2C_PULLUP CKPLUS_WAIVE=I2C_PULLUP 2 1 FL4729 2 1 R4715 2 1 R4716 2 1 R4703 2 1 R4704 2 1 C4704 2 1C4703 2 1 FL4741 2 1 FL4742 2 1 C4741 2 1 C4742 2 1 R4714 2 1 R4713 2 1 R4702 2 1 R4701 2 1 FL4731 2 1 FL4732 2 1 C4731 2 1C4732 21 R4708 21 R4707 2 1 FL4730 2 1 C4702 2 1C4701 2 1C4730 2 1 C4729 2 1 R4709 2 1 R4710 2 1 R4712 2 1C4711 2 1 C4712 2 1 C4710 2 1C4709 2 1C4707 2 1 C4708 2 1 R4705 2 1 R4706 I2C3_AP_SCL I2C3_AP_SDA PP1V8_SDRAM I2C5_SCL I2C5_SDA PP1V8 I2C_HOMER_SCL MAKE_BASE=TRUEI2C1_AP_SCL MAKE_BASE=TRUEI2C1_AP_SDA PP1V8 I2C_DISP_EEPROM_SCL_CONN I2C_DISP_EEPROM_SDA_CONN I2C_ALS_CONVOY_SCL_CONN PP1V8 I2C_ALS_CONVOY_SDA_CONN PP1V8 MAKE_BASE=TRUEI2C2_AP_SDA MAKE_BASE=TRUEI2C2_AP_SCL I2C_HOMER_SDA CKPLUS_WAIVE=I2C_PULLUP I2C_MIC2_SDA_CONN CKPLUS_WAIVE=I2C_PULLUP I2C_MIC2_SCL_CONN PP1V8_TOUCH MAKE_BASE=TRUEI2C0_AP_SDA MAKE_BASE=TRUEI2C0_AP_SCL I2C_TOUCH_BI_MAMBA_SDA MAKE_BASE=TRUE I2C_TOUCH_TO_MAMBA_SCL MAKE_BASE=TRUE PP1V8 I2C_MIC1_SCL_CONN I2C_MIC1_SDA_CONN 01005 2.2K ROOM=SOC MF 1/32W 5% ROOM=SOC 5% MF 01005 1/32W 2.2K ROOM=DOCK MF 01005 5% 1/32W 100 5% 01005 1/32W ROOM=SOC MF 2.2K 5% 1/32W 2.2K ROOM=SOC 01005 MF 1% MF 1/32W 01005 4.02K ROOM=SOC 1% 01005 1/32W MF 4.02K ROOM=SOC ROOM=PMU 25V 56PF 01005 NOSTUFF NP0-C0G-CERM 5% NP0-C0G-CERM 01005 25V ROOM=PMU NOSTUFF 5% 56PF ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR 01005 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR 01005 56PF NP0-C0G-CERM 01005 ROOM=DISPLAY_B2B 5% 25V ROOM=DISPLAY_B2B 01005 56PF NP0-C0G-CERM 5% 25V ROOM=HOMER 5% 01005 MF 1/32W 1.00K MF 1.00K 5% 01005 1/32W ROOM=HOMER 1/32W 01005 ROOM=SOC 1% MF 4.02K ROOM=SOC 01005 4.02K 1/32W MF 1% ROOM=RIGHT_BUTTON 01005 150OHM-25%-200MA-0.7DCR 01005 ROOM=RIGHT_BUTTON 150OHM-25%-200MA-0.7DCR 56PF 5% 25V 01005 NP0-C0G-CERM ROOM=RIGHT_BUTTONROOM=RIGHT_BUTTON NP0-C0G-CERM 01005 25V 5% 56PF 0% 01005 MF ROOM=FOREHEAD 1/32W 0.00 0% MF 1/32W 01005 0.00 ROOM=FOREHEAD 01005 ROOM=DOCK 150OHM-25%-200MA-0.7DCR 56PF 5% 25V NOSTUFF NP0-C0G-CERM 01005 ROOM=SOC 5% 25V 56PF 01005 ROOM=SOC NOSTUFF NP0-C0G-CERM NP0-C0G-CERM ROOM=DOCK_B2B 01005 5% 56PF 25V NP0-C0G-CERM ROOM=DOCK_B2B 01005 25V 5% 56PF MF 2.2K 5% ROOM=SOC 01005 1/32W MF 5% 1/32W 01005 ROOM=SOC 2.2K 10K 1/32W ROOM=MAMBA_MESA MF NOSTUFF 5% 01005 NP0-C0G-CERM ROOM=DISPLAY_B2B 01005 56PF 25V 5% NP0-C0G-CERM 01005 25V 5% 56PF ROOM=DISPLAY_B2B NP0-C0G-CERM 25V 56PF ROOM=MAMBA_MESA 5% NOSTUFF 01005 NOSTUFF ROOM=MAMBA_MESA 5% 01005 25V 56PF NP0-C0G-CERM 25V 5% ROOM=FOREHEAD 01005 NP0-C0G-CERM 56PF 25V 5% 01005 ROOM=FOREHEAD NP0-C0G-CERM 56PF 11 11 53 52 48 41 40 37 36 32 21 20 18 16 11 11 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4136 11 11 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 45 45 45 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 45 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 11 11 4136 45 45 46 39 38 18 11 11 46 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 41 41 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
#24958320:Intentional R4815 Change Intentional R4815 Change TO FCAM FLEX TO MAMBA/MESA FLEX See page 46 I2C0I2C AOP Reduce undershoot when Prox Driving I2C2 I2C1 ISP #24544699: Support 1MHz #24550735: ISP I2C0 PU CKPLUS_WAIVE=I2C_PULLUP I2C_AOP_SCL 35 I2C_AOP_SCL 34 I2C_AOP_SDA 34 CKPLUS_WAIVE=I2C_PULLUP I2C_ISP_UT_SCL 26 CKPLUS_WAIVE=I2C_PULLUP CKPLUS_WAIVE=I2C_PULLUP CKPLUS_WAIVE=I2C_PULLUP I2C_AOP_SDA 35 I2C_ISP_UT_SDA 26 CKPLUS_WAIVE=I2C_PULLUP 2 1 R4802 2 1 R4801 2 1 R4815 2 1 R4811 2 1 R4810 2 1 FL4815 2 1 R4805 2 1 C4810 2 1 C4809 4 1 3 5 6 2 U4806 4 1 3 5 6 2 U4805 2 1 C4803 2 1 C4804 B1 B2 A2 A1 U4802 2 1 C4807 2 1 R4803 2 1 R4804 2 1 R4806 2 1 R4807 21 R4813 21 R4812 2 1 R4808 2 1 R4809 21 R4817 2 1 C4816 2 1 C4817 21 R4816 2 1 C4813 2 1 C4812 I2C_AOP_SDA MAKE_BASE=TRUE I2C_AOP_SDA_ISO AOP_TO_MESA_I2C_ISO_EN I2C_PROX_SCL_CONN PP1V8_SDRAM I2C_AOP_SCL_ISO PP1V8_SDRAM I2C_PROX_SDA_CONN PP1V8_SDRAM PP1V8_MESA PP1V8 I2C_UT_SCL_CONN I2C_MESA_TURTLE_SCL_CONN MAKE_BASE=TRUEI2C_ISP_NH_SDA I2C_MESA_TURTLE_SDA_CONN I2C_NH_SDA_CONN I2C_NH_SCL_CONN MAKE_BASE=TRUEI2C_AOP_SCL I2C_UT_SDA_CONN I2C_ISP_NH_SCL MAKE_BASE=TRUE PP1V8 I2C_ISP_UT_SCL MAKE_BASE=TRUE PP1V8_SDRAM I2C_ISP_UT_SDA MAKE_BASE=TRUE 0.00 1/32W0% 01005MF ROOM=MAMBA_MESA 0% MF ROOM=MAMBA_MESA 1/32W 01005 0.00 1/32W ROOM=FOREHEAD 0.00 MF 0% 01005 0.00 0% 1/32W MF ROOM=FOREHEAD 01005 1.00K ROOM=SOC 1/32W 01005 5% MF 1.00K ROOM=SOC 1/32W 01005 MF 5% ROOM=RCAM_B2B 0.00 MF 1/32W 0% 01005 25V ROOM=RCAM_B2B 01005 NP0-C0G-CERM 5% 56PF ROOM=RCAM_B2B 5% 01005 56PF 25V NP0-C0G-CERM ROOM=RCAM_B2B 1/32W 0.00 01005 0% MF ROOM=FOREHEAD 01005 NP0-C0G-CERM 56PF 25V 5% 56PF 5% ROOM=FOREHEAD 25V NP0-C0G-CERM 01005 2.2K 1/32W 5% 01005 MF 5% MF 2.2K 01005 1/32W 1% 33.2 01005 MF 1/32W ROOM=FOREHEAD ROOM=SOC 5% 01005 MF 1/32W 2.2K2.2K ROOM=SOC 01005 MF 1/32W 5% 01005 150OHM-25%-200MA-0.7DCR ROOM=FOREHEAD MF 1/32W 1% 01005 511K 56PF 5% 25V 01005 NP0-C0G-CERM ROOM=MAMBA_MESA 56PF ROOM=MAMBA_MESA 01005 25V NP0-C0G-CERM 5% X2SON6 74LVC1G3157GX X2SON6 74LVC1G3157GX ROOM=FOREHEAD 56PF 25V 5% 01005 NP0-C0G-CERM 56PF 25V 01005 ROOM=FOREHEAD 5% NP0-C0G-CERM WLP MAX20312 ROOM=SOC 0.1UF20% 6.3V 01005 X5R-CERM ROOM=SOC 1% 1/32W MF 4.7K 01005 ROOM=MAMBA_MESA 1/32W 1% 01005 4.7K MF ROOM=MAMBA_MESA 13 13 45 535248 47414037363221201816 535248 47414037363221201816 45 53 52 48 47 41 40 37 36 32 21 20 18 16 38 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 45 38 9 38 45 45 13 45 9 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 9 53 52 48 47 41 40 37 36 32 21 20 18 16 9 NC GND S VCC Z Y0 Y1 NC GND S VCC Z Y0 Y1 GND IOVCC1 VCC IOVCC2 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
This page contains items which differ accross all MLB designs PCIe lanes #24556007:Parallel to 100kohm R5906_RF(nostuff) #24535276: D101 EVT 1x Desense Cap (220pF) #24535235: D10 EVT 1x Desense Cap (68pF)#25811920: D10 CRB: 2x 01005 Cap for Backlight Desense D101 CRB: No additional Cap PCIE_AP_TO_WLAN_RESET_L8 PCIE_WLAN_BI_AP_CLKREQ_L8 PCIE_BB_BI_AP_CLKREQ_L8 PCIE_AP_TO_BB_RESET_L8 90_PCIE_AP_TO_BB_REFCLK_N8 90_PCIE_AP_TO_WLAN_REFCLK_P8 90_PCIE_AP_TO_WLAN_REFCLK_N8 90_PCIE_AP_TO_BB_REFCLK_P8 2 1 C2620 2 1 C2619 2 1 R5206 2 1 C1756 1 PP0801 1 PP0802 21 C0816 21 C0817 21 C0815 21 C0818 2 1 R0807 21 C0811 21 C0812 21 C0814 21 C0813 PP_VDD_MAIN PCIE_WLAN_BI_AP_CLKREQ_L MAKE_BASE=TRUE PP3V0_NAND PCIE_BB_BI_AP_CLKREQ_L PP1V8_SDRAM MAKE_BASE=TRUE90_PCIE_WLAN_TO_AP_RXD_P 90_AP_PCIE2_TXD_C_N 90_AP_PCIE2_TXD_C_P 90_AP_PCIE3_RXD_C_P 90_AP_PCIE3_RXD_C_N MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_REFCLK_N MAKE_BASE=TRUE90_PCIE_WLAN_TO_AP_RXD_N MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_TXD_P MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_REFCLK_P MAKE_BASE=TRUE90_PCIE_AP_TO_BB_REFCLK_P MAKE_BASE=TRUEPCIE_AP_TO_WLAN_RESET_L MAKE_BASE=TRUE90_PCIE_BB_TO_AP_RXD_P 90_PCIE_AP_TO_BB_REFCLK_N MAKE_BASE=TRUE 90_AP_PCIE2_RXD_C_P 90_AP_PCIE3_TXD_C_P 90_AP_PCIE3_RXD_C_N 90_AP_PCIE2_RXD_C_N 90_AP_PCIE3_TXD_C_N MAKE_BASE=TRUE90_PCIE_AP_TO_BB_TXD_P MAKE_BASE=TRUE90_PCIE_BB_TO_AP_RXD_N MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_TXD_N PP1V8 90_AP_PCIE3_RXD_C_P PCIE_WLAN_BI_AP_CLKREQ_L MAKE_BASE=TRUE90_PCIE_AP_TO_BB_TXD_N PCIE_BB_BI_AP_CLKREQ_L MAKE_BASE=TRUE PCIE_AP_TO_BB_RESET_L MAKE_BASE=TRUE 5% 220PF 10V C0G-CERM 01005 ROOM=STROBEROOM=STROBE 01005 5% 25V NP0-C0G-CERM 56PF 1/32W 100K MF 1% 01005 ROOM=RADIO_BB 68PF NP0-C0G 01005 ROOM=NAND 16V 5% SM ROOM=SOC P2MM-NSM P2MM-NSM ROOM=SOCSM 0.1UF 01005 6.3V20% X5R-CERM GND_VOID=TRUEROOM=SOC 20% 6.3V 0.1UF 01005X5R-CERM GND_VOID=TRUEROOM=SOC X5R-CERM 0.1UF 01005 6.3V20% GND_VOID=TRUEROOM=SOC 0.1UF 20% 6.3V 01005X5R-CERM GND_VOID=TRUEROOM=SOC 100K 5% 01005 ROOM=SOC MF 1/32W 20% 01005 6.3V X5R-CERM ROOM=SOC GND_VOID=TRUE 0.1UF GND_VOID=TRUE 01005 6.3V 0.1UF 20%ROOM=SOC X5R-CERM 0.1UF 20% 6.3V 01005X5R-CERM ROOM=SOC GND_VOID=TRUE X5R-CERM 01005 0.1UF 6.3V GND_VOID=TRUE ROOM=SOC 20% 53 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 5352 1917 53 52 53 48 47 41 40 37 36 32 21 20 18 16 53 8 8 528 528 53 53 53 53 53 53 53 53 8 8 8 8 8 53 53 53 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 8 52 53 5352 53 PP PP 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
Cellular FF SPECIFIC NFC Wifi/BT Opposite polarity on Karoo --> To LAT To UAT AP_TO_ICEFALL_FW_DWLD_REQ12 MAKE_BASE=TRUE MAKE_BASE=TRUE 1 PP5304 1PP5301 1PP5302 1PP5303 PP_VDD_BOOST PP1V8_SDRAM PP_VDD_MAIN BBPMU_TO_PMU_AMUX1 90_PCIE_BB_TO_AP_RXD_P AOP_TO_WLAN_CONTEXT_B UART_AP_TO_WLAN_RTS_L UART_BT_TO_AP_RXD PMU_TO_BB_USB_VBUS_DETECT I2S_AP_TO_BT_DOUT 90_USB_BB_DATA_P SWD_AP_TO_MANY_SWCLK SWD_AOP_BI_BB_SWDIO UART_AOP_TO_BB_TXD I2S_BB_TO_AP_BCLK BB_TO_PMU_PCIE_HOST_WAKE_L PCIE_BB_BI_AP_CLKREQ_L 90_PCIE_BB_TO_AP_RXD_N 90_PCIE_AP_TO_BB_TXD_N 90_PCIE_AP_TO_BB_REFCLK_N UART_BB_TO_AOP_RXD I2S_BB_TO_AP_LRCLK I2S_AP_TO_BB_DOUT I2S_BB_TO_AP_DIN 90_PCIE_AP_TO_BB_REFCLK_P 90_PCIE_AP_TO_BB_TXD_PUART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_CTS_L UART_AP_TO_NFC_TXD UART_NFC_TO_AP_RXD UART_AP_TO_NFC_RTS_L UART_NFC_TO_AP_CTS_L AP_TO_WLAN_DEVICE_WAKE 90_PCIE_AP_TO_WLAN_TXD_N 90_PCIE_AP_TO_WLAN_REFCLK_P WLAN_TO_PMU_HOST_WAKE 90_PCIE_AP_TO_WLAN_TXD_P AP_TO_BT_WAKE PP_VDD_MAIN UART_AP_TO_BT_RTS_L BT_TO_PMU_HOST_WAKE 90_PCIE_AP_TO_WLAN_REFCLK_N 90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N PCIE_AP_TO_WLAN_RESET_L UART_WLAN_TO_AP_RXD PP1V8_SDRAM PCIE_WLAN_BI_AP_CLKREQ_L UART_AP_TO_WLAN_TXD PMU_TO_BT_REG_ON PMU_TO_WLAN_REG_ON PMUGPIO_TO_WLAN_CLK32K UART_AP_TO_BT_TXD I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK AOP_TO_WLAN_CONTEXT_A NFC_SWP_MUX SE2_PRESENT NFC_SWP 50_UAT_WLAN_2G_EAST 50_UAT_WLAN_5G_WEST 50_LAT_WLAN_A_1 50_LAT_WLAN_G_1 50_LAT_WLAN_5G_EAST 50_UAT2_M BB_TO_LAT_ANT_SCLK NFC_SWP UART_BB_TO_WLAN_COEX PCIE_AP_TO_BB_RESET_L LCM_TO_MANY_BSYNC BB_TO_AP_RESET_DETECT_L BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX2 AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L AP_TO_BB_RESET_L UART_WLAN_TO_BB_COEX BB_TO_LAT_ANT_DATA PP_VDD_MAIN PP1V8_SDRAM PMU_TO_NFC_EN AP_TO_NFC_FW_DWLD_REQ AP_TO_NFC_DEV_WAKE NFC_TO_PMU_HOST_WAKE PP3V0_TRISTAR_ANT_PROX PP1V8_SDRAM BB_TO_UAT_DATA BB_TO_UAT_SCLK 50_UAT1_TUNER 50_UAT1_WEST BB_TO_STROBE_DRIVER_GSM_BURST_IND AP_TO_BB_MESA_ON AP_TO_BB_TIME_MARK AP_TO_BB_COREDUMP AP_TO_BB_IPC_GPIO1 MAKE_BASE=TRUE AP_TO_ICEFALL_FW_DWLD_REQ ICEFALL_LDO_ENABLE 50_UAT_LB_MLB_SOUTH 50_UAT_MB_HB_SOUTH 50_UUAT_LB_MLB_NORTH 90_USB_BB_DATA_N 50_UAT_WLAN_2G_WEST_PLEXER BB_BUFFER_GPO1 BB_BUFFER_GPO2 BB_TO_LAT_ANT_SCLK SE2_READY SE2_PWR_REQ BB_TO_LAT_ANT_DATA BB_TO_LAT_GPO1 BB_TO_LAT_GPO2 BB_TO_LAT_GPO3 BB_TO_NFC_CLK NFC_TO_BB_CLK_REQ SE2_PRESENT NFC_SWP_MUX I2S_AP_TO_BT_BCLK ROOM=UAT_DEBUG P2MM-NSM SM I2 TRUE I16 ieee ieee.std_logic_1164.all work.all I15 SM P2MM-NSM ROOM=UAT_DEBUG SM P2MM-NSM ROOM=UAT_DEBUG P2MM-NSM SM ROOM=UAT_DEBUG 65 38 37 32 25 23 19 68 60 58 55 53 52 48 47 41 40 37 36 32 21 20 18 16 77 58 55 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 65 20 67 52 55 13 55 12 55 12 64 20 55 11 67 40 67 36 17 13 67 13 68 13 68 11 68 20 68 52 67 52 67 52 67 52 68 13 68 11 68 11 68 11 67 52 67 5255 12 55 12 58 12 58 12 58 12 58 12 55 12 55 52 55 52 55 20 55 52 55 12 77 58 55 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 55 12 55 20 55 52 55 52 55 52 55 52 55 12 68 60 58 55 53 52 48 47 41 40 37 36 32 21 20 18 16 55 52 55 12 55 20 55 20 55 20 55 12 55 11 55 11 55 13 78 58 53 81 58 53 81 58 53 59 56 68605341 81 58 53 68 55 68 52 64 39 23 20 13 68 12 69 20 65 20 64 12 64 20 64 12 68 55 68605341 77 58 55 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 68 60 58 55 53 52 48 47 41 40 37 36 32 21 20 18 16 58 20 58 12 58 12 58 20 6041402919 68605855535248 47414037363221201816 76 60 75 59 68 37 26 68 12 68 12 68 12 68 12 78 78 58 73 59 73 59 75 59 67 40 76 59 68 60 68 60 68 60 53 41 78 58 78 58 68 60 53 41 68 41 68 41 68 46 64 58 64 58 81 58 53 78 58 53 55 11 PP STOCKHOLM_MLB ICEFALL_LDO_ENABLE AP_TO_NFC_DEV_WAKE AP_TO_NFC_FW_DWLD NFC_TO_BB_CLK_REQ PMU_TO_NFC_EN BB_TO_NFC_CLK NFC_SWP_MUX SE2_PRESENT UART_NFC_TO_AP_RXD PP_VDD_MAIN PP1V8_SDRAM UART_AP_TO_NFC_RTS_L SE2_PWR_REQ SE2_READY NFC_SWP UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_TXD NFC_TO_PMU_HOST_WAKE BB_TO_AP_RESET_ACT_L PMU_TO_GNSS_EN AP_TO_GNSS_TIME_MARK UART_AP_TO_GNSS_RTS_L GNSS_TO_PMU_HOST_WAKE UART_GNSS_TO_AP_CTS_L UART_GNSS_TO_AP_RXD UART_AP_TO_GNSS_TXD UART_AOP_TO_GNSS_TXD UART_GNSS_TO_AOP_RXD UART_BB_TO_AP_RXD UART_AP_TO_BB_TXD AP_TO_BB_IPC_GPIO2 RADIO_MLB AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L UART_BB_TO_AOP_RXD UART_AOP_TO_BB_TXD PCIE_BB_TO_PMU_WAKE_L AP_TO_BB_COREDUMP_TRIG TOUCH_TO_BBPMU_FORCE_PWM AP_TO_BB_IPC_GPIO 100_PCIE_AP_TO_BB_TX_P 50_UAT_WLAN_2G_WEST_PLEXER 50_UAT_LB_MLB_SOUTH UART_WLAN_TO_BB_COEX I2S_BB_TO_AP_DIN 100_PCIE_AP_TO_BB_TX_N 100_PCIE_BB_TO_AP_RX_P 100_PCIE_BB_TO_AP_RX_N PCIE_AP_TO_BB_PERST_L PCIE_AP_BI_BB_CLKREQ_L SWD_AP_TO_BB_CLK SWD_AP_BI_BB_IO USB_BB_VBUS 90_USB_BB_P 90_USB_BB_N 50_UAT_MB_HB_SOUTH 50_UUAT_LB_MLB_NORTH 50_UAT1_WEST UAT_RFFE_CLK BUFFER_GPO1 UAT_RFFE_DATA 50_UAT1_TUNER BUFFER_GPO2 LAT_RFFE_CLK LAT_RFFE_DATA RFFE_GPO1 RFFE_GPO2 RFFE_GPO3 NFC_SWP NFC_TO_BB_CLKREQ BB_TO_NFC_CLK NFC_SWP_MUX SE2_READY ICEFALL_LDO_ENABLE SE2_PRESENT SE2_PWR_REQ PP_VDD_MAIN AP_TO_BB_TIME_MARK BBPMU_TO_PMU_AMUX2 AP_TO_BB_MESA_ON AP_TO_BB_RESET_L BBPMU_TO_PMU_AMUX3 BB_TO_AP_RESET_DETECT_L BB_TO_AP_GSM_TXBURST I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_LRCLK I2S_AP_TO_BB_DOUT UART_BB_TO_WLAN_COEX AP_TO_ICEFALL_FW_DWLD PP1V8_SDRAM BBPMU_TO_PMU_AMUX1 PP_VDD_BOOST_RF 100_PCIE_AP_TO_BB_REFCLK_P 100_PCIE_AP_TO_BB_REFCLK_N RADIO_MLB_FF BB_TO_LAT_ANT_SDATA BB_TO_LAT_ANT_SCLK BUFFER_GPO2 BUFFER_GPO1 UAT_TUNER_RFFE_DATA UAT_TUNER_RFFE_CLK VDD_TUNER_RFFE_VIO_1V8 PP3V0_TRISTAR_ARC_PROX 50_UAT2_M 50_UAT_WLAN_5G_EAST 50_WLAN_G_1 50_WLAN_A_1 50_UAT_MB_HB_SOUTH 50_UAT_LB_MLB_SOUTH 50_UAT_WLAN_5G_WEST 50_UAT_WLAN_2G_EAST 50_UAT1_TUNER 50_UUAT_LB_MLB_NORTH 50_UAT_WLAN_2G_WEST_PLEXER 50_UAT1_WEST PP PP PP WIFI_MLB 50_UAT2_M 50_UAT_WLAN_5G_WEST I2S_AP_TO_BT_DOUT UART_WLAN_TO_BB_COEX 50_WLAN_G_1 UART_AP_TO_BT_TXD UART_WLAN_TO_AP_CTS_L I2S_BT_TO_AP_DIN AP_TO_WLAN_DEV_WAKE 100_PCIE_AP_TO_WLAN_TX_N 100_PCIE_AP_TO_WLAN_REFCLK_P UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L UART_BT_TO_AP_CTS_L UART_AP_TO_WLAN_TXD PCIE_WLAN_TO_PMU_WAKE 100_PCIE_AP_TO_WLAN_TX_P 100_PCIE_WLAN_TO_AP_RX_P PMU_TO_BT_REG_ON PP_VDD_MAIN 100_PCIE_WLAN_TO_AP_RX_N PP1V8_SDRAM BT_TO_PMU_HOST_WAKE UART_BB_TO_WLAN_COEX I2S_AP_TO_BT_LRCK I2S_AP_TO_BT_BCLK AOP_TO_WLAN_CONTEXT_B AOP_TO_WLAN_CONTEXT_A 50_UAT_WLAN_2G_EAST AP_TO_BT_WAKE PMU_TO_WLAN_32K PMU_TO_WLAN_REG_ON 100_PCIE_AP_TO_WLAN_REFCLK_N PCIE_AP_TO_WLAN_PERST_L PCIE_AP_BI_WLAN_CLKREQ_L 50_UAT_WLAN_5G_EAST 50_WLAN_A_1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D11_JP: C7700_RF,C7702_RF, C7703_RF,C7704_RF NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF, C7707_RF NOSTUFF:C7706_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF C7700_RF,C7702_RF, C7703_RF,C7704_RF D111_WIFI: BOM OPTIONS: FEBRUARY 1, 2016 D1X WIFI_MLB (PERENNIAL) C7700_RF, C7703_RF,C7704_RF D10_ROW: NOSTUFF: C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF C7700_RF, C7703_RF,C7704_RF D10_JP: BLUETOOTH UART POWER WLAN PCIE CONTROL CLOCKS WLAN UART AOP AUDIO COEX ANTENNA D11_ROW: NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF D101_WIFI: C7700_RF, C7703_RF,C7704_RF NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF C7700_RF,C7702_RF, C7703_RF,C7704_RF NOSTUFF:C7706_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 PCIE_WLAN_BI_AP_CLKREQ_L PMUGPIO_TO_WLAN_CLK32K 90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_N 90_PCIE_AP_TO_WLAN_TXD_P 90_PCIE_AP_TO_WLAN_TXD_N PCIE_AP_TO_WLAN_RESET_L AP_TO_WLAN_DEVICE_WAKE I2S_AP_TO_BT_LRCLK 90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N WLAN_TO_PMU_HOST_WAKE 50_LAT_WLAN_5G_EAST 50_LAT_WLAN_G_1 50_LAT_WLAN_A_1 2016-06-1400064008778 ENGINEERING RELEASED IND,0.7NH,UH-Q,01005 IND,0.6NH,UH-Q,01005 152S1986 118S0724 152S2054 1 1 1 1 D11_ROWCRITICAL L7701_RF CAP,CER,0.2PF,+/-0.05PF,01005 CAP,CER,0.2PF,+/-0.05PF,01005 D11_ROW D11_ROW D11_ROW D11_ROW D11_ROW CRITICALC6729_RF RES,MF,0 OHM,1/32W,01005 IND,9.1NH,UH-Q,0201 RES,MF,0 OHM,1/20W,0201 D11_ROW CRITICAL R6711_RF CRITICAL C7729_RF CRITICAL TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE 1 CRITICAL117S0161 RES,MF,0 OHM,1/32W,01005 D11_JPR7701_RF CRITICAL152S1853 IND,9.1NH,UH-Q,01005 D11_JPL7701_RF1 1 CRITICAL D11_JPL7700_RFRES,MF,0 OHM,1/32W,01005117S0161 1 CRITICALC7729_RF131S0893 CAP,CER,0.2PF,+/-0.05PF,01005 D11_JP 1 CRITICALC7705_RF131S0893 CAP,CER,0.2PF,+/-0.05PF,01005 D11_JP 1 CRITICAL D11_JPR7700_RF117S0161 RES,MF,0 OHM,1/32W,01005 C6729_RFIND,7.5NH,UH-Q,02011 D11_JPCRITICAL152S2055 CRITICALR6711_RFCAP,3.9PF,+/-1.0PF,0201,HI-Q D11_JP1131S0593 D11_JPCRITICALCAP,CER,0.3PF,+/-0.05PF,01005 C7708_RF1131S0648 D11_JPCRITICALR7704_RF1152S1986 IND,FILM,2.2NH,UH-Q,01005 1 CRITICALR7711_RF152S1976 IND,0.7NH,UH-Q,01005 D11_JP R7702_RF CRITICAL1131S0400 CAP,CER,3.5PF+/-0.1,01005 D11_JP R7703_RF1 CRITICAL152S00273 IND,0.6NH,UH-Q,01005 D11_JP CAP,CER,3.5PF+/-0.1,01005131S0400 1 CRITICALR7702_RF 152S00273 CRITICAL1 R7703_RF 152S1976 R7711_RF1 D11_ROW131S0893 C7705_RF CRITICAL1 D11_ROW131S0893 CRITICAL1 CAP,CER,0.2PF,+/-0.05PF,01005131S0893 C7705_RF D111CRITICAL1 CAP,CER,0.2PF,+/-0.05PF,01005131S0893 C7729_RF D111CRITICAL1 TRUE IND,0.7NH,UH-Q,01005152S1976 R7711_RF CRITICAL1 D111 CAP,CER,3.5PF+/-0.1,01005131S0400 1 CRITICALR7702_RF D111 IND,0.6NH,UH-Q,01005152S00273 CRITICAL D1111 R7703_RF IND,FILM,2.2NH,UH-Q,01005 L7700_RF R7700_RF CRITICAL CRITICAL CRITICAL RES,MF, 0 OHM,1/20W, 0201 D111 CRITICALC6729_RF R7700_RF RES,MF,0 OHM,1/32W,01005 1 117S0161 R7701_RF D111CRITICAL1 IND,9.1NH,UH-Q,01005 RES,MF,0 OHM,1/32W,01005 RES,MF,0 OHM,1/32W,01005 IND,9.1NH,UH-Q,0201 152S1853 CRITICAL CRITICAL D111 L7700_RF IND,6.2NH,UH-Q,01005 IND, 0.8NH,UH-Q,01005 R7700_RF CRITICAL D101 IND, 0.8NH,UH-Q,01005152S1998 117S0161 1 152S00029 1 77 76 CSA PAGE WIFI FRONT-END CRITICAL C7702_RF C6729_RF CAP,CER,0.3PF,+/-0.05,01005 CRITICAL RES,MF,0 OHM,1/32W,01005 D10_ROW D10_ROW D10_ROW 131S0893 C7706_RFCAP,CER,0.2PF,+/-0.05,01005131S0893 1 CRITICAL C7706_RFCAP,CER,0.2PF,+/-0.05,01005131S0893 D1011 CRITICALR7703_RF1152S00029 IND,1.1NH,UH-Q,01005 IND,1.1NH,UH-Q,01005152S00029 1 R7703_RF D101 C7705_RF 131S0648 C7705_RF1 CRITICAL 131S0648 C7705_RF1 D101 D10_JP 1 D10_JP 1 D10_JP 152S1980 1 117S0161 1 D11_ROW D11_ROW R7701_RF IND,9.1NH,UH-Q,01005 RES,MF,0 OHM,1/32W,01005 1 IND,FILM,2.2NH,UH-Q,01005 D11_ROW 117S0161 152S1853 117S0161 CRITICAL117S0161 TRUE CRITICAL1 1 D111 D111 D111 TRUE R6711_RF R7704_RF TRUE 1 1 50_UAT2_M 50_UAT_WLAN_5G_WEST 50_UAT_WLAN_2G_EAST UART_BB_TO_WLAN_COEX UART_WLAN_TO_BB_COEX I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_BCLK AOP_TO_WLAN_CONTEXT_B UART_BT_TO_AP_CTS_L AOP_TO_WLAN_CONTEXT_A UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD UART_WLAN_TO_AP_CTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_RTS_L UART_AP_TO_WLAN_TXD AP_TO_BT_WAKE PMU_TO_BT_REG_ON PMU_TO_WLAN_REG_ON BT_TO_PMU_HOST_WAKE PP1V8_SDRAM PP_VDD_MAIN 2 3 2 3 3 3 2 3 2 PDF PAGE PERENNIAL CONTENTS TRUE 117S0161 R7704_RF D111 L7701_RF CRITICAL 1152S2054 1 TRUE 152S1986 118S0724 1 117S0161 D101R7711_RF1 RES,MF,0 OHM,1/32W,01005 D1011 RES,MF,0 OHM,1/32W,01005 R7702_RF TRUE IND,2.4NH,UH-Q,010051 R7704_RF D101 TRUE C7708_RF CRITICAL1 D101CAP,CER,0.3PF,+/-0.05PF,01005 RES,MF, 0 OHM,1/20W, 0201 TRUE 1 CRITICALR6711_RF IND,9.1NH,UH-Q,0201 TRUE 1 D101 TRUE CRITICAL1 D101 RES,MF,0 OHM,1/32W,01005 D101R7701_RF117S0161 1 CRITICAL RES,MF,0 OHM,1/32W,01005 D1011117S0161 117S0161 117S0161 152S1988 131S0648 118S0724 152S2054 CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL 1 1 1 131S0404 R7704_RF 152S2061 117S0161 CAP,CER,0.3PF,+/-0.05,01005 RES,MF,0 OHM,1/32W,01005 152S2043 CRITICAL1 L7701_RF D101 1 CRITICAL152S2043 IND,6.2NH,UH-Q,01005 152S1998 CRITICAL1 L7700_RF D101 1 TRUE TRUE 152S1988 R7704_RFIND,2.4NH,UH-Q,010051 D10_ROWCRITICAL 117S0161 CRITICAL D10_ROWRES,MF,0 OHM,1/32W,01005 R7702_RF1 117S0161 RES,MF,0 OHM,1/32W,01005 R7711_RF CRITICAL1 D10_ROW RES,MF,0 OHM,1/32W,01005 117S0161 1 1131S0648 R7703_RF R6711_RF C6729_RF R7700_RF R7701_RF L7700_RF C7702_RF CRITICAL D10_JP CRITICAL L7701_RF CRITICAL D10_JP D10_JP CAP,CER,0.3PF,+/-0.05,01005 IND,1.1NH,UH-Q,01005 CAP,CER,0.2PF,+/-0.05,01005 RES,MF,0 OHM,1/32W,01005 CRITICAL D10_JP D10_JP D10_JP D10_JP CRITICAL D10_JPCRITICAL D10_JPCRITICAL D10_JP CRITICAL CRITICAL CRITICAL CRITICAL C7706_RF R7711_RF R7702_RF CRITICALRES,MF,0 OHM,1/32W,01005 IND,1.0NH,UH-Q,01005 IND,7.5NH,UH-Q,01005 CAP,3.9PF,+/-1.0PF,01005 IND,6.2NH,UH-Q,01005152S2043 IND,6.2NH,UH-Q,01005152S2043 CRITICAL D10_ROWR6711_RF117S0161 1 RES,MF,0 OHM,1/32W,01005 TRUE CRITICALC7702_RF1 TRUE D10_ROW152S2043 IND,6.2NH,UH-Q,01005 RES,MF,0 OHM,1/32W,01005 R7700_RF D10_ROWCRITICAL1117S0161 TRUE D10_ROWCRITICALC6729_RF1 IND,9.1NH,UH-Q,01005152S1853 TRUE 152S1998 1 IND, 0.8NH,UH-Q,01005 CRITICALL7700_RF D10_ROW L7701_RF1 CRITICAL152S2043 IND,6.2NH,UH-Q,01005 D10_ROW 1 R7701_RF D10_ROW117S0161 CRITICAL TRUE RES,MF,0 OHM,1/32W,01005 TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. CK APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL IO IO IO IO IO IO OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IO OUT IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
TDI TDO WIFI/BT 56 53 54 55 53 54 55 53 54 55 53 54 55 53 54 55 53 54 53 54 53 54 53 54 55 53 54 55 53 54 53 54 53 54 55 53 54 55 53 54 55 53 54 53 54 55 535455 535455 5354 55 535455 5354 5354 55 53 54 55 53 54 5354 5354 535455 535455 535455 56 I2S_AP_TO_BT_LRCLK AP_TO_WLAN_DEVICE_WAKE PMUGPIO_TO_WLAN_CLK32K 90_PCIE_AP_TO_WLAN_REFCLK_N PCIE_WLAN_BI_AP_CLKREQ_L 90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N 90_PCIE_AP_TO_WLAN_REFCLK_P WLAN_TO_PMU_HOST_WAKE 90_PCIE_AP_TO_WLAN_TXD_N 90_PCIE_AP_TO_WLAN_TXD_P PCIE_AP_TO_WLAN_RESET_L12 PMUGPIO_TO_WLAN_CLK32K12 90_PCIE_AP_TO_WLAN_TXD_P12 90_PCIE_AP_TO_WLAN_REFCLK_P12 AP_TO_WLAN_DEVICE_WAKE12 90_PCIE_AP_TO_WLAN_REFCLK_N2 1 90_PCIE_AP_TO_WLAN_TXD_N12 WLAN_TO_PMU_HOST_WAKE12 50_LAT_WLAN_A_1 50_LAT_WLAN_G_1 PCIE_AP_TO_WLAN_RESET_L 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 65 60 58 57 53 51 50 49 48 47 46 45 36 34 32 27 24 21 18 6 4 1 WLAN_RF 92 1413 35 15 29 28 31 30 33 7 8 22 23 25 26 19 20 16 17 54 2 62 64 61 11 10 9 12 3 63 42 41 43 44 93 37 40 39 38 56 55 66 59 5 52 WLAN_RF 2 1 C7606_RF 1 PP7623_RF 1 PP7622_RF 1 PP7621_RF 1 PP7620_RF 1 PP7624_RF 2 1 C7603_RF 21 L7600_RF 4 3 2 1 C7604_RF 2 1 C7602_RF 2 1 C7607_RF 2 1 C7601_RF 2 1 C7600_RF 2 1 R7600_RF 1 PP7608_RF 1 PP7609_RF 1 PP7616_RF 1 PP7611_RF 1 PP7610_RF 1 PP7612_RF 1 PP7613_RF 1 PP7614_RF 1 PP7615_RF 1 PP7618_RF 1 PP7619_RF 1 PP7600_RF 1 PP7601_RF 1 PP7603_RF 1 PP7617_RF 1 PP7604_RF 1 PP7605_RF 1 PP7606_RF 1 PP7607_RF 339S00199339S00201 ALTERNATE ALT WIFI/BT MODULEWLAN_RF LBEE5W11GJ-943 LGA P2MM-NSM AP_TO_BT_WAKE NOSTUFF SR_LVX AOP_TO_WLAN_CONTEXT_B 50_WLAN_A_0 BT_TO_PMU_HOST_WAKE 50_WLAN_G_0 1 UART_WLAN_TO_AP_CTS_L UART_AP_TO_BT_RTS_L OMIT X5R UART_AP_TO_BT_TXD I2S_AP_TO_BT_BCLK PMU_TO_BT_REG_ON JTAG_WLAN_SEL CERM 7.5UF 20% 4V LGA LBEE5W11GJ-943 NP0-C0G JTAG_WLAN_TMS UART_AP_TO_WLAN_RTS_L AP_TO_BT_WAKE I2S_BT_TO_AP_DIN AOP_TO_WLAN_CONTEXT_A VIN_LDO UART_BB_TO_WLAN_COEX UART_WLAN_TO_BB_COEX PMU_TO_WLAN_REG_ON JTAG_WLAN_TRST_L JTAG_WLAN_TCK UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L UART_BT_TO_AP_CTS_L I2S_AP_TO_BT_DOUT OMIT OMIT 1 01005 0.01UF X5R 10% 6.3V WLAN WLAN PP_VDD_MAIN 01005 PP1V8_SDRAM OMIT UART_BT_TO_AP_CTS_L OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM SM OMIT JTAG_WLAN_SEL PMU_TO_WLAN_REG_ON PMU_TO_BT_REG_ON UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD AOP_TO_WLAN_CONTEXT_A AOP_TO_WLAN_CONTEXT_B JTAG_WLAN_SEL PP1V8_SDRAM JTAG_WLAN_TRST_L BT_TO_PMU_HOST_WAKE JTAG_WLAN_TMS JTAG_WLAN_TCK UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD SR_LVX_1 0.01UF WLAN 6.3V 10% 01005 P2MM-NSM OMIT SM 27PF WLAN 16V 5% 01005 NP0-C0G P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM 10K WLAN 5% 01005 MF 1/32W P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM SM P2MM-NSM SM OMIT SM P2MM-NSM SM OMITP2MM-NSM P2MM-NSM SM 100PF WLAN 16V 5% 01005 NP0-C0G 2.2UH-20%-0.68A-0.25OHM 0806 P2MM-NSM OMIT SM 0402 10UF 6.3V 20% 0402-9 CERM-X5R P2MM-NSM OMIT SM 27PF 16V 5% P2MM-NSM SM OMIT SM P2MM-NSM P2MM-NSM OMIT SM 2 2 2 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 1 2 2 2 1 2 1 TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM BI PP IN IN IN OUT OUT OUT IN IN OUT IN BI OUT IN IN IN OUT IN PP PP PP IN PP IN IN OUT PP PP PP PP PP PP PP SYM 2 OF 2 THRM_PAD GND THRM_PAD SYM 1 OF 2 JTAG_TMS FAST_UART_CTS_IN BT_DEV_WAKE VBAT_RF_VCC VBAT_RF_VCC VBAT_VCC VBAT_VCC VDDIO_1P8V BT_PCM_OUT PCIE_RDP PCIE_RDN WL_HOST_WAKE PCIE_REFCLK_P PCIE_TDN PCIE_TDP PCIE_CLKREQ* PCIE_PERST* PCIE_REFCLK_N CXT_A/JTAG_TDI CXT_B/JTAG_TDO SR_VLX VIN_LDO LPO_IN SECI_RX SECI_TX WL_REG_ON BT_REG_ON JTAG_TRST* JTAG_SEL JTAG_TCK WL_DEV_WAKE FAST_UART_TX FAST_UART_RX FAST_UART_RTS_OUT 5G_ANT_CORE0 5G_ANT_CORE1 BT_UART_RXD BT_UART_TXD BT_UART_CTS* BT_UART_RTS* BT_PCM_CLK BT_PCM_SYNC BT_PCM_IN BT_HOST_WAKE 2G_ANT_CORE0 2G_ANT_CORE1 PP PP PP PP PP PP PP IO IO IN PP OUT PP IN IN IN PP IN OUT IN OUT IN PP BI PP 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
5GHZ UAT WIFI UPPER ANTENNA FEEDS 2GHZ UAT 5354 53 54 53 54 55 55 50_LAT_WLAN_5G_EAST 21 R7704_RF 31 2 W5BPF_RF 2 1 C7711_RF 2 1 C7729_RF 21 R7711_RF 21 3 JUAT2_RF 2 1 C7709_RF 2 1 C7710_RF 21 R7702_RF 2 1 C7707_RF 2 1 C7708_RF 2 1 C7706_RF 21 R7703_RF 2 1 C7705_RF OMIT OMIT NP0-C0G 16V OMIT_TABLE OMIT_TABLE 1/32W 0% MF 01005 +/-0.1PF 50_UAT_WLAN_5G_WEST 2.4NH+/-0.1NH-0.370A 50_UAT_WLAN_2G_EAST 0.6PF OMIT_TABLE 01005 NP0-C0G 0.2PF OMIT_TABLE WLAN_UP_RFFE 01005 NOSTUFF +/-0.1PF 16V +/-0.05PF 01005 1/32W 01005 WLAN_UP_RFFE 50_WLAN_A_0 50_UAT2_BPF50_UAT_WLAN_5G_BPF 50_UAT2_TEST 50_UAT2_M LFB185G53CGZE200 16V +/-0.1PF 01005 NP0-C0G WLAN_UP_RFFE 01005 0.00 MM8830-2600B UP_RFFE F-RT-SM 0.2PF WLAN_UP_RFFE 16V +/-0.1PF 01005 NP0-C0G 0.2PF 16V +/-0.1PF 01005 NP0-C0G 0.00 01005 MF 0.00 0% MF 1 5.15-5.85GHZ-1.2DB 0% WLAN_UP_RFFE CERM 16V WLAN_UP_RFFE 01005 NP0-C0G +/-0.1PF 0.2PF 50_WLAN_G_0 OMIT_TABLE WLAN_UP_RFFE 16V NP0-C0G 01005 WLAN_UP_RFFE OMIT OMIT 16V +/-0.1PF 0.2PF 1/32W 0.2PF0.2PF OMIT OMIT BI C R GND BI BIBI BI 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
JUNE 9, 2016 ALTERNATES STOCKHOLM_MLB BOM OPTIONS 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 AP_TO_NFC_FW_DWLD_REQ 00064008778 ENGINEERING RELEASED AP_TO_NFC_DEV_WAKE UART_NFC_TO_AP_CTS_L PP_VDD_MAIN NFC_SWP PP1V8_SDRAM PMU_TO_NFC_EN BB_TO_NFC_CLK UART_AP_TO_NFC_TXD UART_AP_TO_NFC_RTS_L UART_NFC_TO_AP_RXD NFC_TO_BB_CLK_REQ NFC_TO_PMU_HOST_WAKE SE2_READY SE2_PWR_REQ SE2_PRESENT NFC_SWP_MUX ICEFALL_LDO_ENABLE 131S00118 180PF, 0201 2% 50V 131S00118 180PF, 0201 2% 50V 131S00033 680PF, 0201 2% 50V 270PF, 0201 2% 25V 100PF, 0201 2% 50V 680PF, 0201 2% 50V 2 1 C7516_RF D11_ROW 1 D11_ROWC7518_RF D11_ROW270PF, 0201 2% 25V1131S00081 C7514_RF 131S00033 1 D11_JPC7516_RF 131S0731 C7518_RF D11_JP1 C7514_RF D11_JP1131S00081 C7516_RF D111 131S00026 1 820PF, 0201 2% 50V C7516_RF D10_ROW C7516_RF131S0825 1 D10_JP C7518_RF1 D10_JP 131S0883 1 220PF, 0201 2% 50V C7512_RF131S00055 1 D10_JP D101820PF, 0201 2% 50V1131S00026 C7516_RF 1131S00117 120PF, 0201 2% 50V C7518_RF D101 132S0400 ?0.22UF 20% 6.3V 01005C7504_RF132S0436 131S00081 270PF, 0201 2% 25V C7514_RF1 D111 D1111 C7518_RF 220PF, 0201 2% 50V131S0883 D1011 C7514_RF 1131S00055 22PF, 0201 2% 50V D101C7512_RF 131S0883 C7514_RF1 D10_ROW220PF, 0201 2% 50V C7512_RF131S00055 1 D10_ROW22PF, 0201 2% 50V 131S00117 C7518_RF D10_ROW1 120PF, 0201 2% 50V 680PF, 0201 2% 50V1131S00033 D10_JPC7514_RF 22PF, 0201 2% 50V 560PF, 0201 2% 50V 131S00019 150PF, 0201 2% 50V TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM PART# DESCRIPTIONQTY TABLE_5_HEAD BOM OPTIONREFERENCE DESIGNATOR(S) DESCRIPTION BOM OPTIONREFERENCE DESIGNATOR(S) PART NUMBER ALTERNATE FORPART NUMBER TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM PART# DESCRIPTIONQTY TABLE_5_HEAD BOM OPTIONREFERENCE DESIGNATOR(S) TABLE_5_ITEM ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. CK APPD1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM OUT OUT IN IN IN OUT OUT OUT IN IN IN IN IN IN IN OUT IO 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
NFC LOAD SWITCH DONE FOR BEST ROUTING 180 PHASE SHIFT INTRODUCED BY BALUN NFC CONTROLLER STOCKHOLM 5V BOOSTER NFC FRONT END 5357 53 57 58 53 57 5357 5357 53 57 58 5357 53 57 58 535758 535758 535758 535758 535758 5357 5357 5357 535758 VOLTAGE=1.80V VOLTAGE=1.80V AP_TO_NFC_FW_DWLD_REQ A1A2 B2 B1 NFCSW_RF 2 1 R7599_RF 21 R7520_RF F2 B3 B4 A6 F1 E6 C3 E5 G2 E2 F7 E1 C6 C7 D5 G5 G3 B1 G4 E7 A5 B7 E3 E4 A4 B5 G1 F6 F5 C1 A1 C2 D3 A3 D1 A7 C5 F4 G6 G7 B2 C4 B6 D2 A2 F3 D6 D4 D7 NFC_RF 2 1 C7518_RF 21 C7512_RF 21 C7514_RF 2 1 C7509_RF 2 1 C7510_RF 21 R7509_RF 21 R7508_RF 1 PP7509_RF 1 PP7508_RF 1 PP7507_RF 1 PP7506_RF 1 PP7505_RF 1 PP7504_RF 1 PP7503_RF 2 1 C7527_RF 2 1 C7506_RF 2 1 C7526_RF 2 1 C7516_RF 2 1 C7515_RF 1TP7500_RF 41 32 BALUN_RF 1TP7505_RF 2 1 C7504_RF 2 1 C7520_RF 2 1 C7521_RF 2 1 C7522_RF 2 1 C7500_RF 21 R7502_RF 21 L7501_RF 21 L7500_RF 21 L7502_RF 2 1 C7517_RF 2 1 C7511_RF A2 A1A3 B2 B1 C2 C1 B3 C3 NFBST_RF 21 C7507_RF 21 C7508_RF 2 1 C7505_RF 2 1 C7503_RF 2 1 C7502_RF PP1V8_SDRAM PP_VDD_MAIN PP_VDD_MAIN_NFC SE2_PWR_REQ BB_TO_NFC_CLK UART_NFC_TO_AP_RXD PMU_TO_NFC_EN NFC_RXN PP_VDD_MAIN_NFCPP_VDD_MAIN VDD_NFC_AVDD VDD_NFC_5V NFC_BALN NFC_BOOST_SW PP_VDD_MAIN_NFC NFC_ANT_MATCH NFC_RXN_CAP NFC_TXP NFC_ANT NFC_SWP_MUX SE2_READY VDD_NFC_ESE NFC_BOOST_EN NFC_RXP VDD_NFC_ESE VDD_NFC_AVDD VDD_NFC_DVDD SE2_PRESENT NFC_TO_BB_CLK_REQ NFC_RXN NFC_RXP_CAP NFC_TEST_OUT PP_VDD_MAIN_NFC NFC_TXN NFC_TXP NFC_RXP NFC_BOOST_EN VDD_NFC_5V UART_AP_TO_NFC_TXD UART_NFC_TO_AP_RXD UART_AP_TO_NFC_RTS_L AP_TO_NFC_DEV_WAKE UART_NFC_TO_AP_CTS_L NFC_BALP UART_NFC_TO_AP_CTS_L PMU_TO_NFC_EN NFC_TO_PMU_HOST_WAKE NFC_TO_PMU_HOST_WAKE UART_AP_TO_NFC_RTS_L ICEFALL_LDO_ENABLE UART_AP_TO_NFC_TXD NFC_TEST_OUT NFC_SWP PP1V8_SDRAM VDD_NFC_TVDD PP1V8_SDRAM SE2_PWR_REQ NFC_VMID AP_TO_NFC_DEV_WAKE NFC_TXN FPF1204UCX 15UF FAN48614BUC50X 15UF 1.8UH-0.7A 160NH-10%-0.48A-0.33OHM 160NH-10%-0.48A-0.33OHM 1UF 0.00 1UF 0.1UF 100PF100PF 1UF 0.22UF ATB161006F-20011 1000PF 820PF 2.2UF2.2UF 2.2UF P2MM-NSM P2MM-NSM P2MM-NSM P2MM-NSM P2MM-NSM P2MM-NSM P2MM-NSM 560 560 680PF 680PF 220PF 22PF 120PF PN67VEU3-B001D004 0.00 1.00K 1UF 1000PF 1000PF NFC NFC NFC NFC NFC NFC NFC NFC NFC NFC NFCNFC NFC NFC NFC NFC NFC NFC NFC NFC NFC NFC NFC NFC OMIT OMIT OMIT_TABLE OMIT OMIT OMIT OMIT OMIT OMIT OMIT OMIT_TABLE OMIT OMIT_TABLE NOSTUFF 6.3V 6.3V 10V10V 6.3V 16V16V 10V 6.3V 25V 25V 6.3V6.3V 6.3V 25V 25V 50V 50V 50V 10V 25V 25V 20% 20% 20% 0% 20% 20% 5%5% 20% 20% 2% 2% 20%20% 20% 1% 1% 2% 2% 2% 2% 2% 1% 5% 20% 2% 2% WLCSP-COMBO 0402-1 WLCSP 0402-1 0603 0402 0402 0201 01005 0201 01005 0100501005 0201 01005 TP-P55 SM SM-TP1P25-TOP 0201 0201 0201-10201-1 0201-1 SM SM SM SM SM SM SM 201 201 0201 0201 0201 0201 0201 UFLGA 0201 01005 0201 0201 0201 X5R X5R X5R MF X5R X5R-CERM NP0-C0GNP0-C0G X5R X5R C0G-NP0 C0G-NP0 X5R-CERMX5R-CERM X5R-CERM MF MF C0G-NP0 C0G-NP0 C0G C0G-CERM NP0-C0G MF MF X5R C0G-NP0 C0G-NP0 1/32W 1/20W 1/20W 1/20W 1/32W 2 12 2 12 12 12 1212 12 12 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 12 2 2 12 22 1 2 1 VIN GND VOUT ON SMX_RST* EXT_MUX SE2_BUSY XTAL2 IC2 TX RX NFC_CLK_XTAL1 IRQ DWL ESE_IO1 RTS VEN CLK_REQ CTS SVDD_REQ VDD VBAT PVDD VUP SIM_PMU_VCC TVDD AVDD SVDD ESE_VDD VMID TX2 RX- TX1 RX+ WKUP_REQ SE2_ENABLE TX_PWR_REQ SIM_SWIO SE2_SVDD_IN GPIO0 IC00 IC01 ESE_DWPM_DBG ESE_DWPS_DBG PVSS TVSS DVSS AVSS DVSS AVSS AVSS VSS SMX_CLK OUT OUT PP PP PP PP PP PP PP BI IN OUT IN IN A NC NC UNBAL BAL0 GND BAL1 A NC NC IN IN OUT OUT IN IN IN OUT IN OUT NC SW PGND PGND VIN SW VOUT AGND EN VOUT NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D10 NORTH-SOUTH METROCIRC D10 RADIO_MLB_FF FEB 19, 2016 339S00086 WIFI LOWER ANTENNA FEED D10 EAST-WEST METROCIRC 339S00110 LOWER MLB EAST MLB ADD REV ID FOR D10/D11 HERE THROUGH METROCIRC UPPER MLB COAX WEST MLB 59 53 53 59 50_LAT_WLAN_A_1 50_LAT_WLAN_G_1 50_LAT_WLAN_5G_EAST 2016-06-1400064008778 ENGINEERING RELEASED 21 R6711_RF 2 1 C6729_RF 11 10 7 5 1 3 28 27 26 25 24 23 22 21 12 9 8 6 4 2 MCEW_RF 2 6 4 5 3 1 W25DI_RF 1 3 2 JLAT3_RF 2 1 C7704_RF 21 R7701_RF 2 1 C7703_RF 2 1 L7703_RF 2 1 C7702_RF 21 C7701_RF 21 R7700_RF 2 1 L7702_RF 2 1 C7700_RF 41 5 3 2 W2BPF_RF 2 1 L7701_RF 21 L7700_RF 9 11 7 4 2 6 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 12 10 8 5 3 1 MCNS_RF 50_UAT_MB_HB_SOUTH 50_UAT_LB_MLB_SOUTH FLTPSSL-381E TRUE GND I11 TRUE GND I12 INOUT INOUT INOUT INOUT INOUT INOUT SM OMIT TRUE 0.00 0% MF WLAN_RFFE 1/32W 01005 11 OMIT 9.1NH-3%-0.17A-1.7OHM 01005 WLAN_RFFE 885118 WLAN-BT-LTE LGA NP0-C0G WLAN_RFFE OMIT 01005 0.2PF 16V +/-0.1PF 9.1NH-3%-0.17A-1.7OHM WLAN_RFFE 01005 01005 WLAN_RFFE OMIT 0% 1/32W 0.00 MF WLAN_RFFE NP0-C0G 01005 16V 3.6PF +/-0.1PF OMIT 4.3NH-3%-0.270A 01005 WLAN_RFFE 01005 WLAN_RFFE 4.0NH-+/-0.1NH-0.27A OMIT NP0-C0G WLAN_RFFE 0.2PF +/-0.1PF 01005 16V OMIT 0.00 1/32W WLAN_RFFE 0% MF OMIT 16V NP0-C0G 01005 WLAN_RFFE 0.2PF +/-0.1PF MM7829-2700 F-ST-SM WLAN_RFFE LGA LFD212G45MP2E013 FLTPSSL-382E SM 7.5NH+/-3%-0.2A OMIT UP_RFFE 01005 OMIT UP_RFFE 16V NP0-C0G +/-0.1PF 3.9PF 01005-1 INOUT INOUT 50_WLAN_G_1_BPF 50_WLAN_G_1_M 50_LAT_WLAN_M 50_WLAN_A_1_DPLX 50_LAT_WLAN_SOUTH50_LAT_WLAN_NORTH 50_UAT1_EAST 50_WLAN_G_1_DPLX 50_LAT_WLAN_SOUTH 50_UAT1_EAST 50_LAT_WLAN_NORTH 50_UAT_WLAN_2G_WEST 50_UAT_WLAN_2G_WEST 50_UAT_WLAN_2G_EAST 50_UAT1_WEST 50_UAT_WLAN_5G_WEST 50_UUAT_LB_MLB_NORTH 50_UAT_WLAN_2G_WEST_PLEXER 01005 11 11 1 1 ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. IO BI OUT IOIN GND SIGNAL2-W SIGNAL1-W SIGNAL3-W GND SIGNAL3-E SIGNAL2-E SIGNAL1-E GND P3 P2 P1 IO INPUT GND OUTPUTIO BI SIGNAL1-U SIGNAL1-L SIGNAL2-L SIGNAL3-L GND GND SIGNAL3-U SIGNAL2-U IO IO IO IO 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
UAT GROUND RING STANDOFF FOR ANY COMPONENT CHANGE. PLEASE CONTACT ANTENNA (MATT MOW) 5G WIFI ALT UAT1 GND LB/MLB/GNSS/MB/HB UAT TUNER FLEX STANDOFF 5360 53 60 53 60 53 53 53 53 53 PP3V0_TRISTAR_ANT_PROX 2 BB_TO_UAT_DATA2 BB_TO_UAT_SCLK2 PP3V0_TRISTAR_ANT_PROX 2 BB_BUFFER_GPO1 BB_BUFFER_GPO2 BB_TO_LAT_ANT_DATA PP1V8_SDRAM PP3V0_TRISTAR_ANT_PROX BB_TO_UAT_SCLKBB_TO_UAT_DATA 2 1 L6710_RF 21 C7731_RF 2 1 C7730_RF 2 1 C6714_RF 2 1 C6700_RF 2 1 L6707_RF 21 L8008_RF 2 1 L8009_RF 2 1 C5909_RF 2 1 C5908_RF 2 1 C5905_RF 2 1 C5904_RF 21 L8007_RF 21 C6704_RF 1 SUAT1_RF 21 C6716_RF 21 R6706_RF 2 1 C6720_RF 4 2 6 1 5 3 USPDT2_RF 2 1 C6721_RF 2 1 L7709_RF 1 PP8000_RF 1 TP8000_RF 109 87 65 43 21 TUNFX_RF 21 FL6703_RF 21 FL6700_RF 2 1 C8008_RF 4 2 6 1 5 3 USPDT_RF 2 1 C8007_RF 2 1 C8005_RF 2 1 C6733_RF 2 1 C6732_RF 2 1 C6731_RF 2 1 C6730_RF 2 1 C6735_RF 2 1 C6734_RF 1 SUAT2_RF 1 SGND_RF 21 FL6702_RF 2 1 C6705_RF 2 1 C6703_RF 21 FL6701_RF 2 1 C6702_RF 2 1 C6701_RF NOSTUFF STDOFF-2.56OD1.4ID.99H-SM STDOFF-2.56OD1.4ID.99H-SM 50_UAT1_FEED 2% 0201 0.01UF 18PF 1% MF P2MM-NSM SM X5R 01005 USPDT2_RF VDD_TUNER_RFFE_VIO_1V8_FILT 50_UAT2_M ALT_GND CHASSIS_GND CHASSIS_GND 50_UAT1_NOTCH UAT_TUNER_RFFE_DATA_FILT UAT_TUNER_RFFE_CLK_FILT PP3V0_TRISTAR_UAT_TUNER_B2B_FILT BB_TO_LAT_ANT_SCLK 01005 NP0-C0G 16V 100PF UP_RFFE 5% UP_RFFE UP_RFFE 01005 0.00 0% MF 1/32W 01005 5% 16V UAT NP0-C0G 27PF UAT 01005 NP0-C0G 27PF 16V 5% 0.00 1/32W MF 0% 01005 27PF 16V UAT 01005 NP0-C0G 5% 27PF 16V UAT 5% NP0-C0G 01005 16V 33PF5% 01005 01005 16V 5% 33PF NP0-C0G-CERM 01005 6.3V NP0-C0G 68PF 2% 01005 120PF 10V CER-X7R 10% UP_RFFE C0H-CERM 25V 10% X5R 6.3V 01005 RF1341 WLCSP 33PF 5% 01005 16V 3.0NH+/-0.1NH-0.6A OMIT SM-TP1P25-TOP F-ST-SM 505066-0620 01005 150OHM-25%-200MA-0.7DCR 01005 0201 C0H-CERM 25V WLCSP RF1341 10% 0.01UF 5% 16V 33PF 220PF UP_RFFE 6.3V 5% 01005 CERM 4.0PF UP_RFFE 16V +/-0.1PF 01005 NP0-C0G 56PF 16V 5% 01005 UP_RFFE NP0-C0G UP_RFFE 6.3V 5% 01005 CERM 220PF18PF UP_RFFE 16V 5% 01005 CERM 2%NP0-C0G-CERM 50_UAT2_FEED 0201 STDOFF-2.56OD1.4ID.99H-SM 560NH-5%-2.80OHM 0201 01005 18PF OMIT_TABLE 9.1NH-0.4A 03015 UP_RFFE USPDT_VDD 6.3V DC_BLOCKUSPDT_RF 3.0NH+/-0.1NH-0.6A 0201 0201 UP_RFFE 9.1NH+/-0.3%-0.3A 1/20W NP0-C0G-CERM 150OHM-25%-200MA-0.7DCR C0G-CERM 1.2PF +/-0.05PF 25V 0201 0201-1 2.2NH+/-0.1NH-0.6A 50_UAT1_TUNER_M UP_RFFE 5.6NH+/-3%-0.4A 0201 0201 UP_RFFE 0.00 1.8NH+/-0.1NH-0.8A 0201 1.2PF C0G-CERM 25V 0201 NP0-C0G-CERM +/-0.05PF NOSTUFF 4.3NH+/-3%-0.5A 0201 50_UAT1_TUNER 2 2 IO IO IN IN IN IN IN IO GNDA VDD RF1 RFGND CBIN PP A GNDA VDD RF1 RFGND CBIN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
BOM LIST 3.0 NH,03015152S0570 L8009_RF1 NOLMBRFCRITICAL LONGER PATH INDUCTOR CRITICAL152S1860 1 LMBRFL8009_RF REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
SCH: 951-00964 BOM: 939-00826 ALL:C5616_RF-C5618_RF,C5632_RF-C5634_RF ALTERNATES MAV16 RADIO_MLB PCIE BB CONTROL DEBUG WLAN DOCK TUNER NFC AMUX AP CONNECTIONS ANTENNA AUDIO AOP POWER 5367 536878 536878 65 65 536478 53647881 5364 65 5364657781 53647881 536481 536878 536878 5368 5368 536778 536778 5367 5367 536468 536781 5368 5368 5368 5368 53687881 5368 537881 5368 5368 5368 536478 537881 5368 536881 5381 537881 537881 537881 5381 536478 53687881 5368 536878 536878 5367 BB_TO_UAT_DATA 147 MAKE_BASE=TRUE BB_TO_LAT_ANT_DATA 177 BB_TO_LAT_ANT_SCLK 177 BB_TO_UAT_SCLK 147 MAKE_BASE=TRUE 90_PCIE_BB_TO_AP_RXD_N BB_TO_PMU_PCIE_HOST_WAKE_L 90_USB_BB_DATA_P SWD_AOP_BI_BB_SWDIO PCIE_BB_BI_AP_CLKREQ_L BB_TO_UAT_DATA BB_TO_UAT_SCLK AP_TO_ICEFALL_FW_DWLD_REQ BB_TO_LAT_ANT_DATA BB_TO_LAT_ANT_SCLK BB_BUFFER_GPO1 NFC_TO_BB_CLK_REQ BB_TO_LAT_GPO1 BB_TO_LAT_GPO2 BB_TO_LAT_GPO3 BB_BUFFER_GPO2 90_USB_BB_DATA_N I2S_BB_TO_AP_LRCLK I2S_BB_TO_AP_BCLK SWD_AP_TO_MANY_SWCLK 90_PCIE_AP_TO_BB_TXD_N 90_PCIE_AP_TO_BB_TXD_P 90_PCIE_AP_TO_BB_REFCLK_N 90_PCIE_AP_TO_BB_REFCLK_P AP_TO_BB_IPC_GPIO1 AP_TO_BB_COREDUMP PMU_TO_BB_USB_VBUS_DETECT LCM_TO_MANY_BSYNC PP_VDD_BOOST BB_TO_STROBE_DRIVER_GSM_BURST_IND 90_PCIE_BB_TO_AP_RXD_P PCIE_AP_TO_BB_RESET_L <SYNC_MASTER24> <SYNC_DATE26> <SYNC_DATE8> <SYNC_MASTER28> <SYNC_MASTER27> <SYNC_MASTER26> <SYNC_MASTER30> 78 BOM_OMIT_TABLE PMU: CONTROL AND CLOCKS <SYNC_MASTER6> <SYNC_MASTER21> LOWER ANTENNA & COUPLERS TRANSCEIVER0/1: TX PORTS DIVERSITY RECEIVE LNA'S FDD TRANSMIT <SYNC_DATE12> BASEBAND: POWER2 70 71 <CSA_PAGE13> UPPER ANTENNA FEEDS PMU: ET MODULATOR TEST POINTS & BOOT CONFIG TDD TRANSMIT <CSA_PAGE22> 81 <SYNC_DATE24> <SYNC_DATE3> <SYNC_DATE4> <SYNC_DATE5> <SYNC_DATE15> <SYNC_DATE13> <SYNC_DATE14> <SYNC_DATE18> <SYNC_DATE27> <SYNC_DATE19> <SYNC_DATE22> <SYNC_DATE23> <SYNC_DATE21> <SYNC_MASTER2> <SYNC_MASTER25> BASEBAND: CONTROL page1 BASEBAND GPIOS <CSA_PAGE2> <CSA_PAGE3> <CSA_PAGE4> 63 62 <CSA_PAGE5> 67 <CSA_PAGE7> <CSA_PAGE6> 68 <CSA_PAGE8> <CSA_PAGE10> 72 <CSA_PAGE14> <CSA_PAGE15> <CSA_PAGE16> <CSA_PAGE17> 76 77 75 74 73 79 <CSA_PAGE28> <CSA_PAGE27> <CSA_PAGE19> <CSA_PAGE20> <CSA_PAGE21> <CSA_PAGE23> <CSA_PAGE24> <CSA_PAGE26> <CSA_PAGE25> <CSA_PAGE29> <SYNC_DATE17> <CSA_PAGE1> <SYNC_MASTER23> <SYNC_DATE16> <SYNC_DATE7> <SYNC_MASTER4> <SYNC_MASTER3> <SYNC_MASTER1> 80 <CSA_PAGE18> <SYNC_MASTER5> <SYNC_DATE2> <SYNC_DATE1> <SYNC_DATE20> <SYNC_MASTER19> <SYNC_MASTER14> <SYNC_MASTER16> <SYNC_DATE6> <SYNC_MASTER13> <SYNC_MASTER15> <SYNC_DATE9> <SYNC_MASTER8> <SYNC_DATE11> TRANSCEIVER0/1: POWER LAST_MODIFICATION=Wed Jun 8 12:54:09 2016 <SYNC_MASTER18> <CSA_PAGE11> 66 65 64 <SYNC_MASTER11> <SYNC_MASTER20> <CSA_PAGE9> <SYNC_MASTER22> <SYNC_DATE25> <SYNC_MASTER9> <SYNC_DATE10> <SYNC_MASTER12> DIVERSITY RECEIVE ASM'S RECEIVE MATCHING TRANSCEIVER0/1: PRX PORTS 69 <CSA_PAGE12> <SYNC_MASTER17> PMU: SWITCHERS AND LDOS <SYNC_MASTER7> <SYNC_MASTER10> ICEFALL, SIM, DEBUG_CONN <SYNC_MASTER29> <CSA_PAGE30> <SYNC_DATE28> <SYNC_DATE29> <SYNC_DATE30> 2016-06-1400064008778 ENGINEERING RELEASED page1 page1 UPPDI_RF155S00235 NOLMBRF155S00234 ALTERNATE 353S00321 IC SWITCH SPDT353S00253 SWPMX_RFALTERNATE 335S0894 IC EEPROM335S00013 EPROM_RFALTERNATE TRANSITION CAP138S00095138S00101 ALLALTERNATE 197S0565 197S0593 19P2 MHZ XTAL 19P2 MHZ XTAL 197S0593 Y5501_RFALTERNATE197S0598 Y5501_RFALTERNATE 61720 620 7 14 15 12 12 14 15 61720 BB_TO_AP_RESET_DETECT_L BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX2 PMU_TO_BBPMU_RESET_L AP_TO_BBPMU_RADIO_ON_L BBPMU_TO_PMU_AMUX1 PP_VDD_MAIN AP_TO_BB_RESET_L AP_TO_BB_TIME_MARK AP_TO_BB_MESA_ON UART_AOP_TO_BB_TXD I2S_AP_TO_BB_DOUT UART_BB_TO_WLAN_COEX ICEFALL_LDO_ENABLE SE2_PWR_REQ PP1V8_SDRAM SE2_PRESENT SE2_READY NFC_SWP_MUX NFC_SWP 50_UAT1_TUNER 50_UUAT_LB_MLB_NORTH 50_UAT_MB_HB_SOUTH 50_UAT_LB_MLB_SOUTH 50_UAT_WLAN_2G_WEST_PLEXER 50_UAT1_WEST BB_TO_NFC_CLK UART_WLAN_TO_BB_COEX I2S_BB_TO_AP_DIN UART_BB_TO_AOP_RXD PP_VDD_BOOST MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE 4 20 DATESYNCCONTENTSCSAPAGE TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. CK APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. OUT OUT OUT OUT OUT IN IN IN IN OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IO OUT IN OUT OUT OUT IN IN OUT OUT IO IN OUT IN OUT IN IN IO IO IO IO OUT IO IO IO IO IO IO OUT OUT OUT OUT OUT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
D10 SPECIFIC: D11 SPECIFIC: NOLMBRF: BOM OPTIONS: LMBRF: LMBRF1 C7501_RF C7523_RF1138S0739 LMBRF1138S0739 CAP,1UF,0201 CRITICAL1 LMBRF138S00032 CAP,2.2UF,0201 LMBRF1353S00026 CRITICALLDO,BGA,2X2 LMBRFCRITICAL1131S0630 LMBRFCRITICAL1 CRITICAL LMBRF LMBRF1 CRITICAL 152S2006 1 LMBRFCRITICAL MLBPA_RFMLB PAD CRITICAL LMBRF 117S0002 LMBRF CRITICAL1 353S00627 CRITICAL1 MLB LNA LMBRF 138S00032 1 CAP,2.2UF,0201 LMBRFCRITICAL C7528_RF LMBRF 155S00158 1 LMBRFCRITICAL RES,MF,4.99K OHM,01005118S0643 1 CRITICAL LMBRF MLB LNA OUTPUT MATCH LMBRFR6710_RF CRITICAL1 155S00139 PENTAPLEXER LMBRF1 CRITICAL 155S00193 1 LMBRFCRITICAL C7201_RF138S0739 LMBRF1 1 SE2_RF CAP,100PF,010051 LMBRF131S0217 CRITICAL 1118S0627 RES,10KOHM,01005 LMBRFCRITICAL1131S0341 LMBRF1131S0630 CRITICAL 152S2006 1 CRITICAL LMBRF 1 CRITICAL LMBRF IND,1.3NH,1.1A,02011 CRITICAL LMBRF 1 LMBRFCRITICAL152S2000 CRITICAL LMBRF LMBRF1 CRITICAL1118S0724 RES,MF,0OHM,1/20W,0201 CRITICAL LMBRF1118S0724 1 CRITICAL LMBRF131S00001 1131S0341 LMBRFCRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL LMBRF LMBRF C7524_RF RES,MF,0OHM,1/20W,0201 IND,FILM,6.2NH,3%,400MA,UH-Q,0201 CAP,1UF,0201 CAP,1UF,0201 337S00284 CAP,1UF,0201 132S0316 138S0739 1 CAP,0.1UF,01005 CAP,CER,NPO/COG,27PF,2%,16V,01005 IND,FILM,6.2NH,3%,400MA,UH-Q,0201 CAP,CER,NPO/COG,27PF,2%,16V,01005 117S0002 1 1 LMBRFCRITICAL CAP,CER,C0G,HQ,0.6PF,+/-0.05PF,25V,0201131S0363 152S2042 FLTR,DIPLEXER,LB-MB/HB,MIRROR,0805 IC,SECURE ELEMENT,BCM20211,WLBGA25 C6348_RF L6322_RF 1131S0275 152S2002 RES,MF,0OHM,1/20W,0201 1 IND,2.7NH,+/-0.1NH,600MA,0201,UH-Q R6605_RF 131S0337 118S0724 C6416_RF R6606_RF C6610_RF R6703_RF C7119_RF R7104_RF R6404_RF C6106_RF C6306_RF L6305_RF C6315_RF C6345_RF SE2LDO_RF R7512_RF C7531_RF C7530_RF C7529_RF MLBLN_RF FLTR,DIPLEXER,LB-MB-HB,DPX,SHIELD,0805 CAP,CER,COG,3.0PF,+/-0.05,25V,0201,HI-Q R6708_RF CAP,CER,0.1PF,25V,0201 IND,2.0NH,600MA,0201 152S2051 131S0630 353S00723 MLB PAD LAT OUTPUT MATCH MLB PAD UAT OUTPUT MATCH UPPDI_RF UATDI_RF R7506_RF PPLXR_RF R7106_RF R7105_RF LMBRF CRITICALC7123_RF CAP,CER,C0G,0.3PF,+/-0.1PF,25V,0201,HQ 118S0608 1 R5911_RF LMBRFCRITICAL C6613_RFIND,10NH,3%,250MA,HI-Q,0201 CRITICAL LMBRF1152S1356 RES,MF,1K OHM,1%,1/32W,01005 CAP,1.5PF,+/-0.05PF,25V,0201,HQ CAP,CER,NPO/COG,27PF,2%,16V,01005 CAP,CER,COG,3.0PF,+/-0.05PF,25V,0201,HI-Q CRITICAL LMBRF CRITICAL 152S2020 L6320_RFDCS/PCS RX FILTER MATCH CRITICAL NOLMBRF1 DCS/PCS RX FILTER MATCH1 R6301_RF131S0444 CRITICAL NOLMBRF 155S00149 GSMRX_RF NOLMBRFDCS/PCS RX FILTER CRITICAL1 DCS/PCS RX MATCH (DCS) C6332_RF CRITICAL131S0319 NOLMBRF1 DCS/PCS RX MATCH (DCS) L6318_RF NOLMBRFCRITICAL152S2005 1 DCS/PCS RX MATCH (DCS)131S0630 C6340_RF CRITICAL NOLMBRF1 1 DCS/PCS RX MATCH (DCS) C6341_RF CRITICAL131S0630 NOLMBRF DCS/PCS RX MATCH (DCS) L6319_RF NOLMBRF152S2005 1 CRITICAL DCS/PCS RX MATCH (DCS) C6333_RF CRITICAL NOLMBRF1131S0385 155S00163 1 QUADPLEXER PPLXR_RF NOLMBRFCRITICAL 1 NOLMBRFCRITICALUPPDI_RF155S00234 FLTR,DPX,PASS THRU,LB-MB-HB,UNSHLD,0805 155S00199 FLTR,DPX,PASS THRU,LB-MB-HB,SHLD,0805 CRITICALUATDI_RF1 NOLMBRF 1118S0724 RES,MF,0OHM,1/20W,0201 R6404_RF CRITICAL NOLMBRF 18PF,0201,25V CRITICALR6708_RF131S0549 1 1.2NH,+/-0.05NH,1.1A,UH-Q,0201152S00157 1 R6703_RF NOLMBRFCRITICAL 152S2044 IND,2.2NH,+/-0.1NH,600MA,0201 NOLMBRF1 R7104_RF CRITICAL CAP,CER,12PF,5%,25V,0201,HI-Q NOLMBRF1 CRITICAL131S0445 CRITICAL 1 C7120_RF D10131S0278 1 131S0425 CAP,CER,COG,0.5PF,+/-0.05PF,25V,0201,HI-Q CAP,CER,COG,1PF,+/-0.1PF,25V,0201,HI-Q D11CRITICAL NOLMBRF C7120_RF R6606_RF TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
51.1K 51.1K 0.60V 0.50V 0.40V 0.70V 0.80V 0.90V 1.00V 1.10V 1.20V 63.4K 100K50.0K 0.30V EVT DOE DEV1 51.1K 82.5K 422K 51.1K 102K 51.1K EVT GND_XO_CLK: VIA DOWN TO GND PLANE PCIE PERST OPTION PCIE PERST OPTION RESET AND CONTROL: PMU 51.1K XTAL AND CLOCK: PMU DEV5 P2 51.1K 124K 180K 100K 82.5K 51.1K 63.4K DEV 2.1 1.30V 39.0K DEV6 EVT ALT/CARBON 51.1K 887K R5505 R5501 REVISION MPPS AND GPIOS: PMU REV_ID DEV2 DEV 3 PP/P1 T181 51.1K 255K 0.20V 0.10V PMU: CONTROL AND CLOCKS 1.40V 14.7K 51.1K CARRIER 51.1K 1.50V 40.2K 200K 1.60V 6.34K DVT PVT DEV4 51.1K 51.1K HW_REV_ID 6778 67 67 78 53 62 78 68 78 66 67 5362 7881 6778 5362 78 6778 6778 536281 67 67 78 53 62 68 53627881 70 53 62 78 53 62 646566 PCIE_AP_TO_BB_RESET_L PP_VDD_MAIN LCM_TO_MANY_BSYNC PMU_TO_BB_USB_VBUS_DETECT NFC_TO_BB_CLK_REQ 2 1 R5505_RF 2 1 R5501_RF 21 R5511_RF 2 1 R5503_RF 65 55 76 72 77 66 45 41 71 56 35 BBPMU_RF 88 83 20 4 9 61 51 13 38 32 37 21 15 26 BBPMU_RF 62 57 46 36 BBPMU_RF 31 25 43 82 63 75 42 52 98 67 58 53 BBPMU_RF 2 1 C5501_RF 4 3 2 1 Y5501_RF 21 R5504_RF 21 R5502_RF 2 1 C5502_RF WLNSP RADIO_PMIC PMD9645 RADIO_PMIC PMD9645 WLNSP RADIO_PMIC WLNSP PMD9645 RADIO_PMIC WLNSP PMD9645 0.00 0201 1/20W MF 1% RADIO_PMIC 1% 1/32W 01005 MF 1.00K MF 01005 1/32W 5% 19.2MHZ-10PPM-7PF-80OHM RADIO_PMIC 2.0X1.6-SM 01005 MF 1/32W 1% 100K RADIO_PMIC 20% X5R-CERM 6.3V 0.1UF 01005 RADIO_PMIC 10% 6.3V 1000PF X5R-CERM 01005 RADIO_PMIC PP_1V8_LDO7 HW_REV1_ID PS_HOLD_PMIC PMIC_RESOUT_L AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L XO_OUT_D0_EN XO_THERM XTAL_19P2M_IN SPMI_DATA PS_HOLD VREF_DAC_BIAS PP_1V8_LDO7 XTAL_19P2M_OUT XO_THERM XTAL_19P2M_IN XTAL_19P2M_OUT SHIELD_SLEEP_CLK_32K SHIELD_WTR_19P2M_CLK BB_TO_NFC_CLK 50_MDM_PCIE_CLK SHIELD_MDM_19P2M_CLK PCIE_AP_TO_BB_PERST_PMU_L SIM1_REMOVAL_ALARM SPMI_CLK PP_VDD_MAIN MAKE_BASE=TRUE VDDPX_BIAS_UIM2 40.2K MF 1/32W 1% RADIO_PMIC AP_TO_BB_RESET_L 20.0K 01005 200K 1% 01005 MF 1/32W 3 4 5 3 33 3 3 3 1 4 16 20 IN OUT OUT IN IN NCOUT OUT IN OUT IN BI BI IN IN OUT IN NC NC NC IN OUT OUT NC CLOCK SYM 2 OF 5BB_CLK_EN XO_THERM GND_XOADC XTAL_19M_IN XTAL_19M_OUT GND_XO_CLK LN_BB_CLK BB_CLK RF_CLK1 RF_CLK2 SLEEP_CLK GPIO_MPP SYM 3 OF 5 PA_THERM2 PA_THERM1 GPIO_06 GPIO_05 GPIO_04 GPIO_03 GPIO_02 GPIO_01 MPP_06 MPP_05 MPP_04 MPP_03 MPP_02 MPP_01 GND SYM 5 OF 5 GND GND GND GNDCONTROL SYM 1 OF 5 GND GND CBL_PWR* PON_1 SPMI_CLK SPMI_DATA OPT_1 OPT_2 BAT_ID_THERM PS_HOLD PON_RST* RESIN* IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
MDM MEMORY, MDM USB XO SHUTDOWN: ON LOW VOLTAGE LDOS HIGH VOLTAGE LDOS XO SHUTDOWN: ON XO SHUTDOWN: ON SWITCHERS BULK CAPS MEMORY MDM PCIE RFFE VIO FRONT END SUPPLY UIM1 PMU: SWITCHERS AND LDOS MDM MODEM XO SHUTDOWN: OFF XO SHUTDOWN: BYP XO SHUTDOWN: OFF XO SHUTDOWN: OFF XO SHUTDOWN: OFF XO SHUTDOWN: ON XO SHUTDOWN: OFF XO SHUTDOWN: ON XO SHUTDOWN: OFF XO SHUTDOWN: OFF XO SHUTDOWN: BYP XO SHUTDOWN: ON XO SHUTDOWN: BYP XO SHUTDOWN: OFF XO SHUTDOWN: BYP XO SHUTDOWN: OFF XO SHUTDOWN: ON 1.25V/693MA 0.90V/2685MA 1.01V/1059MA 1.85V/1241MA CORE DESENSE CAPS PLACE C5635 AND C5636 NEAR THE PMU PLACE XW CLOSE TO PMU VIA XW DOWN TO THE GND PLANE PLACE XW CLOSE TO PMU XO_GND VIA XW DOWN TO THE GND PLANE RF_CLK_GND UIM2 GPS LNA MDM CORE MDM LOW VOLTAGE ANALOG MDM HIGH VOLTAGE ANALOG MDM EBI1, DDR CORE 1.80V/133MA 3.20V/15MA 2.70V/62MA 1.80V/245MA 1.80V/60MA 1.11V/1253MA 1.80V/60MA 2.70V/5MA 1.00V/88MA 1.80V/366MA 1.23V/124MA 1.20V/569MA 1.00V/610MA 1.80V/52MA 1.80V/15MA 1.16V/1951MA MDM HIGH VOLTAGE USB MDM LOW VOLTAGE USB MDM 1.8V I/O, DDR, SHARED 1.8V VOLTAGE RAIL MDM PLL 68 73 74 75 77 79 80 67 66 BBPMU_TO_PMU_AMUX3-53[I16]6569 536264657781 BBPMU_TO_PMU_AMUX1-53[I16]6566 BBPMU_TO_PMU_AMUX3-53[I16]6569 536264657781 66 66 69 66 66 64 66 66 66 66 536264 6577 81 66 81 73 74 75 66 71 536264 6577 81 536264657781 5362646577 81 81 62 62 62 536264657781 GND4 GND4 GND4 GND4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 GND4 GND4 PP_VDD_MAIN4 PP_VDD_MAIN4 PP_VDD_MAIN4 BBPMU_TO_PMU_AMUX24 BBPMU_TO_PMU_AMUX3 GND4 GND4 PP_VDD_MAIN4 GND4 GND PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 BBPMU_TO_PMU_AMUX348 MAKE_BASE=TRUE BBPMU_TO_PMU_AMUX24 BBPMU_TO_PMU_AMUX145 PP_VDD_MAIN4 GND 4 GND 4 GND 4 GND 4 GND 4 BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX2 4 BBPMU_TO_PMU_AMUX1 MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE 2 1 C5607_RF 2 1 C5605_RF 21 L5604_RF 21 L5602_RF 21 L5605_RF 2 1 L5603_RF 2 1 C5634_RF 2 1 C5633_RF 2 1 C5632_RF 2 1 C5631_RF 2 1 C5618_RF 2 1 C5617_RF 2 1 C5616_RF 2 1 C5615_RF 2 1 XW5617_RF 2 1 XW5616_RF 2 1 C5604_RF 2 1 C5636_RF 2 1 C5635_RF 2 1 XW5615_RF 2 1 XW5614_RF 2 1 C5602_RF 2 1 R5601_RF2 1 C5629_RF 2 1 C5630_RF 99 2 64 59 97 27 22 11 34 87 12 69 91 10 60 30 101 96 85 95 84 100 29 18 3 19 48 39 81 80 78 47 90 24 94 8 70 103 92 16 5 73 89 23 14 44 86 79 40 93 7 1 54 49 102 33 28 17 6 50 68 74 BBPMU_RF 2 1 C5620_RF 2 1 C5608_RF 2 1 C5627_RF 2 1 C5626_RF 2 1 C5609_RF 2 1 C5628_RF 2 1 C5610_RF 2 1 C5612_RF 2 1 C5611_RF 2 1 C5613_RF 2 1 C5614_RF 2 1 C5603_RF 21 L5601_RF 2 1 C5625_RF 2 1 C5601_RF 2 1 C5621_RF 2 1 C5622_RF 2 1 C5623_RF 2 1 C5624_RF PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN AVDD_BYP_GND VREG_XO_GND MDM_VREF_LPDDR2 PP_1V225_SMPS2 AVDD_BYP REF_BYP PP_VDD_BOOST VDD_OTP GND_REF PP_VDD_MAIN PP_VDD_MAIN MAKE_BASE=TRUE MAKE_BASE=TRUE PP_VDD_MAIN VREG_XO VREG_RF_CLK_GND VREG_RF_CLK VREG_RF_CLK MAKE_BASE=TRUE MAKE_BASE=TRUE VREG_XO_GND VREG_XO BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX1 BBPMU_TO_PMU_AMUX2 VREG_RF_CLK_GND PP_VSW_S4 PP_0V95_LDO4 PP_1V8_LDO6 VDD_SIM1 PP_VSW_S2 PP_1V2_LDO2 PP_1V8_LDO8 VDD_SIM2 PP_0V9_LDO3 PP_1V8_LDO15 PP_2V7_LDO12 PP_3V075_LDO10 PP_1V0_LDO9 PP_1V8_LDO7 PP_1V7_LDO5 PP_VSW_S5 PP_1V5_LDO1 PP_1V8_LDO14 PP_1V0_SMPS5 PP_VSW_S3 PP_1V225_SMPS2 PP_VSW_S1 RADIO_PMIC 0402 15UF CERM 6.3V 20% RADIO_PMIC 15UF 20% 6.3V CERM 0402 RADIO_PMIC X5R 20% 1UF 10V 0201 1UF 10V X5R 0201 RADIO_PMIC 20% 2.2UH-20%-0.14OHM-1.6A 0806 RADIO_PMIC 2.2UH-20%-0.14OHM-1.6A 0806 RADIO_PMIC 1.0UH-20%-2.7A-0.056OHM RADIO_PMIC 0806 RADIO_PMIC 0806 1.0UH-20%-2.7A-0.056OHM 6.3V X5R 25UF20% 0402 25UF 0402 6.3V 20% X5R 0402 6.3V 20% 25UF X5R 0402 6.3V 20UF 20% CERM-X5R 25UF X5R 20% 6.3V 0402 25UF 6.3V 0402 20% X5R 0402 6.3V 20% 25UF X5R 0402 6.3V CERM-X5R 20UF20% SHORT-10L-0.1MM-SM OMIT SHORT-10L-0.1MM-SM OMIT RADIO_PMIC 0402 6.3V 10UF 20% CERM-X5R 01005 CERM 16V 2% 27PF100PF 01005 NP0-C0G 16V 5% SHORT-10L-0.1MM-SM OMIT SHORT-10L-0.1MM-SM OMIT 0.47UF 0201 6.3V CERM-X5R 10% 20% 20UF 6.3V CERM-X5R 0402 15UF 20% 6.3V 0402 CERM RADIO_PMIC PMD9645 WLNSP RADIO_PMIC 0402 RADIO_PMIC 15UF 6.3V 20% CERM X5R-CERM1 20% 4.7UF RADIO_PMIC 6.3V 402 RADIO_PMIC CER-X5R 01005 0.1UF 10% 6.3V RADIO_PMIC 10UF CERM-X5R 6.3V 20% 0402 0201 X5R 10V 1UF RADIO_PMIC 20% RADIO_PMIC 20% 10V 1UF X5R 0201 20% 1UF 10V 0201 X5R RADIO_PMIC 20% 1UF RADIO_PMIC 0201 10V X5R 1UF 20% RADIO_PMIC 0201 10V X5R RADIO_PMIC 20% 10V 1UF X5R 0201 1UF 10V X5R 0201 RADIO_PMIC 20% 43UF20% 0603 X5R 4V RADIO_PMIC 1UF X5R 20% 0201 10V RADIO_PMIC 20% X5R 10V 1UF 0201 1UH-20%-0.054OHM-3.4A RADIO_PMIC 2520 RADIO_PMIC CERM 15UF 6.3V 20% 0402 0.00 1/32W MF 0% 01005 RADIO_PMIC 0402 20% 15UF 6.3V CERM 4 4 4 4 4 4 4 4 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST OUT OUT OUT IN IN OUT OUT IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT OUT OUT IN IN IN IN POWER SYM 4 OF 5 GND_S1 GND_S1 VDD_S1 VDD_S1 VREG_L10 VREG_L11 VREG_L4_16 VREG_S1 VSW_S1 VSW_S1 VSW_S1 VSW_S2 VREG_S2 VREG_S3 VSW_S3 VSW_S3 VREG_S4 VSW_S4 VREG_L1 VSW_S5 VREG_S5 VREG_L2 VREG_L3 VREG_L7 VREG_L5 VREG_L12 VREG_L13 GND_XO VREG_XO VREG_L15 VREG_L14 GND_RF_CLK VREG_RF GND_S1 GND_S1 VDD_S3 GND_S2 VDD_S4 GND_S3 GND_S4 GND_S4 GND_S3 VDD_S2 VDD_S2 VDD_S5 GND_S5 VDD_L9 VDD_L1_2_16 VDD_L3_4 VDD_L5_6_15 VDD_L7_8 VDD_OTP REF_BYP GND_REF VIN_VPH1 VIN_VPH2 VREF_DDR AVDD_BYP VDD_XO_RF VREG_L6 VREG_L9 VREG_L8 OUT OUT OUT IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
(MSM MODEM) (MSM CORE) (MODEM SUB MEMORY) (PP_UIM2_LDO13) (PP_UIM1_LDO11) BASEBAND: POWER BBPMU_TO_PMU_AMUX145 BBPMU_TO_PMU_AMUX14 5 2 1 C5755_RF 2 1 C5752_RF 2 1 C5701_RF 2 1 C5702_RF 2 1 C5703_RF 2 1 C5726_RF 2 1 C5723_RF 2 1 C5720_RF 2 1 C5727_RF 2 1 C5728_RF 2 1 C5724_RF 2 1 C5721_RF 2 1 C5725_RF 2 1 C5722_RF 2 1 C5717_RF 2 1 C5714_RF 2 1 C5711_RF 2 1 C5718_RF 2 1 C5715_RF 2 1 C5719_RF 2 1 C5716_RF 2 1 C5712_RF 2 1 C5713_RF 2 1 C5708_RF 2 1 C5705_RF 2 1 C5709_RF 2 1 C5706_RF 2 1 C5710_RF 2 1 C5707_RF Y8 Y4 V6 V1 U9 U23 U17 U15 U10 T7 T23 T17 T16 T15 T14 T11 T10 R7 R18 R17 R12 R11 P9 P8 P18 P17 P13 P12 P1 N9 N6 N18 N17 N16 N15 N14 N13 N10 M7 M6 M18 M14 M11 M10 L8 L7 L23 L16 L12 L11 K9 K8 K17 K16 K13 K12 K1 J9 J6 J22 J17 J16 J10 H7 H6 H23 H19 H18 H17 H12 H11 G23 G19 G15 G14 G13 G10 F23 F17 F16 F15 F14 F11 E9 E8 E6 E23 E22 E21 E18 E16 E15 E14 D23 D21 D2 C9 C4 C21 C20 C2 C16 C11 C1 B5 B22 B21 B20 B19 B13 AB9 AB7 AB5 AB23 AB21 AB15 AB10 AB1 AA5 A9 A7 A6 A4 A23 A22 A2 A17 A15 A12 A11 A1 BB_RF T9 T8 T13 R9 R8 R14 R13 R10 P14 P11 P10 N8 N11 M9 M8 L9 L6 L14 L13 L10 K7 K6 K14 K11 K10 J11 G7 F8 F7 V18 U6 U18 U13 U12 U11 T6 T18 T12 P7 P6 N7 N12 M13 M12 L18 L17 K18 J8 J7 J15 J14 J13 J12 H9 H8 H14 H13 H10 G18 F19 F18 E19 V17 V16 U8 U7 U16 R16 R15 P16 P15 M17 M16 M15 L15 K15 J19 J18 H16 H15 G9 G8 G17 G16 G12 G11 F9 F13 F12 BB_RF 2 1 C5754_RF 2 1 C5735_RF 2 1 C5753_RF V11 AA10 V9 Y20 U21 AA3 W3 AB3 F10 P19 E13 Y7 Y6 Y5 M19 AB11 AA15 AA21 P2 K2 E2 AB16 AA23 R23 Y2 W2 U22 T22 M22 L22 H22 G22 D22 C22 U1 K23 E1 B23 W1 J23 D1 C23 AA1 U14 E17 E7 E3 C7 C6 C18 C15 C12 B18 B15 B12 E10 B10 B8 B7 B3 BB_RF 2 1 C5745_RF 2 1 C5704_RF 2 1 C5750_RF 2 1 C5741_RF 2 1 C5731_RF 2 1 C5732_RF 2 1 C5740_RF 2 1 C5737_RF 2 1 C5734_RF 2 1 C5749_RF 2 1 C5747_RF 2 1 C5748_RF 2 1 C5751_RF 2 1 C5746_RF 2 1 C5744_RF 2 1 C5743_RF 2 1 C5738_RF 2 1 C5730_RF 2 1 C5729_RF 2 1 C5733_RF 2 1 C5736_RF 2 1 C5739_RF 2 1 C5742_RF PP_1V0_LDO9 PP_1V0_LDO9 PP_1V0_SMPS5 PP_1V0_SMPS5 VDD_SIM2 PP_3V075_LDO10 PP_1V8_LDO8 PP_0V95_LDO4 PP_1V8_LDO6 PP_1V8_LDO7 PP_1V7_LDO5 PP_1V0_LDO9 VDDPX_BIAS_UIM2 PP_0V95_LDO4 VDD_SIM1 PP_1V8_LDO7 PP_1V5_LDO1 PP_1V8_LDO6 PP_1V8_LDO6 PP_1V2_LDO2 PP_1V2_LDO2 PP_1V8_LDO6 RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC 0201-1 X5R-CERM 2.2UF 20% 6.3V RADIO_PMIC 20% 2.2UF X5R-CERM 6.3V 0201-1 RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC NOSTUFF 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC X5R-CERM 0201-1 20% 6.3V 2.2UF 0201-1 6.3V X5R-CERM 20% 2.2UF RADIO_PMIC 2.2UF RADIO_PMIC 0201-1 20% 6.3V X5R-CERM 6.3V RADIO_PMIC 0201-1 20% 2.2UF X5R-CERM RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC 0201-1 6.3V X5R-CERM 20% 2.2UF2.2UF 6.3V RADIO_PMIC 20% 0201-1 RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% 2.2UF 20% X5R-CERM 6.3V 0201-1 RADIO_PMIC RADIO_PMIC 0201-1 X5R-CERM 6.3V 20% 2.2UF RADIO_PMIC 2.2UF 20% X5R-CERM 6.3V 0201-1 RADIO_PMIC 0201-1 X5R-CERM 2.2UF 6.3V 20% RADIO_PMIC X5R-CERM 0201-1 6.3V 2.2UF 20% RADIO_PMIC X5R-CERM 20% 2.2UF 6.3V 0201-1 6.3V X5R-CERM 2.2UF 20% 0201-1 RADIO_PMIC 15UF RADIO_BB CERM 0402 6.3V 20% RADIO_BB 15UF CERM 0402 6.3V 20% CERM RADIO_BB 15UF 0402 6.3V 20% X5R-CERM 2.2UF 4V 20% 0201 RADIO_BB X5R-CERM 2.2UF 20% 4V 0201 RADIO_BB 4V X5R-CERM 2.2UF 20% 0201 RADIO_BB RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 2.2UF 0201 20% 4V 2.2UF 20% 0201 X5R-CERM RADIO_BB 4V RADIO_BB X5R-CERM 0201 2.2UF 20% 4V RADIO_BB 4V X5R-CERM 0201 2.2UF 20% 4V X5R-CERM 2.2UF 20% 0201 RADIO_BB X5R-CERM 2.2UF 20% 4V 0201 RADIO_BB X5R-CERM 2.2UF 4V 20% 0201 RADIO_BB 4V RADIO_BB X5R-CERM 0201 2.2UF 20% RADIO_BB X5R-CERM 0201 2.2UF 20% 4V RADIO_BB 4V X5R-CERM 0201 2.2UF 20% RADIO_BB X5R-CERM 0201 2.2UF 20% 4V RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 4V 2.2UF 20% 0201 X5R-CERM 4V 2.2UF 20% 0201 RADIO_BB RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 4V 0201 2.2UF 20% RADIO_BB X5R-CERM 4V 0201 2.2UF 20% MDM9645 BGA MDM9645 BGA RADIO_PMIC X5R-CERM 0201-1 6.3V 2.2UF 20% RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% MDM9645 BGA RADIO_PMIC 0201-1 X5R-CERM 2.2UF 20% 6.3V X5R-CERM NOSTUFF RADIO_PMIC 0201-1 6.3V 2.2UF 20% X5R-CERM 0.1UF RADIO_PMIC 01005 6.3V 20% RADIO_PMIC 01005 NOSTUFF 0.1UF 4V 20% X5R 5 4 5 4 5 4 5 4 4 4 4 5 4 20 17 7 6 5 4 543 4 54 3 54 20 4 543 4 20 17 7 6 5 4 20 17 7 6 5 4 5 4 5 4 20177654 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST NC SYM 8 OF 8 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 6 OF 8 PWR1 VDD_CORE VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM NC NC NC SYM 7 OF 8 PWR2 VDD_A2 VDD_A2 VDD_A1 VDD_A1 VDD_A2 VDD_A1 VDD_A2 VDD_A1 VDD_A2 VDD_ALWAYS_ON VDD_PLL VDD_USB_HS_MX VDD_A2 VDD_A2 VDD_A2 VDD_A3 VDD_A3 VDD_DDR_CORE_1P2 VDD_A1 VDD_A2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VREF_SDC VREF_UIM VDD_PLL VDD_QFPROM_PRG VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P2 VDD_P3 VDD_P1 VDD_P1 VDD_P1 VDD_P3 VDD_P3 VDD_P1 VDD_P1 VDD_P4 VDD_P3 VDD_P3 VDD_P5 VDD_USB_HS_1P8 VDD_USB_HS_3P3 VDD_P7 VDD_USB_SS_0P9 VDD_USB_SS_1P8 VDD_USB_SS_0P9 VDD_P7 VDD_PCIE_1P8 VDD_PCIE_0P9 VDD_PCIE_0P9 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
PLACEPLACE CLOSECLOSE TO T3TO E1 TO AA10 PLACE CLOSE CLOSE TO U12 PLACE NOSTUFF AT CARRIER BASEBAND: CONTROL AND INTERFACES 536278 81 53 62 78 53 62 78 6478 7881 70 71 70 71 71 71 70 70 70 70 77 77 71 71 71 71 71 71 71 71 71 71 71 71 64 64 64 78 64 78 6478 6478 64 6478 53 62 53 62 53 62 53 62 536278 81 SWD_AP_TO_MANY_SWCLK 120 90_PCIE_AP_TO_BB_REFCLK_P 90_PCIE_AP_TO_BB_REFCLK_N 90_PCIE_BB_TO_AP_RXD_P 90_PCIE_BB_TO_AP_RXD_N 90_PCIE_AP_TO_BB_TXD_P 90_PCIE_AP_TO_BB_TXD_N 90_USB_BB_DATA_N 90_USB_BB_DATA_P SWD_AOP_BI_BB_SWDIO120 2 1 R5807_RF 2 1 C5804_RF 4 5 1 3 2 U5801_RF 2 1 C5801_RF 2 1 R5806_RF AB2 AA2 AA4 AB4 Y1 Y9 V10 Y10 AA9 AB6 AA6 AA8 AB8 AA7 V8 V7 BB_RF C19 C13 A13 A14 C14 B14 A16 B16 C17 B17 J21 H21 F22 F21 E12 E11 A18 A19 A20 A21 Y3 G6 G1 F6 F1 B11 B1 C3 A5 B6 C8 A10 C10 B2 A3 B4 C5 A8 B9 BB_RF K22 U5 K21 G21 V5 D3 BB_RF U19 W22 V21 V22 W23 V19 AB18 Y17 T2 R22 R19 T19 T21 V23 R21 V2 V3 U2 T3 R6 U3 F2 BB_RF 2 1 R5803_RF 2 1 R5802_RF 2 1 R5801_RF SHIELD_XCVR0_DRX_CA2_Q SHIELD_XCVR1_DRX_I SHIELD_XCVR0_DRX_CA2_I SHIELD_XCVR0_PRX_CA2_Q XO_OUT_D0_EN SHIELD_SLEEP_CLK_32K SHIELD_XCVR0_PRX_CA2_I PP_1V8_LDO6 MDM_VREF_LPDDR2 EBI1_CAL BDM_CAL PCIE_CAL_RES 50_MDM_PCIE_CLK BB_USB_TRXTUNE SHIELD_XCVR0_TX_FB_RX_I SHIELD_ET_DAC_N SHIELD_ET_DAC_P SHIELD_XCVR0_TX_FB_RX_Q SHIELD_GPS_RX_I SHIELD_XCVR0-1_TX_Q_P PS_HOLD SPMI_CLK VREF_DAC_BIAS SHIELD_XCVR0_PRX_CA1_I SHIELD_XCVR0_PRX_CA1_Q SHIELD_XCVR0_DRX_CA1_Q SHIELD_XCVR0_DRX_CA1_I SHIELD_XCVR1_DRX_Q SHIELD_XCVR1_PRX_I SHIELD_XCVR1_PRX_Q SHIELD_GPS_RX_Q SHIELD_XCVR0-1_TX_Q_N SHIELD_XCVR0-1_TX_I_N SHIELD_XCVR0-1_TX_I_P PMIC_RESOUT_L SHIELD_MDM_19P2M_CLK SPMI_DATA BB_JTAG_RST_L SWD_AP_TO_BB_CLK_BUFFER PP_1V8_LDO6 SWD_AP_TO_BB_CLK_BUFFER5% 1.00K 1/32W MF 01005 SOT1226 NOSTUFF 74AUP1G34GX X5R-CERM 01005 6.3V 20% 0.1UF 1% MF 1/32W 01005 4.02K BGA MDM9645 BGA MDM9645 MDM9645 BGA BGA MDM9645 1.43K 1% 01005 RADIO_BB 1/32W MF RADIO_BB 01005 240 1% 1/32W MF RADIO_BB MF 240 1/32W 1% 01005 0201 10% 10V X5R-CERM 0.1UF RADIO_BB 20 6 5 4 4 176 20 17 7 6 5 4 17 6 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST BI IN IN IN NC NC NC NCIN NC NC NCNC NC NC NC NC NC NC NC USB_PCIE SYM 5 OF 8 PCIE_REFCLK_M PCIE_REFCLK_P PCIE_REXT PCIE_RX_M PCIE_RX_P PCIE_TX_P PCIE_TX_M PCIE_USB_SYSCLK USB_HS_REXT USB_HS_DM USB_HS_DP USB_SS_REXT USB_SS_RX_M USB_SS_RX_P USB_SS_TX_M USB_SS_TX_P IN IN IN IN OUT OUT OUT OUT OUT OUT NC NC NC NC NC NC NC ANALOG_RF SYM 2 OF 8 GNSS_BB_QP BBRX_IP_FB BBRX_QP_FB GNSS_BB_IP TX_DAC0_IP TX_DAC0_QP TX_DAC0_QM TX_DAC1_IP TX_DAC1_IM TX_DAC1_QP TX_DAC1_QM ET_DAC0_P ET_DAC0_M ET_DAC1_P ET_DAC1_M TX_DAC0_IM DNC DNC DNC DNC DNC BBRX_IP_CH0 BBRX_QP_CH0 BBRX_IP_CH1 BBRX_IP_CH3 BBRX_QP_CH2 BBRX_IP_CH2 BBRX_QP_CH1 BBRX_QP_CH6 BBRX_IP_CH6 BBRX_QP_CH5 BBRX_IP_CH5 BBRX_QP_CH3 TX_DAC_VREF TX_DAC_VREF NC NC NC NCNC NC IN IN IN IN IN IN IN IN IN IN IN IN IN SYM 4 OF 8 MEMORYBDM_ZQ VREF_DQ_BDM EBI1_CAL EBI1_VREF EBI1_VREF EBI1_VREF OUT BI BI NC NC OUT IN IN IN NC NC NC NC SYM 1 OF 8 CONTROL SPMI_DATA SPMI_CLK RESOUT* SDC1_DATA_3 SDC1_DATA_2 SDC1_DATA_0 SDC1_CMD SDC1_CLK PS_HOLD SDC1_DATA_1 SRST* CXO_EN CXO SLEEP_CLK RESIN* TCK MODE_0 MODE_1 TRST* TDO TDI TMS IN IN NC NC NC NC OUT OUT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
RFFE USAGE TABLE JP 1.0 KOHM NOSTUFF R5911_RF BASEBAND: GPIOS R5912_RF USID=0X8 USID=0XF NOSTUFF SKU ROW NOSTUFF IMPROVES RXBN BY 4DB RFFE1 WTR3925 MAV13 = BB_LAT_0 RF_BB_LAT_2 WDOG DIS CONFLICT RFFE3 DIV MODULES RF_BB_LAT_1 MAV13 = WDOG DIS RFCAL_QCN PLACE CAP CLOSE TO MDM BUFFER ON RFFE5 SCLK/SDATA_A IS OUTPUT PCIE PULL-UPS TO BB RAIL RF_BB_LAT_3 RFFE5 TUNERS + ELNAS RFFE7 LB PA, COUPLERS BB EEPROM RFFE6 2G PA,MLB PA,MB/HB TDD PA,MB/HB FDD PA RFFE4 WTR4905 RFFE2 QFE3100 53 62 78 70 78 81 53 62 78 536278 5362 5362 5362 5362 5362 536278 7478 53 62 53 62 68 7380 7879 80 77 78 70 78 74 78 70 78 70 78 74 78 70 78 77 78 53 62 64 64 78 53 62 78 7378 7378 53 62 78 53 62 78 81 53 62 78 81 53 62 78 81 78 81 78 81 BB_BUFFER_GPO2 1 BB_BUFFER_GPO1 1 BB_TO_UAT_SCLK 1471 BB_TO_UAT_DATA 1471 BB_TO_LAT_ANT_DATA 1771 I2S_BB_TO_AP_BCLK BB_TO_LAT_ANT_DATA17 7 1 PCIE_BB_BI_AP_CLKREQ_L BB_TO_LAT_GPO2 1 BB_TO_LAT_GPO3 1 BB_TO_LAT_GPO1 1 BB_TO_LAT_ANT_DATA 17 7 1 BB_TO_LAT_ANT_SCLK17 7 1 BB_TO_LAT_ANT_SCLK17 7 1 PCIE_BB_BI_AP_CLKREQ_L7 1 I2S_BB_TO_AP_LRCLK BB_TO_UAT_SCLK 1471 BB_TO_UAT_DATA 1471 BB_TO_LAT_ANT_SCLK 17 7 1 BB_TO_LAT_ANT_DATA 17 7 1 PCIE_AP_TO_BB_RESET_L BB_TO_PMU_PCIE_HOST_WAKE_L AP_TO_BB_IPC_GPIO1 AP_TO_BB_COREDUMP BB_TO_LAT_ANT_SCLK 1771 BB_TO_STROBE_DRIVER_GSM_BURST_IND 2 1 R5912_RF 2 1 C5907_RF 2 1 C5906_RF A3 A2 A1 B4 B2 B1 A4 B3 GPIO_RF 2 1 R5911_RF 21 R5910_RF 21 R5909_RF 2 1 C5903_RF 4 63 52 8 1 7 RFBUF_RF 2 1 R5907_RF A2A1 B2B1 EPROM_RF 2 1 C5902_RF AA20 AB20 Y19 Y21 G5 G2 G3 H5 AB12 N21 AA18 AA17 W21 L21 AA11 Y11 M21 Y22 AB17 Y12 AB22 M23 AA22 L19 Y23 K19 V12 AA16 N23 Y16 H1 H2 H3 J5 J1 J2 J3 K5 K3 F3 F5 N22 L1 L2 L3 L5 M5 M1 M2 M3 N5 N1 N2 N3 P22 N19 Y18 P23 P21 AB19 AB13 Y14 AA14 V14 AA13 Y13 AA12 V13 P5 R5 P3 T5 R1 R2 R3 T1 Y15 AB14 AA19 V15 BB_RF 2 1 C5901_RF 2 1 R5906_RF 2 1 R5908_RF 1% MF 100K 1/32W RADIO_BB 01005 NOSTUFF 1UF 20% 10V RADIO_BB 0201 X5R WLCSP RF1352 MDM9645 BGA 22PF 16V CERM 2% 01005 CAT24C08C4A WLCSP RADIO_BB RADIO_BB 1/32W MF 01005 1% 10K 100PF 5% 16V NP0-C0G 01005 NOSTUFF 0%0.00 MF 01005 RADIO_BB 1/32W 1/32W 0.00 MF 0% NOSTUFF 01005 RADIO_BB 01005 MF 1/32W 1% 1.00K RADIO_BB OMIT_TABLE WLCSP QM18064 01005 6.3V X5R 10% 0.01UF 16V NP0-C0G-CERM 33PF 01005 5% NOSTUFF 1% MF 1/32W 1.00K RADIO_BB 01005 1% 10K MF 01005 1/32W RADIO_BB RX-DSPDT_CTL2 SIM1_DETECT SIM1_RST SKU_ID2 FAST_BOOT_SELECT0 75_RFFE6_SCLK SIM1_IO SIM1_REMOVAL_ALARM FAST_BOOT_SELECT1 PP1V8_SDRAM AP_TO_BB_TIME_MARK UART_BB_TO_WLAN_COEX I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT PP_1V8_LDO6 FBRX-DSPDT_CTL1 BB_EEPROM_I2C_SCL BB_EEPROM_I2C_SDA 75_RFFE3_SCLK UART_WLAN_TO_BB_COEX BB_EEPROM_I2C_SCL PP_1V8_LDO6 75_RFFE7_SDATA PP_1V8_LDO15 UART_BB_TO_AOP_RXD UART_AOP_TO_BB_TXD 75_RFFE4_SCLK 75_RFFE3_SDATA 75_RFFE4_SDATA BB_TO_AP_RESET_DETECT_L AP_TO_BB_MESA_ON SHIELD_GSM_TX_PHASE FBRX-DSPDT_CTL2 75_RFFE1_SCLK PP_1V8_LDO6 SKU_ID BB_EEPROM_I2C_SDA 75_RFFE6_SDATA 75_RFFE7_SCLK 75_RFFE2_SDATA 75_RFFE2_SCLK 75_RFFE1_SDATA SIM1_CLK 17 17 120 45671720 7 7 7 4 5 6 7 17 20 1219 4121314161819 45671720 7 171819 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST OUT OUT IN IN OUT NC NC SDATA GPO4 GPO3 GPO2 GND VIO SCLK GPO1 NC NC NC NC NC NC NC IN OUT IN IN IN OUT NC NC NC NC OUT NC NC NC NC BI NC NC NC NC BI OUT OUT OUT BI OUT OUT BI BI BI BI NC NC NC IN NC NC NC NC NC NC NC NC NC NC BI IN OUT OUT VCC VSS SDASCL GPIO SYM 3 OF 8 GPIO_39 GPIO_38 GPIO_37 GPIO_36 GPIO_35 GPIO_34 GPIO_33 GPIO_32 GPIO_31 GPIO_30 GPIO_29 GPIO_28 GPIO_27 GPIO_24 GPIO_25 GPIO_23 GPIO_26 GPIO_22 GPIO_20 GPIO_21 GPIO_19 GPIO_17 GPIO_18 GPIO_16 GPIO_15 GPIO_12 GPIO_13 GPIO_14 GPIO_7 GPIO_9 GPIO_10 GPIO_11 GPIO_8 GPIO_3 GPIO_4 GPIO_6 GPIO_5 GPIO_2 GPIO_0 GPIO_1 GPIO_78 GPIO_79 GPIO_77 GPIO_76 GPIO_75 GPIO_74 GPIO_73 GPIO_72 GPIO_71 GPIO_70 GPIO_69 GPIO_68 GPIO_67 GPIO_66 GPIO_65 GPIO_64 GPIO_63 GPIO_62 GPIO_61 GPIO_60 GPIO_59 GPIO_58 GPIO_57 GPIO_56 GPIO_55 GPIO_54 GPIO_53 GPIO_52 GPIO_51 GPIO_50 GPIO_46 GPIO_45 GPIO_44 GPIO_43 GPIO_42 GPIO_41 GPIO_49 GPIO_48 GPIO_47 GPIO_40 SDATA SCLK_A SDATA_A GPO2 GND VIO SCLK GPO1 OUT IN OUT NC BI BI OUT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
250MA 35MA 175MA TRANSCEIVER: POWER STAR ROUTING 40MA 250MA 25MA 175MA 40MA STAR ROUTING 25MA 250MA C6380_RF CAN BE 0201 (TBD) BBPMU_TO_PMU_AMUX3-53[I16]65 69 6569 BBPMU_TO_PMU_AMUX3-53[I16]65 69 6569 BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX3 2 1 C6017_RF 2 1 C6016_RF 2 1 C6015_RF 2 1 C6022_RF 2 1 C6024_RF 2 1 C6023_RF 2 1 C6021_RF 2 1 C6020_RF 2 1 C6019_RF 2 1 C6018_RF 21 R6008_RF 21 R6007_RF 21 R6006_RF 21 R6005_RF 2 1 C6004_RF 2 1 C6002_RF 2 1 C6009_RF 2 1 C6008_RF 2 1 C6007_RF 21 R6004_RF 21 R6003_RF 2 1 C6006_RF 21 R6002_RF 52 48 45 42 40 39 37 35 32 30 29 27 26 25 24 21 16 13 9 XCVR1_RF 34 44 23 33 50 XCVR1_RF 2 1 C6005_RF 2 1 C6014_RF 2 1 C6013_RF 2 1 C6012_RF 2 1 C6011_RF 2 1 C6010_RF 21 R6001_RF 2 1 C6001_RF 2 1 C6003_RF 31 25 38 48 41 63 71 27 26 83 82 57 54 53 61 36 37 52 17 81 87 94 55 102 89 19 90 20 91 21 84 28 72 42 56 58 3 XCVR0_RF 23 30 88 67 49 64 45 XCVR0_RF WTR3925-2-TR-03-1 RADIO_TRANSCEIVER DEFAULT_CAPACITOR_27.000000pF_2_1 RADIO_TRANSCEIVER WLPSP WTR3925-2-TR-03-1 RADIO_TRANSCEIVER PP_0V9_LDO3 PP_VDD_XCVR1_RF1_DIG PP_VDD_XCVR1_RF1_TX PP_VDD_XCVR1_RF1_RX PP_VDD_XCVR0_RF1_DIG PP_VDD_XCVR0_RF1_RX2 PP_VDD_XCVR0_RF1_RX1 PP_0V9_LDO3 PP_VDD_XCVR0_RF1_TX PP_VDD_XCVR0_RF1_TX_VCO VDD_XCVR1_RF2_LDO_BYPASS VDD_XCVR0_RF2_LDO_BYPASS RADIO_TRANSCEIVER NP0-C0G 27PF 5% 16V 01005 DEFAULT_CAPACITOR_27.000000pF_2_1 NP0-C0G 27PF 01005 16V 5% RADIO_TRANSCEIVER NP0-C0G 27PF 01005 16V 5% DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 01005 6.3V 20% 20% 2.2UF X5R-CERM 6.3V 0201-1 0201-1 X5R-CERM 2.2UF 20% 6.3V DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 01005 6.3V 20% DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 01005 6.3V 20% DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 01005 6.3V 20% DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 20% 6.3V 01005 DEFAULT_RESISTOR_0.001OHM_2_1 MF 0% 0.00 01005 1/32W DEFAULT_RESISTOR_0.001OHM_2_1 MF 0% 01005 0.00 1/32W DEFAULT_RESISTOR_0.001OHM_2_1 0% MF 01005 1/32W 0.00 0% 0.00 1/32W MF 01005 DEFAULT_CAPACITOR_100000pF_2_1 20% CERM-X5R-1 201 4V 0.47UF RADIO_TRANSCEIVER DEFAULT_CAPACITOR_4700pF_2_1 RADIO_TRANSCEIVER 4700PF X5R 10% 01005 6.3V RADIO_TRANSCEIVER CERM-X5R-1 0.47UF 4V 20% 201 RADIO_TRANSCEIVER 0.1UF X5R-CERM 20% 6.3V 01005 RADIO_TRANSCEIVER 0.1UF X5R-CERM 01005 6.3V 20% RADIO_TRANSCEIVER 0.1UF X5R-CERM 01005 6.3V 20% 0.00 MF 0% 01005 1/32W RADIO_TRANSCEIVER 0% MF 01005 1/32W 0.00 RADIO_TRANSCEIVER 6.3V X5R-CERM 0201-1 2.2UF 20% DEFAULT_RESISTOR_0.001OHM_2_1 RADIO_TRANSCEIVER MF 0% 01005 1/32W 0.00 WTR4905 WLNSP WLNSP WTR4905 DEFAULT_CAPACITOR_4700pF_2_1 RADIO_TRANSCEIVER 10% 6.3V 01005 X5R 4700PF RADIO_TRANSCEIVER DEFAULT_CAPACITOR_27.000000pF_2_1 NP0-C0G 27PF 01005 5% 16V DEFAULT_CAPACITOR_27.000000pF_2_1 27PF NP0-C0G 01005 5% 16V RADIO_TRANSCEIVER RADIO_TRANSCEIVER 27PF NP0-C0G 01005 5% 16V NP0-C0G 27PF 01005 5% 16V DEFAULT_CAPACITOR_27.000000pF_2_1 RADIO_TRANSCEIVER 27PF NP0-C0G 5% 16V 01005 RADIO_TRANSCEIVER DEFAULT_RESISTOR_0.001OHM_2_1 0% MF 01005 0.00 1/32W DEFAULT_CAPACITOR_1e+06pF_2_1 RADIO_TRANSCEIVER CERM-X5R 20% 6.3V 10UF 0402 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IN IN GND SYM 5 OF 5 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SRM 4 OF 5 PWR VDD_RF1_TX VDD_RF1_DIG VDD_RF1_RX VDD_RF2 VDD_RF2_LDO IN IN GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GNDGND GND PWR SYM 4 OF 5 VDD_RF1_TSIG VDD_RF2 LDO_CAP VDD_RF1_DIG VDD_RF1_RX1 VDD_RF1_RX2 VDD_RF1_TVCO 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
TRANSCEIVER: TX PORTS 68 6878 6470 80 79 80 80 79 6470 6770 79 6770 80 80 79 6770 6770 6770 6770 6770 6878 6770 6771 6771 6878 73 6878 2 1 C6117_RF 2 1 C6118_RF 21 L6111_RF 2 1 L6103_RF 2 1 L6102_RF21 C6105_RF 21 C6115_RF 2 1 C6114_RF 21 L6109_RF 21 C6116_RF 2 1 C6113_RF 21 L6110_RF 21 C6110_RF 21 C6109_RF 2 1 C6111_RF 21 C6106_RF 21 C6107_RF 21 C6108_RF 2 1 L6101_RF 21 C6101_RF 2 1 L6104_RF 21 C6102_RF 21 C6103_RF 21 C6104_RF 86 93 100 101 1 9 46 44 51 59 66 74 80 8 16 68 60 76 75 62 47 XCVR0_RF 2 1 C6112_RF 55 31 7 2 12 18 1 3 8 14 19 56 51 57 XCVR1_RF 50_XCVR1_TX_G1800_G1900_PA_IN 27PF RADIO_TRANSCEIVER CERM 2% 50_XCVR0_TX_HMLB2_B34_B39 50_XCVR1_TX_B8_B20_B26_B27_PA_IN RADIO_TRANSCEIVER 10NH-3%-140MA 01005 NOSTUFF SHIELD_XCVR0-1_TX_Q_P 50_XCVR1_TX_HMLB1_G1800_G1900 WLPSP SHIELD_XCVR0-1_TX_I_N SHIELD_XCVR0-1_TX_Q_P SHIELD_XCVR0-1_TX_Q_N SHIELD_XCVR0_TX_FB_RX_I 75_RFFE1_SCLK SHIELD_XCVR0_TX_FB_RX_Q 50_XCVR0_TX_HMB3_B1_B3_B4_B25 50_XCVR0_TX_HMB1_B11_B21 50_XCVR0_TX_HMB2_B38_B40_B41 50_XCVR0_TX_HMB4_B7_B30 50_XCVR0_TX_HMLB2_B34_B39 100_XCVR0_TX_FBRX_IN_WTR 75_RFFE1_SDATA SHIELD_XCVR0-1_TX_I_P WTR3925-2-TR-03-1 RADIO_TRANSCEIVER SHIELD_WTR_19P2M_CLK SHIELD_XCVR0_19P2M_CLK_WTR_IN SHIELD_XCVR0-1_TX_I_N SHIELD_XCVR0-1_TX_Q_N 75_RFFE4_SCLK 75_RFFE4_SDATA SHIELD_XCVR0-1_TX_I_P SHIELD_GSM_TX_PHASE 50_XCVR1_TX_HMLB1_G1800_G1900 50_XCVR1_TX_HMLB2_B8_B20_B26_B27 50_XCVR1_TX_HMLB4_B12_B13_B28 50_XCVR1_TX_HMLB5_G850_G900 50_XCVR1_TX_FBRX_IN 50_XCVR1_TX_HMLB5_G850_G900 50_XCVR1_TX_HMLB4_B12_B13_B28 50_XCVR0_TX_FBRX_IN_UNBAL 50_XCVR0_TX_FBRX_IN 50_XCVR0_TX_HMB3_B1_B3_B4_B25 50_XCVR0_TX_HMB4_B7_B30 50_XCVR1_TX_G850_G900_PA_IN 50_XCVR0_TX_HMB4_B7_B30_MATCH 50_XCVR0_TX_HMB2_B38_B40_B41 50_XCVR0_TX_HMB1_B11_B21 50_XCVR0_TX_HMB2_B38_B40_B41_MATCH 50_XCVR0_TX_B34_B39_PA_IN 50_XCVR0_TX_B7_B30_PA_IN 50_XCVR0_TX_B11_B21_PA_IN 50_XCVR0_TX_B38_B40_B41_PA_IN 50_XCVR0_TX_B1_B3_B4_B25_PA_IN 50_XCVR1_TX_HMLB2_B8_B20_B26_B27 50_XCVR1_TX_B12_B13_B28_PA_IN SHIELD_WTR_19P2M_CLK SHIELD_XCVR1_19P2M_CLK_WTR_IN DEFAULT_CAPACITOR_1.200000pF_2_1 NP0-C0G-CERM 01005 16V +/-0.05PF 1.2PF DEFAULT_INDUCTOR_2.800000nH_2_1 01005 2.8NH-+/-0.1NH-0.36A DEFAULT_CAPACITOR_22.000000pF_2_1 22PF 01005 CERM 16V 5%DEFAULT_CAPACITOR_1.200000pF_2_1 NP0-C0G-CERM 16V +/-0.05PF 01005 1.2PF 2.8NH-+/-0.1NH-0.36A DEFAULT_INDUCTOR_2.800000nH_2_1 01005 DEFAULT_CAPACITOR_1000pF_2_1 6.3V 10% 01005 1000PF X5R-CERM DEFAULT_CAPACITOR_1000pF_2_1 100PF 5% 6.3V 01005 CERM 5% 01005 NOSTUFF NP0-C0G-CERM 25V 68PF OMIT_TABLE 27PF 2% 16V CERM 01005 RADIO_TRANSCEIVER 27PF CERM 16V 01005 RADIO_TRANSCEIVER 2% 16V 27PF 01005 OFFPAGE=TRUE RADIO_TRANSCEIVER 01005 CERM 2% 16V RADIO_TRANSCEIVER NOSTUFF 10NH-3%-140MA 01005 01005 RADIO_TRANSCEIVER 27PF 16V 2% CERM RADIO_TRANSCEIVER 27PF 2% 01005 16V CERM RADIO_TRANSCEIVER 27PF 16V CERM 01005 2% 1.0PF NP0-C0G NOSTUFF 01005 16V +/-0.1PF WLNSP WTR4905 1.5PF +/-0.1PF NP0-C0G 16V 01005-1 +/-0.1PF NP0-C0G 1.5PF 01005-1 16V 3.0NH+/-0.1NH-200MA 01005 NOSTUFF 01005 RADIO_TRANSCEIVER 10NH-3%-140MA RADIO_TRANSCEIVER 10NH-3%-140MA 01005 NOSTUFF 27PF 2% RADIO_TRANSCEIVER 01005 16V CERM DEFAULT_CAPACITOR_22.000000pF_2_1 22PF 01005 CERM 16V 5% 9 9 9 9 9 9 9 9 9 9 12 9 9 9 9 9 9 9 9 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IN IN IN OUT OUT OUT OUT OUT IN IN OUT IN OUT OUT OUT IN IN NC NC NC TX SYM 3 OF 5 TX_LB1 TX_BB_IM TX_BB_QP TX_BB_QM TX_FBRX_BBI RFFE_CLK TX_FBRX_BBQ XO_IN TX_LB2 TX_LB4 TX_LB3 TX_MHB3 TX_MHB1 TX_MHB2 TX_MHB4 TX_HMLB1 TX_HMLB2 TX_FBRX_M TX_FBRX_P RFFE_DATA TX_BB_IP NC IN IN IN IN IN OUT OUT IN NC NC SYM 2 OF 5 TX TX_BB_QP TX_BB_IM TX_BB_QM TX_BB_IP GP_DATA RFFE_DATA RFFE_CLK XO_IN TX_DA1 TX_DA2 TX_DA3 TX_DA4 TX_DA5 TX_FBRX IN NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
GPS FILTER PLACE NEAR U_WTR TRANSCEIVER: PRX, DRX, & GPS PORTS 67 67 76 67 67 67 67 67 72 72 72 72 72 72 67 67 67 67 70 67 70 72 72 72 67 67 67 67 41 6 5 3 2 GFILT_RF 21 L6200_RF 2 1 C6201_RF 7 91 3 8 6 5 4 2 GLNA_RF 21 R6201_RF 2 1 C6205_RF 2 1 C6204_RF 21 L6201_RF 2 1 C6203_RF 24 10 32 18 40 34 70 78 2 13 6 14 7 22 15 11 4 12 5 35 29 50 43 XCVR0_RF 58 41 46 53 59 60 54 49 43 38 36 47 XCVR1_RF 33 39 77 69 97 105 98 106 92 99 95 103 96 104 79 85 65 73 XCVR0_RF 5 10 4 6 11 17 22 28 20 15 XCVR1_RF 50_XCVR0_PRX_PHB3_B38_B40_B41 50_XCVR0_DRX_DMB2_B34 50_XCVR0_DRX_DMB3_B1_B4 50_XCVR0_DRX_DMB5_B3_B25 50_XCVR0_DRX_DHB4_B30_B40 WLPSP SHIELD_GPS_RX_Q SHIELD_XCVR0_DRX_CA2_Q SHIELD_XCVR0_DRX_CA2_I SHIELD_XCVR0_DRX_CA1_Q 50_XCVR0_DRX_DMB4_B39 50_XCVR0_DRX_DHB2_B7_B38_B41 50_XCVR0_DRX_DMLB6_B11_B21 50_GPS_RX SHIELD_XCVR0_DRX_CA1_I SHIELD_GPS_RX_I WTR3925-2-TR-03-1 RADIO_TRANSCEIVER WLPSP WTR3925-2-TR-03-1 SHIELD_XCVR0_PRX_CA2_Q SHIELD_XCVR0_PRX_CA1_Q SHIELD_XCVR0_PRX_CA2_I 50_XCVR0_PRX_PHB2_B40_EXT 50_XCVR0_PRX_PHB1_B7 50_XCVR0_PRX_PMB3_B3 SHIELD_XCVR0_PRX_CA1_I 50_XCVR0_PRX_PHB4_B30 50_XCVR0_PRX_PMLB6_B11_B21 50_XCVR0_PRX_PMB5_B25 50_XCVR0_PRX_PMB4_B34_B39 50_XCVR0_PRX_PMB2_B1_B4 50_XCVR0_PRX_PMB1_B4 RADIO_TRANSCEIVER PP_1V8_LDO14 50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29 SHIELD_XCVR1_PRX_Q 50_GPS_RX 50_XCVR1_DRX_DLB1_B12_B13_B20_B28_B29 50_XCVR1_DRX_DMB2_B3 50_XCVR1_DRX_DLB2_B8_B26_B27 SHIELD_XCVR0_TX_FB_RX_Q SHIELD_XCVR0_TX_FB_RX_I SHIELD_XCVR1_DRX_Q SHIELD_XCVR1_DRX_I SHIELD_XCVR1_PRX_I 50_XCVR1_PRX_PMB2_G1900 50_XCVR1_PRX_PMB1_G1800 50_XCVR1_PRX_PLB2_B8_B26_B27 50_DRX_GPS_LNA_MATCH 50_GPS_FILTER_OUT50_DRX_GPS_LNA_OUT50_GNSS LGA SAFGB1G56XA0F57 GPS-GNSS 120NH-5%-40MA 0201 GNSS 01005 0.1UF 6.3V 20% X5R-CERM GNSS GNSS LGA SKY65766-13 DEFAULT_RESISTOR_0.001OHM_2_1 0.00 0% MF 1/32W 01005 2.0PF +/-0.1PF 16V NOSTUFF 01005 NP0-C0G 2.0PF 01005 NP0-C0G 16V +/-0.1PF NOSTUFF 01005 10NH-3%-0.170A 01005 NP0-C0G 1.6PF +/-0.1PF 16V WTR4905 WLNSP WLNSP WTR4905 11 10 11 11 11 11 11 11 11 11 11 4 11 10 11 11 11 11 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST UNBAL_PRT UNBAL_PRT GND NC OUT NC NC NC NC NC OUT NC RFIN GND RFOUT VDD LNA_EN NC NC IN OUT OUT OUT OUT OUT NC NC NC NC PRX SYM 1 OF 5 PRX_CA2_BBQ PRX_CA1_BBQ PRX_CA2_BBI PRX_HB2 PRX_HB1 PRX_MB3 PRX_CA1_BBI PRX_HB4 PRX_HB3 PRX_MLB6 PRX_MB5 PRX_MB4 PRX_MB2 PRX_MB1 PRX_LB4 PRX_LB2 PRX_LB3 PRX_LB1 IN IN IN IN IN IN OUT OUT OUT OUT NC OUT NC NC SYM 2 OF 5 DRX_GPS GNSS_BBQ DRX_CA2_BBQ DRX_CA2_BBI DRX_CA1_BBQ DRX_LB1 DRX_LB2 DRX_LB4 DRX_MB2 DRX_MB1 DRX_LB3 DRX_MB5 DRX_MB4 DRX_MB3 DRX_HB1 DRX_HB4 DRX_HB3 DRX_HB2 DNC DRX_MLB6 GNSS_L1 DRX_CA1_BBI GNSS_BBI GP_DATANC NC NC NC SYM 1 OF 5 DRX_GPS GNSS_BBQ GNSS_BBI DRX_BBQ DRX_BBI GNSS_IN DRX_HB1 DRX_HB2 DRX_MB1 DRX_MB2 DRX_LB3 DRX_LB1 DRX_LB2 NC NC IN IN IN OUT OUT OUT OUT PRX SYM 3 OF 5 PRX_LB2 PRX_LB1 PRX_LB3 PRX_BBI PRX_BBQ PRX_MB3 PRX_MB1 PRX_MB2 PRX_HB2 PRX_HB1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
PRIMARY & DIVERSITY RECEIVE MATCHING DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF SHUNT COMPONENT WITH BAND 40 FILTER DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF 74 74 74 74 80 80 80 80 80 80 79 80 80 80 80 74 79 80 74 74 74 74 80 21 C6333_RF 21 C6345_RF 21 L6322_RF 21 C6318_RF 21 L6310_RF 21 C6316_RF 21 L6306_RF 21 C6314_RF 21 L6304_RF 21 C6338_RF21 C6324_RF 21 C6349_RF 21 L6323_RF 21 C6350_RF 21 L6328_RF 21 L6319_RF 21 C6332_RF 21 L6318_RF 21 C6348_RF 21 C6302_RF 21 C6317_RF 21 C6301_RF 21 L6309_RF 21 C6309_RF 21 C6343_RF 21 L6308_RF 21 C6308_RF 21 C6342_RF 21 L6307_RF 21 C6306_RF 21 C6315_RF 21 L6305_RF 21 C6305_RF 21 L6325_RF 21 L6324_RF 3 4 6 5 2 1 GSMRX_RF 21 R6301_RF 2 1 L6320_RF 21 L6321_RF 21 L6301_RF 21 C6311_RF 21 C6307_RF 21 L6313_RF 21 C6310_RF 21 L6311_RF 21 L6312_RF 2 1 C6351_RF 2 1 C6352_RF 21 C6346_RF 21 C6334_RF 21 C6344_RF 21 C6336_RF 21 C6337_RF 21 C6323_RF 21 C6325_RF 21 C6335_RF 21 C6340_RF 21 C6341_RF 21 C6328_RF 21 C6329_RF 21 C6319_RF 21 C6320_RF 50_XCVR0_PRX_PMB2_B1_B4 50_XCVR0_PRX_PMB1_B4 50_XCVR0_B7_PA_PRX 50_XCVR0_DRX_DMLB6_B11_B21_MATCH 50_XCVR0_DRX_DMLB6_B11_B21 50_XCVR0_B34_B39_PA_PRX 50_XCVR0_PRX_PHB1_B7 50_XCVR0_PRX_PHB1_B7_MATCH 50_XCVR0_PRX_PMB4_B34_B39 50_XCVR0_PRX_PMB1_B4_MATCH 50_XCVR0_PRX_PMB5_B25_MATCH 50_XCVR0_PRX_PMLB6_B11_B21_MATCH 50_XCVR0_B11_B21_PA_DRX 1.9NH-+/-0.1NH-0.6A-0.12OHM 50_XCVR0_PRX_PMB2_B1_B4_MATCH 50_XCVR0_PRX_PMB4_B34_B39_MATCH 50_XCVR0_B1_B4_PA_PRX 2% CERM RADIO_TRANSCEIVER 27PF 01005 16V 16V 27PF 01005 CERM 2% RADIO_TRANSCEIVER 16V CERM 01005 RADIO_TRANSCEIVER 27PF 2% 01005 CERM 16V 2% 27PF RADIO_TRANSCEIVER CERM 2% 16V 27PF 01005 2% CERM RADIO_TRANSCEIVER 16V 01005 27PF 2% 27PF CERM 16V 01005 RADIO_TRANSCEIVER RADIO_TRANSCEIVER 01005 CERM 16V 2% 27PF NOSTUFF 27PF 01005 16V 2% CERM 01005 27PF 16V CERM 2% NOSTUFF 20NH-3%-0.25A-0.8OHM RADIO_TRANSCEIVER 0201 0201 0.00 MF 1/20W 1% RADIO_TRANSCEIVER 0201 0.00 MF 1/20W 1% 0201 RADIO_TRANSCEIVER 15NH-3%-0.3A-0.7OHM 3.0NH+/-0.1NH-0.6A RADIO_TRANSCEIVER 0201 2.1NH-+/-0.1NH-0.6A-0.12OHM 0201 RADIO_TRANSCEIVER 0201 2.5NH+/-0.1NH-0.6A RADIO_TRANSCEIVER 0201 4.3NH+/-3%-0.5A RADIO_TRANSCEIVER 0201 3.6NH+/-0.1NH-0.5A RADIO_TRANSCEIVER OMIT_TABLE 27PF RADIO_TRANSCEIVER NOSTUFF NP0-C0G 0201 5% 6.3V GSM1800-1900 OMIT_TABLELGA B8856 2.4NH+/-0.1NH-0.6A 0201 3.2NH+/-0.1NH-0.5A 3.1NH-+/-0.1NH-0.5A-0.17OHM RADIO_TRANSCEIVER 0201 6.2NH-3%-0.4A 0201 OMIT_TABLE RADIO_TRANSCEIVER 01005 16V 2% CERM 27PF OMIT_TABLE RADIO_TRANSCEIVER 2% 16V 01005 CERM 27PF RADIO_TRANSCEIVER C0G-CERM 0201 25V +/-0.05PF 3.0PF OMIT_TABLE 0201 4.3NH+/-3%-0.5A RADIO_TRANSCEIVER 01005 CERM 16V 2% 27PF 1.2PF C0G-CERM 25V +/-0.1PF 0201 RADIO_TRANSCEIVER 0201 4.3NH+/-3%-0.5A RADIO_TRANSCEIVER 27PF 2% 16V CERM 01005 RADIO_TRANSCEIVER 01005 16V CERM 2% 27PF RADIO_TRANSCEIVER 1.2PF C0G-CERM 25V 0201 +/-0.1PF 0201 RADIO_TRANSCEIVER 0201 3.3NH+/-0.1NH-0.5A RADIO_TRANSCEIVER 16V 2% CERM 27PF 01005 RADIO_TRANSCEIVER +/-0.1PF 201 1.0PF 25V C0G 3.0PF 25V 0201 +/-0.05PF OMIT_TABLE RADIO_TRANSCEIVER C0G-CERM RADIO_TRANSCEIVER 0201 OMIT_TABLE5.1NH-3%-0.4A 2.0PF +/-0.1PF RADIO_TRANSCEIVER OMIT_TABLE 0201 25V C0G-CERM 5.1NH-3%-0.4A RADIO_TRANSCEIVER OMIT_TABLE 0201 0201 3.0NH+/-0.1NH-0.6A +/-0.1PF 0201 C0G-CERM 25V 2.2PF RADIO_TRANSCEIVER 0201 RADIO_TRANSCEIVER 2.4NH+/-0.1NH-0.6A RADIO_TRANSCEIVER 0201 3.2NH+/-0.1NH-0.5A 2% 16V 01005 CERM RADIO_TRANSCEIVER 27PF 27PF 0201 NP0-C0G 6.3V 5% 1.6NH-+/-0.1NH-1A-0.05OHM RADIO_TRANSCEIVER 0201 27PF 01005 2% CERM 16V RADIO_TRANSCEIVER 1.9NH-+/-0.1NH-0.6A-0.12OHM RADIO_TRANSCEIVER 0201 RADIO_TRANSCEIVER 2% 16V CERM 01005 27PF 3.9NH+/-0.1NH-0.5A 0201 RADIO_TRANSCEIVER 27PF 2% 01005 CERM 16V 0201 6.2NH-3%-0.4A OMIT_TABLE 27PF RADIO_TRANSCEIVER 2% 16V CERM 01005 OMIT_TABLE OMIT_TABLE +/-0.1PF NP0-C0G 2.0PF 16V 01005 01005 RADIO_TRANSCEIVER 27PF 16V CERM 2% 27PF RADIO_TRANSCEIVER CERM 01005 2% 16V OMIT_TABLE RADIO_TRANSCEIVER 16V 2% 27PF 01005 CERM RADIO_TRANSCEIVER 01005 16V CERM 2% 27PF OMIT_TABLE 50_XCVR0_B7_B41_B38_MBHB-DRX-ASM_OUT 50_XCVR1_DRX_DMB2_B3 50_XCVR1_PRX_PLB2_B8_B26_B27_MATCH 50_XCVR1_G1800_G1900_DIPLEX_OUT 50_XCVR1_B3_DRX-DSPDT_OUT 50_XCVR1_DRX_DMB2_B3_MATCH 50_XCVR1_DRX_DLB2_B8_B26_B27 50_XCVR1_G1800_DIPLEX_IN 50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29 50_XCVR1_B12_B13_B20_B28_B29_LB-DRX-ASM_OUT 50_XCVR1_B8_B26_B27_LB-DRX-ASM_OUT 50_XCVR1_G1900_DIPLEX_IN 50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29_MATCH 50_XCVR0_PRX_PMB2_G1900_MATCH 50_XCVR0_PRX_PMB1_G1800_MATCH 50_XCVR0_B30_PA_PRX 50_XCVR1_PRX_PMB2_G1900 50_XCVR0_PRX_PHB2_B40_EXT_MATCH 50_XCVR0_PRX_PHB4_B30 50_XCVR_PRX_PHB4_B30_MATCH 50_XCVR0_B38_B40_B41_PA_PRX 50_XCVR0_PRX_PHB3_B38_B40_B41_MATCH 50_XCVR0_PRX_PMB3_B3_MATCH 50_XCVR0_B34_MBHB-DRX-ASM_OUT 50_XCVR1_PRX_PLB2_B8_B26_B27 50_XCVR1_B12_B13_B20_B28_B29_PA_PRX 50_XCVR0_B39_MBHB-DRX-ASM_OUT 50_XCVR0_B3_B25_DRX-DSPDT_OUT 50_XCVR0_DRX_DMB5_B3_B25_MATCH 50_XCVR0_B40_PA_PRX_EXT_FIL 50_XCVR0_PRX_PHB3_B38_B40_B41 50_XCVR0_B3_PRX-DSPDT_OUT 50_XCVR1_PRX_PMB1_G1800 50_LAT_MLB_G1800_G1900_PA_RX 50_XCVR0_B30_B40_MBHB-DRX-ASM_OUT 50_XCVR0_DRX_DHB2_B7_B38_B41_MATCH 50_XCVR0_DRX_DMB3_B1_B4 50_XCVR0_DRX_DMB2_B34 50_XCVR0_DRX_DMB5_B3_B25 50_XCVR1_DRX_DLB1_B12_B13_B20_B28_B29 50_XCVR0_DRX_DHB4_B30_B40 50_XCVR0_DRX_DHB2_B7_B38_B41 50_XCVR0_DRX_DMB4_B39 50_XCVR0_B1_B4_MBHB-DRX-ASM_OUT 50_XCVR1_B8_B26_B27_PA_PRX RADIO_TRANSCEIVER RADIO_TRANSCEIVER 0201 RADIO_TRANSCEIVER 50_XCVR0_PRX_PHB2_B40_EXT 50_XCVR0_B25_PA_PRX 50_XCVR0_B11_B21_PA_PRX 50_XCVR0_PRX_PMB3_B3 50_XCVR0_PRX_PMB5_B25 50_XCVR0_PRX_PMLB6_B11_B21 50_XCVR0_B4_PA_PRX 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN GSM1800 COMMON GSM1900 GND IN IN IN IN IN IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
UPPER ANTENNA COUPLER USID=0X7 USID=0X6 LOWER ANTENNA AND COUPLER 70 70 6568737475777980 687380 687380 656873747577 7980 687380 687380 53 62 80 80 80 53 62 80 21 FL6401_RF 21 FL6402_RF 2 1 C6420_RF 2 1 C6419_RF 4 6 5 3 1 2 UATDI_RF 4 6 5 3 1 2 LATDI_RF 2 1 C6418_RF 2 1 C6416_RF 21 R6404_RF 2 1 C6415_RF 5 9 6 12 8 14 2 13 1 16 4 15 11 10 7 3 UATCP_RF 5 9 6 12 8 14 2 13 1 16 4 15 11 10 7 3 LATCP_RF 8 9 7 1 2 10 4 56 3 SWLATCP_RF 21 R6402_RF 21 R6401_RF 1 3 2 JLAT1_RF 2 1 C6414_RF 2 1 C6411_RF 2 1 C6410_RF 2 1 C6409_RF 2 1 C6407_RF 21 R6405_RF 2 1 C6408_RF 2 1 C6401_RF 2 1 C6406_RF 2 1 C6417_RF 2 1 C6400_RF 2 1 C6402_RF 2 1 C6403_RF 2 1 C6404_RF 21 R6400_RF 2 1 C6405_RF 50_XCVR0_LAT_CPLD PP_2V7_LDO12 FBRX-DSPDT_CTL1 FBRX-DSPDT_CTL2 50_XCVR0_TX_FBRX_IN 50_XCVR1_TX_FBRX_IN 50_LAT_LB_COMBINER_IN 50_LAT_MB_HB_COMBINER_IN 50_UAT_LB_COMBINER_IN 50_UAT_MLB_COMBINER_IN 50_XCVR0_UAT_CPLD 50_XCVR1_LAT_CPLD 50_XCVR0_LAT_CPLD PP_2V7_LDO12 50_UAT_LB_MLB_SOUTH 50_XCVR0_UAT_CPLD 50_LAT_LB_MB_HB_COMBINER_OUT 50_LAT_LB_MB_HB_CPL_ANT PP_2V7_LDO12 50_UAT_LB_MLB_CPL_OUT 50_UAT_MB_HB_SOUTH 50_UAT_MB_HB_CPL_ANT 50_XCVR1_UAT_CPLD 50_XCVR1_LAT_CPLD 50_UAT_LB_MLB_COMBINE 50_LAT1_ANT 75_RFFE7_SDATA PP_1V8_LDO15_UATCP 75_RFFE7_SCLK 50_UAT_MB_HB_CPL_IN PP_1V8_LDO15 50_XCVR1_UAT_CPLD 50_UAT_LB_MLB_CPL_IN PP_1V8_LDO15 PP_1V8_LDO15_LATCP 75_RFFE7_SDATA 50_LAT_LB_MB_HB_CPL_IN 75_RFFE7_SCLK 01005 2% 16V CERM 18PF NOSTUFF C0H-CERM 0201 2% 25V 18PF NOSTUFF C0G-CERM 0201 +/-0.05PF 0.7PF 25V NOSTUFF 25V 0201 18PF 2% C0H-CERM 0.1UF X5R-CERM 01005 6.3V 20% 18PF CERM 01005 16V 2% 1% 0201 MF 1/20W 0.00 6.3V 20% 0.1UF 01005 X5R-CERM 01005 X5R-CERM 0.033UF 4V 20% 2% CERM 16V 01005 18PF 2% 18PF 25V 0201 C0H-CERM NOSTUFF 0.033UF 20% X5R-CERM 01005 4V NOSTUFF 18PF 2% 25V 0201 C0H-CERM 2% 18PF C0H-CERM 25V 0201 NOSTUFF 10-OHM-1.1A 01005 10-OHM-1.1A 01005 18PF 2% 01005 16V CERM 18PF CERM 01005 16V 2% OMIT_TABLE 0805-LGA LFD21829MMY1E339 0805-LGA LFD21829MMY1E339 16V 5% CERM 18PF 01005 NOSTUFF C0G-CERM 25V 201 OMIT_TABLE 0.3PF +/-0.1PF OMIT_TABLE 1.3NH+/-0.1NH-1.1A 0201 2% NOSTUFF 0201 C0H-CERM 25V 18PF LGA SKY16705-21 SKY16705-21 LGA CXA4439GC-E LGA-1 C0H-CERM 18PF NOSTUFF 0201 25V 2% 0201 1.3NH+/-0.1NH-1.1A 0201 2NH+/-0.1NH-0.6A F-ST-SM MM7829-2700 0201 MF 1/20W 1% 0.00 12 14 13 12 4 17 7 17 7 12 12 12 14 13 12 4 12 14 13 12 4 12 12 19 12 OUT OUT IN IN BI IN IN BI OUT BI BI BI ANT GND LB MB-HB ANT GND LB MB-HB NCNC OUT VIO USID SCLK SDATA RFIN2 RFIN1 RF_CPL2 RF_CPL1 RFOUT1 RFOUT2 VDD GND VIO USID SCLK SDATA RFIN2 RFIN1 RF_CPL2 RF_CPL1 RFOUT1 RFOUT2 VDD GND GND RF1 RF1A VDD RF2 RF1B RF2A RF2B VCTL1 VCTL2 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
MB HB DRX ASM USID=0XA DIVERSITY RECEIVE USID=0X9 LB DRX ASM 687478 687478 6568737475777980 80 75 80 6568737475777980 687478 687478 2 1 C6515_RF 2 1 C6514_RF 12 2 5 9 21 20 19 7 6 11 3 18 17 15 14 13 10 8 4 1 16LBDSM_RF 2 1 C6513_RF 3 2 6 4 5 1 SWDSM_RF 2 1 C6504_RF 26 25 24 23 22 18 20 21 19 17 12 11 9 7 6 5 4 1 14 13 15 16 2 3 8 10 MHBDSM_RF 2 1 C6507_RF 21 R6501_RF 2 1 C6510_RF 2 1 C6512_RF 2 1 C6509_RF 2 1 C6511_RF 2 1 C6508_RF 21 R6503_RF 21 R6502_RF 2 1 C6502_RF 2 1 C6506_RF 2 1 C6505_RF 2 1 C6501_RF 2 1 C6503_RF 50_XCVR0_B3_B25_DRX-DSPDT_OUT 50_XCVR1_B8_B26_B27_LB-DRX-ASM_OUT 75_RFFE3_SCLK 75_RFFE3_SDATA PP_1V8_LDO15 PP_2V7_LDO12 50_XCVR1_B12_B13_B20_B28_B29_LB-DRX-ASM_OUT RX-DSPDT_CTL2 50_XCVR1_B3_DRX-DSPDT_OUT 50_LAT_MB_HB_DRX 50_UAT_MB-HB-DRX-LNA_OUT_RX PP_2V7_LDO12 50_XCVR0_B34_MBHB-DRX-ASM_OUT 50_UAT_MB-HB-DRX-ASM_ANT2 50_LAT_MB-HB-DRX-ASM_ANT150_XCVR0_B39_MBHB-DRX-ASM_OUT 75_RFFE3_SCLK 75_RFFE3_SDATA 50_XCVR0_B30_B40_MBHB-DRX-ASM_OUT 50_XCVR0_B1_B4_MBHB-DRX-ASM_OUT 50_XCVR0-1_B3_B25_MBHB-DRX-ASM_OUT 50_XCVR0_B7_B41_B38_MBHB-DRX-ASM_OUT PP_2V7_LDO12 PP_1V8_LDO15 50_LAT-UAT_LB-DRX-ASM_ANT 50_LB_DRX SYNC_DATE=04/17/2015 01005 2% 16V CERM 18PF NOSTUFF 25V 0201 C0G-CERM +/-0.1PF 2.0PF 0201 3.9NH+/-0.1NH-0.5A NOSTUFF C0G-CERM 25V 0201 +/-0.1PF 2.0PF 0201 NOSTUFF +/-0.1PF C0G-CERM 2.0PF 25V 0201 NOSTUFF 2.0PF 25V C0G-CERM +/-0.1PF 25V C0G-CERM NOSTUFF 0201 +/-0.1PF 2.0PF 25V NOSTUFF 0201 C0G-CERM +/-0.1PF 2.0PF 5% MF 1/20W 0 201 201 1/20W 5% 0 MF D5315 LGA 6.3V 20% 0.1UF 01005 X5R-CERM 18PF 16V 01005 2% CERM 01005 CERM 16V 2% 18PF0.1UF 20% 01005 6.3V X5R-CERM 4V 20% 0.033UF X5R-CERM 01005 2% 01005 16V 18PF CERM CERM 16V 2% 18PF 01005 LGA HFQSWEWUA CERM 16V 2% 01005 18PF CXA4430GC-E LGA 11 11 14 13 12 4 11 177 11 14 13 12 4 11 11 11 11 11 14 13 12 4 NC MIPI_VIO B34_RX MIPI_VDD ANT2 ANT1 THRM_PADGND B39_RX MIPI_SCLK MIPI_SDATA B30_B40_RX B1_B4_RX B3_B25_RX B7_B38/B41B_B41_RX BI IN IN IN IN IN IN BI IN LB_RX1 VLB_RX0 LB_RX0 VLB_RX1 ANT VDD EPADGND SCLK SDATA VIO VDD RF1 RF2 GND CTRL RFIN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
USID=0X3 MB/HB DRX LNA DIVERSITY RECEIVE LNAS USID=0X4 MLB DRX LNA LB DRX LNA USID=0X2 BB_TO_UAT_SCLK-53[I16]626875 BB_TO_UAT_DATA-53[I16]626875 53 BB_TO_UAT_DATA-53[I16]626875 BB_TO_UAT_SCLK-53[I16]6268 75 6568737475777980 BB_TO_UAT_DATA-53[I16]626875 BB_TO_UAT_SCLK-53[I16]626875 6568737475777980 6568737475777980 BB_TO_UAT_DATA BB_TO_UAT_SCLK BB_TO_UAT_SCLK BB_TO_UAT_DATA BB_TO_UAT_DATA BB_TO_UAT_SCLK 9 10 3 25 24 23 7 8 22 21 20 19 18 17 16 15 13 12 11 6 5 4 2 1 14LBLN_RF 2 1 16 15 4 3 6 14 12 11 10 9 8 7 5 13MLBLN_RF 2 1 C6610_RF 2 1 C6613_RF 21 R6605_RF 6 4 5 3 1 2 UPPDI_RF 21 FL6602_RF 2 1 C6629_RF 2 1 C6625_RF 21 20 28 27 26 25 23 22 2 4 24 19 18 17 15 14 13 12 11 10 9 8 7 6 5 3 1 16MHBLN_RF 21 FL6603_RF 2 1 C6620_RF 2 1 C6619_RF 2 1 C6617_RF 2 1 C6627_RF 2 1 C6622_RF 2 1 C6614_RF 21 R6606_RF 2 1 C6611_RF 2 1 C6602_RF 21 R6601_RF 2 1 C6601_RF 1.5PF OMIT_TABLE 0201 OMIT_TABLE 10NH-3%-250MA C0G-CERM 50_UAT_MLB_SPLIT_OUT NOSTUFF LFD21829MMP5E222 0201 OMIT_TABLE 25V +/-0.05PF PP_2V7_LDO12 150OHM-25%-200MA-0.7DCR 50_UAT_MLB-DRX-LNA_TX_RX 18PF 50_UAT_LB-DRX-LNA_TX_RX PP_2V7_LDO12 50_UUAT_LB_MLB_NORTH 50_UAT_LB_MLB_SPLIT_IN 50_UAT_MLB-DRX-LNA_TX_RX PP_MLBLN_RF PP_1V8_LDO15 50_UUAT_MLB PP_1V8_LDO15 50_UAT_LB-DRX-LNA_TX_RX 50_UAT_LB-DRX-LNA_ANT PP_MHBLN_RF 50_UAT_MB-HB-DRX-LNA_OUT_RX 50_UAT1_WEST PP_1V8_LDO15 50_UAT_MB-HB-DRX-LNA_ANT PP_MHBLN_RF 50_UAT_LB_SPLIT_OUT X5R-CERM 0.033UF 20% 4V 01005 18PF 16V CERM 01005 2% 01005 18PF 2% CERM 16V 0.1UF 01005 X5R-CERM 6.3V 20% 01005 16V 18PF 2% CERM C0H-CERM NOSTUFF 0201 25V 2% 0.00 0201 MF 1% 1/20W OMIT_TABLE 18PF 25V C0H-CERM 2% 0201 C0H-CERM 0201 18PF 2% 25V NOSTUFF MF 1% 1/20W 0201 0.00 25V 2% 18PF 0201 NOSTUFF C0H-CERM LGA SKY13702-17 LGA LMRX2HJB-H68 OMIT_TABLE LGA 01005 20% X5R-CERM 0.1UF 6.3V 01005 CERM 18PF 01005 2% 16V SKY13703-19 LGA 01005 150OHM-25%-200MA-0.7DCR 2.7NH+/-0.1NH-0.6A 0201 OMIT_TABLE 14 13 12 4 14 13 12 4 14 15 14 15 14 13 1 15 14 14 14 IN BI BI SCLK SDATA VIO TX_RX GND EPAD ANT VDD OUT_RX GND EPAD VDD VIO SDATA SCLK ANT ANT GND LB MB-HB BI IN IN OUT_RX IN_TX VIO SDATA VDD EPAD ANT GND SCLK BI IN IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
UAT1 TO ANTENNA TUNER UPPER ANTENNA FEEDS 53 62 75 75 5362 75 71 21 R6705_RF 2 1 L6700_RF 21 R6708_RF 21 R6703_RF 2 1 C6713_RF 21 3 JUAT1_RF 21 R6715_RF 2 1 C6726_RF 21 R6709_RF 1 19 8 14 10 17 18 16 15 13 12 11 9 7 6 4 3 2 5 PPLXR_RF 2 1 C6728_RF 21 R6710_RF 2 1 C6711_RF 2 1 C6727_RF 50_UAT1_TUNER 50_UAT1 50_GNSS 50_UUAT_MLB_PLEXER50_UUAT_MLB 50_UUAT_LB_PLEXER 50_UAT_WLAN_2G_WEST_PLEXER 50_UAT_MB-HB-DRX-LNA_ANT 50_UUAT_HB_PLEXER 50_UAT_LB-DRX-LNA_ANT 50_UAT1_MATCH 50_GNSS_PLEXER 50_UAT1_TEST 0.00 UP_RFFE 0201 MF 1/20W 1% 56NH-100MA-3.9OHM 0201 UP_RFFE NOSTUFF 0201 MF UP_RFFE OMIT_TABLE 1/20W 1% 0.00 UP_RFFE 1% OMIT_TABLE 0201 0.00 1/20W MF 25V 2% NOSTUFF 0201 C0H-CERM 18PF 0.00 UP_RFFE MF 0201 1/20W 1% 25V C0H-CERM UP_RFFE NOSTUFF 0201 2% 18PF MM8830-2600B F-RT-SM UP_RFFE 0.00 1% 1/20W MF 0201 UP_RFFE OMIT_TABLE LGA ACFM-W312-AP1 NOSTUFF 0201 UP_RFFE 2% 25V C0H-CERM 18PF C0H-CERM 25V 2% UP_RFFE NOSTUFF 0201 18PF 1% 1/20W MF 0201 UP_RFFE OMIT_TABLE 0.00 NOSTUFF UP_RFFE 0201 C0H-CERM 18PF 2% 25V BI BI BI BI C R GND MB-HB GNSS GND WIFI EPAD ANT LB MLB BI 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
PMU: ET MODULATOR DESENSE CAPS PLACE C6806 AND C6807 NEAR THE QPOET 536264657781 67 67 65 68 73 74 75 79 80 53 62 64 65 77 81 22 14 9 1 13 12 25 24 21 20 15 8 7 6 5 19 23 26 16 17 10 32 31 30 29 28 27 18 11 4 2 3 QPOET_RF 2 1 C6807_RF 2 1 C6806_RF 2 1 C6805_RF 2 1 C6803_RF 2 1 C6804_RF 2 1 C6802_RF 2 1 C6801_RF PP_VDD_MAIN 75_RFFE2_SDATA 75_RFFE2_SCLK SHIELD_ET_DAC_P PP_VDD_MAIN PP_1V8_LDO15PP_VPA_APT PP_QPOET_VCC_PA PP_PA_VBATT SHIELD_ET_DAC_N LGA 2103-601507-10 01005 CERM 16V 2% 27PF 5% NP0-C0G 16V 100PF 01005 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 20% 2.2UF 6.3V X5R-CERM 0201-1 20% X5R-CERM 2.2UF 6.3V20% 6.3V 2.2UF X5R-CERM 0201-10201-1 6.3V X5R-CERM 2.2UF20% 17 7 17 7 18 19 18 19 18 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST SDATA SCLK AMP_IN+ VDD_VBATT VDD_LDO VDD_VBATT VDD_LDO GND VDD_BUCK VDD_BUCK VDD_1P8 VCC_PA_GSM VCC_PA_GSM VCC_PA_ET VCC_PA_ET PA_VBATT USID_LSB TRIM_18 TRIM_14 AMP_IN- IN NCIN IN IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
SIM BASEBAND PCIE GND PCIE BBPMU USB = 0X2 BOOT CONFIG DEFAULT FAST_BOOT[2:0] ICEFALL MLB TEST POINTS PMU_TO_BB_USB_VBUS_DETECT 1 3 20 AP_TO_ICEFALL_FW_DWLD_REQ 1 20 90_USB_BB_DATA_P 1 6 20 AP_TO_BB_COREDUMP 1 7 BB_TO_PMU_PCIE_HOST_WAKE_L 1 7 BB_TO_STROBE_DRIVER_GSM_BURST_IND1 7 NFC_TO_BB_CLK_REQ 1 3 90_PCIE_AP_TO_BB_REFCLK_N 1 6 90_PCIE_AP_TO_BB_REFCLK_P 1 6 BB_TO_LAT_ANT_DATA 1 7 BB_TO_LAT_ANT_SCLK 1 7 90_USB_BB_DATA_N 1 6 20 1 PP6981_RF 1 PP6912_RF 1 PP7502_RF 1 PP7501_RF 1 PP7500_RF 1 PP6980_RF 1 PP6979_RF 1 PP6978_RF 1 PP6977_RF 1 PP6974_RF 1 PP6973_RF 1 PP6972_RF 1 PP6969_RF 1 PP6953_RF 1 PP6900_RF 1 PP6905_RF 1 PP6945_RF 1 PP6938_RF 1 PP6931_RF 1 PP6930_RF 1 PP6929_RF 1 PP6926_RF 1 PP6925_RF 1 PP6924_RF 1 PP6923_RF 1 PP6921_RF 1 PP6920_RF 1 PP6919_RF 1 PP6918_RF 1 PP6917_RF 1 PP6933_RF 1 PP6914_RF 1 PP6913_RF 1 PP6911_RF 1 PP6909_RF 1 PP6908_RF 1 PP6907_RF 1 PP6906_RF 1 PP6971_RF 1 PP6970_RF 1 PP6916_RF 1 PP6915_RF 1 PP6936_RF 1 PP6935_RF 1 PP6904_RF 1 PP6903_RF 1 PP6942_RF 1 PP6941_RF 1 PP6940_RF 1 PP6939_RF 1 PP6944_RF 1 PP6943_RF 1 PP6952_RF 1 PP7000_RF 2 1 R6922_RF 2 1 R6921_RF UART_BB_TO_WLAN_COEX BB_TO_AP_RESET_DETECT_L SE2_PWR_REQ NFC_SWP_MUX SE2_READY SIM1_RST SIM1_CLK BB_JTAG_RST_L UART_BB_TO_AOP_RXD PMU_TO_BBPMU_RESET_L AP_TO_BBPMU_RADIO_ON_L PMIC_RESOUT_L RX-DSPDT_CTL2 AP_TO_BB_TIME_MARK SPMI_DATA SPMI_CLK FBRX-DSPDT_CTL1 75_RFFE6_SCLK 75_RFFE6_SDATA SHIELD_SLEEP_CLK_32K SIM1_REMOVAL_ALARM SWD_AP_TO_BB_CLK_BUFFER 75_RFFE1_SCLK 75_RFFE2_SDATA 75_RFFE2_SCLK 75_RFFE3_SDATA 75_RFFE3_SCLK 75_RFFE4_SDATA 75_RFFE1_SDATA PP_1V8_LDO6 FAST_BOOT_SELECT0 FAST_BOOT_SELECT1 75_RFFE4_SCLK UART_WLAN_TO_BB_COEX FBRX-DSPDT_CTL2 50_MDM_PCIE_CLK BB_TO_NFC_CLK XO_OUT_D0_EN SIM1_SWP SE2_SWP ICEFALL_LDO_ENABLE SIM1_IO SIM1_DETECT P2MM-NSM SM OMIT P2MM-NSM OMIT SM P2MM-NSM SM OMIT P2MM-NSM SM OMIT SM OMIT P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT OMIT SM P2MM-NSM P2MM-NSM SM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT OMIT SM P2MM-NSM SM P2MM-NSM OMIT SM P2MM-NSM OMIT OMIT SM P2MM-NSM P2MM-NSM OMIT SM P2MM-NSM OMIT SM OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM P2MM-NSM SM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM OMIT SM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT P2MM-NSM SM OMIT 01005 1/32W MF 10K RADIO_DEBUG 1% NOSTUFF 1/32W 01005 RADIO_DEBUG MF 10K 1% 2071 71 201 201 201 207 207 206 71 31 2031 63 137 71 63 63 127 19187 19187 63 73 6 97 167 167 137 137 97 97 20 7 6 5 4 7 7 97 2071 127 63 31 63 20 20 201 207 207 PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PPPP PP PP PP PP PP PP PP PP PP PP PP PP PP PP 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
MB HB TDD PA TDD TRANSMIT 2G PA USID=0XF USID=0X5 68 78 79 80 68 78 79 80 70 70 72 72 80 65 68 73 74 75 77 79 80 80 80 68787980 68787980 6568737475777980 70 70 2 1 C7017_RF 14 9 8 11 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 12 13 27 25 3 5 18 20 23 28 26 24 22 21 19 17 15 10 7 6 4 2 1 16 TDDPA_RF 2 1 C7016_RF 2 1 C7015_RF 11 3 8 9 10 17 612 5 4 2 13 GSMPA_RF 21 R7002_RF 2 1 C7006_RF 2 1 C7004_RF 2 1 C7005_RF 21 FL7001_RF 2 1 C7007_RF 2 1 C7010_RF 21 C7012_RF 2 1 C7014_RF 2 1 C7009_RF 21 C7011_RF 2 1 C7013_RF 2 1 C7001_RF 2 1 C7008_RF 50_XCVR1_TX_G1800_G1900_PA_IN PP_1V8_LDO15 75_RFFE6_SDATA 75_RFFE6_SCLK 50_TX_G850_G900_PA_OUT 50_XCVR1_TX_G850_G900_PA_IN 600-OHM-25%-0.1A 27PF NP0-C0G 01005 50_TX_G1800_G1900_PA_OUT PP_PA_VBATT PP_VPA_APT 50_TX_G850_G900_PA_OUT_M 50_TX_G1800_G1900_PA_OUT_M MLB_PA_VBATT 50_TDD_PA_ANT_M 50_XCVR0_TX_B38_B40_B41_PA_IN PP_1V8_LDO15 75_RFFE6_SDATA 50_XCVR0_B34_B39_PA_PRX 50_XCVR0_B38_B40_B41_PA_PRX 50_XCVR0_TX_B34_B39_PA_IN TDD_PAD_VCC1 2GPA_VBATT PP_QPOET_VCC_PA 75_RFFE6_SCLK 16V 5% 01005 NP0-C0G 27PF LGA-1 AFEM-8065-AP1 01005 5.6PF +/-0.1PF 16V NP0-C0G NP0-C0G 01005 16V 5.6PF +/-0.1PF SKY77363 LGA MF0% 01005 1/32W 0.00 2.2UF X5R-CERM 20% 6.3V 0201-1 1.0UF 6.3V 20% X5R 0201-1 5% 16V 0201-1 2.2UF X5R-CERM 20% 6.3V 0201-1 18PF 25V 2% C0H-CERM 0201 NOSTUFF 27PF 5% 0201 NP0-C0G 6.3V 0201 25V NOSTUFF C0H-CERM 18PF 2% NOSTUFF C0H-CERM 18PF 2% 25V 0201 27PF NP0-C0G 0201 6.3V 5% 25V 0201 C0H-CERM 18PF NOSTUFF 2% 0.1UF 20% X5R-CERM 6.3V 01005 18PF 2% 16V CERM 01005 19 16 16 19 19 16 BI IN IN IN OUT OUT VBATT ANT RFIN_HB THRM_PAD VIO SDATA SCLK GND RX_B34_B39 RX_B38_B40_B41 RFIN_MB VCC1 VCC2 VCCVBATT LBRFIN HBRFIN LBRFOUT HBRFOUT VIO SDATA SCLK GND EPAD OUT IN OUT OUT IN BI IN IN IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
1428-1463 MLB PA USID=0XE 1710-2690 1428-1463 824-915 LB PA USID=0XD 1710-2690 MB/HB PA 824-915 FDD TRANSMIT USID=0XB 65 68 73 74 75 77 79 80 68 73 68 73 65 68 73 74 75 77 79 80 68 78 79 80 68 78 79 80 73 73 74 70 73 73 72 72 72 70 68 78 79 80 65 68 73 74 75 77 79 80 68 78 79 80 72 70 79 74 72 72 72 7280 72 79 79 70 70 72 80 73 72 21 R7111_RF 2 1 C7133_RF 21 R7104_RF 22 27 28 25 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 24 23 2 20 26 21 19 17 16 15 13 11 10 9 8 7 6 5 4 3 1 18 12 14 MLBPA_RF 23 24 10 40 41 7 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 8 9 3 2 25 26 12 42 39 38 37 36 35 34 33 32 31 30 29 28 27 22 21 20 19 17 15 13 11 6 5 4 1 14 16 18 LBPA_RF 2 1 C7126_RF 21 R7112_RF 2 1 C7101_RF 21 R7114_RF 2 1 C7128_RF 2 1 C7129_RF 2 1 C7127_RF 2 1 R7131_RF 2 1 C7131_RF 2 1 C7132_RF 2 1 R7132_RF 2 1 C7130_RF 2 1 R7130_RF 26 38 37 29 8 7 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 28 27 21 19 5 17 3 1 31 32 34 10 9 6 42 41 40 39 36 35 33 30 25 24 23 22 20 18 16 15 12 4 2 11 13 14 MBHBPA_RF 2 1 C7117_RF 21 R7103_RF 2 1 L7123_RF 2 1 L7122_RF 6 5 3 2 1 4 RXFIL_RF 2 1 C7125_RF 2 1 C7124_RF 2 1 C7121_RF 2 1 C7120_RF 2 1 R7108_RF 2 1 R7110_RF 21 R7107_RF 21 R7113_RF 21 R7109_RF 2 1 C7106_RF 2 1 C7113_RF 2 1 C7103_RF 2 1 C7104_RF 2 1 C7105_RF 2 1 C7114_RF 2 1 C7108_RF 2 1 C7110_RF 21 R7105_RF 2 1 C7122_RF 21 R7106_RF 2 1 C7123_RF 21 R7101_RF 21 R7102_RF 2 1 C7111_RF 2 1 C7112_RF 2 1 C7118_RF 2 1 C7119_RF 0.033UF 18PF 25V OMIT_TABLE 1.0PF 0.00 1% 50_LAT_MLB_G1800_G1900_PA_RX OMIT_TABLE 0201 50_UAT_MLB_COMBINER_IN 50_LAT_LB_COMBINER_IN +/-0.1PF 20% NOSTUFF 33PF 50_UAT_LB_PA_ANT DEFAULT_RESISTOR_0.001OHM_2_1 1/32W 01005 DEFAULT_RESISTOR_0.001OHM_2_1 0.00 0201 OMIT_TABLE 1.8NH+/-0.1NH-0.8A +/-0.05PF OMIT_TABLE 0201 25V CERM 0.6PF 50_UAT_MLB_PA_ANT PP_PA_VBATT PP_PA_VBATT LB_SNUBBER MLB_TDD_SNUBBER MBHB_SNUBBER MBHB_FDD_PA_VBATT MBHB_FDD_PAD_VCC1 50_XCVR0_B30_PA_PRX 50_XCVR0_B25_PA_PRX 50_XCVR0_B1_B4_PA_PRX 50_XCVR0_B4_PA_PRX 50_XCVR0_B7_PA_PRX 50_LAT_MLB_G1800_G1900_PA_RX 50_LAT_MB_HB_DRX LB_PA_VBATT LB_PAD_VCC1 PP_1V8_LDO15 50_XCVR0_B11_B21_PA_PRX 50_XCVR0_B11_B21_PA_DRX PP_QPOET_VCC_PA 75_RFFE6_SCLK 75_RFFE6_SDATA 75_RFFE6_SCLK 75_RFFE6_SDATA PP_1V8_LDO15 50_XCVR1_TX_B8_B20_B26_B27_PA_IN PP_QPOET_VCC_PA 50_XCVR1_TX_B12_B13_B28_PA_IN 50_TDD_PA_ANT_M 50_LAT_MB_HB_PA_ANT 50_UAT_MB_HB_CPL_IN 50_XCVR0_TX_B11_B21_PA_IN 50_UAT_MB_HB_PA_ANT 50_XCVR0_B3_PRX-DSPDT_OUT 50_XCVR0_B40B_PA_PRX 50_XCVR0_TX_B7_B30_PA_IN 50_XCVR0_TX_B1_B3_B4_B25_PA_IN 50_TX_G1800_G1900_PA_OUT_M PP_QPOET_VCC_PA 50_XCVR1_B12_B13_B20_B28_B29_PA_PRX 50_XCVR1_B8_B26_B27_PA_PRX 50_LB_DRX 50_TX_G850_G900_PA_OUT_M PP_PA_VBATT 50_LAT_MLB_PA_ANT 50_LAT_MB_HB_COMBINER_IN 50_XCVR0_B40B_PA_PRX 50_XCVR0_B40_PA_PRX_EXT_FIL MLB_PA_VBATT 75_RFFE7_SDATA 75_RFFE7_SCLK PP_1V8_LDO15PP_1V8_LDO15_PA 75_RFFE7_SCLK_PA 50_UAT_LB_COMBINER_IN 50_LAT_LB_PA_ANT 75_RFFE7_SDATA_PA SYNC_DATE=04/17/2015 MF 1/20W C0H-CERM 18PF 2% 0201 25V NOSTUFF 2% C0H-CERM 0201 25V 1% MF 0201 0.00 1/20W 0201 22NH-3%-0.25A 2% 18PF 25V C0H-CERM 0201 NOSTUFF C0H-CERM 0201 2% 18PF 25V C0G +/-0.05PF OMIT_TABLE 0201 25V 0.1PF 1/32W MF 0% 01005 0.00 4V 20% 0.033UF 01005 0201 OMIT_TABLE 2NH+/-0.1NH-0.6A OMIT_TABLE LGA HRPDAF025 LGA1 SKY78100-14 NOSTUFF 01005 16V 33PF 5% NP0-C0G-CERM 01005 MF 1/32W 0% 0.00 10% 10V CERM 180PF 01005 01005 10-OHM-1.1A 16V 5% NP0-C0G-CERM 01005 NOSTUFF NOSTUFF 20% X5R-CERM 4V 01005 0.033UF X5R-CERM 01005 4V 1/32W 1% NOSTUFF 1.00 MF 01005 NP0-C0G 01005 68PF 2% 6.3V NOSTUFF 6.3V 68PF 2% NP0-C0G 01005 NOSTUFF NOSTUFF 01005 1.00 1% 1/32W MF NOSTUFF 01005 NP0-C0G 68PF 2% 6.3V NOSTUFF 1% 1/32W 1.00 MF 01005 LGA AFEM-8055-AP1 01005 2% CERM 0201 1.8NH+/-0.1NH-0.8A NP0-C0G 1.0PF 16V +/-0.1PF 01005 4.7NH-3%-0.270A 01005 LGA QM21140 BAW-B40F-RX 25V C0H-CERM 18PF 2% NOSTUFF 0201 25V 18PF 0201 2% C0H-CERM NOSTUFF 0201 25V 18PF 2% DEFAULT_RESISTOR_0.001OHM_2_1 0% 01005 MF 1/32W 0.00 0% 01005 MF 1/32W 0.00 01005 0% MF 1/32W 0.00 0% MF 01005 1/32W DEFAULT_RESISTOR_0.001OHM_2_1 0.00 MF 0% DEFAULT_CAPACITOR_1e+06pF_2_1 1.0UF 6.3V X5R 0201-1 20% 1.0UF 20% X5R 0201-1 6.3V 1.0UF 20% 6.3V X5R DEFAULT_CAPACITOR_1e+06pF_2_1 0201-1 18PF 16V 2% 01005 CERM 18PF 2% 01005 CERM 16V 18PF 2% CERM 16V 01005 01005 CERM 16V 2% 18PF 16V 2% 18PF 01005 CERM NOSTUFF C0H-CERM NOSTUFF X5R-CERM C0G 201 16V 18PF 19 18 16 19 18 16 11 19 18 16 19 18 16 11 19 19 18 16 19 18 16 19 18 IN BI IN IN BI IN BI BI OUT IN BI BI OUT OUT OUT IN BI IN IN OUT IN IN OUT NC NC OUT OUT VIO SCLK SDATA VBATT GND PRX DRX THRM_PAD ANT2 ANT1 RFIN_MLB VCC2 VCC1 RFIN0 SDATA VIO SCLK GND ANT2 ANT1 VBATT VCC1 VCC2 RFIN1 THRM_PAD 2G_TX LB_DIV LB_RX0 LB_RX1 VLB_RX0 VLB_RX1 OUT OUT VBATT VCC1 SDATA VIO TRX2 RFIN_MB RFIN_GSM VCC2 RFIN_HB SCLK RX_B30 RX_B25 RX_B4 RX_B7 RX_B3 RX_B1 MB_HB_DRX DCS_PCS_RX TRX3 EPAD ANT2 ANT1 GND B40RXOUT GND B40ANT OUT IN IN IN IN BI BI 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
SIM CARD CONNECTOR ICEFALL SWP MUX DEBUG CONNECTOR ICEFALL LDO 5362 78 5362 687881 687881 68 78 81 68 78 81 536267 536264 536267 53626778 53626478 53626778 67 78 53 62 68 78 53 62 68 78 68 78 81 68 78 81 68 78 81 68 78 81 53 53 62 78 53626881 53 62 78 536278 AP_TO_ICEFALL_FW_DWLD_REQ SWD_AP_TO_MANY_SWCLK SWD_AOP_BI_BB_SWDIO 90_USB_BB_DATA_N 90_USB_BB_DATA_P PMU_TO_BB_USB_VBUS_DETECT1317 2 1 R6904_RF 2 1 C7531_RF 2 1 R6900_RF 2 1C7528_RF 2 1C7201_RF 2 1 R7512_RF 2 1 C7530_RF 2 1 C7529_RF 21 R7511_RF A2A1 B1 B2 SE2LDO_RF 2 1 C6901_RF 2 1 DZ6904_RF 2 1 DZ6903_RF 2 1 DZ6905_RF 2 1 DZ6902_RF 2 1 DZ6901_RF 21 R7510_RF 2 1 C6900_RF 2 1 DZ6900_RF1 6 9 8 2 7 16 15 14 13 12 11 10 5 3 J_SIM_RF 3635 3433 3231 3029 2827 2625 2423 2221 2019 1817 1615 1413 1211 109 87 65 43 21 42 41 4039 3837 J_DEBUG 2 1 R7506_RF C1 D1 C4 D5 B5 E1 A5 E5 C5 D2 C3 C2 B2 E3 A2 A1 B1 A3 B3 D3 D4 E4 E2 A4 B4 SE2_RF 2 1 C7524_RF 5 6 2 1 34 SWPMX_RF 2 1 C7525_RF 2 1 C7501_RF 2 1C7523_RF VOLTAGE=1.80V VOLTAGE=1.20V SE2_PWR_REQ PP1V8_ICEFALL_LDO PP_VDD_MAIN VDD_SE2_1V8 SE2_READY NFC_SWP_R SIM1_RST SIM1_IO SIM1_CLK SIM1_SWPSIM1_IO SIM1_CLK AP_TO_BB_RESET_L BB_JTAG_RST_L SIM1_IO PP_VDD_BOOST VDD_SIM1 VDD_SIM1 SIM1_IO ICEFALL_LDO_ENABLE SE2_PRESENT PP1V8_ICEFALL_LDOPP1V8_SDRAM SE2_SWP NFC_SWP_MUX SIM1_SWP NFC_SWPPP1V8_SDRAM SIM1_RST SE2_SWP VDD_SE2_1V2 PP1V8_SDRAM SIM1_DETECT PP_1V8_LDO6 SIM1_SWP SIM1_DETECT SIM1_CLK SIM1_RST VDD_SIM1 PP1V8_ICEFALL_LDO AP_TO_BBPMU_RADIO_ON_L UART_WLAN_TO_BB_COEX UART_BB_TO_WLAN_COEX SIM1_DETECT SIM1_SWP PP_VDD_MAIN SG-WLL-2-2 SIM ESD202-B1-CSP01005ESD202-B1-CSP01005 SG-WLL-2-2 SIM SG-WLL-2-2 SIM ESD202-B1-CSP01005 SG-WLL-2-2 SIM ESD202-B1-CSP01005 01005-1 12V-33PF SIM 0.00 0% 1/32W MF 01005 NFC SIM X5R-CERM 2.2UF 20% 6.3V 0201-1 SIM 0201 5.5V-6.2PF F-RT-SM SIM RCPT-WIDE-HSG-THICK-PIVOT NOSTUFF F-ST-SM 20-5857-036-001-829 OMIT_TABLE NFC 01005 1/32W 4.99K 1% MF OMIT_TABLE WLBGA SE2 BCM20211CP SE2 1UF 20% 10V 0201 X5R OMIT_TABLE NLAS3257CMX2TCG DFN SE2 0.1UF 20% 6.3V X5R-CERM 01005 OMIT_TABLE 0.1UF SE2 01005 X5R-CERM 20% 6.3V 10V 20% 0201 X5R OMIT_TABLE 1UF SE2 SIM MF 1/32W 01005 1% 100K CERM 6.3V 5% 01005 100PF OMIT_TABLE MF 1% 1/32W 01005 15.00K SIM 1UF OMIT_TABLE X5R 0201 SE2 20% 10V NOSTUFF 10V X5R 0201 20% SE2 1UF MF 10K 1/32W 1% OMIT_TABLE 01005 SE2 20% X5R-CERM 0201-1 6.3V 2.2UF OMIT_TABLE SE2 6.3V 20% 0201-1 X5R-CERM OMIT_TABLE 2.2UF 1% 1/20W MF NOSTUFF 0.00 0201 LP5907UVX-1.825-S OMIT_TABLE DSBGA 5% 16V NP0-C0G 01005 SIM 100PF 20 20 16 4 3 1 20 17 7 20 17 7 20 1720 17 7 20 17 7 4 1 20 5 4 20 5 4 17 1 20 2017 2017 2071 2017 20 7 1 20177 17 7 6 5 4 2017 2054 20 2017 20 16 4 3 1 IN IN NC IN IN NC BI OUT GND SIM_DETECTSIM_DETECT_GND CLK VCC RESET IO SWP OUT NC OUT OUT BI OUT BI NC OUT IN IN NC OUT IN BI IN OUT VDDO_NFC REG_PU TCAL_CLK SWP NC GPIO_1 DWP DB_TX DB_RX GPIO_0 SPI_MISO SPI_MOSI VDDO_HOST_2 VDDC VDD1P2 VDD1P8 VDD1P8_BYP VDDC SPI_CLK SPI_CS SPI_INT VSS VSS VSS VSS VER 1 B1 VCC B0A S GND IN NC NC IN GND VOUT VEN VIN NC IN NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

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  • 1.
    BS0402 TP0424 TP0411 TP0400TP0401 TP0420TP0422 TP0415 TP0416 TP0407 TP0406 TP0405TP0404 TP0403 TP0402 TP0421 TP0419 TP8000_RF ZT0401 ZT0404 J4101 QPOET_RF LBPA_RF TDDPA_RF MLBPA_RF L8007_RF L8009_RF U SPD T_R F USPDT2_RF CL0401 BS0405 SUAT2_RF SUAT1_RF SGND_RF BS0403 U2402 M2600 R4401 U2404 J_SIM_RF MBHBPA_RF UATDI_RF LATDI_RF C4421 C4417 XW5616_RF XW2700 XW 2201 XW2404 XW3801 XW3333 XW2707 no_refdes+2 no_refdes+3 no_refdes+4 no_refdes+5 no_refdes+6 no_refdes+7 no_refdes+9 J3801 U3801 L3903L3902L3901 J2201 M2800 JLAT3_RF JLAT1_RF J4502 BS0406 FD0403 FD0402 FD 0408 FD0409 DZ4402 DZ4401 C 7730_RF L6707_RF R6706_RF L8008_RF R2001 C6704_RF DZ4404 DZ4403 FL3803 FL3910 C2443 C4106 C4109 C4105 C6716_RF C 8008_RF C6714_RF C6700_RF C4401 C4418 FL4112 FL3904 FL3915 FL3922 R4104 FL3919 FL4742 FL3801 FL3924 FL3806 FL3916 FL3804FL3802 FL4741 FL4405 FL4402 FL4403 FL4732 FL4404 FL4406 FL4731 FL4401 FL4120FL4116 FL4108 FL4101 FL4115 FL4119 FL4117 FL4118 FL4102 FL4407 FL4105 R2404 R3923 R4806 R4807 R3805 R4110 R4109 R4712 R4711 R2441 R3901 R3908 R3802 R2201 R4405 R4402 R4406 R4102 R4710 R4709 C2619 C4136 C4730 C4135 C2202 C3924C4507C3805 C3922 C3925 C3919 C4810 C4809 C3825 C3818 C3817 C3816 C2201 C3807 C3806 C3926 C4712 R4501 C4742 C4741 C3923 C0404 C4415 C4732 C0410 C4731 C4405 C4404 C4111 C4108 C4132C4128C4729 C4110 C4131 C4129 C2620 C4126 C4101 C4102 C4134 C3902 C2204 C3912 C3914 C3913 C3911 C3910 C3909 C3916 C4103 C3936 C3930 C3802 C3811 C3935 C3931 C3804 C3915 C0402 C0401 C4414 C4410 C4402 C0408 C4411 C4407C4403 C4406 C4104 C4127C4133 C4120 C4119 C4130 C3542 C3529 C3434 C2445 C2442 C3822 C2401 C2449 C2203 C3927 C3918 C3819 C3801 C3826 C3928 C0403 C4419 C2007 C0409 C4420 C4117 C4118 C1905 C6721_RF C 8005_RF C4122 C4121 C3803 C4107 C0405 C0411 C0406 C4413 C4408 C4409 C4412 C4116 C4422 C6720_RF C 8007_RF C3934 C3932 C2448 C2117 C2118 C3814 C3828 C3813 C3821 C3815 C2418 C4416 SH0403 PP2440 PP4501 PP3801 PP2403 PP2402 PP8000_RF PP2404 PP2401 PP3601 PP3602 PP2003 PP6919_RF PP6917_RF PP6918_RF PP6969_RF PP6979_RF PP6953_RF PP6973_RF PP6972_RF PP6921_RF PP6945_RF PP7601_RF PP7600_RF PP6942_RF PP6941_RF PP6920_RF PP6933_RF PP6905_RF PP6977_RF PP6974_RF PP6944_RF PP6943_RF PP6952_RF PP7000_RF PP6936_RF PP1702 PP1701 PP6940_RF PP6935_RF PP6939_RF PP6938_RF PP6980_RF no_refdes+1 U0700 L2301 NFCSW_RF TP0414 TP7505_RF TP0423 TP0413 TP7500_RF U3301 L1803 XW3202 BALUN_RF L1813 L1809 L1807 L1808 L1812 L1811 C7518_RF J4503 TUNFX_RF R3332 R3333 J4501 C5632_RF C5616_RF C5633_RF C5617_RF C5618_RF C5634_RF L5602_RF L5604_RF L5603_RF L5605_RF SWPMX_RF XW2001 XW1801 XW1802 XW1803 XW1403XW 1805 XW5614_RF XW5615_RF XW1402 XW1401 XW1902 XW1901 XW3203 XW1807 XW2002 XW 2005 XW 2004 XW2003 no_refdes+5 no_refdes+8 no_refdes+10 L7500_RF L7501_RF L5601_RF C1914 C1911 C1910 C1907 C3532 C3326 C1512 C3313 C3328 C3531 C3308 C3324 C3306 C3325 C3327 C1901 C1808 C1804 C1810 C1806 C5624_RF C5620_RF L3302 L1806 L1814 L1810 L1816 L1817 L1804 L1801 L1818 L1815 FD0407 R2002 R7508_RF R7509_RF R7520_RF DZ2906 DZ2905 DZ2907 FL2505 FL2901 FL2902 C7515_RF C7507_RF C7508_RF C3311 C7509_RF C7510_RF C7516_RF C7512_RF C7514_RF FL4815 FL2911 FL2910 FL6700_RF FL6703_RF FL2904 FL2909 FL2501 FL2504 FL2913 FL2908 FL2907 FL2906 R2905 FL2914 FL2903 R1306 R1305 FL6701_RF R4708 R2904 R2903 R4813 R4812 FL6702_RF R4707 R3301 R2008 R4815 R4808 R4809 R7512_RF R4604 R4603 R4706 R4811 R4810 R4705 R2915 R0901 R6900_RF R5911_RF C2513 C4708 C2924 C4803 C2520 C2910 C2905 C4804 C4707 C2906 C4813 C4812 C3312 C3333 C3332 C2503 C2514 C2904 C2926 C2902 C2911 C2933 C2921 C2908 C2934 C2935 C2903 C2931 C2932 C1867 C1871 C1869 C1811 C1872C1873 C0909 C0905 C0908 C0904 C1861 C1860 C3323 C3331 C2523 C2526 C2524 C2525 C2530 C2901 C2914 C2915 C7525_RF C3315 C0801 C0818 C0817 C0816 C0815 C2512 C0413 C2008 C5903_RF C2522 C2529 C2528 C6702_RF C6701_RF C6703_RF C6705_RF C3319 C2521 C3501 C3329 C2916 C2917 C2927 C2508 C2909 C2510 C2506 C1923 C1930 C1615 C3316 C5730_RF C0805 BB_RF U5801_RF C5614_RF C3318 SH0401 PP7608_RF PP7604_RF PP7603_RF PP5301 PP7501_RF PP1410PP0902 PP1411 PP6931_RF PP6971_RF PP6915_RF PP0802PP6916_RF PP0801 PP6970_RF PP6923_RF PP7502_RF PP6929_RF PP6906_RF PP6914_RF C4711 U2710 U3502 U3402 TP0409 TP0408 TP0412 TP0410 C3405 C2702 C2114 C3722 C3424 C2113 C4601 C3525 C3702C3724 C3718 C2611 C2612 C2609 C2610 C3710 C3407 C3404 C3403 C3539 C3538 C3524 C3432 C3929 C3713C3712C3714 C3901 C3530 C3707 C3715 C3716 C3823 C3537C3431 C1716 C1748 C1721 C1713 C1701 C1702 C1730 C1729 C1722 C1733 C1719C1704C1705C1707C1727 FD0400 FD0404 FD0410 FD0405 DZ6900_RF R7103_RF C6610_RF L6304_RF R2003 R2711 R6405_RF R6400_RF R7105_RF C6310_RF L6311_RF R7102_RF R7511_RF R6705_RF R6710_RF R6715_RF R6708_RF R6709_RF R6703_RF R6601_RF R6606_RF DZ6901_RF FL3903 FL3901 FL3902 C7013_RF C6415_RF C6417_RF C7010_RF C7014_RF C7125_RF R7101_RF C7124_RF C6405_RF C6404_RF C7118_RF C6403_RF C7122_RF C6410_RF C6402_RF C7009_RF C7112_RF C7121_RF C6728_RF C6713_RF C6726_RF C6711_RF C6727_RF C6602_RF C6614_RF C6601_RF C6611_RF C6613_RF C7731_RF C7011_RF C7012_RF R6301_RF C6338_RF C3535 C3428 C3703 C3903 FL4114 FL4730 FL4103 FL3920 FL3917 FL3913 FL3918 FL3811 FL3807 FL4121 FL4107 FL4729 FL4604 FL6603_RF FL6602_RF FL6401_RF FL6402_RF R7114_RF R6003_RF R7109_RF R3809 R6001_RF R6005_RF R6006_RF R7107_RF R6004_RF R6008_RF R7112_RF R7111_RF R6002_RF R7002_RF R7108_RF R7113_RFR6007_RF R7110_RF R6201_RF R2422 R7702_RF R7711_RF R1702 R1707 R2705 R2702 R4002 R2710 R2101 R2102 R2701 R3508 R2403 R0805 R0802 R3811 R3801 R2103 R3101 R1304 C4702 C4701 C3727C3726 C3921 C3920 C4710 C4709 C4608 C0420 C2617 C2104 C3938 C3717 C2102 C3939 C3917 C3812 C2703 C3526 C3427 C4008 C4007 C0418 C0417 C2613 C2614 C0407 C1715 C1703C1708 C1735 C1714 C3937 C3422 C3425 C6008_RF C6409_RF C4807 C2701 C6408_RF C6018_RF C6019_RF C6020_RF C7001_RF C3527 C4002 C6009_RF C6022_RF C6007_RF C6502_RF C6501_RFC6021_RF C7501_RF C2405 C6627_RF C6629_RF C2413 C6201_RF C1710 C2009 C6806_RF C6734_RF C0419 C1736C1712 C6901_RF C1720 C1709 C1734 C5909_RF C5908_RF C5907_RF C7126_RFC7128_RF C2103C2112 C3709C3708 C3904 C3905 C7114_RF C7108_RF C6406_RF C6407_RF C7008_RF C6414_RF C7104_RF C7117_RF C7105_RF C6505_RF C6514_RF C6506_RF C6504_RF C6513_RF C6420_RF C6419_RFC7110_RF C6515_RF C6622_RF C6625_RF C6619_RF C6617_RF C0421 C2420 C0422 C0412 C6014_RF C7017_RF C7005_RF C6013_RF C6010_RF C6012_RF C6011_RF C6017_RF C6015_RF C6016_RF C7101_RF C3528 C5906_RF C4004 C4001 C3430 C1724 C1725 C2707C3534 C7007_RF C3536 C2115 C3940 C3933 C3824 C2700 C6804_RF C7006_RF C3426 C3429 C6006_RF C6024_RF C7529_RF C7530_RF C6023_RF C6801_RF C6803_RF C6805_RF C6802_RF C2414 C2408 C2505 C2705 C1726 PP4001 PP6978_RF U2700L2700 D2700 Q2701 Q2700 U1701 C2708 U2701 U4805 U4806 XCVR1_RF U2403 Q2102 GPIO_RF U4802 U4001 UPPDI_RF GFILT_RF C2110 C2106 C2108 SE2LDO_RF JUAT2_RF JUAT1_RF MHBLN_RF MLBLN_RF GLNA_RF PPLXR_RF LBLN_RF W5BPF_RF MCEW_RF DZ6903_RF DZ6905_RF DZ6902_RF DZ6904_RF UATCP_RF LATCP_RF MCNS_RF C2111 C2109 C2101 U2101 Q2101 U3703 U3702 L3703 U3701 D3701D3702 SE2_RF XCVR0_RF SWDSM_RF GSMPA_RF RXFIL_RF GSMRX_RF C6001_RF L3704 L6710_RF L6321_RF L6308_RF L6307_RF L6313_RF L6312_RF R6404_RF R6402_RF R7106_RF R7104_RF R6401_RF C6307_RF L6328_RF L7709_RF L6301_RF L6309_RF L6306_RF C6301_RF L6320_RF C6305_RF L6305_RF L6322_RF C7111_RF C6311_RF L6310_RF R6501_RF L6318_RF L6319_RF L6324_RF L6323_RF L6325_RF C6349_RF FL3906 FL3911 FL3908 FL3912 FL3909 FL7001_RF FL4106 L4022 L4021 L6700_RF L6200_RF L6101_RF L6104_RF L6102_RF L6103_RF L6110_RF L6109_RF L6111_RF L6201_RF L7122_RF C6729_RF C6508_RF C6511_RF C6332_RF C6507_RFC6510_RF C6509_RF C6512_RF C6302_RF C7120_RF C6002_RF C6003_RF C2105 C6416_RF C7123_RF C6411_RF C7119_RF C6309_RF C6308_RF C6306_RF C6348_RF C6350_RF R6605_RF R6502_RF R6503_RF C4005 C7106_RF C7004_RF C4003 C7103_RF C7113_RF C1751 C1753 C1743 C1746 C1738 C1750 C1749 C1747C1745 C1737 C1741 C1739 C1740 C1754 C1752 C1744 C1742 C7523_RF C7524_RF C7528_RF C7201_RF R2104 R2703 R2704 R2105 R4803 R4804 R4805 R3808 R3807 R3701 R3915 R4001 R7131_RF R7130_RF R7132_RF R1704 R1703 R6904_RFR1701 C2710 C6351_RF C6101_RF C6104_RF C6317_RF C6342_RF C6316_RF C6314_RF C6315_RF C6323_RF C6325_RF C6335_RF C6346_RF C6343_RF C6318_RF C6319_RF C6320_RF C6106_RF C6107_RF C6108_RF C6340_RF C6103_RF C6102_RF C6329_RF C6352_RF C6341_RF C6328_RF C6105_RF C6807_RF C6336_RF C6337_RF C6324_RF C6344_RF C6345_RF C6334_RF L7123_RF C6112_RF C6004_RF C6005_RF C2706 C6418_RF C6735_RF C6400_RF C6401_RF C7133_RF C7127_RFC7129_RF C6503_RF C6620_RF C6113_RF C6114_RF C 6116_RF C6115_RF C1718 C1711 C1706 C7016_RF C7015_RF C6333_RF C6204_RF C6205_RF C6203_RF C6117_RF C6118_RF C6111_RF C7531_RF C6109_RF C6110_RF C7131_RF C7130_RF C7132_RF C 7710_RF C7729_RF C7711_RF C7709_RF C6732_RF C2422 C2421 C6731_RF C6733_RF C6730_RF C2423 R6711_RF C1723 C1732 C1728 C1756 C1731 C1717 C3711 C4006 SWLATCP_RF C3719 C3706 C3721 C3704 C3705 C3720C3725 MHBDSM_RF LBDSM_RF SH0402 C7504_RF C0809 C0810 C0807 C0808 XW1804 XW1806 C1513 C1602 C1853 C1458 C1528 C1403 C1459 C1506 C1857 C1444 C1436 C1501C7602_RF C2309 C3208 C3211 C1850C1846 C2302 C2308 C7517_RF C1408 C1434 C2307 C7511_RF C1863 C1401 C1414 C1862 C1865 C1839 C1834 C1843 C1832 C1826 C1838 C1842 C1844C1807 C1837 C1819 C1845 C1831 C1818 C1825 C1829 C1840 C1822 C1864 C1801 C1803 C1813 C1814 C1866 C1827 C1833 C1821 C1828 C1820 C1915 C1805 C2304 C1912 C2303 C1809 C1823 C1830 C1835 C1874 C1836 C1802 C1841 C1816 C5621_RF C5701_RF C5622_RF C5625_RF C5703_RF C5702_RF C5623_RF FD0406 R2004 R1901 R5511_RF FL2506 FL2502 FL2500 FL2503 R7703_RF L7700_RF R7700_RF R4817 R4816 R0804 R2009 R7502_RF R7510_RF R7701_RF R1602 R1601 R1116 R0702 R1101 R0803 R5909_RF R5910_RF R5601_RF R1118 R1210 R1113 R1114 R2012 R7600_RF R3602 R3605 R2006 R3304 R0801 R0807 R0806 R3202 R2005 R2700 R2020 R1303 R0907 R0906 R1103 R3604 R3607 R3601 R7599_RF R0504 R0508 R0501 R0503 R0505 R0509 R3201 R4714 R4713 R5807_RF R2000 R6921_RF R6922_RF R5907_RF R5908_RF R4716 R4715 R4801 R4802 R1503 R1501 R1505 R1504 R1506 R1502 R5802_RF R5801_RF R4703 R4704 R0900 R5806_RF R4702 R4701 R5912_RF R5502_RF C0414 C4817 C4816 C4704 C4703 C2501 C2504 C2518 C2511 C2515 C4143 C1870 C2618 C2306 C3113 C3112 C0910 C1868 C1909 C2001 C2013 C0700 C0903 C0902 C7503_RF C1606C0701 C1601 C1609C1613 C0803 C1004 C0813 C0814 C0811 C0812 C3215 C3213 C3214 C3220 C3212 C5750_RF C3607 C0704 C3602 C3606 C0804 C0802 C3601 C5801_RF C5501_RF C7522_RF C2010 C2011 C1006 C7521_RF C7603_RF C3106 C3107 C5635_RF C1011 C1010 C0907 C0906 C0415 C0416 C7600_RF C7607_RF C1005 C7601_RF C7606_RF C1002 C2531 C2519 C2507 C2527 C1507 C1921 C1519 C1875 C1515 C1614C0900C1449 C1529 C1608 C7526_RFC7506_RF C1522 C0901 C7527_RF C1448 C1927 C1913 C1504 C1908 C1877 C1852 C0705 C0806 C1607 C1922 C1604 C1918 C1904 C1013C1518 C1851 C1610 C1611 C1514C1612 C1848 C1859 C1849C1847 C1001C1605 C1511 C1466 C5746_RF C1919 C2704 C5748_RF C5752_RF C5751_RF C5747_RF C5749_RF C5742_RF C5739_RF C3205 C1855 C1856 C5755_RF C5736_RF C1603 C1926 C1916 C3209 C5743_RF C5740_RF C5732_RF C5729_RF C5754_RF C5737_RF C5735_RF C5753_RF C3603 C1858 C5733_RF C1854 C5731_RF C5744_RF C5704_RF C5734_RF C5745_RF C3604C1876 C5738_RF C6900_RF PP7605_RF PP7615_RF PP7614_RF PP7613_RF PP7616_RF PP7612_RF PP7606_RF PP7607_RF PP7503_RF PP7504_RF PP7509_RF PP1402PP1401 PP1408 PP1403 PP7610_RF PP7624_RF PP6981_RF PP7500_RFPP7505_RF PP7617_RFPP7506_RF PP7507_RF PP7508_RF PP0701 PP7620_RF PP7622_RF PP7623_RF PP7621_RF PP7611_RF PP1409 PP2002 PP7619_RFPP7618_RF PP7609_RF PP6913_RF PP5304 PP2001 PP6926_RF PP6911_RF PP6925_RF PP6924_RF PP6909_RF PP6930_RF PP6900_RF PP6908_RF PP5303 PP6904_RF PP6903_RF PP6907_RF PP6912_RF RFBUF_RF C3605 U3602 L1802 U2301 U3603 WLAN_RF U2501 W2BPF_RF W25DI_RF L1805 NFC_RF U1801 Y2001 NFBST_RF C1435 C1439 L7600_RF C1405 C1412 C1422 C1430 C1402 C1427 C1502 C1465 C1409 C1452 C1454 L7502_RF C1433 C1417 C1460 C1461 C1411 C1407 C1503 C1437 C1416 C1404 C7604_RF C1421 C1432 C1426 C1440 C1413 C1406 C1442 C1456 C1419 C1424 C1457C1425 C1429 C1418 C1423 C1431 C1438 C1415 C1410 C1428 C1527C1420 U3601 C5627_RF C5604_RF C2301 C3203 C3201 C3202 C3204 C5608_RF Y0700 U1101 U3101 EPROM_RF R2010 R2011 C7702_RF L7701_RF L7702_RF L7703_RF R7704_RF C2002 C2006 C5804_RF C5629_RF C2509 C1101 C1925 C0800 C1933 C3217 C3221 C3222 C3223 C3224 C3225 C1935 C7502_RF C7505_RF C7500_RF C7520_RF C5605_RF C5626_RF C5628_RF C5611_RF C5607_RF C5613_RF C5602_RF C5603_RF C5609_RF C5610_RF C5612_RF C5901_RF C5726_RF C5720_RF C5711_RF C5715_RF C5719_RF C5728_RF C5721_RF C5708_RF C5714_RF C5707_RF C5716_RF C5724_RF C5712_RF C5710_RF C5705_RF C5727_RF C5717_RF C5709_RF C5713_RFC5725_RF C5706_RF C5722_RF C5723_RF C5718_RF FL1501 FL0700 R2301 R0701 R3603 R0413 R0800 R2015 R2007 R7506_RF R0700 R1001 R5906_RF R5206 R5503_RF R3104 R3103 R3611 R5803_RF R5505_RF R5504_RF R5501_RF C1902 C5636_RF C2502 C2004 C2003 C5502_RF C5905_RF C7703_RF C7706_RF C7705_RF C7700_RF C7704_RF C7707_RF C7701_RF C1509 C1523 C1510 C1508 C1932 C7708_RF C0702 C0703 C5902_RF C5741_RF C5904_RF C5601_RF BBPMU_RF Y5501_RF C5630_RF C5631_RF C5615_RF SH0400 Q4001 R2706 J4504 XW4501 PP5302 D10 PCB: 820-00188-08 VIETMOBILE.VN
  • 2.
    D10 MLB -DVT Schematic & PCB Callouts <rdar://problem/16684269> MCO 056-01342 System Block Diagram: BRD 820-00188 SCH 051-00419 SOC:MIPI AND ISP 48 SMALL FORM FACTOR SPECIFIC <SYNC_DATE43> LAST_MODIFICATION=Tue Jun 14 15:20:28 2016 62 <CSA_PAGE60> WIFI FRONT-END [77] <SYNC_MASTER1> SOC:LPDP <SYNC_MASTER48> <SYNC_MASTER47> <SYNC_MASTER51> <SYNC_MASTER62> <SYNC_MASTER61> <SYNC_DATE59> <SYNC_DATE58> SOC:PCIE <CSA_PAGE7> page1 [1] <CSA_PAGE1> 1 <CSA_PAGE5> page1 <SYNC_MASTER59> I2C MAP AOP <SYNC_MASTER60> <SYNC_MASTER18> <SYNC_DATE15> <CSA_PAGE57> <CSA_PAGE53> spare SYSTEM:BOARDID SYSTEM:MECHANICAL, TESTPOINTS 7 <SYNC_MASTER12> <SYNC_MASTER13> PMU: CONTROL AND CLOCKS PMU: SWITCHERS AND LDOS <SYNC_MASTER73> <SYNC_MASTER74> TRANSCEIVER0/1: PRX PORTS TRANSCEIVER0/1: POWER 65 <SYNC_MASTER78> 32 <SYNC_MASTER65> <SYNC_DATE55> SOC:POWER (1/3) <CSA_PAGE13> B2B FILTERS: UTAH B2B:DOCK FLEX ARC:DRIVER <SYNC_DATE47> <SYNC_MASTER4> <CSA_PAGE72> <SYNC_MASTER28> <SYNC_MASTER26> <CSA_PAGE87> <SYNC_DATE33> <SYNC_MASTER22> <CSA_PAGE3> <CSA_PAGE90> <CSA_PAGE86> <SYNC_MASTER43> <SYNC_MASTER50><SYNC_MASTER5> <SYNC_MASTER7> SYSTEM POWER:PMU (2/3) <CSA_PAGE64> <SYNC_DATE63> <SYNC_DATE65> <SYNC_DATE67> <SYNC_MASTER75> PMU: ET MODULATOR B2B:FOREHEAD <SYNC_MASTER38> B2B: SMALL FF SPECIFIC AUDIO:CALTRA CODEC (1/2) Accessory: Buck Circuit 8 <CSA_PAGE9> 59 24 21 SYSTEM POWER:PMU (1/3) BASEBAND GPIOS <SYNC_MASTER25> <SYNC_DATE9> SYSTEM POWER:PMU (3/3) AUDIO:CALTRA CODEC (2/2) 70 SOC:JTAG,USB,XTAL <CSA_PAGE6> B2B:ORB & MESA B2B FILTERS: DISPLAY & TOUCH 33 <CSA_PAGE25> <SYNC_MASTER37> 2 <SYNC_MASTER15> <SYNC_MASTER14> <SYNC_DATE8> 50 SYSTEM POWER:BATTERY CONN <SYNC_MASTER17> SOC:SERIAL spare <SYNC_DATE14> <SYNC_DATE37> <CSA_PAGE88> NAND 56 SOC:AOP 14 BOM_OMIT_TABLE 64 SOC:POWER (2/3) SOC:POWER (3/3) <CSA_PAGE24> <SYNC_MASTER19> AUDIO:SPEAKER AMP 2 <SYNC_MASTER86> <SYNC_MASTER80> <SYNC_MASTER63> <SYNC_MASTER76> spare <SYNC_MASTER42> UPPER ANTENNA FEEDS <SYNC_MASTER70> <SYNC_DATE64> <SYNC_MASTER66> <SYNC_MASTER69> <CSA_PAGE59> <SYNC_DATE66> <SYNC_MASTER29> <SYNC_DATE76> 75 DIVERSITY RECEIVE LNA'S <SYNC_DATE1> spare <SYNC_MASTER8> <SYNC_MASTER6> CELL,WIFI,NFC MLB UNIQUE <SYNC_MASTER20> <SYNC_MASTER21> <SYNC_MASTER24> <SYNC_MASTER32> <SYNC_MASTER11> <SYNC_MASTER10> BOM LIST 6 <SYNC_MASTER36> <SYNC_MASTER39> <SYNC_MASTER40> <SYNC_MASTER9> BASEBAND: POWER2 page1 26 39 <SYNC_DATE57> <SYNC_MASTER35> 44 <SYNC_MASTER31> 13 47 67 <CSA_PAGE68> ARC:MAGGIE NFC <SYNC_DATE74> <SYNC_DATE11> <SYNC_MASTER57> 66 <SYNC_MASTER58> <SYNC_DATE61> <SYNC_DATE46> <SYNC_DATE50> <SYNC_DATE48> <SYNC_DATE49> <SYNC_DATE53> <SYNC_DATE51> <SYNC_DATE52> <SYNC_DATE56> <SYNC_DATE62> <SYNC_DATE60> <SYNC_DATE69> <SYNC_DATE68> <SYNC_DATE75> <SYNC_DATE77> <SYNC_DATE73> <SYNC_DATE72> <SYNC_DATE71> <SYNC_DATE81> <SYNC_DATE80> <SYNC_DATE79> <SYNC_DATE78> <SYNC_DATE82> <SYNC_DATE83> <SYNC_DATE84> <SYNC_DATE89> <SYNC_DATE90> <SYNC_DATE88> <SYNC_DATE87> <SYNC_DATE86> <SYNC_DATE85> <SYNC_MASTER49> <SYNC_MASTER52> <SYNC_MASTER53> <SYNC_MASTER71> <SYNC_MASTER64> <SYNC_MASTER90> <SYNC_MASTER89> <SYNC_MASTER88> <SYNC_MASTER87> <SYNC_MASTER85> <SYNC_MASTER84> <SYNC_MASTER83> <SYNC_MASTER82> <SYNC_MASTER81> <SYNC_MASTER79> <CSA_PAGE48> <CSA_PAGE49> <CSA_PAGE50> <CSA_PAGE46> <CSA_PAGE47> <CSA_PAGE55> <CSA_PAGE51> <CSA_PAGE52> <CSA_PAGE58> <CSA_PAGE56> <CSA_PAGE54> <CSA_PAGE62> <CSA_PAGE63> <CSA_PAGE61> <SYNC_DATE5> <SYNC_DATE3> <SYNC_DATE2> <SYNC_DATE4> <SYNC_DATE6> <SYNC_DATE13> <SYNC_DATE12> <SYNC_DATE10> <SYNC_DATE17> <SYNC_DATE16> <SYNC_DATE18> <SYNC_DATE7> <SYNC_DATE19> <CSA_PAGE65> <CSA_PAGE66> <CSA_PAGE67> <CSA_PAGE69> <CSA_PAGE70> <CSA_PAGE71> <CSA_PAGE73> <CSA_PAGE74> <CSA_PAGE75> <CSA_PAGE76> <CSA_PAGE77> <CSA_PAGE82> <CSA_PAGE81> <CSA_PAGE80> <CSA_PAGE79> <CSA_PAGE78> <CSA_PAGE83> <CSA_PAGE84> <CSA_PAGE85> <CSA_PAGE89> <SYNC_DATE20> <SYNC_DATE26> <SYNC_DATE28> <SYNC_DATE31> <SYNC_DATE32> <SYNC_DATE30> <SYNC_DATE29> <SYNC_DATE23> <SYNC_DATE40> <SYNC_DATE39> <SYNC_DATE38> <SYNC_DATE35> <SYNC_DATE36> <SYNC_DATE42> <SYNC_DATE41> <SYNC_DATE44> <CSA_PAGE4> <SYNC_MASTER16> <SYNC_MASTER27> <SYNC_MASTER30> <SYNC_MASTER41> <CSA_PAGE8> <CSA_PAGE10> <CSA_PAGE11> <CSA_PAGE12> <CSA_PAGE14> <CSA_PAGE15> <CSA_PAGE17> <CSA_PAGE18> <CSA_PAGE19> <CSA_PAGE20> <CSA_PAGE33> <CSA_PAGE32> <CSA_PAGE31> <CSA_PAGE30> <CSA_PAGE28> <CSA_PAGE27> <CSA_PAGE26> <CSA_PAGE23> <CSA_PAGE22> <CSA_PAGE21> <CSA_PAGE34> <CSA_PAGE45> <CSA_PAGE44> <CSA_PAGE43> <CSA_PAGE42> <CSA_PAGE41> <CSA_PAGE40> <CSA_PAGE39> <CSA_PAGE38> <CSA_PAGE36> <CSA_PAGE35> 79 78 77 76 72 69 63 61 60 58 57 53 52 51 49 46 45 43 42 41 38 37 35 31 29 28 27 22 20 19 17 16 11 10 9 4 3 TDD TRANSMIT LOWER ANTENNA & COUPLERS RECEIVE MATCHING I2C TABLE I2C MAP: AP, TOUCH, HOMER, I2C5 spare <SYNC_MASTER77> DIVERSITY RECEIVE ASM'S <SYNC_DATE24> 40 <SYNC_MASTER33> <SYNC_MASTER45> 74 73 54 55 5 81 ICEFALL, SIM, DEBUG_CONN FDD TRANSMIT 34 25 18 12 TRISTAR 2 <CSA_PAGE29> 30 MLB SPECIFIC: BOM TABLE <CSA_PAGE2> <SYNC_DATE45> AUDIO:SPEAKER AMP 1 TRINITY: FF SPECIFIC SOC:GPIO & UART TRANSCEIVER0/1: TX PORTS 71 SYSTEM POWER:CHARGER 15 <SYNC_MASTER2>SYSTEM:BOM TABLES <CSA_PAGE16> DISPLAY & MESA:POWER BASEBAND: CONTROL 68 <SYNC_DATE25> <CSA_PAGE37> spare <SYNC_MASTER54> <SYNC_MASTER67> CAMERA:STROBE DRIVER 36 <SYNC_MASTER34> <SYNC_MASTER68> <SYNC_MASTER72> TEST POINTS & BOOT CONFIG 80 <SYNC_DATE34> <SYNC_MASTER23> TABLE OF CONTENTS UAT MATCH AND TUNER CONNECTOR [2] <SYNC_DATE22> <SYNC_DATE21> SENSORS 23 <SYNC_MASTER56> <SYNC_MASTER55> <SYNC_DATE54> <SYNC_DATE70> PERENNIAL <SYNC_MASTER3> <SYNC_MASTER44>B2B FILTERS: RIGHT BUTTON FLEX <SYNC_DATE27> SYSTEM POWER:BOOST WIFI_MLB SCHEMATIC <SYNC_MASTER46> 2016-06-1400064008778 ENGINEERING RELEASED TABLE OF CONTENTS TABLE OF CONTENTS CRITICALPCB1820-00188 PCBF,MLB,D10 ? CRITICAL ?SCH1 SCH,MLB,D10051-00419 CONTENTSPAGE <CSA> SYNC DATESYNC<CSA> CONTENTSPAGEDATE ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 3.
    NAND BOM Options CarbonAlternates Magnesium Alternates DDR PLL Alternate Mamba LDO Alternates I2C5 Alternate Global R/C Alternates ACC BUCK CIRCUIT Alternates Global Ferrite Alternates For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts reverted 11/13 UT LDO Alternates Except BUCK5 LX (BUCK5 LX is Taiyo only) #22686038:See Radar Global Varistor Alternates Active Diode Alternate Power Inductor Alternates updated 11/12 updated 11/12 152S00120 152S00077 ALTERNATE For Chestnut inductor onlyALL ALTERNATE152S00398 152S00204 ALL IND,PWR,0.22UH,20%,6.7a,23MOHM,2012 ALTERNATE152S00297 ALL152S00365 CYNTEC 2012 1UH 152S1843 CYNTEC 2012 1UHALTERNATE152S00297 ALL IND,MULT,1UH,1.2A,0.320 OHM,0603152S00366152S00402 ALLALTERNATE IND,PWR,SHLD,15 UH,0.72A,0.900 OHM,3225ALTERNATE152S1936152S00123 ALL 152S00121 152S00081 IND,PWR,SHLD,0.47 UH,3.8A,0.048 OHM,2012ALTERNATE ALL ALTERNATE IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016152S00077 ALL152S00397 ALTERNATE ALL IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016152S00118 152S00075 IC,LOAD SWITCH,WLCSP4353S01039 ALTERNATE U2710353S01007 PFET,12V,CSP4376S00164 ALTERNATE Q2700,Q2701376S00166 L2700 IND,MLD,0.47UH,2.5A,80Mohm,1608152S00557152S00558 ALTERNATE ALTERNATE371S00087 D2700 DIODE,SHOTTKY,30V,200MA,0201371S00064DIODES INC. ACT DIODEALTERNATE376S00047376S00106 Q2101 NAND,H,128GB,16nm,TLC335S00182 1 U1701 CRITICAL NAND_128G FERR, 240OHM, 0.38OHM DCR, 0201ALTERNATE155S0581 ALL155S00067 FLTR, 65 OHMS, 0605155S00012 ALLALTERNATE155S00168 FERR BD, 150OHM, TYALLALTERNATE155S00200 155S0610 FERR BD, 0.47UH, TY152S00489 ALLALTERNATE152S00456 ALLALTERNATE155S00194 FERR BD, 150OHM, TDK155S0610 377S0140 ALL377S0168 ALTERNATE VARISTOR, 6.8V, 100PF, 01005 138S0648 CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO138S0652 ALTERNATE ALL 138S00003 ALTERNATE138S00005 ALL CAP,X5R,15UF,6.3V,0.65MM,0402,TAIYO 132S0436132S0400 ALTERNATE ALL CAP,X5R,0.22UF,6.3V,01005,TDK 152S00117 152S00074 IND,PWR,SHLD,1.0 UH,3.0A,0.060 OHM,2016ALTERNATE L1806,L1810,L1814,L1816,L1817 ALTERNATE138S00003138S00048 CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERAALL ALTERNATE CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK138S0986 ALL138S00024 FERR, 240OHM, 0.38OHM DCR, 0201155S0581 ALTERNATE ALL155S00067 ALTERNATE FL1501 FERR BD,100OHM,25%,100MA,2OHM,01005155S00068155S00095 U1701335S00182 ALTERNATE335S00179 SD,15nm,TLC,128GB 132S0436 132S0400 CAP,CER,X5R,0.22UF,20%,6.3V,20%ALLALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,KYOCERAALL138S0945 ALTERNATE138S0739 138S0739 ALTERNATE CAP,CER,1UF,20%,10V,X5R,0201,MURATAALL138S0706 138S0702 ALTERNATE ALL CAP, X5R, 4.3UF, 4V, 0610138S0657 118S0764 ALTERNATE ALL RES, 3.92K, 0.1%, 0201118S0717 138S00006 CAP, 3-TERM, 4.3UF, 4V, 0402ALTERNATE138S0835 ALL I2C5 ALTERNATEALTERNATE335S00234 335S00233 U1101 U3801353S00932 353S00576 ALTERNATE ST, LDO REG, 2.75V 335S00180 T,15nm,TLC,128GBALTERNATE U1701335S00182 335S00182335S00195 U1701ALTERNATE SS,1Ynm,TLC,128GB 335S00169 ALTERNATE U1701 S,16nm,MLC,32GB335S00209 U1701ALTERNATE335S00183 SS,3Dv3,TLC,256GB335S00190 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C17335 NAND_128G138S00003 CRITICAL 138S0867 5 CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C1733 CRITICAL NAND_32G NAND,H,256GB,3Dv3,TLC335S00156 1 U1701 CRITICAL NAND_256G NAND,H,32GB,16nm,MLC1 CRITICALU1701335S00169 NAND_32G ST, LDO REG, 2.925V, CSP 0.65x0.65ALTERNATE U2501353S00015353S00889 Updated version of CarbonALTERNATE338S00087 338S00226 U2401,U2404 ALTERNATE Larger Wafer (-29 flow) Magnesium338S00203338S00173 U2402 335S00183 U1701 SD,3Dv2,TLC,256GBALTERNATE335S00148 335S00169335S00201 U1701 T,15nm,MLC,32GBALTERNATE C1748,C1713,C1716,C1721,C17335 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402138S00003 CRITICAL NAND_256G TABLE_5_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_5_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 4.
    D10x Specific BOMCallouts Cap 2.2UF Alternates CAYMAN DDR Alternates #24629229 #25634778: Exclude Kyocera as 2.2UF alt at only C2507/C2531 REFDES (other refdes no impact) #24681501 D10 EEEE CALLOUTS R4808,R4809 UTAH_CRES,MF,1K OHM, 5%, 1/32W, 01005117S0156 2 CRITICAL EEEE_SUPREMECRITICALEEEE_GXD6825-6838 1 EEEE CODE FOR 639-01755 EEEE_BEST1 EEEE CODE FOR 639-01754 EEEE_GXD5 CRITICAL825-6838 CRITICAL EEEE_SUPREME_ROWEEEE_H6TGEEEE CODE FOR 639-02373825-6838 TAIYO,IND,PWR,SHLD,1UH,3.6A,0.060OHM,20161152S00117 CRITICALL1803 EEEE_EXTREME_ROWEEEE CODE FOR 639-02374 EEEE_H6TH825-6838 CRITICAL1 EEEE_BEST_ROW1 CRITICALEEEE_H6TFEEEE CODE FOR 639-02372825-6838 825-6838 EEEE_EXTREMEEEEE_GXD7 CRITICAL1 EEEE CODE FOR 639-01756 ALTERNATE ALL DDR-S, 2G, B1 ALTERNATE ALL339S00253 DDR-H, 2G, B1 B5LX_TAIYO 339S00253 1 339S00255 339S00254 (C2507,C2531)138S00032 CAP,CER,X5R,2,2UF,20%6.3V,20%, KYOCERAALTERNATE138S00049 CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATAALLALTERNATE138S00032138S0831 TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 5.
    Current as ofD10 MCO 056-01342-78 Back Shields DFU FORCE DFU O TP IS TO HELP WITH USB SI IN THE FACTORY FIXTURE. #25244799 MOJAVE ANALOG MUX A OUTPUT 100k to 200k ANALOG MUX B OUTPUT FOR DIAGS E75 Contained in radio_mlb pages Front Shields O O TOP SIDE FIDUCIALS LCM POWER GROUND VBUS LCM BACKLIGHT SINK2 LCM BACKLIGHT SINK1 LCM BACKLIGHT SOURCE AMUX TESTPOINTS VBATT ACCESSORY ID AND POWER Note: Fiducial used as test pointVDD_MAIN POWER GND TP 1TP0408 1 FD0408 1 FD0400 1TP0419 1 ZT0404 1 ZT0401 2 1 R0413 1TP0413 1TP0423 1TP0424 1TP0410 1TP0409 1TP0411 1TP0400 1TP0401 1TP0412 1TP0416 1TP0407 1TP0406 1TP0405 1TP0404 1TP0403 1TP0402 1TP0414 1TP0422 1TP0415 1TP0421 1TP0420 1 FD0407 2 1 C0413 2 1 C0414 2 1 C0415 2 1 C0416 2 1 C0418 2 1 C0419 2 1 C0420 2 1 C0421 2 1 C0422 2 1 C0417 2 1 C0408 2 1 C0409 2 1 C0410 2 1 C0411 2 1 C0412 2 1 C0407 2 1 C0402 2 1 C0406 2 1 C0405 2 1 C0404 2 1 C0403 2 1 C0401 1 BS0406 1 SH0403 1 SH0401 1 SH0400 1 SH0402 1CL0401 1 BS0405 1 BS0403 1 BS0402 1 FD0410 1 FD0409 1 FD0406 1 FD0405 1 FD0404 1 FD0403 1 FD0402 CHASSIS_GND_BS403 PP_LCM_BL_ANODE_CONN PP_LCM_BL_CAT2_CONN 90_TRISTAR_DP2_CONN_P CHASSIS_GND_BS402 PMU_AMUX_BY PP16V0_MESA CHASSIS_GND_BS402 90_TRISTAR_DP1_CONN_N PP_LCM_BL_CAT1_CONN PP_TRISTAR_ACC2 PP5V0_USB PP_BATT_VCC PP_VDD_MAIN PMU_AMUX_AY TRISTAR_CON_DETECT_L MESA_TO_BOOST_EN CHASSIS_GND_BS401 PP_TRISTAR_ACC1 90_TRISTAR_DP2_CONN_N 90_TRISTAR_DP1_CONN_P PMU_TO_AP_FORCE_DFU NORTH_SCREW_EXPOSED CHASSIS_GND_BS403 STDOFF-2.9OD1.9ID-0.85H-SM SM SHLD-EMI-LOWER-FRT-D10 SM SHLD-EMI-UPPER-FRT-D10 SM SHLD-EMI-UPPER-BK-D10 SM SHLD-EMI-LOWER-BK-D10 SM-SP CLIP-MLB-COAX-RETENTION-D10 STDOFF-2.56OD1.4ID.99H-SM STDOFF-2.56OD1.4ID.99H-SMSTDOFF-2.56OD1.4ID-1.10H-SM FID 0P5SM1P0SQ-NSP ROOM=ASSEMBLY ROOM=ASSEMBLY FID 0P5SM1P0SQ-NSP 0P5SQ-SMP3SQ-NSP FID ROOM=ASSEMBLY FID 0P5SM1P0SQ-NSP ROOM=ASSEMBLY FID 0P5SQ-SMP3SQ-NSP ROOM=ASSEMBLY FID ROOM=ASSEMBLY 0P5SQ-SMP3SQ-NSP 0P5SQ-SMP3SQ-NSP ROOM=ASSEMBLY FID ROOM=TEST TP-P55 ROOM=TEST FID 0P5SM1P0SQ-NSP FID ROOM=TEST 0P5SQ-SMP3SQ-NSP TP-P55 ROOM=TEST 2.70R1.80-NSP 2.70R1.80-NSP 1% 1/32W 200K MF 01005 ROOM=PMU TP-P55 ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST TP-P55 TP-P55 ROOM=TEST TP-P55 ROOM=TEST ROOM=TEST TP-P55 TP-P55 ROOM=TEST ROOM=TEST TP-P55 ROOM=TEST TP-P55 ROOM=TEST FID 0P5SM1P0SQ-NSP 5% 01005 100PF 16V NP0-C0G 25V 01005 5% 56PF NP0-C0G-CERM 16V 2% CERM 01005 18PF 4PF 16V 01005 NP0-C0G +/-0.1PF C0G-CERM 10V 5% 220PF 01005 100PF 16V NP0-C0G 5% 01005 25V 5% 56PF NP0-C0G-CERM 01005 2% 18PF CERM 01005 16V NP0-C0G 16V 4PF +/-0.1PF 01005 220PF C0G-CERM 5% 10V 01005 220PF 01005 5% C0G-CERM 10V 5% 100PF 16V NP0-C0G 01005 NP0-C0G-CERM 01005 25V 5% 56PF CERM 2% 18PF 01005 16V 4PF 16V +/-0.1PF 01005 NP0-C0G 10V 01005 5% 220PF C0G-CERM 01005 10V 5% C0G-CERM 220PF NP0-C0G 16V +/-0.1PF 01005 4PF CERM 01005 16V 18PF 2% 01005 25V 5% 56PF NP0-C0G-CERM 100PF 5% NP0-C0G 16V 01005 C0G-CERM 01005 5% 10V 220PF 4 45 39 45 39 41 40 4 20 38 37 4 41 40 45 39 41 40 41 40 21 22 21 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 20 41 40 38 37 44 41 40 41 40 41 40 20 12 4 A A A A A A A A A A A A A A A A A A A A A A A 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 6.
    01101 D101 DEV SELECTED--> 1101 PROTO2 1100 PROTO2v5 1011 EVT1 1010 EVT2 xxxx SPARE 1000 CARRIER xxxx SPARE SELECTED --> 01000 D10 MLB 01110 D111 MLB 01111 D111 DEV 01100 D101 MLB 01011 D11 DEV 01010 D11 MLB 01001 D10 DEV 0=EUREKA, 1=KAROO 0=MLB, 1=DEV 0=FORM FACTOR A, 1=FORM FACTOR B FLOAT=LOW, PULLUP=HIGH 000 SPI0 001 SPI0 TEST MODE 010 NVME0_X2 BOOT_CONFIG[2:0] FLOAT=LOW, PULLUP=HIGH xxxx SPARE 0000 PVT 0010 DVT 1110 PROTO1 1111 Pre-Proto w/D520 (non enclosure) FLOAT=LOW, PULLUP=HIGH BOARD_REV[3:0] 0=FORM FACTOR A, 1=FORM FACTOR B BOOT_CONFIG1=No connect BOOT_CONFIG0=No connect SELECTED --> 111 FAST SPI0 TEST BOARD_ID[4:0] 110 SLOW SPI0 TEST 100 NVME0 X1 101 NVME0 X1 TEST 011 NVME0 X2 TEST BOARD_ID0=No connect 0=EUREKA, 1=KAROO BOARD_ID4=No connect BOARD ID BOOT CONFIG BOOTSTRAPPING:BOARD REV PP1V811 PP1V812 21R0509 21R0505 21R0508 21R0504 21R0503 21R0501 BOARD_ID2 BOARD_ID1 BOARD_REV0 BOARD_REV3 MAKE_BASE=TRUE MAKE_BASE=TRUE PP1V8 BOARD_REV1 BOARD_REV2 NOSTUFF 01005 5%MF 1/32W ROOM=SOC 1.00K MF ROOM=SOC 5% NOSTUFF 1.00K 1/32W01005 5%MF01005 ROOM=SOC 1/32W 1.00K ROOM=SOC MF 1/32W5%01005 1.00K NOSTUFF 01005 MF 5% ROOM=SOC 1/32W 1.00K NOSTUFF ROOM=SOC 1/32W01005 MF 1.00K 5% NOSTUFF 11 11 12 12 5248474639 2925181716131211987 12 12 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 7.
    6 OF 81 6OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 8.
    tbd - tbdV @5mA MAX 3.14-3.46V @20mA MAX VDD18_USB: 1.71-1.89V @20mA MAXSOC - USB, JTAG, XTAL Dev ONLY VDD18_AMUX: 1.62-1.98V @1mA MAX VDD11_XTAL:1.06-1.17V @TBD mA MAX CL42 CM42 CK35 CC25 CG26 CE25 AJ60 CL20 CG50 CH26 CK26 CJ26 CM26 CL26 CM20 CM22 BJ2 BL3 BL65 CL29 CK33 CG37 CJ35 CH37 CL31 BJ4 CM14 BJ3 N64 U0700 1 PP0701 2 1 R0700 2 1 C0705 2 1 C0702 2 1 R0701 21 R0702 31 42 Y0700 2 1 C0703 21 FL0700 2 1 C0704 2 1 C0701 2 1 C0700 SWD_DOCK_TO_AP_SWCLK PP1V8 PP3V3_USB PP1V8 AP_TO_PMU_TEST_CLKOUT SWD_DOCK_BI_AP_SWDIO PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_AOP_TRISTAR_ACTIVE_READY AP_TO_NAND_RESET_L XTAL_AP_24M_IN PP1V1 AP_USB_REXT SOC_24M_O XTAL_AP_24M_OUT USB_VBUS_DETECT AP_TO_PMU_AMUX_OUT 90_USB_AP_DATA_P AP_TO_PMU_WDOG_RESET PP1V1_XTAL PP0V9_SOC_FIXED 90_USB_AP_DATA_N CKPLUS_WAIVE=PWRTERM2GND CSP CAYMAN-2GB-20NM-DDR-M P2MM-NSM SM 01005 1/32W MF 1% 200 ROOM=SOC ROOM=SOC 0201-1 X5R-CERM 20% 6.3V 2.2UF 16V CERM 12PF 5% 01005 ROOM=SOC MF ROOM=SOC 1/32W 01005 1% 511K 01005 0% MF 0.00 1/32W ROOM=SOC ROOM=SOC CRITICAL 1.60X1.20MM-SM 24.000MHZ-30PPM-9.5PF-60OHM 16V 5% 01005 CERM 12PF ROOM=SOC 01005 240-OHM-25%-0.20A-0.9DCR ROOM=SOC 01005 ROOM=SOC X5R-CERM 20% 6.3V 0.1UF 01005 X5R-CERM 20% 6.3V 0.1UF ROOM=SOC 01005 X5R-CERM ROOM=SOC 6.3V 0.1UF 20% 40 5248474639 29251817161312119875 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 20 40 20 13 40 37 20 13 17 1815 21 20 40 20 18151098 40 NC NC NC NC NC SYM 1 OF 16 VDD12_UH1_HSIC0 VDD_FIXED_USB VDD33_USB VDD11_XTAL ANALOGMUX_OUT WDOG XO0 XI0 USB_REXT USB_ID UH1_HSIC0_DATA UH1_HSIC0_STB JTAG_TRST* JTAG_TDO JTAG_SEL CFSB COLD_RESET* TST_CLKOUT S3E_RESET* JTAG_TMS JTAG_TDI JTAG_TCK TESTMODE HOLD_RESET VDD18_USB VDD18_AMUX USB_DM USB_DP USB_VBUS PP NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 9.
    D10 NAND isnow Gen3 (was Gen2). Caps intentionally 0.22uF #24557655:replace with 20% caps. SI no negative impact VDD12_PCIE_REFBUF:1.08-1.26V @40mA MAX WLAN RX PP's are now managed on Page 52 PCIELINK3PCIELINK2 PCIELINK1PCIELINK0 LINK 1 USED ON AP_DEV ONLY VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX SOC - PCIE INTERFACES VDD12_PCIE: 1.14-1.26V @10mA MAX PCIE_WLAN_BI_AP_CLKREQ_L 52 90_PCIE_AP_TO_WLAN_REFCLK_P 52 PCIE_AP_TO_WLAN_RESET_L52 90_PCIE_AP_TO_WLAN_REFCLK_N 52 PCIE_BB_BI_AP_CLKREQ_L 52 90_PCIE_AP_TO_BB_REFCLK_P 52 PCIE_AP_TO_BB_RESET_L52 90_PCIE_AP_TO_BB_REFCLK_N 52 CC47 BW55 CA60 CA55 CE60 CE55 CC62 CC53 CE49 CC49 CE58 CK63 CJ63 CM57 CL57 CM50 CL50 CK44 CJ44 CM61 CL61 CK56 CJ56 CK52 CJ52 CM46 CL46 CG63 CL64 CM64 CK59 CJ59 CL54 CM54 CJ48 CK48 BJ66 BE64BG64 BJ65 CH57 CG57 BE66 BE65BG66 BC64 U0700 2 1 R0801 2 1 C0804 21 R0803 21 R0804 2 1 R0806 2 1 R0800 2 1 R0802 2 1 R0805 21 C0810 21 C0809 21 C0808 21 C0807 2 1 C0806 2 1 C0805 2 1 C0803 2 1 C0802 2 1 C0801 2 1 C0800 PCIE_AP_TO_NAND_RESET_L 90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_N 90_PCIE_NAND_TO_AP_RXD_N 90_PCIE_NAND_TO_AP_RXD_C_N 90_PCIE_AP_TO_NAND_TXD_C_P 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_AP_TO_NAND_REFCLK_P PCIE_NAND_BI_AP_CLKREQ_L 90_PCIE_AP_TO_NAND_TXD_C_N 90_AP_PCIE3_TXD_C_N 90_AP_PCIE3_TXD_C_P 90_AP_PCIE3_RXD_C_N 90_AP_PCIE3_RXD_C_P 90_AP_PCIE2_RXD_C_P AP_PCIE_RCAL PP1V2_SOC_PCIE_REFBUF PP0V9_SOC_FIXED_PCIE_REFBUF PP0V9_SOC_FIXED PP1V8 PP1V2_SOC 90_AP_PCIE2_TXD_C_N 90_AP_PCIE2_TXD_C_P 90_AP_PCIE2_RXD_C_N 90_PCIE_AP_TO_NAND_REFCLK_N 90_PCIE_NAND_TO_AP_RXD_C_P CAYMAN-2GB-20NM-DDR-M CSP 100K ROOM=SOC 5% MF 01005 1/32W 0.1UF ROOM=SOC 6.3V 20% X5R-CERM 01005 ROOM=SOC MF 01005 1/32W 0.00 0% MF 01005 0.00 ROOM=SOC 0% 1/32W 100K 5% ROOM=SOC MF 01005 1/32W 3.01K ROOM=SOC 1% MF 01005 1/32W 1/32W 100K 5% ROOM=SOC MF 01005 ROOM=SOC 100K 5% MF 01005 1/32W 20% X5R 0.22UF ROOM=SOC 01005 6.3V GND_VOID=TRUE 20% X5R ROOM=SOC 01005 GND_VOID=TRUE 0.22UF 6.3V 0.22UF GND_VOID=TRUE 20% X5R 6.3V 01005 ROOM=SOC 20% X5R 01005 0.22UF GND_VOID=TRUE 6.3VROOM=SOC ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC 0.1UF 6.3V 20% X5R-CERM 01005 01005 ROOM=SOC X5R-CERM 6.3V 20% 0.1UF 0.1UF ROOM=SOC 6.3V 20% X5R-CERM 01005 1.0UF 0201-1 X5R ROOM=SOC 6.3V 20% 17 17 17 17 17 17 17 52 52 52 52 52 18151097 5248474639 2925181716131211975 19 16 10 52 52 52 17 NC NC NC NC NC NC NC NC LINK2 LINK3LINK0 LINK1 SYM 2 OF 16 VDD_FIXED_PCIE_CLK VDD_FIXED_PCIE_ANA VDD12_PCIE_REFBUF PCIE_CLKREQ3* PCIE_REF_CLK3_P VDD12_PCIE VDD_FIXED_PCIE_REFBUF PCIE_TX1_N PCIE_TX1_P PCIE_PERST1* PCIE_EXT_REF_CLK_N PCIE_EXT_REF_CLK_P PCIE_RX1_N PCIE_RX1_P PCIE_REF_CLK1_P PCIE_REF_CLK1_N PCIE_CLKREQ1* PCIE_PERST0* PCIE_TX0_N PCIE_TX0_P PCIE_RX0_P PCIE_RX0_N PCIE_CLKREQ0* PCIE_REF_CLK0_P PCIE_REF_CLK0_N PCIE_PERST3* PCIE_TX3_N PCIE_TX3_P PCIE_RX3_N PCIE_RX3_P PCIE_REF_CLK3_N PCIE_PERST2* PCIE_RX2_P PCIE_RX2_N PCIE_TX2_P PCIE_TX2_N PCIE_REF_CLK2_N PCIE_CLKREQ2* PCIE_REF_CLK2_P PCIE_REXT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 10.
    D11/111 ONLY <--- Neededfor Cayman debug; this pin cannot be input D11/111 ONLY 1.62-1.98V @7mA MAX SOC - MIPI & ISP INTERFACES Spare Dev ONLY Radar 20511449 D11/111 ONLY Dev only Per Radar 21221938 0.825-0.94V @25mA MAX Radar 21203307 AC return path for LCM MIPI which is referenced to GND and VDD_MAIN 2 1 C0909 2 1 C0905 2 1 C0910 G6 G17 G13 G21 G19 G15 G10 AA64 AC65 AE64 AA65 C48 B48 E50 D50 A48 C50 A50 E52 B50 E11 A11 C9 B5 B4 B7 B11 B9 C5 A4 A7 E16 B16 B12 B14 C16 C12 A14 E24 A26 C24 B20 A18 B22 B26 B24 C20 B18 A22 W66 W64 U66 U65 R65 U64 N66 N65 BR4 BR2 BN4 U0700 2 1 C0907 2 1 C0906 1 PP0902 2 1 C0904 2 1 C0908 21 R0907 21 R0906 2 1 C0903 2 1 C0902 2 1 C0901 2 1 R0901 2 1 R0900 2 1 C0900 90_MIPI_AP_TO_LCM_DATA1_N NC_MIPI_AP_TO_LCM_DATA2_P 90_MIPI_NH_TO_AP_CLK_P 90_MIPI_NH_TO_AP_CLK_N 90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_N AP_TO_STROBE_DRIVER_HWEN SPI_AP_TO_MAGGIE_CS_L MIPID_REXT NC_MIPI_AP_TO_LCM_DATA2_N 90_MIPI_NH_TO_AP_DATA1_N NC_MIPI_AP_TO_LCM_DATA3_P 90_MIPI_NH_TO_AP_DATA1_P 90_MIPI_NH_TO_AP_DATA0_N 90_MIPI_NH_TO_AP_DATA0_P I2C_ISP_UT_SDA PP0V9_SOC_FIXED AP_TO_UT_SHUTDOWN_L AP_TO_NH_SHUTDOWN_L NC_AP_TO_NV_SHUTDOWN_L NC_AP_TO_NV_CLK_R I2C_ISP_UT_SCL I2C_ISP_NV_SDA I2C_ISP_NV_SCL I2C_ISP_NH_SCL I2C_ISP_NH_SDA AP_TO_MUON_BL_STROBE_EN AP_TO_NH_CLK AP_TO_UT_CLK PP1V8 MIPI0C_REXT 90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_N 90_MIPI_AP_TO_LCM_DATA1_P AP_TO_UT_CLK_R AP_TO_NH_CLK_R TP_SENSOR3_RST NC_SENSOR0_ISTRB NC_MIPI_AP_TO_LCM_DATA3_N PP_VDD_MAIN 01005 ROOM=SOC 5% 10V 220PF C0G-CERM 01005 ROOM=SOC 5% 10V 220PF C0G-CERM 220PF C0G-CERM 10V 5% ROOM=SOC 01005 CAYMAN-2GB-20NM-DDR-M CSP 100PF NOSTUFF 01005 NP0-C0G 35V 5% NP0-C0G 01005 100PF 5% 35V NOSTUFF SM P2MM-NSM ROOM=SOC ROOM=SOC 220PF 01005 5% 10V C0G-CERM 10V 220PF 5% 01005 ROOM=SOC C0G-CERM ROOM=SOC 33.2 1% 1/32W 01005 MF 01005 33.2 1/32W MF 1% ROOM=SOC ROOM=SOC 01005 20% 6.3V X5R-CERM 0.1UF ROOM=SOC 01005 20% 6.3V X5R-CERM 0.1UF ROOM=SOC 20% 6.3V 0201-1 X5R-CERM 2.2UF 4.02K 01005 MF 1/32W 1% ROOM=SOC MF 01005 1% 4.02K 1/32W ROOM=SOC ROOM=SOC 0201-1 20% 6.3V X5R-CERM 2.2UF 39 45 45 39 39 26 36 45 45 45 45 48 18 15 10 8 7 25 29 48 46 46 48 48 37 29 25 5248474639 2925181716131211875 39 39 39 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 4 NC NC NC NC NC SYM 3 OF 16 SENSOR0_XSHUTDOWN SENSOR1_XSHUTDOWN MIPI1C_DPDATA0 SENSOR1_ISTRB MIPI1C_REXT SENSOR0_ISTRB MIPI1C_DPCLK MIPI1C_DPDATA1 MIPI1C_DNDATA0 MIPI1C_DNDATA1 MIPI1C_DNCLK ISP_I2C3_SCL ISP_I2C2_SDA ISP_I2C2_SCL ISP_I2C1_SCL ISP_I2C1_SDA ISP_I2C0_SCL ISP_I2C3_SDA SENSOR0_CLK SENSOR1_CLK SENSOR2_CLK SENSOR1_RST SENSOR3_RST SENSOR4_RST SENSOR2_RST SENSOR0_RST MIPID_DPCLK DISP_TOUCH_BSYNC0 DISP_TOUCH_BSYNC1 DISP_TOUCH_EB MIPID_REXT VDD18_MIPI VDD_FIXED_MIPI ISP_I2C0_SDA SENSOR_INT MIPID_DNCLK MIPI0C_DPDATA0 MIPI0C_DNDATA0 MIPI0C_DNDATA1 MIPI0C_DPDATA1 MIPI0C_DPDATA2 MIPI0C_DPDATA3 MIPI0C_DNDATA2 MIPI0C_DNDATA3 MIPI0C_DPCLK MIPI0C_DNCLK MIPI0C_REXT MIPID_DPDATA0 MIPID_DNDATA0 MIPID_DNDATA1 MIPID_DPDATA3 MIPID_DNDATA3 MIPID_DPDATA1 MIPID_DPDATA2 MIPID_DNDATA2 NC NC PP NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 11.
    VDD12_LPDP:1.14-1.26V @60mA MAX Desensefor Wifi frequencies D11/111 ONLY Reserved for PanelID[1:0] on ap_dev board Reserved for PanelID[1:0] on ap_dev board Dev ONLY #24401637:Unconnect LPDPRX_EXT_C AC return path for LCM LPDP which is referenced to GND and VDD_MAIN GND ON MLB; other on Dev GND ON MLB; other on Dev D11/111 ONLY VDD12_PLL_LPDP:1.14-1.26V @3mA MAX LPDP Lanes swapped between D10 and D11 90_LPDP_UT_TO_AP_D0_N25 90_LPDP_UT_TO_AP_D0_P25 NC_90_LPDP_NV_TO_AP_D2_N46 90_LPDP_UT_TO_AP_D1_N25 90_LPDP_UT_TO_AP_D1_P25 LPDP_UT_BI_AP_AUX25 NC_90_LPDP_NV_TO_AP_D3_P46 NC_90_LPDP_NV_TO_AP_D3_N46 NC_AP_LPDP_AUX246 NC_90_LPDP_NV_TO_AP_D2_P46 2 1 C1013 2 1 C1001 G23 G30 G28 G25 G62 G60 G58 G55 A64 B64 B63 C63 A61 B61 B56 C56 A54 B54 A57 B57 D57 B59 C59 D64 E63 D61 E56 D54 A33 B33 B31 C31 A29 B29 B27 C27 E31 E35 D33 E33 BN3 AP2 U0700 2 1 C1010 2 1 C1011 2 1 C1002 2 1 C1005 2 1C1006 2 1 R1001 2 1 C1004 PP_VDD_MAIN AP_LPDPRX_RCAL_NEG PP1V2_SOC PP0V9_SOC_FIXED ROOM=SOC 0201-1 2.2UF X5R-CERM 20% 6.3V ROOM=SOC 0201-1 2.2UF X5R-CERM 20% 6.3V CKPLUS_WAIVE=PWRTERM2GND CSP CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND CAYMAN-2GB-20NM-DDR-M 33PF NP0-C0G-CERM 16V 5% ROOM=SOC 01005 33PF NP0-C0G-CERM 16V 5% ROOM=SOC 01005 01005 15PF NP0-C0G-CERM 16V 5% ROOM=SOC 0.01UF ROOM=SOC X5R 6.3V 10% 01005 ROOM=SOC 0.1UF X5R-CERM 6.3V 20% 01005 100PF 5% 16V ROOM=SOC 01005 NP0-C0G 300 1% 01005-1 MF ROOM=SOC 1/32W 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 9 4 18 15 9 8 7 NC NC NC NC NC NC NC NC SYM 4 OF 16 VDD12_LPDP_TX VDD12_LPDP_RX VDD12_PLL_LPDP LPDPRX_EXT_C LPDPRX_RCAL_N LPDPRX_BYP_CLK_P LPDPRX_BYP_CLK_N LPDPRX_RCAL_P LPDPRX_RX_D4_N LPDPRX_AUX_D0_P LPDPRX_AUX_D2_P LPDPRX_AUX_D4_P LPDPRX_AUX_D1_P LPDPRX_AUX_D3_P LPDPRX_RX_D4_P LPDPRX_RX_D2_N LPDPRX_RX_D3_P LPDPRX_RX_D3_N LPDPRX_RX_D2_P LPDPRX_RX_D1_P LPDPRX_RX_D0_N LPDPRX_RX_D1_N LPDPRX_RX_D0_P LPDP_TX3P LPDP_TX3N LPDP_TX2N LPDP_TX2P LPDP_TX0P LPDP_TX1N LPDP_TX0N LPDP_TX1P DP_WAKEUP EDP_HPD LPDP_AUX_P LPDP_CAL_VSS_EXT LPDP_AUX_N LPDP_CAL_DRV_OUT NC NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 12.
    To Cayman I2S1/2/3 MCLKNC #24559456 BOARD_ID0 SOC - SERIAL INTERFACES Route as daisy-chain. No T's allowed. I2C5 See Radar#25316444 for Details PP1V85 B2A1 A2B1 U1101 CJ12 CM9 CG22 CJ14 CH16 CH22 CH20 C42 E44 A42 B42 D44 A44 B44 C44 R3 N4 N3 N2 CB4 BY3 BY4 CB2 AG4 AH65 AK64 AH66 BN66 CH11 CK9 CJ9 CG18 CM7 BU66 BN64 BJ64 BN65 BR66 D48 A46 E46 C46 E48 BV65 BU64 BU65 BR64 BY66 AE65 AE66 U4 U3 AG66 AG64 CG12 CK7 BY2 AM64 AK65 AE3 AM66 U0700 21 R1116 2 1 R1113 2 1 R1114 21 R1101 21 R1118 2 1 C1101 21 R1103 BOARD_ID1 I2S_AP_TO_BT_BCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK AP_TO_NAND_SYS_CLK SPI_AP_TO_CODEC_MAGGIE_MOSI AP_TO_CUMULUS_CLK32K I2S_AP_TO_CODEC_MCLK SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_CODEC_MAGGIE_SCLK_R SPI_CODEC_MAGGIE_TO_AP_MISO I2S_AP_TO_CODEC_MSP_LRCLK DWI_PMGR_TO_BACKLIGHT_CLK I2C2_AP_SCL I2C2_AP_SDA I2C1_AP_SDA I2C1_AP_SCL I2C0_AP_SDA I2C0_AP_SCL I2C3_AP_SCL I2C3_AP_SDA AP_TO_NAND_SYS_CLK_R SPI_TOUCH_TO_AP_MISO SPI_AP_TO_MESA_MOSI I2S_BB_TO_AP_LRCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK SPI_AP_TO_CODEC_MAGGIE_SCLK SPI_AP_TO_MESA_SCLK SPI_MESA_TO_AP_MISO SPI_AP_TO_TOUCH_CS_L SPI_AP_TO_CODEC_CS_L DWI_PMGR_TO_BACKLIGHT_DATA PP1V8 I2S_MAGGIE_TO_AP_DIN PMU_TO_AP_THROTTLE_GPU_L AP_TO_PMU_SOCHOT_L PMU_TO_AP_PRE_UVLO_L I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SPI_PMGR_TO_PMU_MOSI SPI_PMU_TO_PMGR_MISO SPI_PMGR_TO_PMU_SCLK I2C5_SDA I2C5_SCL BOARD_ID2 SPI_AP_TO_TOUCH_SCLK_R MESA_TO_AP_INT I2C5_SDA PP1V8 I2C5_SCL CRITICAL ROOM=SOC WLCSP CSP CAYMAN-2GB-20NM-DDR-M 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC ROOM=SOC 1.0UF 0201-1 X5R 20% 6.3V 1/32W 01005 MF 1% 33.2 ROOM=SOC 5 53 53 53 32 32 32 36 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 36 35 34 33 32 20 20 20 4711 4711 5 38 4711 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK I2S_AP_TO_CODEC_MCLK I2S_AP_TO_CODEC_MSP_LRCLK I2C2_AP_SCL I2C2_AP_SDA I2C1_AP_SDA I2C1_AP_SCL I2C0_AP_SDA I2C0_AP_SCL I2C3_AP_SCL I2C3_AP_SDA I2S_BB_TO_AP_LRCLK I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 CRITICAL WLCSP CSP CAYMAN-2GB-20NM-DDR-M 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC ROOM=SOC 1.0UF 0201-1 X5R 20% 6.3V MF 5 53 53 53 32 32 32 36 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 4711 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_BB_TO_AP_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 CRITICAL WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 0201-1 5 53 53 53 32 32 32 35 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 47 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_AP_TO_BT_LRCLK I2S_BB_TO_AP_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2C5_SDA I2C5_SCL BOARD_ID2 WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 5 53 53 53 32 32 32 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 35 34 33 32 20 20 20 4711 4711 5 38 47 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 I2S_BB_TO_AP_BCLK I2S_AP_TO_MAGGIE_DOUT I2C5_SDA I2C5_SCL BOARD_ID2 WLCSP CSP 0% 0.00 1/32W 01005 MF ROOM=SOC 1/32W 01005 MF 10K 5% ROOM=SOC 01005 ROOM=SOC MF 1/32W 5% 10K 0% 0.00 1/32W 01005 MF ROOM=SOC 0% 0.00 1/32W 01005 MF ROOM=SOC 1.0UF 5 53 53 53 32 32 32 34 33 32 17 36 32 39 32 39 39 36 32 32 37 47 47 47 47 47 47 47 47 39 38 53 53 53 53 36 32 38 38 39 32 37 5248474639 29251817161312119875 36 20 20 20 53 36 34 33 32 20 20 20 4711 4711 5 38 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4711 SDASCL VCC VSS NC NC NC NC NC NC NC NC SYM 6 OF 16 I2C1_SCL SPI3_SSIN SPI3_SCLK SPI2_SSIN SPI2_MISO SPI3_MOSI SPI2_SCLK SPI3_MISO SPI2_MOSI SPI1_SSIN SPI1_SCLK SPI1_MOSI SPI1_MISO SPI0_SSIN SPI0_MOSI SPI0_SCLK I2S3_BCLK I2S3_LRCK I2S3_DOUT SPI0_MISO I2S3_MCK I2S3_DIN I2S2_MCK I2S1_DIN I2S2_DIN I2S2_BCLK I2S2_LRCK I2S2_DOUT I2S1_DOUT I2S0_MCK I2S0_DIN I2S1_MCK I2S0_DOUT I2S0_LRCK I2S1_LRCK I2S0_BCLK I2S1_BCLK DROOP SOCHOT DWI_DO CLK32K_OUT NAND_SYS_CLK GPU_TRIGGER DWI_CLK PMU_SCLK PMU_MISO PMU_MOSI SPI4_SCLK I2C3_SDA I2C3_SCL SPI4_MISO I2C5_SCL GPIO_42 GPIO_43 I2C5_SDA SPI4_MOSI I2C2_SCL I2C2_SDA I2C1_SDA I2C0_SDA I2C0_SCL NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 13.
    RESERVERD FOR SSHBID ON DEV BOARD BOOT_CONFIG1 DEV ONLY Nostuff per #24511702 D101/D111 ONLY D101/D111 ONLY D101/D111 ONLY; for GNSS D101/D111 ONLY BOARD_ID4 SOC - GPIO INTERFACES D10/D11 ONLY #24608280 D101/D111 ONLY #24557547:Delete R1204 BOOT_CONFIG0 Dev only #25120460:REQUEST_DFU Assignment PP1V85 AP_TO_ICEFALL_FW_DWLD_REQ53 2 1 R1210 AM2 AP3 CG14 CG16 BG4 A37 B37 C37 D37 U2 W4 W2 AA4 AH2 AK4 AK3 AM4 B39 C39 D39 E39 CJ7 CL5 AH3 AH4 AG2 BU3 BU2 AY3 AY2 AV3 AT2 AT4 A39 E41 C41 A41 E42 D42 AA3 AA2 CG20 CK11 CH14 CL9 CJ11 BG2 BE3 BE4 BE2 BC4 BC3 BB4 BB2 AE2 AC3 AE4 AH64 AP65 AP66 AT64 AT66 AT67 AV67 AV65 AY66 AY65 BB66 BC65 BB64 U0700 AP_TO_TOUCH_MAMBA_RESET_L BOARD_REV0 UART_AP_TO_NFC_TXD AP_TO_BB_COREDUMP PMU_TO_AP_BUF_VOL_DOWN_L PMU_TO_AP_BUF_POWER_KEY_L AP_TO_BB_MESA_ON AP_TO_BB_IPC_GPIO1 NC_DFU_STATUS AP_TO_ACC_BUCK_VSEL AP_TO_MAGGIE_CRESETB_L AP_TO_LCM_RESET_L AP_BI_HOMER_BOOTLOADER_ALIVE AP_TO_NAND_FW_STRAP ALS_TO_AP_INT_L AP_TO_SPKAMP2_RESET_L AP_TO_BB_TIME_MARK MAGGIE_TO_AP_CDONE PP1V8 TOUCH_TO_AP_INT_L PMU_TO_AP_THROTTLE_CPU_L BB_TO_AP_RESET_DETECT_L NC_AP_TO_GNSS_TIME_MARK AP_TO_BB_RESET_L BUTTON_VOL_UP_L AP_TO_BBPMU_RADIO_ON_L AP_TO_NFC_FW_DWLD_REQ PMU_TO_AP_FORCE_DFU BOARD_REV3 UART_AP_DEBUG_TXD PROX_BI_AP_AOP_INT_PWM_L UART_AP_DEBUG_RXD BOARD_REV1 BOARD_REV2 AP_TO_BT_WAKE PMU_TO_AP_BUF_RINGER_A AP_TO_WLAN_DEVICE_WAKE AP_TO_NFC_DEV_WAKE NC_BB_TO_AP_RESET_ACT_L NC_AP_UART2_RTS_L NC_AP_UART2_CTS_L UART_AP_TO_BT_TXD UART_BT_TO_AP_CTS_L UART_NFC_TO_AP_RXD UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_WLAN_TO_AP_RXD SWI_AP_BI_TIGRIS UART_AP_TO_WLAN_RTS_L UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD UART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 UART_NFC_TO_AP_RXD UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_WLAN_TO_AP_RXD SWI_AP_BI_TIGRIS UART_AP_TO_WLAN_RTS_L UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD UART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 UART_AP_TO_BT_RTS_L NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 NC_AP_UART2_RXD UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L NC_AP_UART2_TXD NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE 1/32W 5% 01005 MF 10K ROOM=SOC NOSTUFF CSP CAYMAN-2GB-20NM-DDR-M 39 5 53 53 20 20 53 53 27 36 39 36 17 29 33 53 36 52 48 47 46 39 29 25 18 17 16 13 11 9 8 7 5 39 20 53 53 44 20 53 53 20 4 5 40 2913 40 5 5 53 20 53 53 53 53 53 36 36 53 53 21 53 40 40 53 53 53 53 53 NC NC NC SYM 5 OF 16 TMR32_PWM1 UART0_RXD GPIO_4 REQUEST_DFU2 REQUEST_DFU1 GPIO_41 GPIO_40 GPIO_36 GPIO_38 GPIO_37 GPIO_39 GPIO_35 GPIO_32 GPIO_31 GPIO_34 GPIO_33 GPIO_30 GPIO_27 GPIO_26 GPIO_28 GPIO_29 GPIO_25 GPIO_24 GPIO_23 GPIO_21 GPIO_22 GPIO_20 GPIO_19 GPIO_18 GPIO_15 GPIO_16 GPIO_17 GPIO_11 GPIO_13 GPIO_14 GPIO_10 GPIO_9 GPIO_7 GPIO_8 GPIO_5 GPIO_6 GPIO_1 GPIO_2 GPIO_3 GPIO_0 TMR32_PWM0 TMR32_PWM2 UART2_RTS* UART2_CTS* UART1_TXD UART0_TXD UART1_CTS* UART3_TXD UART3_RXD UART7_TXD UART7_RXD UART4_TXD UART4_RXD UART5_RTXD UART4_RTS* UART6_TXD UART6_RXD UART4_CTS* UART1_RXD UART1_RTS* UART2_RXD UART3_CTS* UART3_RTS* UART2_TXD GPIO_12 NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 14.
    Use internal pullupin SOC (AOP side). SOC - AOP BB_SWDIO has pullup in Radio_MLB pages #25756894:South Carbon R2 #24512059: Remove R1300 PU Internal pullup in AOP. Radar 21210869 #25756894:North Carbon R1 (+Mg,P) DOCK_CONNECT can be GPIO, but input only. Radar 21680759 21 R1306 BV3 BU4 CM33 CL37 CG41 CH35 CJ37 CM31 CH29 CG29 CL11 CJ22 CJ20 CK14 CG35 CL16 CL14 CJ16 CJ27 CJ18 CK39 CH41 CM37 CM35 CK37 CG39 CJ39 CL35 CJ24 CM11 CJ33 CG33 CK31 CM12 CK22 CK29 CK24 CK27 CJ31 CK20 CH31 CG31 CJ29 CK18 CK16 CK12 CM29 CM16 U0700 21 R1305 21 R1303 2 1 R1304 I2S_AOP_TO_MAGGIE_L26_MCLK PROX_BI_AP_AOP_INT_PWM_L UART_BB_TO_AOP_RXD I2S_CODEC_XSP_TO_AOP_LRCLK UART_TOUCH_TO_AOP_RXD PP1V8 PMU_TO_SYSTEM_COLD_RESET_L PMU_TO_AOP_TRISTAR_ACTIVE_READY AOP_TO_MESA_BLANKING_EN AOP_TO_PMU_ACTIVE_REQUEST AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_CLK32K SWD_AP_BI_HOMER_SWDIO SWD_AOP_BI_BB_SWDIO HOMER_TO_AOP_WAKE_INT SWD_AP_TO_MANY_SWCLK I2C_AOP_SCL AUDIO_TO_AOP_INT_L AOP_TO_MESA_I2C_ISO_EN SPI_IMU_TO_AOP_MISO PMU_TO_AOP_IRQ_L SPI_AOP_TO_IMU_MOSI I2C_AOP_SDA LCM_TO_MANY_BSYNC ACCEL_GYRO_TO_AOP_INT SPI_AOP_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_AOP_DATARDY AOP_TO_MAGGIE_EN PHOSPHORUS_TO_AOP_INT_L I2S_CODEC_XSP_TO_AOP_BCLK MESA_TO_AOP_FDINT UART_AOP_TO_BB_TXD MAGGIE_TO_AOP_INT UART_AOP_TO_MAGGIE_TXD I2S_AOP_TO_CODEC_XSP_DOUT BOT_ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L TRISTAR_TO_AOP_INT SPI_AOP_TO_PHOSPHORUS_CS_L SWD_AP_BI_NAND_SWDIO AOP_TO_WLAN_CONTEXT_A SPI_AOP_TO_IMU_SCLK PMU_TO_AOP_SLEEP1_READY COMPASS_TO_AOP_INT SPI_AOP_TO_COMPASS_CS_L SPI_AOP_TO_IMU_SCLK_R1 SPI_AOP_TO_IMU_SCLK_R2 UART_AOP_TO_TOUCH_TXD I2S_CODEC_XSP_TO_AOP_DIN I2S_AOP_TO_MAGGIE_L26_MCLK_R AOP_TO_SPKAMP1_ARC_RESET_L AOP_TO_WLAN_CONTEXT_B 49.9 1% ROOM=SOC 01005 1/32W MF CAYMAN-2GB-20NM-DDR-M CSP 1% 1/32W 01005 ROOM=SOC MF 49.9 33.2 1/32W 1% ROOM=SOC MF 01005 1.00K 5% ROOM=SOC MF 01005 1/32W NOSTUFF 36 35 34 33 29 12 53 32 39 52484746 39292518171612119875 207 4037207 38 20 20 20 36 53 36 533617 48 35 34 33 32 48 24 20 24 48 53 39 23 20 24 24 24 36 24 32 38 53 36 36 32 24 24 40 24 17 53 20 15 24 24 24 24 39 32 3534 53 SYM 7 OF 16 CFSB_AOP AWAKE_RESET* AOP_PDM_CLK0 AOP_PDM_DATA0 AWAKE_REQ AOP_DDR_REQ AOP_DDR_RESET* DOCK_ATTENTION DOCK_CONNECT AOP_PDM_DATA1 RT_CLK32768 SWD_TMS2 SWD_TMS3 AOP_SWD_TMS1 AOP_SWD_TMS0 AOP_SWD_TCK_OUT AOP_UART1_TXD AOP_UART0_RXD AOP_UART0_TXD AOP_UART1_RXD AOP_I2C0_SCL AOP_FUNC_13 AOP_FUNC_14 AOP_SPI_SCLK AOP_SPI_MISO AOP_FUNC_15 AOP_SPI_MOSI AOP_I2C0_SDA AOP_FUNC_7 AOP_FUNC_5 AOP_FUNC_4 AOP_FUNC_3 AOP_FUNC_6 AOP_FUNC_11 AOP_FUNC_9 AOP_FUNC_8 AOP_FUNC_10 AOP_FUNC_12 AOP_FUNC_0 AOP_FUNC_1 AOP_FUNC_2 AOP_I2S_MCK AOP_I2S_LRCK AOP_I2S_DOUT AOP_I2S_DIN AOP_I2S_BCLK AOP_UART2_RXD AOP_UART2_TXD 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 15.
    1.06V @1.0A MAX 0.9V@tbd A MAX 0.67V @TBDA MAX 0.92V @10.7A MAX 1.03V @12.9A MAX 0.80V @TBD A MAX 0.80V @TBDA MAX 0.80V @4.1A MAX SOC - CPU, GPU & SOC RAILS 1.06V @17.4A MAX 0.625V @tbd A MAX 1.03V @1.44A MAX 0.92V @1.50A MAX 0.67V @TBD A MAX 0.80V @TBD A MAX 2 1 C1414 AW25 J60 BF40 Y60 Y36 Y10 V30 T60 T10 P55 J34 J21 J13 CE45 CE17 CE13 CA47 CA43 CA38 CA34 CA30 CA25 CA21 CA17 CA13 BW10 BT55 BT51 BT47 BT43 BT38 BT34 BT30 BT25 BT21 BT17 BT13 BP58 BP53 BP49 BP45 BP40 BP36 BP32 BP28 BP23 BP19 BP15 BM55 BK53 BK49 BK45 BK40 BK36 BK32 BK28 BF58 BF53 BF49 BF45 BF36 BF32 BF28 BD60 BD6 BD55 BD51 BD47 BD43 BD38 BD34 BD30 BD25 AW60 AW55 AW51 AW47 AW43 AW38 AW34 AW30 AR55 AR51 AR47 AR43 AR38 AR34 AR30 AR25 AN58 AN53 AN49 AN45 AN40 AN36 AN32 AN28 AL6 AJ36 AJ32 AJ28 AF60 AD32 AD28 U0700 AJ47 BK21 AL47 Y53 Y49 Y45 Y40 Y23 Y19 Y15 P51 P47 P43 P38 P34 P30 P25 P21 P17 AF51 AF47 AF43 AJ45 Y28 V55 V51 V38 V34 V25 V13 T53 T40 T36 T15 P13 L53 L49 L45 L40 L36 L32 L28 L23 L19 L15 J51 J47 J43 J38 J30 J25 AJ53 AJ49 AJ40 AF55 AD53 AD49 AD45 AD40 AB55 AB51 AB47 AB43 AB25 AB21 AB17 AB13 BH8 BA19 BA15 AW8 AU19 AR8 AN15 AF8 BK23 AJ10 BK15 BK10 BH21 BH17 BH13 BF23 BF10 BD8 BD21 BA23 BA10 AW21 AW17 AW13 AU15 AU10 AR21 AR17 AR13 AN23 AN19 AN10 AL8 AL21 AJ23 AF17 AF13 AD23 AD19 AD15 AD10 U0700 2 1 C1434 2 1 C1408 2 1 C1401 2 1 C1403 4 3 2 1 C1407 1 PP1411 1 PP1410 1PP1402 1 PP1403 1 PP1409 1 PP1408 4 3 2 1 C1435 4 3 2 1 C1439 1 PP1401 2 1 C1444 21 XW1401 2 1 C1436 4 3 2 1 C1402 4 3 2 1 C1410 4 3 2 1 C1415 4 3 2 1 C1420 4 3 2 1 C1409 4 3 2 1 C1452 4 3 2 1 C1454 4 3 2 1 C1416 2 1 C1466 4 3 2 1 C1425 4 3 2 1 C1429 4 3 2 1 C1456 4 3 2 1 C1457 4 3 2 1 C1421 4 3 2 1 C1426 2 1 C1448 4 3 2 1 C1432 4 3 2 1 C1437 4 3 2 1 C1433 2 1 C1459 2 1 C1458 4 3 2 1 C1465 4 3 2 1 C1460 4 3 2 1 C1461 21 XW1403 2 1 XW1402 2 1 C1449 4 3 2 1 C1442 4 3 2 1 C1438 4 3 2 1 C1440 4 3 2 1 C1418 4 3 2 1 C1423 4 3 2 1 C1428 4 3 2 1 C1431 4 3 2 1 C1427 4 3 2 1 C1430 4 3 2 1 C1404 4 3 2 1 C1411 4 3 2 1 C1417 4 3 2 1 C1422 4 3 2 1 C1406 4 3 2 1 C1413 4 3 2 1 C1419 4 3 2 1 C1424 4 3 2 1 C1405 4 3 2 1 C1412 PP_GPU_VAR PP_CPU_VAR PP_GPU_SRAM_VAR PP_CPU_SRAM_VAR PP_CPU_VAR AP_VDD_GPU_SENSE PP_SOC_VAR PP_GPU_VAR AP_VDD_CPU_SENSE TP_AP_VSS_CPU_SENSE BUCK0_PP_CPU_FB BUCK2_PP_SOC_FB BUCK1_PP_GPU_FB TP_VDD_SOC_SENSE TP_VSS_SENSE 15UF 6.3V X5R 0402-1 ROOM=SOC 20% CSP CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CSP 0402-1 X5R 6.3V 20% 15UF X5R 15UF 20% 6.3V 0402-1 6.3V X5R 0402-1 20% 15UF 6.3V 20% 10UF CERM-X5R ROOM=SOC 0402-9 20% 0402 4V CERM ROOM=SOC 7.5UF ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM SM ROOM=SOC P2MM-NSM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM 0402 4V CER 7.5UF ROOM=SOC 20% 0402 4V CER 20% 7.5UF ROOM=SOC SM P2MM-NSM ROOM=SOC ROOM=SOC CERM-X5R 10UF 0402-9 6.3V 20% SHORT-20L-0.05MM-SM OMIT ROOM=SOC NO_XNET_CONNECTION ROOM=SOC CERM-X5R 10UF 0402-9 6.3V 20% 0402 4V 20% CERM 4.3UF ROOM=SOC ROOM=SOC 4V 20% 1UF CERM 0402 4V 20% 0402 CERM ROOM=SOC 1UF ROOM=SOC 0402 4V 1UF 20% CERM 4.3UF ROOM=SOC 4V 20% CERM 0402 ROOM=SOC 20% 4.3UF 4V CERM 0402 ROOM=SOC 4.3UF 20% CERM 0402 4V ROOM=SOC 7.5UF 0402 CERM 4V 20% ROOM=SOC 0201-1 20% 2.2UF X5R-CERM 6.3V 0.47UF 0402 6.3V 20% CERM ROOM=SOC ROOM=SOC 0402 0.47UF 6.3V 20% CERM 0402 ROOM=SOC 6.3V 20% CERM 0.47UF ROOM=SOC 0.47UF 0402 6.3V 20% CERM 7.5UF ROOM=SOC 4V 0402 20% CERM 7.5UF 20% ROOM=SOC 4V 0402 CERM 6.3V 20% 2.2UF 0201-1 ROOM=SOC X5R-CERM 20% ROOM=SOC 7.5UF 4V CERM 0402 4V ROOM=SOC 20% 0402 CERM 7.5UF 20% 4V ROOM=SOC CERM 0402 7.5UF ROOM=SOC CERM-X5R 6.3V 20% 0402-9 10UF 0402-9 CERM-X5R ROOM=SOC 10UF 6.3V 20% ROOM=SOC 0402 4V 4.3UF 20% CERM 7.5UF ROOM=SOC 4V 20% CERM 0402 ROOM=SOC 7.5UF 0402 4V 20% CERM NO_XNET_CONNECTION OMIT ROOM=SOC SHORT-20L-0.05MM-SM ROOM=SOC OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION ROOM=SOC 0201-1 2.2UF20% 6.3V X5R-CERM 0402 ROOM=SOC 0.47UF 6.3V 20% CERM ROOM=SOC 1UF 0402 4V 20% CERM 4V 0402 7.5UF 20% ROOM=SOC CERM ROOM=SOC 20% 1UF 4V 0402 CERM 20% CERM 0402 4V 1UF ROOM=SOC 0402 4V 20% CERM ROOM=SOC 1UF 1UF 0402 20% CERM ROOM=SOC 4V ROOM=SOC 0402 4V 20% CERM 4.3UF 4V 20% ROOM=SOC 4.3UF CERM 04020402 4V 20% 7.5UF ROOM=SOC CERM CERM 20% 4V 0402 7.5UF ROOM=SOC 7.5UF 0402 4V 20% CERM ROOM=SOC 4.3UF ROOM=SOC 0402 20% 4V CERM 0.47UF 6.3V 20% ROOM=SOC CERM 0402 ROOM=SOC 0402 0.47UF 6.3V 20% CERM ROOM=SOC 0402 6.3V 20% 0.47UF CERM 20% 6.3V CERM ROOM=SOC 0.47UF 0402 ROOM=SOC 0402 4V 4.3UF 20% CERM 0402 4V 4.3UF 20% ROOM=SOC CERM 1814 1814 18 18 1814 20 18 1814 20 18 18 18 SYM 9 OF 16 VDD_SOCVDD_SOC SYM 8 OF 16 VDD_GPU_SRAM VDD_CPU_SRAM VDD_CPU VDD_GPU VDD_GPU_SENSE VSS_SENSE VDD_SOC_SENSE VSS_CPU_SENSE VDD_CPU_SENSE PP PP PP PP PP PP PP |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 16.
    1.06 - 1.17V@4mA MAX (CURRENT INCLUDED IN VDD2) 0.797-0.945V @9 mA MAX 1.06-1.17V @0.85A MAX DDR IMPEDANCE CONTROL 0.765-0.840V @60mA MAX TBD-TBDV @1.9A MAX SOC - POWER SUPPLIES 1.06 - 1.17V @1.74A MAX H64 H4 CD65 CG3 P58 J8 BW60 CE8 Y62 V60 T62 P60 K67 E67 AH67 AE67 AD62 AC67 AB60 Y6 V8 T6 P8 L6 K1 E1 AH1 AE1 AC1 AB8 CH67 CD67 BW62 BT60 BP62 BM60 BL67 BK62 BJ67 BH60 BE67 CH1 CD1 CC6 CA8 BW6 BT8 BP6 BM8 BL1 BJ1 BE1 W67 W1 R67 R1 N67 N1 D66 D2 CK66 CK2 CJ66 CJ2 C66 C2 BY67 BY1 BV67 BV1 BR67 BR1 BB65 BB3 AM65 AM3 AA66 H65 K65 K64 H3 K3 K4 CB64 BY64 CB65 BN2 CF4 CD3 CF3 U0700 CE40 CE30 CC36 AW23 Y8 Y58 T8 T58 T32 L60 L58 L10 J62 J55 J23 J17 G36 G32 CC45 CC32 CC28 CC23 CC19 CC15 CC10 BW8 BW58 BW53 BW49 BW45 BW40 BW36 BW32 BW28 BW23 BW19 BW15 BP60 BP10 BM51 BM47 BM43 BM38 BM34 BM30 BM25 BM21 BM17 BM13 BK6 BK58 BH55 BH51 BH47 BH43 BH38 BH34 BH30 BH25 BA58 BA53 BA49 BA45 BA40 BA36 BA32 BA28 AU6 AU58 AU53 AU49 AU45 AU40 AU36 AU32 AU28 AR60 AL60 AL55 AL51 AL43 AL38 AL34 AL30 AL25 AJ58 AF62 AF38 AF34 AF30 AF25 AD58 AB38 AB34 AB30 U0700 2 1 C1512 2 1 C1513 2 1 C1510 2 1 C1501 2 1 C1508 2 1 C1509 2 1 C1507 2 1 C1529 2 1 C1511 2 1 C1515 4 3 2 1 C1527 2 1 C1528 2 1 C1522 21 FL1501 2 1 C1519 2 1 C1504 2 1 C1518 2 1 C1523 2 1 R1505 2 1 R1506 4 3 2 1 C1503 2 1 C1514 2 1 C1506 2 1 R1504 2 1 R1503 2 1 R1502 2 1 R1501 4 3 2 1 C1502 PP0V9_SOC_FIXED PP1V1_SDRAM PP0V8_AOP PP1V1 PP1V1 PP1V1 PP1V1_SDRAM PMU_TO_AOP_SLEEP1_READY PP1V1_DDR_PLL DDR2_RREF DDR3_RREF DDR0_RREF DDR1_RREF DDR0_ZQ DDR3_ZQ SYSTEM_ALIVE CAYMAN-2GB-20NM-DDR-M CSP CSP CAYMAN-2GB-20NM-DDR-M CERM-X5R 10UF ROOM=SOC 0402-9 6.3V 20% CERM-X5R 0402-9 10UF 6.3V 20% ROOM=SOC 20% 6.3V ROOM=SOC 01005-1 0.22UF X5R 20% 6.3V 10UF 0402-9 ROOM=SOC CERM-X5R 20% 6.3V 0.22UF ROOM=SOC 01005-1 X5R 20% 6.3V 01005-1 0.22UF ROOM=SOC X5R ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 6.3V 20% 2.2UF X5R-CERM ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 20% 4V 1UF 0402 ROOM=SOC CERM 10UF 20% 6.3V 0402-9 CERM-X5R ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC 100OHM-25%-0.12A ROOM=SOC 01005 ROOM=SOC 2.2UF 20% 6.3V X5R-CERM 0201-1 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC X5R-CERM 2.2UF 20% 6.3V 0201-1 ROOM=SOC 20% 6.3V ROOM=SOC 0.22UF 01005-1 X5R 240 1% ROOM=SOC MF 01005 1/32W ROOM=SOC 240 1% MF 01005 1/32W 20% ROOM=SOC 7.5UF 4V 0402 CERM 2.2UF 20% 6.3V X5R-CERM ROOM=SOC 0201-1 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=SOC ROOM=SOC 1% 240 MF 01005 1/32W 1% 240 ROOM=SOC MF 01005 1/32W 1% ROOM=SOC 240 MF 01005 1/32W 1% ROOM=SOC 240 MF 01005 1/32W 20% 4.3UF ROOM=SOC 4V CERM 0402 18 10 9 8 7 191815 19 18157 18 15 7 18 15 7 191815 2013 212017 SYM 11 OF 16 DDR1_SYS_ALIVE DDR0_SYS_ALIVE DDR3_SYS_ALIVE DDR2_SYS_ALIVE VDD2 VDDIO11_PLL_DDR0 VDDIO11_PLL_DDR3 DDR3_ZQ DDR0_ZQ DDR1_RREF DDR1_RET* DDR0_RREF DDR0_RET* DDR3_RREF DDR2_RREF DDR2_RET* VDDIO11_RET_DDR0 VDDIO11_RET_DDR2 VDDIO11_RET_DDR3 VDDIO11_RET_DDR1 VDDIO11_DDR0 VDDIO11_DDR1 VDDIO11_DDR2 VDDIO11_DDR3 VDDIO11_PLL_DDR1 VDDIO11_PLL_DDR2 DDR3_RET* SYM 10 OF 16 VDD_FIXED VDD_LOW VDD_FIXED_CPU VDD_FIXED =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 17.
    VDD12_PLL_SOC:1.14-1.26V @31mA MAX VDD12_PLL_CPU:1.14-1.26V@13mA MAX 1.70-1.95V @134mA MAX SOC - POWER SUPPLIES 1.62-1.98V @10mA MAX 1.62-1.98V @43mA MAX TBD-TBDV @30mA MAX 1.62-1.98V @1mA MAX 1.62-1.98V @1mA MAX 1.62-1.98V @2mA MAX J58 BF38 Y55 Y51 Y47 Y43 Y30 Y25 Y21 Y17 Y13 W65 W3 V62 V6 V58 V53 V40 V36 V32 V28 V15 V10 U67 U1 T55 T51 T38 T34 T25 T13 R66 R64 R4 R2 P62 P6 P53 P49 P45 P40 P36 P32 P28 P23 P19 P15 P10 M67 M66 M65 M64 M4 M3 M2 M1 L8 L62 L55 L51 L47 L43 L38 L34 L30 L25 L21 L17 L13 K66 K2 J6 J53 J49 J45 J40 J32 J28 J19 J15 J10 H67 H66 H2 H1 G8 G51 G47 G43 G38 F67 F66 F65 F64 F4 F3 F2 F1 E9 E7 E66 E65 E64 E61 E59 E57 E54 E5 E4 E37 E3 E29 E27 E26 E22 E20 E2 E18 E14 E12 D9 D7 D67 D65 D63 D59 D56 D52 D5 D46 D41 D4 D35 D31 D3 D29 D27 D26 D24 D22 D20 U0700 D18 D16 D14 D12 D11 D1 CM66 CM63 CM59 CM56 CM52 CM5 CM48 CM44 CM41 CM4 CM39 CM27 CM24 CM2 CM18 CL7 CL67 CL65 CL63 CL59 CL56 CL52 CL48 CL44 CL41 CL4 CL39 CL33 CL3 CL27 CL24 CL18 CL12 CL1 CK64 CK61 CK57 CK54 CK50 CK5 CK46 CK42 CK41 CK4 CJ67 CJ65 CJ64 CJ61 CJ57 CJ54 CJ50 CJ5 CJ46 CJ42 CJ41 CJ4 CJ3 CJ1 CH9 CH7 CH66 CH65 CH64 CH63 CH61 CH59 CH56 CH54 CH52 CH5 CH48 CH46 CH44 CH42 CH4 CH39 CH33 CH3 CH27 CH24 CH2 CH18 CH12 CG67 CG66 CG65 CG64 CG61 CG59 CG56 CG54 CG52 CG5 CG48 CG46 CG44 CG42 CG4 CG27 CG24 CG2 CG11 CG1 CF67 CF66 CF65 CF64 CF2 CF1 CE62 CE6 CE53 CE47 CE15 CE10 CD66 CD64 CD4 CD2 CC8 T30 CL22 CC43 CC38 CC34 CC30 CC21 CC17 CC13 CB67 CB66 CB3 CB1 CA62 CA6 CA58 CA53 CA49 CA45 CA40 CA36 CA32 CA28 CA23 CA19 CA15 U0700 CA10 C7 C64 C61 C57 C54 C52 C4 C35 C33 C29 C26 C22 C18 C14 C11 BY65 CE51 BW51 BW47 BW43 BW38 BW34 BW30 BW25 BW21 BW17 BW13 BV66 BV64 BV4 BV2 BU67 BU1 BT62 BT6 BT58 BT53 BT49 BT45 BT40 BT36 BT32 BT28 BT23 BT19 BT15 BT10 BR65 BR3 BP8 BP55 BP51 BP47 BP43 BP38 BP34 BP30 BP25 BP21 BP17 BP13 BN67 BN1 BM62 BM6 BM58 BM53 BM49 BM45 BM40 BM36 BM32 BM28 BM23 BM19 BM15 BM10 BL66 BL64 BL4 BL2 BK8 BK60 BK55 BK51 BK47 BK43 BK38 BK34 BK30 BK25 AL49 BK17 BK13 BH62 BH6 BH58 BH53 BH49 BH45 BH40 BH36 BH32 BH28 BH23 BH19 BH15 BH10 BG67 BG65 BG3 BG1 BF8 BF55 BF51 BF47 BF43 BF34 BF30 BF25 BF21 BD62 BD58 BD53 BD49 BD45 BD40 BD36 BD32 BD28 BD23 BD10 BC67 BC66 BC2 BC1 BA8 BA60 BA55 BA51 BA47 BA43 BA38 BA34 BA30 BA21 BA17 BA13 B67 B65 B52 B46 B41 B35 B3 B1 U0700 AY67 AY64 AY4 AY1 AW62 AW6 AW58 AW53 AW49 AW45 AW40 AW36 AW32 AW28 CH50 AW19 AW15 AW10 AV66 AV64 AV4 AV2 AV1 AU8 AU60 AU55 AU51 AU47 AU43 AU38 AU34 AU30 AU25 AU21 AU17 AU13 AT65 AT3 AT1 AR62 AR6 AR58 AR53 AR49 AR45 AR40 AR36 AR32 AR28 AR19 AR15 AR10 AP67 AP64 AP4 AP1 AN8 AN60 AN55 AN51 AN47 AN43 AN38 AN34 AN30 AN25 AN21 AN17 AN13 AL62 AL58 AL53 AL45 AL40 AL36 AL32 AL28 AL23 AK67 AK66 AK2 AK1 AJ8 AJ55 AJ51 AL10 AJ43 AJ38 AJ34 AJ30 AJ25 AJ21 AG67 AG65 AG3 AG1 AF6 AF58 AF53 AF49 AF45 AF40 AF36 AF32 AF28 AF23 AF19 AF15 AF10 AD8 AD60 AD55 AD51 AD47 AD43 AD34 AD30 AD25 AD21 AD17 AD13 AC66 AC64 AC4 AC2 AB62 AB6 AB58 AB53 AB49 AB45 AB40 AB36 AB32 AB28 AB23 AB19 AB15 AB10 AA67 AA1 A9 A66 A63 A59 A56 A52 A5 A35 A31 A27 A24 A20 A2 A16 A12 U0700 CE43 CE38 CE36 CE34 CE32 CE28 CE23 CE19 BF6 BA6 AN6 AJ6 AD6 G53 G49 G45 G40 BF62 BA62 AU62 AN62 AJ62 BF60 CE21 J36 AF21 BK19 AR23 CC40 CG9 G34 CG7 Y38 Y34 AD38 AD36 Y32 BA25 T28 AU23 CK65 CK3 C65 C3 BB67 BB1 AM67 AM1 U0700 2 1 C1606 2 1 C1604 21 R1602 2 1 C1615 2 1 C1609 2 1 C1613 2 1 C1601 2 1 C1603 2 1 C1611 21 R1601 2 1 C1605 2 1 C1614 2 1 C1610 2 1 C1607 2 1 C1612 2 1 C1608 2 1 C1602 PP1V2_SOC PP1V8_SDRAM PP1V8_SDRAM PP1V2_REF PP1V2_PLL_CPU PP1V2_PLL_SOC PP1V8 CAYMAN-2GB-20NM-DDR-M CSPCSP CAYMAN-2GB-20NM-DDR-MCAYMAN-2GB-20NM-DDR-M CSP CAYMAN-2GB-20NM-DDR-M CSP CSP CAYMAN-2GB-20NM-DDR-M CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND 20% 01005 0.1UF 6.3V X5R-CERM ROOM=SOC ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC MF 01005 1/32W 0.00 0% 6.3V 2.2UF 0201-1 20% X5R-CERM ROOM=SOC ROOM=SOC 20% 01005 6.3V X5R-CERM 0.1UF ROOM=SOC 0.1UF 6.3V 20% X5R-CERM 01005 20% 0.1UF 6.3V X5R-CERM 01005 ROOM=SOCROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 01005 1/32W ROOM=SOC MF 0.00 0% ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 6.3V 20% 2.2UF ROOM=SOC X5R-CERM 0201-1 ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF ROOM=SOC 0201-1 X5R-CERM 6.3V 20% 2.2UF 10UF 6.3V 20% 0402-9 CERM-X5R ROOM=SOC 19 10 8 53 52 48 47 41 40 37 36 32 21 20 18 16 53 52 48 47 41 40 37 36 32 21 20 18 16 19 52 48 47 46 39 29 25 18 17 13 12 11 9 8 7 5 SYM 16 OF 16 VSSVSS SYM 15 OF 16 VSSVSS SYM 14 OF 16 VSS VSS SYM 13 OF 16 VSS VSS SYM 12 OF 16 VDD18_EFUSE1 VDD18_EFUSE2 VDD1 VDDIO18_GRP2 VDDIO18_GRP1 VDDIO18_GRP10 VDD18_TSADC1 VDD18_TSADC0 VDD18_TSADC2 VDD18_LPOSC VDD12_GPU_UVD VDD12_CPU_UVD VDD18_TSADC5 VDD18_TSADC4 VDD18_FMON VDD18_TSADC3 VDD12_PLL_SOC VDD12_SOC_UVD VDD12_PLL_CPU VDDIO18_GRP4 VDDIO18_GRP3 =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== =|-----||||--||--|-|----|- |||-|||-||||||||||-|-|-|||-||-||- |---|||||||--|||== 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 18.
    315mA MAX PROBE POINTS 1007mAMAX 1230mA MAX (1us peak power) #24543147:10uF for 32GB #26326159:10uF for C1719 2 1 C1713 D6 B2 P6 P4 P2 OE10 OE0 OC10 OC0 L7 L5 L3 G7 B6 B4 E5 R5 OF10 OF0 OB10 OB0 A5 R7 R3 J9 J1 F2 A7 A3 OG10 OG0 OD10 OD0 OA10 OA0 D8 F8 M2 K2 P8 N7 N5 N3 M8 K8 H8 H6 G9 K6 K4 M6 J7 J5 M4 G5 C5 F4 G1 B8 C7 F6 E7 E3 H2 J3 G3 H4 D4 D2 C3 U1701 2 1 C1704 2 1 C1748 2 1 C1736 2 1 C1739 2 1 C1741 2 1 C1754 2 1 C1753 2 1 C1752 2 1 C1735 2 1 C1734 2 1 C1732 2 1 C1708 2 1 C1711 2 1 C1717 2 1 C1747 2 1 C1745 2 1 C1743 2 1 C1723 2 1 C1712 2 1 C1730 2 1 C1703 2 1 C1706 2 1 C1709 2 1 C1714 2 1 C1720 2 1 C1728 2 1 C1737 2 1 C1738 2 1 C1740 2 1 C1742 2 1 C1744 2 1 C1746 2 1 C1731 2 1 C1749 2 1 C1750 2 1 C1751 2 1 C1729 2 1 C1733 1 PP1701 1 PP1702 21 R1707 21 R1702 2 1 C1724 2 1 C1727 2 1 C1722 2 1 C1726 2 1 C1725 2 1 R1701 2 1 C1721 2 1 C1719 2 1 C1716 2 1 C1705 2 1 C1702 2 1 C1701 2 1 C1710 21 R1703 2 1 C1718 2 1 C1715 2 1 C1707 2 1 R1704 PP1V8 NAND_AGND PP0V9_NAND PP1V8 90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N NAND_AGND SWD_AP_NAND_SWCLK_R PP1V8_NAND_AVDD SWD_AP_BI_NAND_SWDIO_R PCIE_AP_TO_NAND_RESET_L AP_TO_NAND_FW_STRAP PMU_TO_NAND_LOW_BATT_BOOT_L NAND_ZQ AP_TO_NAND_RESET_L SWD_AP_BI_NAND_SWDIO SWD_AP_TO_MANY_SWCLK SYSTEM_ALIVE 90_PCIE_AP_TO_NAND_TXD_N 90_PCIE_AP_TO_NAND_TXD_P PCIE_NAND_RESREF PCIE_NAND_BI_AP_CLKREQ_L 90_PCIE_AP_TO_NAND_REFCLK_N 90_PCIE_AP_TO_NAND_REFCLK_P AP_TO_NAND_SYS_CLK NAND_VREF 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_NAND_TO_AP_RXD_N PP3V0_NAND 0402-1 15UF OMIT ROOM=NAND X5R 6.3V 20% VLGA THGBX6T1T82LFXF ROOM=NAND CRITICAL BOMOPTION=OMIT_TABLE X5R 0402-1 ROOM=NAND 15UF 6.3V 20% 6.3V OMIT 15UF 20% ROOM=NAND 0402-1 X5R 100PF 01005 NP0-C0G 16V 5% ROOM=NAND 1.0UF ROOM=NAND X5R 0201-1 6.3V 20% 0201-1 6.3V 1.0UF X5R ROOM=NAND 20% 0201-1 6.3V 20% ROOM=NAND 1.0UF X5R 20% 6.3V X5R 0201-1 ROOM=NAND 1.0UF 20% 6.3V X5R 1.0UF ROOM=NAND 0201-1 C0G-CERM ROOM=NAND 01005 220PF 10V 5% ROOM=NAND 01005 100PF 16V 5% NP0-C0G ROOM=NAND 01005 NP0-C0G 16V 39PF 5% 5% 01005 220PF C0G-CERM 10V ROOM=NAND 16V 5% 01005 22PF CERM ROOM=NAND 16V 5% 01005 NP0-C0G 68PF ROOM=NAND 1.0UF X5R 0201-1 ROOM=NAND 6.3V 20% 1.0UF X5R ROOM=NAND 6.3V 20% 0201-1 1.0UF X5R 20% ROOM=NAND 0201-1 6.3V 16V 5% 01005 NP0-C0G 39PF ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND X5R 15UF ROOM=NAND 0402-1 6.3V 20% 5% 01005 10V 220PF ROOM=NAND C0G-CERM 16V 5% 01005 22PF CERM ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND 5% 01005 10V 220PF C0G-CERM ROOM=NAND 16V 5% 100PF 01005 NP0-C0G ROOM=NAND 16V 5% 01005 NP0-C0G ROOM=NAND 68PF 0201-1 1.0UF ROOM=NAND 6.3V 20% X5R 1.0UF X5R 0201-1 ROOM=NAND 6.3V 20% 1.0UF X5R ROOM=NAND 6.3V 20% 0201-1 1.0UF X5R 6.3V 20% ROOM=NAND 0201-1 1.0UF X5R ROOM=NAND 20% 6.3V 0201-1 0201-1 ROOM=NAND 20% 1.0UF 6.3V X5R 01005 NP0-C0G 16V 5% ROOM=NAND 68PF 20% 6.3V X5R 0201-1 ROOM=NAND 1.0UF 1.0UF 20% 6.3V X5R 0201-1 ROOM=NAND 0201-1 X5R 20% 6.3V 1.0UF ROOM=NAND X5R ROOM=NAND 0402-1 15UF 6.3V 20% OMIT 15UF 20% 6.3V X5R ROOM=NAND 0402-1 SM P2MM-NSM ROOM=NAND SM P2MM-NSM ROOM=NAND 01005 MF ROOM=NAND 1/32W 0% 0.00 01005 MF1/32W ROOM=NAND 0% 0.00 01005 ROOM=NAND 10% 6.3V 0.01UF X5R 0402-1 ROOM=NAND 15UF 20% 6.3V X5RX5R 15UF 0402-1 ROOM=NAND 6.3V 20% ROOM=NAND 0201-1 X5R-CERM 6.3V 20% 2.2UF 01005 ROOM=NAND X5R 10% 0.01UF 6.3V 01005 1/32W MF 0.5% 34.8 ROOM=NAND OMIT 20% 6.3V X5R 15UF 0402-1 ROOM=NAND 0402-9 10UF 6.3V CERM-X5R 20% ROOM=NANDROOM=NAND X5R 15UF 20% OMIT 0402-1 6.3V 6.3V 0402-1 X5R ROOM=NAND 15UF 20% 0402-1 X5R 15UF 6.3V 20% ROOM=NAND 0402-1 15UF X5R ROOM=NAND 6.3V 20% 01005 0.1UF ROOM=NAND 6.3V 20% X5R-CERM 01005 1/32W MF ROOM=NAND 1% 24.9 ROOM=NAND 01005 22PF CERM 16V 5% ROOM=NAND 01005 220PF C0G-CERM 10V 5% X5R 15UF 0402-1 ROOM=NAND 6.3V 20% 01005 1/32W MF 3.01K ROOM=NAND 1% 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 17 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 17 8 17 8 17 8 12 20 7 13 533613 212015 8 8 8 17 8 17 8 11 8 8 VER-1 VDD VDD PCI_AVDD_H PCIE_TX1_M PCIE_TX1_P PCIE_CLKREQ* TRST* RESET* PCIE_RX1_M PCIE_TX0_P PCIE_TX0_M VSS VSS PCIE_RX0_P PCIE_RX0_M PCI_RESREF PCIE_RX1_P ZQ VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSA EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7 EXT_NCE EXT_NRE EXT_NWE EXT_RNB EXT_CLE EXT_ALE VDD VDD VDD VDD VDD AVDD1 VCC VCC VCC VCC VCC VDDIO VCC VDDIO VDDIO VDDIO VDDIO VDDIO VREF PCI_VDD2 PCI_VDD1 PCIE_REFCLK_M PCIE_REFCLK_P CLK_IN PCI_AVDD_CLK2 PCI_AVDD_CLK1 NC NC NC NC PP PP NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 19.
    BUCK9 BUCK2BUCK0 4.7AMAX13.4AMAX BUCK8 13.4AMAX BUCK3BUCK4 4.7AMAX 0.67V/0.80V 0.67V - 0.92V 1.7AMAX (pendingvendorqual) BUCK5 3.2AMAX 1.5AMAX BUCK6 1.5AMAX 0.75AMAX 1.5AMAX 0.80V- 1.06V 0.80V - 0.92V BUCK7 BUCK1 1.03V for overdrive only 0.625V - 1.06V Voltages per Cayman Power Spec, Sec. 2.2, rev 0.9.2, #24557869 D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor 2 1 L1803 2 1 L1801 2 1 L1804 21 L1802 2 1 L1805 2 1 L1818 21 L1811 2 1 C1840 2 1 XW1807 2 1 C1802 2 1 C1874 2 1 C1875 2 1 C1876 2 1 C1877 2 1 C1864 2 1 C1801 H13 H14 R13 M8 F11 H6 N7 L19 L18 F19 F18 V6 U6 K19 K18 D1 C1 B1 M3 M2 M1 T3 T2 H3 H2 H1 D13 C13 B13 A13 D17 C17 B17 A17 D9 C9 B9 A9 D5 C5 B5 A5 V5 U5 V2 U2 M19 M18 P16 G19 G18 H15 V7 U7 R8 J19 J18 H16 A2 D2 C2 B2 F5 V4 U4 L3 L2 L1 N3 N2 N1 K5 V3 U3 U1 T1 R1 R3 R2 R7 J3 J2 J1 G3 G2 G1 J5 D12 C12 B12 A12 D14 C14 B14 A14 D16 C16 B16 A16 A18 D18 C18 B18 F12 D10 C10 B10 A10 D8 C8 B8 A8 D6 C6 B6 A6 A4 D4 C4 B4 F10 U1801 21 XW1805 21 L1817 2 1 C1830 2 1 C1836 2 1 C1861 21 L1816 21 XW1804 21 L1814 2 1 L1815 2 1 C1816 2 1 C1823 2 1 C1822 2 1 C1829 2 1 C1835 2 1 C1860 2 1 C1841 2 1 C1871 21 L1813 2 1 L1812 21 L1810 2 1 C1814 2 1 C1821 2 1 C1828 2 1 C1834 2 1 C1866 2 1 C1873 2 1 C1813 2 1 C1820 2 1 C1827 2 1 C1833 2 1 C1839 2 1 C1865 2 1 XW18062 1 C1870 2 1 C1862 2 1 C1863 2 1 C1869 2 1 C1868 2 1 C1867 2 1 C1872 2 1 C1811 21 L1809 21 L1807 2 1 L1808 21 L1806 2 1 C1856 2 1 C1849 2 1 C1859 2 1 C1855 2 1 C1852 2 1 C1848 2 1 C1858 2 1 C1854 2 1 C1851 2 1 C1847 2 1 C1810 2 1 C1809 2 1 C1808 2 1 C1807 2 1 C1806 2 1 C1805 2 1 C1804 2 1 C1803 2 1 C1845 2 1 C1843 2 1 C1838 2 1 C1832 2 1 C1826 2 1 C1819 2 1 C1844 2 1 C1842 2 1 C1837 2 1 C1831 2 1 C1825 2 1 C1857 2 1 XW1801 2 1 XW1803 2 1 XW1802 2 1 C1853 2 1 C1850 2 1 C1846 2 1 C1818 BUCK5_LX0PP0V9_SOC_FIXED BUCK5_FB PP2V8_UT_AF_VAR PP_GPU_SRAM_VAR PP_CPU_SRAM_VAR PP1V1 PP1V8_MAGGIE_IMU PP1V8_TOUCH BUCK2_PP_SOC_FB BUCK1_PP_GPU_FB BUCK0_PP_CPU_FB PP1V8 BUCK9_LX0 BUCK7_LX0 BUCK6_LX0 BUCK9_FB BUCK6_FB BUCK4_FB BUCK4_LX1 BUCK4_LX0 BUCK3_LX0 BUCK3_FB BUCK2_LX1 BUCK2_LX0 BUCK1_LX3 BUCK1_LX2 BUCK1_LX1 BUCK1_LX0 BUCK0_LX3 BUCK0_LX1 BUCK0_LX0 PP_SOC_VAR PP1V8_SDRAM PP1V1_SDRAM PP_GPU_VAR BUCK0_LX2 PP_CPU_VAR VDD_MAIN_SNS BUCK8_LX0 BUCK8_FB PP_VDD_MAIN PP1V25_BUCK BUCK7_FB ROOM=PMU 1UH-20%-2.1A-0.12OHM CRITICAL PIQA20121T-SM CRITICAL ROOM=PMU PIQA20121T-SM 1UH-20%-2.1A-0.12OHM 0603 1.0UH-20%-1.5A-0.161OHM CRITICAL MCFE2016T-SM 1.0UH-20%-2.25A-0.086OHM CRITICAL ROOM=PMU PIQA20121T-SM 0.47UH-20%-3.8A-0.048OHM NO_XNET_CONNECTION=1 CRITICAL ROOM=PMU CRITICALPINA20121T-SM 0.22UH-20%-6.7A-0.023OHM NO_XNET_CONNECTION=1 ROOM=PMU 0402-1ROOM=PMU 15UF X5R 6.3V 20% OMIT ROOM=SOC SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=PMU 0402-1 X5R 6.3V 20% 15UF ROOM=PMU 0402-1 X5R 6.3V 20% 15UF 20% 6.3V 2.2UF ROOM=PMU 0201-1 X5R-CERM 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 ROOM=PMU 0402-1 15UF X5R 6.3V 20% 0402-1ROOM=PMU 15UF X5R 6.3V 20% D2333A1 WLCSP ROOM=PMU OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=SOC PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 ROOM=PMU 0402-1 X5R 6.3V 20% 15UF ROOM=PMU 0402-1 X5R 6.3V 20% 15UF 5% 10V C0G-CERM ROOM=PMU 01005 220PF PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM ROOM=PMU CRITICAL PIQA20121T-SM 0.47UH-20%-3.8A-0.048OHM CRITICALNO_XNET_CONNECTION=1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 01005 220PF C0G-CERM 10V 5% ROOM=PMU 0402-1 15UF X5R 6.3V 20% ROOM=PMU 01005 220PF C0G-CERM 10V 5% PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 0.22UH-20%-6.7A-0.023OHM PINA20121T-SM CRITICAL ROOM=PMUNO_XNET_CONNECTION=1 PIQA20161T-SM 1.0UH-20%-3.6A-0.060OHM CRITICAL ROOM=PMU NO_XNET_CONNECTION=1 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 20% 6.3V X5R 15UF ROOM=PMU 0402-1 5% 10V C0G-CERM 220PF ROOM=PMU 01005 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 5% 10V C0G-CERM 220PF ROOM=PMU 01005 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 5% 10V C0G-CERM 220PF ROOM=PMU 01005 5% 10V C0G-CERM 220PF ROOM=PMU 01005 5% 10V C0G-CERM 220PF ROOM=PMU 01005 01005 ROOM=PMU 220PF C0G-CERM 10V 5% 220PF C0G-CERM 10V 5% 01005 ROOM=PMU NO_XNET_CONNECTION=1 PINA20121T-SM CRITICAL 0.22UH-20%-6.7A-0.023OHM ROOM=PMU PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 CRITICAL ROOM=PMU 1.0UH-3.6A-0.06OHM NO_XNET_CONNECTION=1 MEKK2016T-SM NO_XNET_CONNECTION=1 PINA20121T-SM 0.22UH-20%-6.7A-0.023OHM CRITICAL ROOM=PMU 1.0UH-20%-3.6A-0.060OHM PIQA20161T-SM ROOM=PMU CRITICALNO_XNET_CONNECTION=1 2.2UF20% 6.3V X5R-CERM ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% X5R-CERM 6.3V 2.2UF 0201-1 ROOM=PMU 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=PMU 0201-1 2.2UF ROOM=PMU 0201-1 X5R-CERM 6.3V 20% 6.3V X5R-CERM 2.2UF 20% 0201-1 ROOM=PMU X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 20% 15UF 6.3V 0402-1 ROOM=PMU X5R 6.3V 20% 15UF ROOM=PMU 0402-1 6.3V 15UF 20% 0402-1ROOM=PMU X5R 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 15UF X5R 6.3V 20% 0402-1 ROOM=PMU 0402-1ROOM=PMU 6.3V 20% 15UF X5R 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 ROOM=PMU 20% 6.3V X5R 15UF 0402-1 20% X5R 15UF ROOM=PMU 6.3V 0402-1 20% X5R 15UF ROOM=PMU 6.3V 0402-1 20% 6.3V X5R 15UF ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 20% 6.3V CERM-X5R 10UF ROOM=PMU 0402-9 OMIT ROOM=SOC SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 OMIT SHORT-20L-0.05MM-SM ROOM=SOC NO_XNET_CONNECTION=1 NO_XNET_CONNECTION=1ROOM=SOC SHORT-20L-0.05MM-SM OMIT 20% 6.3V CERM-X5R 10UF ROOM=PMU 0402-9 ROOM=PMU 20% 6.3V CERM-X5R 10UF 0402-9 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=PMU 0402-1 20% 6.3V X5R 15UF ROOM=PMU 15 10 9 8 7 25 14 14 157 3624 47463938 14 14 14 52484746 39292517161312119875 14 53524847 4140373632212016 1915 14 14 19 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 10 9 4 19 SYM 2 OF 4 BAT/USBBUCKINPUT SWITCHOUTPUTS VDD_BUCK6 VBUCK4_SW BUCK3_SW1 BUCK3_SW2 BUCK3_SW3 BUCK4_SW1 BUCK3_FB VBUCK3_SW BUCK3_LX0 BUCK4_LX0 BUCK4_LX1 BUCK4_FB BUCK2_FB BUCK2_LX0 BUCK1_FB BUCK1_LX3 BUCK2_LX1 BUCK0_LX3 BUCK1_LX1 BUCK0_FB BUCK1_LX2 BUCK1_LX0 BUCK0_LX1 BUCK0_LX0 BUCK0_LX2 VDD_BUCK1_01 VDD_MAIN VDD_MAIN_SW VDD_BUCK0_23 VDD_BUCK2 VDD_BUCK1_23 VDD_BUCK4 VDD_BUCK3 VDD_BUCK5 VDD_BUCK7 VDD_BUCK8 VDD_BUCK9 BUCK5_LX0 BUCK5_FB BUCK6_LX0 BUCK6_FB BUCK7_LX0 BUCK7_FB BUCK8_LX0 BUCK8_FB BUCK9_LX0 BUCK9_FB VDD_MAIN_E VDD_MAIN_N VDD_BUCK0_01 VDD_MAIN_W VDD_MAIN_W VDD_MAIN_SNS 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 20.
    #24989262 #24989262:OTP-AO LDO17 defaultoff,50mA Iout_max VPUMP: 10nF min. @4.6V VBUF_1V2 LDO17 LDO3 LDO6 LDO9 +/-4.5% LDO10 LDO11 LDO8 1.2-2.475V 1.2-2.475V LDO1 (Ca) LDO2 (Ca) 1.2-2.475V 2.4-3.675V 2.4-3.675V 0.7-1.2V 2.5-3.6V(tbc) 1.2-2.475V LDO7 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA LDO14 LDO13 LDO12 LDO7 LDO15 0.7-1.4V 1.2-2.475V 250mA LDO19 LDO16 LDO18 LDO4 LDO5 LDO1 LDO_RTC 250mA 1150mA0.7-1.2V LDO11 (Cb) LDO# +/-75mV LDO6 (Cb) LDO9 (Cb) LDO5 (F) LDO# LDO3 (Ca) LDO4 (D) ADJ.RANGE, LOW 1.2-2.475V ADJ.RANGE, HI 2.4-3.675V 2.4-3.675V 2.4-3.675V +/-2.5% +/-30mV +/-25mV 250mA 1000mA MAX.CURRENT +/-2.5% 50mA +/-1.4% 60mA+/-2.5% 50mA ACCURACY 50mA +/-2.5% (500/100mA in bypass) LDO15 (Ca) LDO14 (Gb) LDO13 (Cb) LDO12 (E) +/-30mV +/-2.5% 2.4-3.675V 2.4-3.675V 400mA 250mA 250mA 10mA 50mA 250mA 400mA 10mA 50mA 400mA 10mA MAX.CURRENT 2.4-3.675V 2.4-3.675V ADJ.RANGE, HI +/-3.0% +/-30mV +/-30mV ACCURACY +/-5% +/-2.5% +/-3.0% +/-2.0% +/-3.0% +/-5.0% 2.4-3.675V ADJ.RANGE, LOW 1.2-2.475V 1.2-2.475V 1.8V 0.7-1.4V 1.2-2.475V 1.2-2.475V 1.2V 0.7-1.4V 2.5V LDO17 (Ca) BUF_1V2 LDO19 (Gb) LDO16 (Cb) LDO18 (Gb) ADELYN LDO SPECS U15 = PMU XTAL GND 1.2-2.475V 2.4-3.675V LDO8 (Cb) LDO10 (Ga) LDO2 NewforADELYN 2 1 R1901 2 1 C1923 2 1 C1930 2 1 C1904 2 1 C1905 2 1 C1915 2 1 C1912 2 1 C1919 2 1 C1909 2 1 C1902 2 1 XW1902 V8 V19 V12 V1 U8 T13 U15 T8 T7 T6 T4 T15 T5 R4 R17 P15 P4 P3 P2 P1 N4 N19 N18 N17 M4 M17 L8 L4 L17 K8 K4 K3 K2 K17 K1 J8 J4 J17 H4 H19 H18 H17 G4 G17 F4 F3 F2 F17 F1 E9 E8 E7 E6 E5 E4 E3 E2 E19 E18 E17 E16 E15 E14 E13 E12 E11 E10 E1 D7 D3 D19 D15 D11 C7 C3 C19 C15 C11 B7 B3 B19 B15 B11 A7 P14 A3 P13 A19 H8 A15 A11 A1 U1801 R5 G15 U18 U17 T11 T18 U12 U16 U14 P7 U13 T9 P17 R18 P18 T17 T14 U10 U9 T16 T10 U11 T12 U19 V18 V17 T19 V16 V13 R9 R19 P19 R14 V10 V9 R16 R10 V11 R12 R15 P8J6 U1801 2 1 C1935 2 1 C1933 2 1 C1932 2 1 XW1901 2 1 C1922 2 1 C1913 2 1 C1908 2 1 C1925 2 1 C1926 2 1 C1927 2 1 C1921 2 1 C1918 2 1 C1916 2 1 C1901 2 1 C1907 2 1 C1911 2 1 C1910 2 1 C1914 PP2V9_NH_AVDD PP0V9_NAND PP0V8_AOP PP3V3_USB PP1V8_HAWKING PP1V2_REF PMU_VPUMP PP_VDD_MAIN PMU_VSS_RTC PMU_PRE_UVLO_DET VDD_MAIN_SNS PP_VDD_MAIN PP1V1_SDRAM PP1V25_BUCK PP_VDD_MAIN PP_VDD_BOOST PP3V0_TRISTAR_ANT_PROX PP1V2_NH_NV_DVDD PP1V2_UT_DVDD PP_LDO17 PP1V8_ALWAYS PP3V0_MESA PP1V2_SOC PP1V8_MESA PP_ACC_VAR PP3V0_NAND PP3V0_ALS_APS_CONVOY PP1V8_VA 0.00 0201 NOSTUFFMF 1% 1/20W 20% 2.2UF 6.3V X5R-CERM 0201-1 ROOM=PMU 0201-1 ROOM=PMU X5R-CERM 20% 2.2UF 6.3V 2.2UF 6.3V 20% X5R-CERM 0201-1 ROOM=PMU 5% 16V 33PF 01005 ROOM=PMU NP0-C0G-CERM 6.3V X5R ROOM=PMU 15UF20% 0402-1 X5R ROOM=PMU 20% 6.3V 0402-1 15UF 20% 0201-1 X5R-CERM 2.2UF ROOM=PMU 6.3V 220PF C0G-CERM 10V 5% 01005 ROOM=PMU 47NF X5R-CERM ROOM=PMU 6.3V 01005 20% ROOM=PMU SHORT-20L-0.05MM-SM OMIT WLCSP D2333A1 WLCSP D2333A1 ROOM=PMU 20% 6.3V X5R 0201-1 1.0UF 20% 6.3V X5R 0201-1 1.0UF ROOM=PMU 0.22UF 20% 6.3V X5R ROOM=PMU 01005-1 NO_XNET_CONNECTION ROOM=PMU OMIT SHORT-20L-0.05MM-SM 2.2UF ROOM=PMU 0201-1 X5R-CERM 6.3V 20% 20% 6.3V ROOM=PMU X5R-CERM 0201-1 2.2UF 20% X5R-CERM ROOM=PMU 0201-1 6.3V 2.2UF X5R 0201-1 20% 6.3V ROOM=PMU 1.0UF ROOM=PMU 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 2.2UF 20% 6.3V X5R-CERM ROOM=PMU 2.2UF X5R-CERM ROOM=PMU 20% 6.3V 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 ROOM=PMU 6.3V ROOM=PMU 20% 0201-1 X5R-CERM 2.2UF X5R 20% 6.3V 0402-1 ROOM=PMU 15UF 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=PMUROOM=PMU 20% 6.3V 0402-9 10UF CERM-X5RCERM-X5R 0402-9 6.3V 10UF 20% ROOM=PMU 6.3V CERM-X5R 20% 0402-9 ROOM=PMU 10UF 29 17 15 7 44 16 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 20 20 18 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 18 15 18 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 38 37 32 25 23 53414029 29 25 2120 38 16108 4838 464027 5217 2925 35343332 NC NC NC SYM 4 OF 4 VSS VSS SYM 1 OF 4 LDO LDOINPUT VDD_LDO4 VPP_OTP VLDO2 VLDO8 VDD_LDO19 VDD_LDO19 TP_DET VDD_LDO10 VDD_LDO11_13 VDD_LDO14 VDD_LDO7_8 VDD_LDO16 VDD_LDO18 VDD_LDO6_BYP VDD_LDO9 VDD_LDO5 VDD_LDO1 VDD_LDO2_15 VPUMP VBUF_1V2 VLDO19 VLDO18 VLDO14 VLDO13 VLDO17 VLDO16 VLDO15 VLDO12 VLDO9_FB VLDO10 VLDO11 VLDO9 VBYPASS VLDO7 VLDO6 VLDO4 VLDO3 VDD_LDO3_17 VLDO5_1 VLDO5_0 VLDO1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 21.
    GPIO21 = I2CSCL is for Chestnut dark current mitigation RS = requires sequencer Sequencer controllable #24511807: Stuff for Carrier TBD Button for two-finger reset: 20711463 and 21196187 RS RS RS BUTTON PULL-UP RESISTORS NOTE:VDROOP_DET filtering is now inside Adelyn RADIO PA NTC AP NTC FOREHEAD NTC NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC Reserved for MENU key on dev board REAR CAMERA NTC Active high with int 200k PD HIGH=FORCE PWM MODE D101/D111 ONLY: TCXO_RF Supplies 32K #24825674: Add R2020 to meet timing spec #26169957: R2020 to 100ohm (D10x only) I2C1_AP_SCL47 I2C0_AP_SCL 37 47 I2C1_AP_SDA47 21 R2020 2 1 C2013 2 1 C2001 1 PP2002 1 PP2001 1 PP2003 21 R2009 2 1 R2012 2 1 R2007 2 1 R2008 2 1 R2015 21 R2000 V15 V14 J7 F7 G7 F6 G6 N9 M7 L6 L5 P6 M6 R6 G16 H5 M9 R11 L11 P12 M13 N6 N13 P11 P10 P9 M5 N8 N10 M10 N5 P5 G5 K6 L7 L9 K10 K9 J10 J9 H10 H9 G8 F8 G9 F9 G10 G11 H12 G12 G13 F13 F14 G14 F15 F16 L13 L10 K11 J11 H11 N11 M11 N12 M12 H7 N14 N15 N16 M14 M15 M16 L16 L15 L14 K12 K13 J13 K14 K15 K16 J16 J15 J14 K7 L12 J12 U1801 21 Y2001 2 1 R2005 2 1 R2006 2 1 C2006 2 1 R2011 21 XW2001 2 1 C2002 2 1 C2004 2 1 C2003 2 1 C2011 2 1 R2010 2 1 R2004 2 1 R2003 2 1 R2002 2 1C2007 2 1 C2008 2 1 C2009 2 1C2010 2 1 R2001 21 XW2005 21 XW2004 21 XW2002 21 XW2003 FOREHEAD_NTC PMU_ADC_IN SPI_PMU_TO_PMGR_MISO PMU_TO_AOP_CLK32K PMU_VSS_RTC NC_GNSS_TO_PMU_HOST_WAKE PMU_TO_WLAN_REG_ON PMU_TO_BB_USB_VBUS_DETECT PMU_TO_NFC_EN PMU_TO_AP_FORCE_DFUPMU_TO_AP_FORCE_DFU_R PMUGPIO_TO_WLAN_CLK32K AP_TO_PMU_SOCHOT_L RADIO_PA_NTC REAR_CAMERA_NTC PMU_IREF CHESTNUT_TO_PMU_ADCMUX PMU_PRE_UVLO_DET BUTTON_POWER_KEY_L BUTTON_RINGER_A PP1V2_MAGGIE PMU_AMUX_AY BBPMU_TO_PMU_AMUX2 PMUGPIO_TO_WLAN_CLK32K AP_TO_PMU_TEST_CLKOUT TRISTAR_TO_PMU_USB_BRICK_ID AP_NTC PMU_TO_CODEC_DIGLDO_PULLDN PMU_TO_BT_REG_ON NC_PMU_TO_GNSS_EN PMU_TO_NAND_LOW_BATT_BOOT_L NFC_TO_PMU_HOST_WAKE PMU_TO_BBPMU_RESET_R_L BBPMU_TO_PMU_AMUX1 FOREHEAD_NTC_RETURN PMU_XTAL2 PMU_TO_BOOST_EN BT_TO_PMU_HOST_WAKE PMU_AMUX_BY PMU_TO_ACC_BUCK_SW_EN PMU_VREF PMU_TO_AP_PRE_UVLO_L PMU_TO_AP_THROTTLE_GPU_L PMU_TO_AP_THROTTLE_CPU_L AP_VDD_GPU_SENSE AP_VDD_CPU_SENSE TRISTAR_TO_PMU_USB_BRICK_ID PMU_ADC_IN BUTTON_VOL_DOWN_L PMU_TO_AP_BUF_RINGER_A PMU_TO_AP_BUF_POWER_KEY_L PMU_TO_AP_BUF_VOL_DOWN_L TIGRIS_TO_PMU_INT_L BB_TO_PMU_PCIE_HOST_WAKE_L WLAN_TO_PMU_HOST_WAKE PMU_TO_HOMER_RESET_L PMU_TO_LCM_PANICBPMU_VDD_RTC LCM_TO_CHESTNUT_PWR_EN SPI_PMGR_TO_PMU_MOSI SPI_PMGR_TO_PMU_SCLK PP1V8_SDRAM PP1V8_SDRAM AP_NTC_RETURN PMU_TO_BBPMU_RESET_L BUTTON_POWER_KEY_L RCAM_NTC_RETURN PP1V8_ALWAYS PP1V8_SDRAM BUTTON_RINGER_A BUTTON_VOL_DOWN_L PP1V8_ALWAYS PA_NTC_RETURN LCM_TO_MANY_BSYNC AP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AOP_TO_PMU_ACTIVE_REQUEST PMU_TO_SYSTEM_COLD_RESET_L BUTTON_VOL_UP_L AP_TO_PMU_AMUX_OUT ACC_BUCK_TO_PMU_AMUX BBPMU_TO_PMU_AMUX3 PMU_XTAL1 PMU_TCAL AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_SLEEP1_READY PMU_TO_AOP_TRISTAR_ACTIVE_READY SYSTEM_ALIVE PMU_TO_AOP_IRQ_L I2C_PMU_SDA_R SHORT-20L-0.05MM-SM OMIT ROOM=SOC 100 01005 MF 1/32W 5% ROOM=PMU ROOM=PMU X5R 10% 01005 PLACE_NEAR=U1801:2mm 10V 1000PF X5R ROOM=PMU 01005 1000PF 10V 10% ROOM=SOC SHORT-20L-0.05MM-SM OMIT SM ROOM=SOC P2MM-NSM SM ROOM=SOC P2MM-NSM SM ROOM=PMU P2MM-NSM 0% 1/32W 01005 MF 0.00 NO_XNET_CONNECTION 10K MF 1/32W 5% ROOM=PMU 01005 MF 01005 5% ROOM=PMU 1/32W 220K NOSTUFF 100K ROOM=PMU MF 1/32W 01005 5% NOSTUFF 220K ROOM=PMU MF 1/32W 01005 5% NOSTUFF 1.00K MF 01005 5% 1/32W ROOM=PMU D2333A1WLCSP 32.768KHZ-20PPM-12.5PF CRITICAL ROOM=PMU 1.60X1.00-SM ROOM=PMU 100K MF 1/32W 01005 5% 100K MF 1/32W 01005 5% ROOM=PMU OMIT ROOM=SOC SHORT-20L-0.05MM-SM 0201 6.3V 20% ROOM=PMU X5R 0.22UF ROOM=PMU 1% 200K 201 1/20W MF OMIT ROOM=PMU SHORT-20L-0.05MM-SM 0.22UF 6.3V 0201 X5R ROOM=PMU 20% 22PF 16V 5% 01005 CERM ROOM=PMU 22PF 16V 5% CERM 01005 ROOM=PMU ROOM=PMU NP0-C0G 01005 100PF 5% 16V NP0-C0G 5% ROOM=PMU 01005 16V 100PF 3.92K 0201 0.1% ROOM=PMU 1/20W MF ROOM=PMU 10KOHM-1% 01005 ROOM=PMU 01005 10KOHM-1% ROOM=PMU 10KOHM-1% 01005 5% 01005 ROOM=PMU NP0-C0G 100PF 16V ROOM=PMU NP0-C0G 01005 100PF 5% 16V 5% ROOM=PMU 01005 NP0-C0G 16V 100PF 10KOHM-1% ROOM=PMU 01005 ROOM=SOC SHORT-20L-0.05MM-SM OMIT 20 11 13 19 53 53 53 124 5320 11 37 19 4420 4420 36 4 53 53 20 7 40 20 32 53 17 53 53 23 53 4 27 11 11 12 14 14 4020 20 4420 12 12 12 21 53 53 36 39 39 37 11 11 53 52 48 47 41 40 37 36 32 21 20 18 16 535248 47414037363221201816 53 44 20 212019 535248 47414037363221201816 44 20 44 20 212019 53 39 23 13 7 40 13 13 7 44 12 7 27 53 13 15 13 40 37 13 7 21 17 15 13 NC NC NC PP PP PP NC NC NC NC NC NC NC SYM 3 OF 4 REFS RESETS COMPARATORADC PMGR BUTTONS AMUX GPIO NTCXTAL GPIO3 SHDN RESET* RESET_IN3 RESET_IN2 SLEEP1_REQ CRASH* OUT_32K SLEEP_32K ACTIVE_RDY SYS_ALIVE FORCE_SYNC ACTIVE_REQ SLEEP1_RDY IRQ* SDA SCLK SCL MISO MOSI AMUX_A1 AMUX_A0 AMUX_A3 AMUX_A2 AMUX_A4 AMUX_A5 AMUX_B1 AMUX_B0 AMUX_B2 AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B7 AMUX_B3 AMUX_BY TDEV3 TDEV2 TDEV1 XTAL1 TCAL TDEV5 TDEV4 XTAL2 VDD_RTC RESET_IN1 GPIO21 GPIO17 GPIO18 GPIO19 GPIO20 GPIO16 GPIO15 GPIO14 GPIO12 GPIO13 GPIO11 GPIO10 GPIO6 GPIO8 GPIO7 GPIO9 GPIO4 GPIO5 GPIO2 GPIO1 BUTTON2 BUTTON3 BUTTON4 BUTTONO1 BUTTONO2 BUTTONO3 BUTTON1 AMUX_A6 AMUX_A7 AMUX_AY ADC_IN IBAT VBAT BRICK_ID VDROOP0_DET VDROOP1_DET PRE_UVLO_DET VDROOP0* VDROOP1* PRE_UVLO* IREF VREF 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 22.
    See Charger C2113on Pg46 #25112685,Remove Snub TO TRINITY F4: 100 kOhm pullup to VLDO (regulated output voltage) TIGRIS CHARGER #24558610: Change to 100ohm I2C1_AP_SDA47 I2C1_AP_SCL47 21 R2103 2 1 3 Q2102 2 1 C2103 2 1 R2105 2 1C2102 C2 D2 B2 A2 F4 F1 E5 C5 D5 B5 A5 F3 E3 G3 E4 F5 C3 D3 B3 A3 G4 G2 G1 F2 C4 D4 B4 A4 G5 E1 C1 D1 B1 A1 E2 U2101 2 1 C2114 2 1 R2102 21 C2105 B3 B2 B1 A3 A2 A1 C3 C2 C1 Q2101 21 R2104 2 1 C2104 2 1 C2118 2 1 C2117 2 1 C2115 2 1 C2112 2 1 C2111 2 1 C2109 2 1 C2108 2 1 C2110 2 1C2106 2 1 R2101 2 1 C2101 PP5V0_USB PP1V8_ALWAYS PP1V8_SDRAM PP_BATT_VCC TIGRIS_TO_BATTERY_SWI TIGRIS_TO_BATTERY_SWI_1V8 SWI_AP_BI_TIGRIS TIGRIS_BOOT TIGRIS_LDO TIGRIS_VBUS_DETECT TIGRIS_TO_PMU_INT_R_L VBATT_SENSE SYSTEM_ALIVE TRISTAR_TO_TIGRIS_VBUS_OFF TIGRIS_TO_PMU_INT_L TIGRIS_ACTIVE_DIODE USB_VBUS_DETECT TIGRIS_BUCK_LX TIGRIS_PMID PP_VDD_MAIN ROOM=CHARGER 4.2UF 0402-1 10% 16V X5R-CERM 01005 10% 16V CER-X7R 330PF ROOM=CHARGER 01005 10% 16V CER-X7R 330PF ROOM=CHARGER 330PF 16V 10% ROOM=CHARGER 01005 CER-X7R 5% 1/32W 01005 ROOM=CHARGER 100K MF 0402-1 10% 16V X5R-CERM 4.2UF ROOM=CHARGER 100 ROOM=CHARGER 5% 01005 1/32W MF DFN RV3C002UN ROOM=CHARGER 10% 330PF CER-X7R 16V 01005 40.2K MF 1/32W 01005 1% ROOM=CHARGER C0G-CERM 01005 5% 10V 220PFSN2400AB0 ROOM=CHARGER CRITICAL WCSP 10UF ROOM=CHARGER 20% 6.3V CERM-X5R 0402-9 100K 01005 ROOM=CHARGER MF 1/32W 5% NOSTUFF X5R ROOM=CHARGER NO_XNET_CONNECTION 10% 16V 0.047UF 0201 BGA CSD68827W ROOM=CHARGER CRITICAL ROOM=CHARGER 1% MF 1/32W 30.1K 01005 C0G-CERM 01005 5% 10V 220PF ROOM=CHARGER 0201-1 20% 6.3V X5R-CERM ROOM=CHARGER 2.2UF 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=CHARGER 2.2UF 6.3V 0201-1 X5R-CERM ROOM=CHARGER 20% ROOM=CHARGER 16V 10% 330PF CER-X7R 01005 ROOM=CHARGER 4.2UF 10% 16V X5R-CERM 0402-1 40 4 20 19 53 52 48 47 41 40 37 36 32 20 18 16 224 22 12 22 20 17 15 40 20 7 28 53524641403937353433 31282726252319181094 S D SYM_VER_1 G PMID VBUS PGND PGND PGND PGND HDQ_HOST HDQ_GAUGE ACT_DIODE BAT_SNS BAT BAT BAT BAT BUCK_SW BUCK_SW BUCK_SW BUCK_SW BOOT LDO TEST VBUS_DET INT VBUS_OVP_OFF SCL SDA SYS_ALIVE VBUS VBUS VBUS VBUS VDD_MAIN VDD_MAIN VDD_MAIN VDD_MAIN G S D 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 23.
    516S00172 (matches d10mlb MCO rev 27)THIS ONE ON MLB ---> BATTERY CONNECTOR 2 1 C2204 21 XW2201 12 11 109 87 6 5 4 3 2 1 J2201 21 R2201 2 1 C2201 2 1 C2203 2 1 C2202 VBATT_SENSE TIGRIS_TO_BATTERY_SWI PP_BATT_VCC TIGRIS_BATTERY_SWI_CONN ROOM=BATTERY_B2B 100PF NP0-C0G 16V 5% 01005 ROOM=BATTERY_B2B 56PF NP0-C0G-CERM 25V 5% 01005 C0G-CERM 220PF 10V 5% ROOM=BATTERY_B2B 01005 SHORT-20L-0.05MM-SM ROOM=BATTERY_B2B NO_XNET_CONNECTION=1 PLACE_NEAR=J2201:2mm RCPT-BATT-SHORT ROOM=BATTERY_B2B CRITICAL ALLOW_APPLE_PREFIX F-ST-SM ROOM=BATTERY_B2B 5% MF 1/32W 100 01005 ROOM=BATTERY_B2B 56PF NP0-C0G-CERM 25V 5% 01005 21 21 214 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 24.
    Control details fromRadar 19634006 HIGH=FORCE PWM MODE BOOST When VDD_MAIN < 3.4, boosts to 3.4 Otherwise tracks VDD_MAIN I2C0_AP_SDA47 I2C0_AP_SCL47 B1 B4 B3 A4 A3 C4 C3 C2 B2 D4 D3 D2 A2 A1 C1 D1 U2301 2 1 C2309 21 L2301 2 1 R2301 2 1 C2307 2 1 C2308 2 1 C2306 2 1 C2301 2 1 C2302 2 1 C2304 2 1 C2303 PP_VDD_MAIN LCM_TO_MANY_BSYNC SYS_BOOST_LX PP_VDD_BOOST PMU_TO_BOOST_EN 01005 5% 10V C0G-CERM 220PF ROOM=BOOST 4.7UF X5R-CERM1 6.3V 20% 402 ROOM=BOOST 15UF X5R 6.3V 20% 0402-1 ROOM=BOOST 15UF X5R 6.3V 20% 0402-1 ROOM=BOOST DSBGA ROOM=BOOST SN61280D ROOM=BOOST 0402-9 20% 6.3V 10UF CERM-X5R 0.47UH-20%-4.2A-0.048OHM ROOM=BOOST PIUA20121T-SM 511K MF 01005 1/32W 1% 15UF X5R 6.3V 20% 0402-1 ROOM=BOOST 15UF X5R 6.3V 20% ROOM=BOOST 0402-1 15UF X5R 6.3V 20% 0402-1 ROOM=BOOST 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 21 19 18 10 9 4 53 39 20 13 533837322519 20 VOUT AGND PGND SCL BYP* EN SW VOUT SW GPIO VIN VIN SDA VSEL 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 25.
    #25782019:Add 0ohm MAGNESIUM -COMPASS BOSCH: Internal PU 114K INT PU 114K INT PD1.09M INT PU XW2404 to balance Via/Cu at INT pin CARBON - ACCEL & GYRO INVENSENSE, MPU-6800: C2403=0.1UF BOMOPTION: CARBON_1 #25765850:Update Carbon APN BOSCH (APN:338S00188): nostuff C2420/C2421/C2422/C2423 and R2403 PU #24593845, #25691124 #25740540:PP for South Carbon MOSI PHOSPHORUS 21 R2404 1 16 2 4 3 14 7 15 13 12 11 10 9 8 6 5 U2404 1 16 2 4 3 14 7 15 13 12 11 10 9 8 6 5 U2401 1 PP2440 21 XW2404 2 1 C2442 2 1 C2418 2 1 C2448 2 1 C2445 2 1 C2449 2 1 C2443 2 1 R2441 2 1 C2419 21 R2422 2 1 R2403 6 8 53 4 7 1 2 U2403 2 1 C2421 2 1 C2422 2 1 C2408 2 1 C2415 2 1 C2420 2 1 C2423 2 1 R2401 C1 C2 C4 C3 B4 A4 A3 D2 D1 B3 B1 D4 A1 A2 U2402 2 1 C2401 1PP2404 2 1 C2403 1 PP2403 1 PP2402 1 PP2401 2 1 C2405 2 1 C2414 2 1 C2413 2 1 C2402 SPI_IMU_TO_AOP_MISO PP1V8_MAGGIE_IMUPP1V8_MAGGIE_IMU_FILT SPI_AOP_TO_IMU_SCLK_R2 PP1V8_MAGGIE_IMU PP1V8_MAGGIE_IMU_R SPI_AOP_TO_ACCEL_GYRO_CS_L GYRO_CHARGE_PUMP ACCEL_GYRO_TO_AOP_INT PP1V8_MAGGIE_IMU_R PP1V8_MAGGIE_IMU SPI_AOP_TO_IMU_SCLK_R1 PP1V8_MAGGIE_IMU_FILT BOT_ACCEL_GYRO_TO_XW_INT BOT_ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_IMU_MOSI SPI_IMU_TO_AOP_MISO ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_IMU_MOSI SPI_IMU_TO_AOP_MISO SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L BOT_GYRO_CHARGE_PUMP SPI_AOP_TO_IMU_SCLK_R1 SPI_AOP_TO_PHOSPHORUS_CS_L SPI_AOP_TO_IMU_SCLK_R1 COMPASS_TO_AOP_INT SPI_AOP_TO_IMU_MOSI SPI_IMU_TO_AOP_MISO PP1V8_MAGGIE_IMU_FILT SPI_AOP_TO_IMU_MOSI PHOSPHORUS_TO_AOP_INT_L PP1V8_MAGGIE_IMU_FILT SPI_AOP_TO_COMPASS_CS_L PP1V8_MAGGIE_IMU ROOM=BOT_CARBON 0% 1/32W 01005 MF 0.00 CRITICAL MPU-6900-21 ROOM=BOT_CARBON LGA LGA CRITICAL ROOM=CARBON MPU-6900-21 BOMOPTION=CARBON_1 ROOM=HOMER P2MM-NSM SM SHORT-20L-0.05MM-SM ROOM=BOT_CARBON NO_XNET_CONNECTION=1 OMIT 0.1UF 6.3V X5R-CERM 01005 20% ROOM=BOT_CARBON 6.3V 0201-1 20% X5R-CERM 2.2UF ROOM=CARBON 6.3V 20% 2.2UF ROOM=BOT_CARBON 0201-1 X5R-CERM X5R-CERM 01005 6.3V 20% 0.1UF ROOM=BOT_CARBON ROOM=BOT_CARBON NOSTUFF 5PF +/-0.1PF 16V NP0-C0G 01005 0.1UF ROOM=BOT_CARBON 6.3V 0201 10% X6S 100K 5% 1/32W ROOM=SOC 01005 MF +/-0.1PF 5PF 01005 16V NP0-C0G ROOM=CARBON BOMOPTION=CARBON_1 ROOM=PHOSPHORUS 01005 0% 1/32W 0.00 MF 1/32W ROOM=SOC 01005 100K 5% MF NOSTUFF BMP284AA LGA NP0-C0G-CERM ROOM=PHOSPHORUS 20PF 5% 16V 01005 NOSTUFF NOSTUFF 20PF NP0-C0G-CERM 16V ROOM=PHOSPHORUS 01005 5% X5R-CERM 6.3V 0201-1 2.2UF 20% ROOM=MAGNESIUM 20% 6.3V 01005 0.1UF BOMOPTION=CARBON_1 ROOM=CARBON X5R-CERM 01005 4PF +/-0.1PF 16V ROOM=PHOSPHORUS NOSTUFF NP0-C0G ROOM=PHOSPHORUS 5.6PF NP0-C0G-CERM 16V 01005 +/-0.1PF NOSTUFF 100K 5% 1/32W MF 01005 ROOM=SOC BOMOPTION=CARBON_1 CRITICAL ROOM=MAGNESIUM LGA HSCDTD601A-19A 20% 0.1UF 6.3V X5R-CERM 01005 ROOM=MAGNESIUM ROOM=MAGNESIUM P2MM-NSM SM 0.1UF 10% 0201 X6S 6.3V ROOM=CARBON BOMOPTION=CARBON_1 SM P2MM-NSM ROOM=MAGNESIUM ROOM=MAGNESIUM SM P2MM-NSM SM ROOM=MAGNESIUM P2MM-NSM ROOM=PHOSPHORUS 6.3V 01005 0.1UF 20% X5R-CERM 2.2UF 6.3V ROOM=PHOSPHORUS 0201-1 20% X5R-CERM 6.3V 0.1UF 20% ROOM=PHOSPHORUS 01005 X5R-CERM X5R-CERM 20% 6.3V BOMOPTION=CARBON_1 01005 0.1UF ROOM=CARBON 2413 36241824 13 36 24 18 24 13 13 24 36 24 18 2413 24 13 2413 2413 13 2413 2413 13 24 13 13 2413 13 2413 2413 24 24 13 13 24 13 36 24 18 VDD VDDIO SPC SDI SDO DRDY GND GND GND GND GND GND CS FSYNC INT REGOUT VDD VDDIO SPC SDI SDO DRDY GND GND GND GND GND GND CS FSYNC INT REGOUT PP NC CS* SDI SDO VDD VDDIO IRQ GND SCK VPP RSV RSV RSV VDD VSS SDO SCL/SCK SDA/SDI CSB TRG/SE DRDY RSV RST* PP PP PP PP NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 26.
    IO FILTERS THIS PAGEUNIQUE TO SMALL FORM FACTOR Desense for Wifi frequencies See Page46: D10x C2531/C2507 are 2.2UF VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC. NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM UTAH POWER TI:353S00015 ST:353S00889 LPDP FILTERS AC return path for LPDP which is referenced to GND and VDD_MAIN #24543254: Need to Scrub C2520 Value VOLTAGE=2.925V LPDP_UT_BI_AP_AUX10 90_LPDP_UT_TO_AP_D0_P10 90_LPDP_UT_TO_AP_D0_N10 90_LPDP_UT_TO_AP_D1_P10 90_LPDP_UT_TO_AP_D1_N10 2 1 C2502 2 1 C2527 21C2523 21C2524 21C2525 21C2526 21 C2530 2 1 C2522 2 1 C2528 2 1 C2529 2 1 C2519 2 1 C2505 2 1 C2521 2 1 C2520 21 FL2502 2 1 C2518 A2A1 B1 B2 U2501 21 FL2506 21 FL2500 21 FL2505 2 1 C2501 2 1 C2509 2 1 C2511 2 1 C2506 2 1 C2508 2 1 C2510 2 1 C2503 2 1 C2504 21 FL2503 2 1 C2512 21 FL2501 21 FL2504 2 1 C2515 2 1 C2514 2 1 C2513 AP_TO_UT_SHUTDOWN_CONN_L UT_AND_NV_TO_STROBE_DRIVER_STROBE UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN 90_LPDP_UT_TO_AP_D1_CONN_P PP2V9_UT_AVDD_CONN PP2V8_UT_AF_VAR PP_VDD_BOOST PP1V8 90_LPDP_UT_TO_AP_D0_CONN_P 90_LPDP_UT_TO_AP_D0_CONN_N 90_LPDP_UT_TO_AP_D1_CONN_N PP1V2_UT_VDD_CONN PP3V0_UT_SVDD_CONN AP_TO_UT_CLK_CONN LPDP_UT_BI_AP_AUX_CONN 90_LPDP_UT_TO_AP_D0_N MAKE_BASE=TRUE MAKE_BASE=TRUE 90_LPDP_UT_TO_AP_D1_N MAKE_BASE=TRUE 90_LPDP_UT_TO_AP_D1_P LPDP_UT_BI_AP_AUX MAKE_BASE=TRUE PP2V8_UT_AF_VAR_CONN AP_TO_UT_SHUTDOWN_L PP1V8_UT_CONN PP1V2_UT_DVDD PP3V0_ALS_APS_CONVOY 90_LPDP_UT_TO_AP_D0_P MAKE_BASE=TRUE PP_VDD_MAIN AP_TO_UT_CLK 01005 5% 220PF 10V ROOM=RCAM_B2B C0G-CERM DSBGA ROOM=RCAM_B2B LP5907UVX2.925-S 33-OHM-25%-1500MA 0201ROOM=RCAM_B2B 0201 ROOM=RCAM_B2B 33-OHM-25%-1500MA 0201 ROOM=RCAM_B2B 33-OHM-25%-1500MA 220PF C0G-CERM 10V ROOM=RCAM_B2B 01005 5% 220PF 5% 10V C0G-CERM 01005 ROOM=RCAM_B2B 0201-1 ROOM=RCAM_B2B X5R 1.0UF 6.3V 20% ROOM=RCAM_B2B C0G-CERM 220PF 10V 01005 5% ROOM=RCAM_B2B 6.3V 20% X5R-CERM 0201-1 2.2UF 6.3V 20% 0201-1 X5R-CERM 2.2UF ROOM=RCAM_B2B 220PF C0G-CERM ROOM=RCAM_B2B 01005 10V 5% ROOM=RCAM_B2B 6.3V 20% X5R-CERM 2.2UF 0201-1 C0G-CERM 10V 01005 5% 220PF ROOM=RCAM_B2B C0G-CERM 01005 220PF 5% 10V ROOM=RCAM_B2B 150OHM-25%-200MA-0.7DCR 01005 ROOM=RCAM_B2B 10% CER-X5R 0.22UF 6.3V 01005 ROOM=RCAM_B2B 6.3V X5R-CERM 20% ROOM=RCAM_B2B 0201-1 2.2UF ROOM=RCAM_B2B 01005 NP0-C0G 100PF 5% NOSTUFF 16V 01005 0.1UF 6.3V20% X5R-CERM ROOM=RCAM_B2B 01005 0.1UF 6.3V20% X5R-CERM ROOM=RCAM_B2B X5R-CERM ROOM=RCAM_B2B 20% 01005 6.3V 0.1UF 6.3V 01005 0.1UF 20%ROOM=RCAM_B2B X5R-CERM 6.3V 01005 20% 0.1UF X5R-CERM ROOM=RCAM_B2B 150OHM-25%-200MA-0.7DCR 01005 ROOM=RCAM_B2B 01005 NP0-C0G-CERM ROOM=RCAM_B2B 5% 16V 33PF NP0-C0G-CERM 16V 5% 01005 ROOM=RCAM_B2B 33PF 5% 01005 33PF 16V ROOM=RCAM_B2B NP0-C0G-CERM 0201-1 6.3V 20% X5R-CERM ROOM=RCAM_B2B 2.2UF 6.3V 2.2UF 20% X5R-CERM 0201-1 ROOM=RCAM_B2B ROOM=RCAM_B2B 01005 5% 16V 15PF NP0-C0G-CERM 150OHM-25%-200MA-0.7DCR ROOM=RCAM_B2B 01005 5% 01005 25V ROOM=RCAM_B2B NP0-C0G-CERM 56PF 33-OHM-25%-1500MA 0201 ROOM=RCAM_B2B 56PF 01005 25V 5% NP0-C0G-CERM ROOM=RCAM_B2B 45 26 45 45 4645 18 53 38 37 32 23 19 52 48 47 46 39 29 18 17 16 13 12 11 9 8 7 5 45 45 45 45 45 45 45 45 9 45 19 29 19 53 52 46 41 40 39 37 35 34 33 31 28 27 26 23 21 19 18 10 9 4 9 GND VOUT VEN VIN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 27.
    AC return pathfor plane edge termination, which occurs near the Strobe modules. STROBE DRIVERS INSIDE NEO SIP MODULE D10/sip_neo I2C_ISP_NV_SDA46 I2C_ISP_UT_SCL48 I2C_ISP_NV_SCL46 I2C_ISP_UT_SDA48 E19 E18 E17 E16 E15 E14 E13 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D19 D18 D17 D16 D15 D14 D5 D4 D1 C20 C19 C18 C17 C16 C15 C14 C7 C6 C5 C4 C3 C2 C1 B20 B17 B16 B7 B6 B5 B4 B3 B2 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 D20 E20 B1 A1 M2600D13 B19 B18 C13 D12 D11 C11 B15 B14 B12 B11 C12 B13 M2600 D3 D2 B8 C8 B9 B10 C10 D7 D6 D10 D9 C9 D8 M2600 2 1 C2617 2 1 C2618 2 1C2614 2 1C2613 2 1C2611 2 1C2612 2 1C2609 2 1C2610 PP_VDD_MAIN PP_VDD_MAIN PP_VDD_MAIN PP_STROBE_DRIVER2_WARM_LED PP_STROBE_DRIVER1_WARM_LED PP_STROBE_DRIVER1_COOL_LED PP_STROBE_DRIVER2_COOL_LED STROBE_MODULE_NTC UT_AND_NV_TO_STROBE_DRIVER_STROBE BB_TO_STROBE_DRIVER_GSM_BURST_IND AP_TO_STROBE_DRIVER_HWEN SIP NEO NEO SIP CRITICAL NEO ROOM=STROBE SIP 01005 10V 220PF ROOM=STROBE2 5% C0G-CERM 01005 5% 10V C0G-CERM 220PF ROOM=STROBE2 01005 5% 10V C0G-CERM 220PF ROOM=STROBE 01005 5% 10V C0G-CERM 220PF ROOM=STROBE 0402-9 20% 6.3V CERM-X5R 10UF ROOM=STROBE2 20% 6.3V CERM-X5R 10UF 0402-9 ROOM=STROBE2 20% CERM-X5R ROOM=STROBE 0402-9 6.3V 10UF 0402-9 6.3V CERM-X5R 10UF ROOM=STROBE 20% 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 4544 4544 4544 4544 44 25 53 37 9 SYM 3 OF 3 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND2 GND1 GND2S GND1S GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 2 OF 3 LED1 LED1 LED2 LED2 NTC VDD VDD VDD HWEN0 SDA2 GSM0 STB0 SCL2 SYM 1 OF 3 HWEN1 LED1 LED2 LED1 LED2 NTC VDD VDD VDD GSM1 SDA1 STB1 SCL1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 28.
    From PMU GPIO14 #25761020:AddBypass 0ohm ACCESSORY BUCK #26434500: Divider to all 200kohm,0.1% #25741319: Change to 4UF #25172498 #25987909: To Resistor Divider To Tristar on Pg40 From PMU LDO6 PMU_AMUX_B3 FOR NOW From AP GPIO1 #25370332: For EMC #25919133: C2707 on P46 FET Changes per #25687842 4/12/2016 VOLTAGE=1.9V A1A2 B2 B1 U2710 6 15 2 4 3 U2701 2 1 R2702 2 1 R2704 2 1 R2703 2 1 R2706 2 1 C2710 2 1 R2710 21 R2711 2 1 C2708 2 1 XW2707 21 XW2700 A2 B2 A1 B1 Q2701 A2 B2 A1 B1 Q2700 2 1 C2700 2 1 R2700 21 L2700 2 1 C2701 A1 A2 B1 C2 C1 B2 U2700 2 1 R2705 2 1 C2703 2 1 C2705 2 1 C2704 2 1C2706 2 1 C2702 2 1 R2701 K A D2700 ACC_BUCK_FB ACC_BUCK_SW ACC_BUCK_TO_PMU_AMUX ACC_BUCK_FB AP_TO_ACC_BUCK_VSEL PP_ACC_BUCK_VAR ACT_DIODE_TO_COMP_NEG PP_ACC_VAR ACT_DIODE_TO_COMP_POS ACT_DIODE_TO_COMP_OUT PP_ACC_VAR PP_VDD_MAIN PMU_TO_ACC_BUCK_SW_EN ACC_BUCK_EN PP_VDD_MAIN_ACC_BUCK_VIN 10K 01005 MF 5% 1/32W ROOM=ACC_BUCK 220PF C0G-CERM 10V 5% ROOM=ACC_BUCK 01005 0201-1 X5R-CERM ROOM=PMU 2.2UF 20% 6.3V ROOM=PMU 0201-1 X5R-CERM 2.2UF 20% 6.3V 0.22UF 01005 6.3V ROOM=ACC_BUCK CER-X5R 10% 10UF 20% ROOM=ACC_BUCK 0402-9 6.3V CERM-X5R 100K 5% 01005 MF 1/32W ROOM=ACC_BUCK SOD962-2 ROOM=ACC_BUCK PMEG3002ESF ROOM=ACC_BUCK WLCSP-COMBO FPF1204UCX SCY992200A ROOM=ACC_BUCK UDFN 0.1% ROOM=ACC_BUCK TF 01005 1/32W 200K 200K 0.1% 1/32W TF 01005 ROOM=ACC_BUCK 200K 0.1% 1/32W TF 01005 ROOM=ACC_BUCK 200K 0.1% 1/32W TF 01005 ROOM=ACC_BUCK 6.3V 10% 0.22UF 01005 CER-X5R ROOM=ACC_BUCK ROOM=ACC_BUCK 01005 1% MF 100K 1/32W NOSTUFF 1% 0.00 1/20W MF 0201 ROOM=ACC_BUCK 6.3V 4UF ROOM=TRISTAR 0201 CER-X5R 20% OMIT SHORT-20L-0.05MM-SM NO_XNET_CONNECTION=1 ROOM=TRISTAR ACT_DIODE_TO_COMP_SENSE PLACE_NEAR=Q2700:2mm SHORT-20L-0.05MM-SM OMIT ROOM=ACC_BUCK NO_XNET_CONNECTION=1 PMCM4401VPE WLCSP ROOM=TRISTAR PMCM4401VPE ROOM=TRISTAR WLCSP 6.3V 20% ROOM=ACC_BUCK 0201-1 X5R-CERM 2.2UF 5% 100K ROOM=ACC_BUCK 01005 MF 1/32W 0.47UH-20%-2.52A-0.08OHM PIGA1608-SM ROOM=ACC_BUCK CRITICAL X5R-CERM 20% 01005 6.3V 0.1UF ROOM=ACC_BUCK FAN53612-1.5V-1.9V WLCSP 27 20 27 12 46 40 27 19 46402719 53 52 46 41 40 39 37 35 34 33 31 28 26 25 23 21 19 18 10 9 4 20 NC VIN GND VOUT ON VEE VCC VOUT NC IN- IN+ D G S D G S 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 29.
    THIS PAGE UNIQUETO SMALL FORM FACTOR P5 P4 P3 P2 P1 N7 N4 N1 M7 M6 M5 M4 M3 M2 M1 L7 L4 L1 K7 K6 K5 K4 K3 K2 K1 J7 J5 J4 J3 J1 H7 H5 H4 H3 H1 G7 G5 G4 G3 G1 F7 F5 F4 F3 F1 E7 E6 E5 E4 E3 E2 E1 D7 D4 D1 C7 C6 C5 C4 C3 C2 C1 B7 B4 B1 A7 A6 A5 A4 A3 P6 P7 A2 A1 M2800 J2 H2 G2 F2 D3 D2 B3 B2 J6 H6 G6 F6 M2800 D6 D5 B6 B5 M2800 L3 L2 N3 N2 M2800 L6 L5 N6 N5 M2800 PP_VDD_MAIN PP_VDD_MAIN BL_SW1_LX SPEAKERAMP1_LX BL_SW2_LX TIGRIS_BUCK_LX ARC1_LX SIP TRINITY SIP TRINITYTRINITY SIP TRINITY SIP SIP TRINITY 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 37 34 37 21 35 SYM 5 OF 5 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND1 GND1S GND2 GND2S GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 4 OF 5 BL1 BL2 BL1 BL2 BL1 BL1 VDD VDD VDD VDD VDD VDD SYM 1 OF 5 VDD VDD TIG TIG SYM 2 OF 5 VDD VDD ARC ARC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 30.
    CONVOY I/O SPEAKER2 #24511567: RemoveC2918 PROX, ALS, & CONVOY POWER MIC3 NEW HAMPSHIRE POWER NEW HAMPSHIRE I/O #25170697: R2915 to 240ohm/C2921 to 220pF PROX/ALS I/O #25657495: Update FL2905 to 100ohm 21 R2905 2 1 C2926 2 1 C2935 2 1 C2934 2 1 C2933 2 1C2931 2 1 C2932 2 1 C2916 21 R2915 21 FL2903 21 R2904 21 R2903 2 1 C2917 21 FL2910 2 1 C2927 2 1 C2908 2 1 FL2909 21 FL2904 21 FL2914 2 1 DZ2907 2 1 DZ2906 2 1 DZ2905 21 FL2906 2 1 C2906 2 1 C2905 2 1 C2909 2 1 C2904 2 1 C2903 2 1 C2902 21 FL2902 21 FL2908 2 1 C2911 21 FL2907 2 1 C2910 2 1 C2901 2 1 C2914 2 1 C2915 21 FL2901 2 1 C2924 2 1 FL2911 21 FL2913 2 1 C2921 PROX_BI_AP_AOP_INT_PWM_L_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N SPEAKER_TO_SPEAKERAMP2_VSENSE_P PP1V2_NH_DVDD_CONN FRONTMIC3_TO_CODEC_AIN4_P FRONTMIC3_TO_CODEC_AIN4_N PP_CODEC_TO_FRONTMIC3_BIAS ALS_TO_AP_INT_L ALS_TO_AP_INT_CONN_L PDM_CONVOY_TO_ADARE_DATA PP1V2_NH_NV_DVDD PP1V8_NH_IO_CONN AP_TO_NH_CLK_CONN PP1V8 PP2V9_NH_AVDD PDM_CONVOY_TO_ADARE_DATA_CONN PP3V0_TRISTAR_ANT_PROX PP3V0_ALS_APS_CONVOY FRONTMIC3_TO_CODEC_AIN4_CONN_P FRONTMIC3_TO_CODEC_AIN4_CONN_N PP_CODEC_TO_FRONTMIC3_BIAS_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_N PP3V0_PROX_CONN PP3V0_ALS_CONVOY_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P SPEAKERAMP2_TO_SPEAKER_OUT_NEG SPEAKERAMP2_TO_SPEAKER_OUT_POS PROX_BI_AP_AOP_INT_PWM_L AP_TO_NH_CLK AP_TO_NH_SHUTDOWN_CONN_LAP_TO_NH_SHUTDOWN_L PP2V9_NH_AVDD_CONN PDM_ADARE_TO_CONVOY_CLK_CONNPDM_ADARE_TO_CONVOY_CLK 1/32W 5% 100 01005 MF ROOM=FOREHEAD 5% 01005 NO_XNET_CONNECTION=1 ROOM=FOREHEAD C0G-CERM 10V 220PF 5% NO_XNET_CONNECTION=1 220PF 10V C0G-CERM 01005 ROOM=FOREHEAD C0G-CERM 220PF 5% 10V NO_XNET_CONNECTION=1 01005 ROOM=FOREHEAD C0G-CERM ROOM=FOREHEAD 5% 10V 01005 220PF NO_XNET_CONNECTION=1 C0G-CERM 01005 220PF 10V ROOM=FOREHEAD 5% NO_XNET_CONNECTION=1 2.2UF 6.3V X5R-CERM ROOM=FOREHEAD 20% 0201-1 240 1% 1/32W ROOM=FOREHEAD 01005 MF 10-OHM-750MA ROOM=FOREHEAD 01005-1 ROOM=FOREHEAD 0% MF 1/32W 01005 0.00 ROOM=FOREHEAD MF 01005 1/32W 0% 0.00 X5R-CERM 6.3V 20% ROOM=FOREHEAD 0201-1 2.2UF 5% 01005 220PF 10V C0G-CERM ROOM=FOREHEAD ROOM=FOREHEAD 01005 150OHM-25%-200MA-0.7DCR 2.2UF X5R-CERM 6.3V 20% ROOM=FOREHEAD 0201-1 C0G-CERM 10V 5% 01005 ROOM=FOREHEAD 220PF 150OHM-25%-200MA-0.7DCR 01005 ROOM=FOREHEAD 150OHM-25%-200MA-0.7DCR ROOM=FOREHEAD 01005 ROOM=FOREHEAD 01005 150OHM-25%-200MA-0.7DCR NO_XNET_CONNECTION=1 ROOM=FOREHEAD 6.8V-100PF01005 NO_XNET_CONNECTION=1 6.8V-100PF01005ROOM=FOREHEAD 6.8V-100PF ROOM=FOREHEAD 01005 ROOM=FOREHEAD 150OHM-25%-200MA-0.7DCR 01005 ROOM=FOREHEAD 56PF 5% NP0-C0G-CERM 25V 01005 01005 NP0-C0G-CERM ROOM=FOREHEAD 56PF 25V 5% ROOM=FOREHEAD 0201-1 2.2UF X5R-CERM 6.3V 20% ROOM=FOREHEAD 01005 220PF C0G-CERM 10V 5% 5% 10V C0G-CERM 220PF 01005 ROOM=FOREHEAD ROOM=FOREHEAD 5% 10V C0G-CERM 220PF 01005 33-OHM-25%-1500MA 0201 ROOM=FOREHEAD ROOM=FOREHEAD 150OHM-25%-200MA-0.7DCR 01005 10V 01005 ROOM=FOREHEAD C0G-CERM 220PF 5% 01005 ROOM=FOREHEAD 150OHM-25%-200MA-0.7DCR 01005 25V 5% NP0-C0G-CERM 56PF ROOM=FOREHEAD ROOM=FOREHEAD 0.1UF X5R-CERM 6.3V 20% 01005 ROOM=FOREHEAD 0.1UF X5R-CERM 6.3V 20% 01005 ROOM=FOREHEAD X5R-CERM 6.3V 0.1UF 20% 01005 ROOM=FOREHEAD 33-OHM-25%-1500MA 0201 ROOM=FOREHEAD 56PF NP0-C0G-CERM 25V 5% 01005 150OHM-25%-200MA-0.7DCR ROOM=FOREHEAD 01005 ROOM=FOREHEAD 01005 150OHM-25%-200MA-0.7DCR C0G-CERM 10V 5% 01005 ROOM=FOREHEAD 220PF 45 45 33 45 31 31 32 12 45 33 19 45 45 48 47 46 39 25 18 13 12 11 9 8 7 5 19 45 53 41 40 19 25 19 45 45 45 33 45 45 464533 46 45 33 13 12 9 9 45 4533 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 31.
    6 OF 81 6OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 32.
    WAS FOR RECEIVER;REPLACED BY SPEAKER IN D1xy CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS) AC return path for Mikeybus which is referenced to GND and VDD_MAIN For Borealis Radar 21203307 2 1 R3101 2 1 C3112 2 1 C3113 B9 A9 G10 D1 E1 M10 M4 L10 M5 K11 K10 J9 J12 H12 B2 A2 B3 A3 C3 C4 B4 A4 L8 M8 L9 M9 G2 G3 F2 F3 F1 G1 J3 J4 K2 K1 K3 L3 L2 L1 U3101 21 C3106 21 R3103 21 R3104 21 C3107 MIKEYBUS_REFERENCE PDM_CODEC_TO_SPKAMP2_CLK LOWERMIC1_TO_CODEC_AIN1_P LOWERMIC1_TO_CODEC_AIN1_N LOWERMIC4_TO_CODEC_AIN2_N FRONTMIC3_TO_CODEC_AIN4_N REARMIC2_TO_CODEC_AIN3_P 90_MIKEYBUS_DATA_P 90_MIKEYBUS_DATA_N PP_VDD_MAIN 90_MIKEYBUS_CALTRA_DATA_N 90_MIKEYBUS_CALTRA_DATA_P REARMIC2_TO_CODEC_AIN3_N FRONTMIC3_TO_CODEC_AIN4_P PDM_CODEC_TO_SPKAMP2_DATA HAWKING_TO_CODEC_AIN7_P HAWKING_TO_CODEC_AIN7_N LOWERMIC4_TO_CODEC_AIN2_P ROOM=CODEC NP0-C0G 01005 100PF 5% 16V MF 01005 5% ROOM=CODEC 1/32W 20.0 20.0 MF 1/32W 5% 01005 ROOM=CODEC NP0-C0G 01005 100PF 5% 16V ROOM=CODEC 5% 01005 1/32W MF 100 ROOM=CODEC ROOM=CODEC C0G-CERM 220PF 10V 01005 5% ROOM=CODEC C0G-CERM 220PF 10V 01005 5% CRITICAL CS42L71 WLCSP-1 ROOM=CODEC 41 33 41 41 41 29 44 40 40 53 52 46 41 40 39 37 35 34 33 28 27 26 25 23 21 19 18 10 9 4 44 29 33 44 44 41 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NCSYM 1 OF 3 HS3_REF HS4_REF HPDETECT HPOUTB HS3 HS4 AOUT2- HSIN+ HSIN- HPOUTA AOUT1+ AOUT1- AOUT2+ MBUS_REF DN DP AIN1+ AIN1- AIN2+ AIN2- AIN3+ AIN3- AIN4- AIN4+ AIN5- AIN5+ AIN6- AIN6+ AIN7+ AIN7- DMIC3_DATA DMIC3_CLK DMIC2_CLK DMIC2_DATA DMIC4_CLK DMIC1_DATA DMIC1_CLK PDM_CLK DMIC4_DATA PDM_DATA NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 33.
    CALTRA AUDIO CODEC(POWER & I/O) 2 1 XW3203 2 1 R3202 2 1 C3222 2 1 C3223 2 1 C3224 2 1 C3225 2 1 XW3202 2 1 C3221 A10 A11 B11 C11 K8 K4 E7 E6 E5 D6 D5 B10 D11 M1 H4 G11 E9 E8 D9 D7 D10 C10 H3 A7 D8 B7 C7 B8 A8 C12 D3 C2 D2 D4 K9 J8 H9 H8 H7 H6 G9 G8 G7 G6 G5 G4 F10 F9 F8 F7 F6 F5 F4 E10 E4 E3 E2 B12 A12 A1 H5 J5 C9 C8 B6 B5 C6 C5 U3101 H11 H10 M7 A5 E12 C1 G12 D12 J11 J1 J10 K5 J6 L5 K6 J7 L6 K7 M6 M11 F12 M2 M3 L7 L4 F11 E11 B1 A6 L11 J2 K12 M12 L12 H1 H2 U3101 2 1 C3205 2 1 C3209 2 1 C3212 2 1 C3214 2 1 C3217 21 C3202 2 1 C3215 2 1 C3213 2 1 C3220 2 1 C3211 21 C3201 21 C3204 21 C3203 2 1 C3208 2 1 R3201 I2S_L26_CODEC_TO_MAGGIE_DIN I2S_AOP_TO_CODEC_XSP_DOUT I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_XSP_TO_AOP_DIN I2S_AP_TO_CODEC_MSP_BCLK SPI_CODEC_MAGGIE_TO_AP_MISO SPI_AP_TO_CODEC_MAGGIE_SCLK I2S_CODEC_XSP_TO_AOP_LRCLK I2S_CODEC_XSP_TO_AOP_BCLK AUDIO_TO_AOP_INT_L I2S_AP_TO_CODEC_MSP_DOUT CODEC_RESET_L PP1V8_SDRAM I2S_CODEC_TO_AP_MSP_DIN SPI_AP_TO_CODEC_MAGGIE_MOSI PMU_TO_CODEC_DIGLDO_PULLDN SPI_AP_TO_CODEC_CS_L CODEC_AGND I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2S_MAGGIE_TO_L26_CODEC_DOUT CALTRA_LP_FILTP PP1V2_VD_FILT PP_VDD_BOOST PP1V8_VA PP_CODEC_TO_FRONTMIC3_BIAS PP1V8_SDRAM FRONTMIC3_TO_CODEC_BIAS_FILT_RET REARMIC2_TO_CODEC_BIAS_FILT_RET LOWERMIC1_TO_CODEC_BIAS_FILT_RET FRONTMIC3_BIAS_FILT_IN PP_CODEC_TO_LOWERMIC1_BIAS LOWERMIC1_BIAS_FILT_IN PP_CODEC_TO_REARMIC2_BIAS REARMIC2_BIAS_FILT_IN LOWERMIC4_TO_CODEC_BIAS_FILT_RET LOWERMIC4_BIAS_FILT_IN PP_CODEC_TO_LOWERMIC4_BIAS I2S_AP_TO_CODEC_MCLK I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK CALTRA_FILTP CODEC_AGND 2.2UF X5R-CERM 6.3V 20% 0201-1 ROOM=CODEC 2.2UF 6.3V 20% 0201-1 ROOM=CODEC X5R-CERM 0.1UF X5R-CERM 6.3V 20% 01005 ROOM=CODEC X5R-CERM 01005 0.1UF 6.3V 20% ROOM=CODEC 1.0UF X5R 6.3V 20% 0201-1 ROOM=CODEC 402 20% 6.3V X5R-CERM1 4.7UF ROOM=CODEC ROOM=CODEC 6.3V 20% 01005 0.1UF X5R-CERM 01005 ROOM=CODEC X5R-CERM 6.3V 20% 0.1UF 0.1UF X5R-CERM 6.3V 20% 01005 ROOM=CODEC ROOM=CODEC 10UF CERM-X5R 6.3V 20% 0402-9 402 20% 6.3V ROOM=CODEC 4.7UF X5R-CERM1 ROOM=CODEC 6.3V 20% 402 4.7UF X5R-CERM1 4.7UF 6.3V 20% 402 X5R-CERM1 ROOM=CODEC ROOM=CODEC CERM-X5R 10UF 6.3V 20% 0402-9 ROOM=CODEC 1.00K 5% 1/32W MF 01005 NO_XNET_CONNECTION OMIT ROOM=FOREHEAD SHORT-20L-0.05MM-SM ROOM=CODEC 100K 5% 1/32W MF 01005 ROOM=CODEC 1.0UF X5R 6.3V 20% 0201-1 1.0UF ROOM=CODEC X5R 6.3V 20% 0201-1 0201-1 ROOM=CODEC 1.0UF 20% X5R 6.3V ROOM=CODEC 1.0UF X5R 6.3V 20% 0201-1 ROOM=CODEC SHORT-10L-0.1MM-SM 1.0UF X5R 6.3V 20% 0201-1 ROOM=CODEC WLCSP-1 CRITICAL CS42L71 ROOM=CODEC WLCSP-1 ROOM=CODEC CS42L71 CRITICAL 36 35 34 33 13 11 13 11 36 11 36 11 13 13 35 34 33 13 11 53 52 48 47 41 40 37 36 32 21 20 18 16 11 36 11 20 11 32 36 35 34 33 11 36 35 34 33 53 38 37 25 23 19 35 34 33 19 29 53 52 48 47 41 40 37 36 32 21 20 18 16 45 41 41 44 41 41 11 36 35 34 33 11 32 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC SYM 3 OF 3 DIGLDO_PDN GND TSTO TSTO TSTO RESET* GND MSP_LRCK/FSYNC MCLK XSP_SDIN/DAC2B_MUTE XSP_SDOUT GND TSTI TSTI MOSI GND DIGLDO_PULLDN MSP_SCLK MSP_SDOUT MSP_SDIN ASP_LRCK/FSYNC ASP_SDIN ASP_SCLK MISO CCLK CS* WAKE* GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND TSTI TSTI TSTI TSTI TSTI TSTO TSTO TSTI TSTI TSTO TSTO JTAG_TCK JTAG_TDI JTAG_TDO TSTO JTAG_TMS XSP_LRCK/FSYNC XSP_SCLK ASP_SDOUT INT* SYM 2 OF 3 VP_MBUS VPROG_CP HS_BIAS_FILT HS_BIAS_FILT_REF MIC4_BIAS_FILT MIC2_BIAS MIC2_BIAS_FILT MIC3_BIAS MIC3_BIAS_FILT MIC1_BIAS_FILT MIC1_BIAS GNDP GNDA FILT- FILT+ FLYP GNDCP FLYN LP_FILT+ -VCP_FILT +VCP_FILT FLYC VCP VD VD VL VD_FILT VD_FILT VP VA MIC4_BIAS GNDHS GNDD GNDD GNDD GNDD NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 34.
    (North)SPEAKER AMPLIFIER 2 Pg46:Compass Compensation Coil I2C2_AP_SCL47 PDM_ADARE_TO_CONVOY_CLK I2C2_AP_SDA47 2 1 C3318 E2 E3 A5 B1 A1 D1 C1 F5 B2 A2 B6 D7 D6 C7 E6 A6 D5 E7 F7 D2 C2 B7 C6 F1 E1 A7 D4 D3 C5 C4 C3 B4 B3 A4 A3 F2 E4 B5 F4 F6 F3 E5 U3301 2 1 R33042 1 R3301 2 1 C3319 2 1C3331 2 1 C3323 2 1 C3311 2 1 C3312 2 1C3327 2 1 C3324 2 1 C3325 2 1 C3306 2 1 C3308 21 L3302 2 1C3326 2 1C3328 2 1 C3316 2 1C3329 2 1 C3315 2 1C3313 SPKAMP1_TO_SPKAMP2_SYNC AP_TO_SPKAMP2_RESET_L SPEAKERAMP2_ISENSE_P SPEAKERAMP2_ISENSE_N SPEAKERAMP2_TO_SPEAKER_OUT_NEG SPEAKERAMP2_TO_SPEAKER_OUT_POS PP_SPKR2_VBOOST PP1V8_VA I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK PDM_ADARE_TO_CONVOY_CLK MAKE_BASE=TRUE PDM_CODEC_TO_SPKAMP2_CLK SPEAKERAMP2_FILT SPEAKER_TO_SPEAKERAMP2_VSENSE_P I2S_AOP_TO_MAGGIE_L26_MCLK I2S_MAGGIE_TO_L26_CODEC_DOUT I2S_L26_CODEC_TO_MAGGIE_DIN PDM_CODEC_TO_SPKAMP2_DATA PDM_CONVOY_TO_ADARE_DATA SPEAKERAMP2_LX AUDIO_TO_AOP_INT_L PP_VDD_MAIN SPEAKER_TO_SPEAKERAMP2_VSENSE_N ROOM=SPKAMP2 0402-9 20% 6.3V CERM-X5R 10UF 402-1 10% 10V X5R 1UF ROOM=SPKAMP2 WLCSP ROOM=SPKAMP2 CS35L26-A1 CRITICAL 01005 MF 1/32W 5% 100K ROOM=SPKAMP2 01005 5% ROOM=SPKAMP2 100K 1/32W MF 6.3V 0.01UF 01005 10% X5R ROOM=SPKAMP2 NO_XNET_CONNECTION 1000PF 10V ROOM=SPKAMP2 01005 X5R 10% ROOM=SPKAMP2 01005 10% 10V 1000PF X5R 0201 10% 16V X5R-CERM 0.1UF ROOM=SPKAMP2 5% 10V C0G-CERM 220PF ROOM=SPKAMP2 01005 0402-8 20% 10V X5R-CERM 10UF ROOM=SPKAMP2 0402-8 10V X5R-CERM ROOM=SPKAMP2 10UF 20% 10UF X5R-CERM 20% 10V ROOM=SPKAMP2 0402-8 ROOM=SPKAMP2 X5R-CERM 20% 10V 10UF 0402-8 10V X5R-CERM 20% 10UF 0402-8 ROOM=SPKAMP2 1.2UH-20%-3.0A-0.080OHM ROOM=SPKAMP2 PIQA20161T-SM CRITICAL 0402-9 20% 6.3V CERM-X5R 10UF ROOM=SPKAMP2 0402-9 20% 6.3V CERM-X5R 10UF ROOM=SPKAMP2 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=SPKAMP2 2.2UF 6.3V 0201-1 20% ROOM=SPKAMP2 X5R-CERM 01005 20% 6.3V 0.1UF ROOM=SPKAMP2 X5R-CERM 34 12 464529 464529 35343219 36 35 34 32 11 36 35 34 32 11 29 31 29 36 35 34 13 36 35 34 32 36 35 34 32 31 29 35 34 32 13 53 52 46 41 40 39 37 35 34 31 28 27 26 25 23 21 19 18 10 9 4 29 VP PDM_CLK0 AD0/PDM_CLK1 VBST_A SW SW FILT+ GNDP GNDA ISNS+ ISNS- VSNS+ VSNS- OUT+ OUT- VBST_A VBST_B VBST_B SDA ALIVE/SYNC MCLK SCLK LRCK/FSYNC SDIN SDOUT SCL VA PDM_DATA0 PDM_DATA1 AD1 INT* RESET* 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 35.
    TO TRINITY SPEAKER AMPLIFIER1 (South) PULLED LOW ON PG 35 #25112685,Remove C3414 See SPKAMP1 C3424 on Pg46 MAKE_BASE=TRUE I2C_AOP_SCL48 GND I2C_AOP_SDA48 2 1 C3429 E2 E3 A5 B1 A1 D1 C1 F5 B2 A2 B6 D7 D6 C7 E6 A6 D5 E7 F7 D2 C2 B7 C6 F1 E1 A7 D4 D3 C5 C4 C3 B4 B3 A4 A3 F2 E4 B5 F4 F6 F3 E5 U3402 2 1 C3430 2 1C3407 2 1C3405 2 1 C3427 2 1 C3425 2 1 C3426 2 1 C3428 2 1 C3403 2 1 C3404 2 1 C3431 2 1C3422 2 1 C3434 2 1 C3432 I2S_MAGGIE_TO_L26_CODEC_DOUT SPEAKERAMP1_LX SPEAKER_TO_SPEAKERAMP1_VSENSE_P I2S_AOP_TO_MAGGIE_L26_MCLK SPEAKERAMP1_ISENSE_N SPEAKERAMP1_ISENSE_P PP_SPKR1_VBOOST AOP_TO_SPKAMP1_ARC_RESET_L AUDIO_TO_AOP_INT_L I2S_L26_CODEC_TO_MAGGIE_DIN SPKAMP1_TO_SPKAMP2_SYNC SPEAKER_TO_SPEAKERAMP1_VSENSE_N I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK PP1V8_VA SPEAKERAMP1_TO_SPEAKER_OUT_NEG SPEAKERAMP1_TO_SPEAKER_OUT_POS SPEAKERAMP1_FILT PP_VDD_MAIN 1000PF X5R 10V 10% 01005 ROOM=SPKAMP1 ROOM=SPKAMP1 1000PF X5R 10V 10% 01005 ROOM=SPKAMP1 X5R-CERM 0201-1 6.3V 20% 2.2UF CS35L26-A1 CRITICAL WLCSP ROOM=SPKAMP1 0.01UF X5R 6.3V 10% 01005 ROOM=SPKAMP1 NO_XNET_CONNECTION X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 10UF CERM-X5R 6.3V 20% 0402-9 ROOM=SPKAMP1 10UF 10UF X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 220PF C0G-CERM 10V 5% 01005 ROOM=SPKAMP1 01005 X5R-CERM 6.3V 0.1UF20% ROOM=SPKAMP1 2.2UF X5R-CERM 6.3V 20% 0201-1 ROOM=SPKAMP1 0.1UF X5R-CERM 16V 10% 0201 ROOM=SPKAMP1 10UF X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 10UF X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 10UF X5R-CERM 10V 20% 0402-8 ROOM=SPKAMP1 36 35 33 32 28 41 36 35 33 13 35 13 35 33 32 13 36 35 33 32 33 41 36 35 33 32 11 36 35 33 32 11 35333219 41 41 53 52 46 41 40 39 37 35 33 31 28 27 26 25 23 21 19 18 10 9 4 VP PDM_CLK0 AD0/PDM_CLK1 VBST_A SW SW FILT+ GNDP GNDA ISNS+ ISNS- VSNS+ VSNS- OUT+ OUT- VBST_A VBST_B VBST_B SDA ALIVE/SYNC MCLK SCLK LRCK/FSYNC SDIN SDOUT SCL VA PDM_DATA0 PDM_DATA1 AD1 INT* RESET* NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 36.
    TO TRINITY ARC DRIVER NCFROM HOMER PER #25452686 #25742582,Add back C3531 for D10x at Pg46 0201 C3525 is at Pg46 See ARC1 C3530 at Pg46 VOLTAGE=8.0V PP1V8_VA I2C_AOP_SDA48 VOLTAGE=8.0V VOLTAGE=8.0V I2C_AOP_SCL48 2 1 C3536 2 1C3501 E2 E3 A5 B1 A1 D1 C1 F5 B2 A2 B6 D7 D6 C7 E6 A6 D5 E7 F7 D2 C2 B7 C6 F1 E1 A7 D4 D3 C5 C4 C3 B4 B3 A4 A3 F2 E4 B5 F4 F6 F3 E5 U3502 2 1 C3528 2 1 R3508 2 1C3532 2 1 C3526 2 1 C3527 2 1 C3534 2 1 C3535 2 1 C3537 2 1 C3524 2 1 C3538 2 1C3529 2 1 C3542 2 1 C3539 MAKE_BASE=TRUEPP1V8_VA PP1V8_VA I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK PP_ARC1_VBOOST SOLENOID1_TO_ARC1_VSENSE_NEG SOLENOID1_TO_ARC1_VSENSE_POS ARC1_ISENSE_N ARC1_ISENSE_P ARC1_FILT I2S_L26_CODEC_TO_MAGGIE_DIN I2S_MAGGIE_TO_AP_L26_CODEC_BCLK AOP_TO_SPKAMP1_ARC_RESET_L ARC1_TO_SOLENOID1_OUT_POS ARC1_TO_SOLENOID1_OUT_NEG I2S_MAGGIE_TO_L26_CODEC_DOUT I2S_AOP_TO_MAGGIE_L26_MCLK AUDIO_TO_AOP_INT_L ARC1_LX PP_VDD_MAIN 1000PF X5R 10V 10% 01005 ROOM=ARC1 ROOM=ARC1 X5R-CERM 0201-1 6.3V 20% 2.2UF 16V ROOM=ARC1 01005 CERM 5% 10PF NOSTUFF CRITICAL CS35L26-A1 WLCSP ROOM=SPKAMP2 X5R-CERM 0402-8 10UF 10V 20% ROOM=ARC1 NO_XNET_CONNECTION 01005 0.01UF X5R 6.3V 10% ROOM=ARC1 01005 MF 1/32W 5% 100K ROOM=ARC1 0402-9 10UF 6.3V ROOM=ARC1 20% CERM-X5R 220PF C0G-CERM 10V 5% 01005 ROOM=ARC1 ROOM=ARC1 0.1UF X5R-CERM 6.3V 20% 01005 0201-1 X5R-CERM ROOM=ARC1 2.2UF 6.3V 20% 0.1UF X5R-CERM 16V 10% 0201 ROOM=ARC1 10UF X5R-CERM 10V 20% 0402-8 ROOM=ARC1 10UF 0402-8 X5R-CERM 20% ROOM=ARC1 10V 20% 10UF X5R-CERM 10V 0402-8 ROOM=ARC1 1000PF 10V 10% 01005 ROOM=ARC1 X5R 35 34 33 32 19 3534333219 36 34 33 32 11 41 41 36 34 33 32 36 34 33 32 11 34 13 41 41 36 34 33 32 36 34 33 13 34 33 32 13 28 53 52 46 41 40 39 37 34 33 31 28 27 26 25 23 21 19 18 10 9 4 NC NC NC VP PDM_CLK0 AD0/PDM_CLK1 VBST_A SW SW FILT+ GNDP GNDA ISNS+ ISNS- VSNS+ VSNS- OUT+ OUT- VBST_A VBST_B VBST_B SDA ALIVE/SYNC MCLK SCLK LRCK/FSYNC SDIN SDOUT SCL VA PDM_DATA0 PDM_DATA1 AD1 INT* RESET* 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 37.
    NOTE: RESET HASINTERNAL 65K PULLUP #24543115: Scrub Value MAGGIE LDO MAGGIEAPN: 336S00020 STM32L03 APN: 337S00231 MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC MAGGIE <-> AP (SDOUT) APN: 353S00842 MAGGIE <-> ARC, SPKRS, CODEC (SDOUT) MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC MAGGIE <-> AP (SDIN) MAGGIE <-> ARC, SPKRS, CODEC (SDIN) VPP_2V5 must be > 1.71V for SPI Slave programming HOMER STM32L0 MICRO D4 B3 C4 A4 A5 C3 A6 B6 C6 A2 B5 F1 E1 D1 F2 B2 C1 E2 D2 B1 C2 E3 F3 E4 F4 B4 E5 F5 D5 D6 E6 F6 A1 C5 A3 D3 U3602 1PP3602 1PP3601 2 1 R3611 21 R3607 2 1C3603 A2A1 B2 B1 U3603 E1 C4 D1 D5 C5 B5 A4 A3 B2 D2 E2 A2 A1 C2 B1 C1 C3 E3 D3 B3 E4 D4 B4 E5 A5 U3601 2 1 R3603 2 1 C3607 2 1 C3606 2 1 R3605 21 R3604 2 1 R3602 2 1 C3602 2 1 C3605 21 R3601 2 1 C3604 2 1 C3601 MAGGIE_TO_HOMER_WAKE PP1V2_MAGGIE AP_TO_MAGGIE_CRESETB_L SPI_AP_TO_MAGGIE_CS_L I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK SPI_CODEC_MAGGIE_TO_AP_MISO SPI_AP_TO_CODEC_MAGGIE_MOSI I2S_AP_TO_MAGGIE_DOUT I2S_L26_CODEC_TO_MAGGIE_DIN SPI_AP_TO_CODEC_MAGGIE_SCLK PP1V2_MAGGIE_PLL MAGGIE_TO_AP_CDONE I2S_MAGGIE_TO_AP_L26_CODEC_BCLK_R UART_AOP_TO_MAGGIE_TXD I2S_MAGGIE_TO_AP_DIN I2S_AOP_TO_MAGGIE_L26_MCLK I2S_MAGGIE_TO_L26_CODEC_DOUT PP1V8_MAGGIE_IMU PP1V8_SDRAM I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SPI_HOMER_TO_MAGGIE_POS_MISO SWD_AP_TO_MANY_SWCLK SWD_AP_BI_HOMER_SWDIO SPI_MAGGIE_TO_HOMER_POS_MOSI AP_BI_HOMER_BOOTLOADER_ALIVEI2C_HOMER_SDA SPI_MAGGIE_TO_HOMER_POS_SCLK PMU_TO_HOMER_RESET_L MAGGIE_TO_HOMER_WAKE UART_AP_TO_HOMER_TXD UART_HOMER_TO_AP_RXD PP1V8_SDRAM I2C_HOMER_SCL HOMER_TO_AOP_WAKE_INT AP_BI_HOMER_BOOTLOADER_ALIVE_R PP1V8_MAGGIE_IMU MAGGIE_TO_AOP_INT AOP_TO_MAGGIE_EN ICE5LP4K-SWG36I CRITICAL WLCSP ROOM=ARC_CTRL SM P2MM-NSM ROOM=HOMER SM ROOM=HOMER P2MM-NSM 01005 5% MF 1/32W 27K ROOM=HOMER 1/32W MF ROOM=HOMER 5% 100 01005 6.3V 20% ROOM=HOMER 2.2UF X5R-CERM 0201-1 CSP LD39130S-1.2V/AP ROOM=HOMER WLCSP STM32L031E6Y6D 511K 1% MF 01005 1/32W 2.2UF X5R-CERM 20% 6.3V ROOM=ARC_CTRL 0201-1 ROOM=HOMER X5R-CERM 6.3V 20% 0.1UF 01005 ROOM=ARC_CTRL 0.1UF X5R-CERM 6.3V 20% 01005 20% 0.1UF 01005 ROOM=ARC_CTRL X5R-CERM 6.3V MF 5% 1/32W 01005 10K 01005 33.2 1/32W MF 1% ROOM=ARC_CTRL 10K 5% 1/32W MF 01005 20% 01005 ROOM=ARC_CTRL X5R-CERM 6.3V 0.1UF 0201 20% ROOM=ARC_CTRL 6.3V CER-X5R 4UF MF 1/32W 100 5% ROOM=ARC_CTRL 01005 36 12 9 35 34333211 3211 3211 11 35343332 3211 12 13 11 35343313 35343332 362418 53 52 48 47 41 40 37 36 32 21 20 18 16 3534333211 53 17 13 13 12 47 41 20 36 12 12 53 52 48 47 41 40 37 36 32 21 20 18 16 47 41 13 36 24 18 13 13 BANK2BANK0 BANK1 RGB1 RGB2 GND_LED IOB_7B GND VCCIO_2 VCCIO_0 VPP_2V5 VCC CRESET_B IOB_32A_SPI_SO IOB_31B IOB_30A IOB_29B IOB_27B IOB_26A IOB_25B_G3 IOB_20A IOB_16A IOB_11B_G5 IOB_12A_G4_CDONE IOB_10A SPI_VCCIO1 IOB_6A IOB_5B IOB_4A IOB_3B_G6 IOB_2A IOT_46B_G0 RGB0 IRLED GND VCCPLL IOB_34A_SPI_SCK IOB_35B_SPI_CSN IOB_33B_SPI_SI PP PP EN OUT GND IN VDDAVDD PC15_OSC32_OUT PC14_OSC32_IN PB1 PB0 PB7 PB6 PB3 RST* BOOT0 VSSA PA1 PA6 PA5 PA4 PA3 PA2 PA0_CLK_IN PA7 PA13 PA10 PA9 PA8 PA14 NC NC NC NC NC NC NC NC NC NC NC NC NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 38.
    #26634069:D1x, C3715/C3716 to138S0719 0402 4.7uF 6.3V LED BACKLIGHT DRIVER - 6LED APN:353s00640 TO TRINITY #24543286: Densense Cap for Chestnut Charge Pump MOJAVE MESA BOOST APN:353S00671 CHESTNUT DISPLAY PMU 25V 25V APN:338S1172 200K INT PD NO INT PULL DISPLAY & TOUCH - POWER SUPPLIES NO INT PULL C3722 See Page46 I2C0_AP_SDA47 I2C0_AP_SCL2047 I2C0_AP_SCL47 I2C0_AP_SDA47 2 1 C3726 2 1 C3727 2 1 C3711 2 1 C3703 2 1 C3721 2 1 C3705 2 1 C3706 2 1 C3704 2 1 C3725 2 1C3724 2 1 R3701 2 1 C3709 KA D3701 A K D3702 2 1C3702 D3 D1 A4 A3 C4 C2 B2 A2 C3 A1 B1 C1 D2 D4 B4 B3 U3701 2 1 C3717 2 1 L3704 21 L3703 2 1 C3708 C3A2 B1 C1 A1 C2 A3 B2 B3 U3702 2 1 C3715 2 1 C3719 2 1 C3720 2 1C3718 2 1 C3712 2 1 C3713 2 1 C3714 2 1C3710 2 1 C3716 E2 E3 D1 A2 B2 D2 D3 C2 D4 B1 B3 C3 A1 A3 A4 B4 E4 C4 C1 E1 U3703 2 1 C3707 PP6V0_LCM_BOOST AP_TO_MUON_BL_STROBE_EN PP_LCM_BL_CAT1 MESA_TO_BOOST_EN BL_SW1_LX PP16V0_MESA PP17V0_MOJAVE_LDOIN PP_VDD_MAIN POS18V0_MESA_LX PP_VDD_BOOST PP_VDD_MAIN PP1V8_SDRAM DWI_PMGR_TO_BACKLIGHT_DATA PP_LCM_BL_CAT2 BL_SW2_LX DWI_PMGR_TO_BACKLIGHT_CLK CHESTNUT_TO_PMU_ADCMUX PMU_TO_AOP_TRISTAR_ACTIVE_READY BB_TO_STROBE_DRIVER_GSM_BURST_IND PP_CHESTNUT_CP LCM_TO_CHESTNUT_PWR_EN PP_VDD_MAIN CHESTNUT_LX PN_CHESTNUT_CN PP5V7_MESON_AVDDH PN5V7_LCM_MESON_AVDDN PP_LCM_BL_ANODE PP5V7_LCM_AVDDH PP5V1_TOUCH_VDDH X5R-CERM VOLTAGE=10V 20% 0402-8 10UF ROOM=CHESTNUT NP0-C0G-CERM 5% 25V 01005 56PF ROOM=CHESTNUT NOSTUFF 5% 25V 01005 NP0-C0G-CERM NOSTUFF ROOM=CHESTNUT 56PF ROOM=CHESTNUT 0201 16V 20% 1UF CER-X5R 0201 PLACE_NEAR=U3701:2MM ROOM=BACKLIGHT C0G 220PF 2% 50V 35V 0402 X5R 2.2UF 20% 35V X5R 2.2UF 20% 0402 35V 2.2UF 20% 0402 X5RX5R 35V 0402 2.2UF 20% 2.2UF 35V 0402 X5R 20% 10UF CERM-X5R 6.3V 20% 0402-9 ROOM=MOJAVE 01005 1/32W MF ROOM=BACKLIGHT 1% 200K 100PF NP0-C0G 35V 5% ROOM=MOJAVE 01005 CRITICAL ROOM=BACKLIGHT NSR05F30NXT5G DSN2 CRITICAL NSR0530P2T5G ROOM=BACKLIGHT SOD-923-1 0402-9 20% VOLTAGE=6.3V 10UF ROOM=BACKLIGHT CERM-X5R CRITICAL LM3539A1 DSBGA ROOM=BACKLIGHT C0G-CERM 10V 5% 01005 ROOM=CHESTNUT 220PF CRITICAL 1.0UH-20%-2.25A-0.15OHM PIXB2016FE-SM ROOM=CHESTNUT ROOM=MOJAVE 1.0UH-20%-0.4A-0.636OHM 0403 CRITICAL ROOM=MOJAVE 100PF NP0-C0G 35V 5% 01005 ROOM=MOJAVE CRITICAL BGA LM3638A0 X5R-CERM 4.7UF ROOM=CHESTNUT 10V 20% 0402 20% 35V X5R 2.2UF ROOM=MOJAVE 0402 20% 35V X5R 2.2UF ROOM=MOJAVE 0402 10UF CERM-X5R 6.3V 20% 0402-9 ROOM=MOJAVE 10UF X5R-CERM ROOM=CHESTNUT 10V 20% 0402-8 10V 10UF 20% X5R-CERM 0402-8 ROOM=CHESTNUT 20% ROOM=CHESTNUT 0402-8 10UF 10V X5R-CERM 10UF CERM-X5R 6.3V 20% 0402-9 ROOM=CHESTNUT 20% 10V X5R-CERM ROOM=CHESTNUT 4.7UF 0402 BGA ROOM=CHESTNUT TPS65730A0PYFF CRITICAL 9 39 38 4 28 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 38 32 25 23 19 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 48 47 41 40 36 32 21 20 18 16 11 39 28 11 20 40 20 13 7 53 26 39 20 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 39 39 39 39 39 SDI VIO/HWEN SCK SDA TRIG SW2_1 SW2_2 SCL SW1 IN OUT LED1 LED2 INHIBIT GND GND PMID VOUT EN_S LDOIN EN_M SW VIN PGND AGND HVLDO3 HVLDO2 HVLDO1 VNEG(SUB) VNEG AGND PGND2 PGND1 CPUMP LCMBST CF1 CF2 ADCMUX RESET* LCM_EN SDA SCL SYNC SW VIN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 39.
    GUARD MESA POWER MESA DIGITALI/O MAMBA AND MESA CONNECTOR FLEX: 516S00142 (PLUG) MLB: 516S00141 (RCPT) MAMBA DIGITAL I/O #24543342: stuff 100pF Matches flex_x452_acf, schematic revision 1.5.0 pinout VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC. TI:353S00576 ST:353S00932 MAMBA POWER I2C_TOUCH_TO_MAMBA_SCL47 I2C_TOUCH_BI_MAMBA_SDA47 2 1 C3826 2 1 C3807 21 R3811 21 FL3811 21 FL3806 21 R3809 21 FL3802 21 FL3801 21 FL3803 2 1 R3808 2 1 R3807 21 XW3801 1 PP3801 2 1 C3825 2 1 C3806 21 FL3804 2 1C3805 21 R3801 21 R3802 2 1 C3819 2 1 C3801 2 1 C3816 2 1 C3817 2 1 C3818 21 FL3807 2 1 C3812 2 1 C3811 2 1 C3824 2 1 C3823 21 R3805 14 5 2 3 U38012 1C3828 2 1 C3804 2 1 C3822 2 1 C3821 2 1 C3815 2 1 C3813 2 1 C3802 2 1 C3803 2 1 C3814 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 J3801 LCM_TO_MAMBA_MSYNC_CONN PP2V75_MAMBA_CONN I2C_MESA_TURTLE_SCL_CONN MESA_TO_BOOST_EN_CONN SPI_AP_TO_MESA_MOSI_CONN PP_VDD_BOOST PP1V8_TOUCH MESA_TO_AOP_FDINT MESA_TO_AOP_FDINT_CONN PP1V8_TOUCH_TO_MAMBA_CONN TP_MAMBA_HINT_L PP3V0_MESA_CONN AP_TO_TOUCH_MAMBA_RESET_CONN_L SPI_AP_TO_MESA_SCLK_CONN PP3V0_MESA MAMBA_TO_LCM_MDRIVE_CONN_MESA MAMBA_TO_LCM_MDRIVE_CONN_MESA PP1V8_TOUCH_TO_MAMBA_CONN PP1V8_TOUCH PP1V8_MESA_CONN MESA_TO_AOP_FDINT_CONN I2C_MESA_TURTLE_SDA_CONN MESA_TO_AP_INT_CONN SPI_MESA_TO_AP_MISO_CONN AOP_TO_MESA_BLANKING_EN_CONN MESA_TO_AP_INT_CONN MESA_TO_BOOST_EN SPI_MESA_TO_AP_MISO SPI_MESA_TO_AP_MISO_CONN SPI_AP_TO_MESA_SCLK PP16V0_MESA_CONN AOP_TO_MESA_BLANKING_EN AOP_TO_MESA_BLANKING_EN_CONN MESA_TO_AP_INT MAMBA_TO_LCM_MDRIVE PP16V0_MESA_CONNPP16V0_MESA PP1V8_MESA_CONNPP1V8_MESA PP3V0_MESA_CONN MAMBA_LDO_EN SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_MOSI_CONN MESA_TO_BOOST_EN_CONN SPI_AP_TO_MESA_SCLK_CONN PP2V75_MAMBA_CONN ROOM=MAMBA_MESA 100PF NP0-C0G 16V 5% 01005 25V ROOM=MAMBA_MESA 01005 56PF 5% NP0-C0G-CERM 1% 1/32W ROOM=MAMBA_MESA 33.2 MF 01005 150OHM-25%-200MA-0.7DCR 01005 01005 ROOM=MAMBA_MESA 150OHM-25%-200MA-0.7DCR 1/32W ROOM=MAMBA_MESA MF 0.00 0% 01005 ROOM=MAMBA_MESA 150OHM-25%-200MA-0.7DCR 01005 150OHM-25%-200MA-0.7DCR 01005 ROOM=MAMBA_MESA 0201 ROOM=MAMBA_MESA 80-OHM-25%-0.52A-0.17OHM 1% ROOM=MAMBA_MESA 511K 1/32W MF 01005 ROOM=MAMBA_MESA 511K 1% 1/32W MF 01005 OMIT SHORT-20L-0.05MM-SM ROOM=PMU SM P2MM-NSM 56PF 25V 5% 01005 ROOM=MAMBA_MESA NP0-C0G-CERM 5% 25V 56PF 01005 NP0-C0G-CERM NOSTUFF ROOM=MAMBA_MESA 01005 ROOM=MAMBA_MESA 150OHM-25%-200MA-0.7DCR ROOM=MAMBA_MESA 56PF NP0-C0G-CERM 25V 5% 01005 1% 681 ROOM=MAMBA_MESA MF 1/32W 01005 ROOM=MAMBA_MESA 1% MF 1/32W 681 01005 01005 5% 16V NP0-C0G 100PF ROOM=MAMBA_MESA 100PF NP0-C0G 16V 5% 01005 ROOM=MAMBA_MESA 56PF 25V 5% 01005 NP0-C0G-CERM ROOM=MAMBA_MESA 5% ROOM=MAMBA_MESA 56PF NP0-C0G-CERM 25V 01005 56PF NP0-C0G-CERM 25V 5% 01005 ROOM=MAMBA_MESA 150OHM-25%-200MA-0.7DCR ROOM=MAMBA_MESA 01005 ROOM=MAMBA_MESA C0G-CERM 220PF 10V 5% 01005 220PF C0G-CERM 10V 5% 01005 ROOM=MAMBA_MESA 6.3V 20% 0201-1 2.2UF X5R-CERM ROOM=MAMBA_MESA 0402-8 X5R-CERM 20% 10V 10UF ROOM=MAMBA_MESA 0% 01005 ROOM=MAMBA_MESA MF 1/32W 0.00 LP5907SNX-2.75 ROOM=MAMBA_MESA X2SON X5R-CERM 6.3V 20% 0201-1 ROOM=MAMBA_MESA 2.2UF ROOM=MAMBA_MESA 01005 5% 10V C0G-CERM 220PF ROOM=MAMBA_MESA 01005 20% 6.3V X5R-CERM 0.1UF 0201-1 20% 6.3V 2.2UF ROOM=MAMBA_MESA X5R-CERM ROOM=MAMBA_MESA 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=MAMBA_MESA 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=MAMBA_MESA 5% 01005 10V C0G-CERM 220PF 5% 35V 100PF NP0-C0G 01005 ROOM=MAMBA_MESA ROOM=MAMBA_MESA 0201-1 20% 6.3V X5R-CERM 2.2UF ROOM=MAMBA_MESA F-ST-SM BB35C-RA24-3A CRITICAL 45 38 48 38 38 53 37 32 25 23 19 47 46 39 38 18 13 38 38 38 45 39 38 19 38 38 38 47 46 39 38 18 38 38 48 38 38 38 38 37 4 11 38 11 38 13 38 11 45 3837 4 3848 19 38 11 38 38 38 38 PP VIN EN EPADGND VOUT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 40.
    #26634069: nostuff C3903to help desense AOP/TOUCH INTERFACE To Display B2B AP/TOUCH INTERFACE DISPLAY POWER DISPLAY MIPI For placement "along the way" as we route from SOC to B2B. BACKLIGHT AC Coupling Caps AC return path for LCM MIPI which is referenced to GND and VDD_MAIN To Mamba/Mesa B2B VOLTAGE=25.0V 2 1 C3929 2 1C3901 2 1 C3940 2 1 C3937 2 1 R3901 2 1 C3903 2 1 C3938 2 1 C3936 2 1 C3935 2 1 C3905 2 1 R3908 21 FL3915 2 1 FL3906 2 1 FL3908 21 FL3910 21 FL3903 21 FL3902 21 FL3901 21 R3923 2 1 C3902 2 1 FL3904 2 1 C3915 2 1 C3939 2 1 C3930 2 1 C3931 2 1 C3924 2 1 C3923 2 1 C3925 2 1 FL3922 2 1 FL3924 2 1C3922 2 1 C3926 2 1 C3927 2 1 FL3919 2 1 FL3920 2 1 C3928 2 1 C3916 2 1 FL3913 2 1 C3917 2 1 C3918 21 R3915 2 1 C3904 2 1 C3912 2 1 C3913 2 1 C3914 2 1 C3933 2 1 C3934 2 1 C3909 2 1 FL3912 2 1 FL3909 2 1 C3910 2 1 C3911 2 1C3932 2 1 FL3911 4 3 2 1 L3903 4 3 2 1 L3902 4 3 2 1 L3901 2 1 FL3917 2 1 C3920 2 1 FL3918 2 1 C3921 2 1 FL3916 2 1 C3919 PN5V7_LCM_MESON_AVDDN PP5V7_MESON_AVDDH PP5V7_LCM_AVDDH PP1V8 PP5V7_MESON_AVDDH_CONN PMU_TO_LCM_PANICB_CONN LCM_TO_MANY_BSYNC_CONN PMU_TO_LCM_PANICB 90_MIPI_AP_TO_LCM_CLK_CONN_P 90_MIPI_AP_TO_LCM_CLK_CONN_N90_MIPI_AP_TO_LCM_CLK_N 90_MIPI_AP_TO_LCM_DATA0_CONN_P 90_MIPI_AP_TO_LCM_DATA1_CONN_N PP1V8_TOUCH PP1V8_LCM_CONN SPI_AP_TO_TOUCH_MOSI_CONN LCM_TO_MANY_BSYNC PP_LCM_BL_CAT1 PP_LCM_BL_ANODE PP1V8_TOUCH_CONN 90_MIPI_AP_TO_LCM_CLK_P SPI_TOUCH_TO_AP_MISO_CONN 90_MIPI_AP_TO_LCM_DATA1_N 90_MIPI_AP_TO_LCM_DATA0_P AP_TO_LCM_RESET_L TOUCH_TO_AP_INT_L_CONN PP5V1_TOUCH_VDDH UART_TOUCH_TO_AOP_RXD SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI LCM_TO_CHESTNUT_PWR_EN_CONN 90_MIPI_AP_TO_LCM_DATA0_CONN_N AP_TO_CUMULUS_CLK_32K_CONN SPI_AP_TO_TOUCH_CS_CONN_L AP_TO_TOUCH_MAMBA_RESET_L PP_LCM_BL_CAT2_CONN UART_TOUCH_TO_AOP_RXD_CONN 90_MIPI_AP_TO_LCM_DATA1_CONN_P TOUCH_TO_AP_INT_L AP_TO_CUMULUS_CLK32K SPI_AP_TO_TOUCH_CS_L LCM_TO_CHESTNUT_PWR_EN AP_TO_LCM_RESET_CONN_L UART_AOP_TO_TOUCH_TXD 90_MIPI_AP_TO_LCM_DATA1_P AP_TO_TOUCH_MAMBA_RESET_CONN_L PP_LCM_BL_CAT2 PN5V7_LCM_MESON_AVDDN_CONN PP_VDD_MAIN UART_AOP_TO_TOUCH_TXD_CONN SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_SCLK_CONN PP5V7_LCM_AVDDH_CONN 90_MIPI_AP_TO_LCM_DATA0_N PP_LCM_BL_CAT1_CONN PP5V1_TOUCH_VDDH_CONN PP_LCM_BL_ANODE_CONN 0402-8 X5R-CERM 10V 20% 10UF ROOM=DISPLAY_B2B 0402-8 10UF X5R-CERM 10V 20% ROOM=DISPLAY_B2B 2.2UF 0201-1 20% 6.3V X5R-CERM ROOM=DISPLAY_B2B 220PF 10V 5% ROOM=DISPLAY_B2B C0G-CERM 01005 5% 01005 1/32W MF 100K ROOM=DISPLAY_B2B 220PF NOSTUFF ROOM=DISPLAY_B2B 0201 2% 50V C0G 10V 5% ROOM=DISPLAY_B2B C0G-CERM 01005 220PF220PF ROOM=DISPLAY_B2B 01005 5% 10V C0G-CERM 220PF 01005 C0G-CERM 10V 5% ROOM=DISPLAY_B2B 5% 35V 100PF 01005 ROOM=DISPLAY_B2B NP0-C0G MF 33.2 1/32W 1% 01005 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR 01005 0201 240-OHM-25%-0.42A-0.31DCR ROOM=DISPLAY_B2B 0201 ROOM=DISPLAY_B2B 240-OHM-25%-0.42A-0.31DCR ROOM=DISPLAY_B2B 0201 33-OHM-25%-1500MA 0201 ROOM=DISPLAY_B2B 33-OHM-25%-1500MA ROOM=DISPLAY_B2B 33-OHM-25%-1500MA 0201 33-OHM-25%-1500MA ROOM=DISPLAY_B2B 0201 ROOM=DISPLAY_B2B 0% 1/32W 01005 MF 0.00 220PF C0G-CERM ROOM=MAMBA_MESA 5% 01005 10V 01005 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 220PF 5% C0G-CERM 10V C0G-CERM 5% 220PF 01005 10V ROOM=DISPLAY_B2B C0G-CERM 01005 5% 10V 220PF 220PF C0G-CERM 10V 5% 01005 ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B 56PF NP0-C0G-CERM 25V 5% 01005 ROOM=DISPLAY_B2B 56PF NP0-C0G-CERM 25V 5% 01005 5% ROOM=DISPLAY_B2B 01005 56PF NP0-C0G-CERM 25V 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 150OHM-25%-200MA-0.7DCR 01005 ROOM=DISPLAY_B2B NOSTUFF ROOM=DISPLAY_B2B 01005 NP0-C0G-CERM 25V 56PF 5% 01005 ROOM=DISPLAY_B2B 56PF NP0-C0G-CERM 25V 5% ROOM=DISPLAY_B2B 100PF NP0-C0G 16V 5% 01005 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 01005 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B 100PF NP0-C0G 16V 5% 01005 ROOM=DISPLAY_B2B 220PF C0G-CERM 10V 5% 01005 ROOM=DISPLAY_B2B 01005 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 10V C0G-CERM 220PF 5% 01005 100PF 5% 01005 ROOM=DISPLAY_B2B NP0-C0G 16V MF 5% 01005 1/32W 10 ROOM=DISPLAY_B2B 5% 35V 100PF ROOM=DISPLAY_B2B NP0-C0G 01005 ROOM=DISPLAY_B2B C0G-CERM 220PF 01005 10V 5% ROOM=DISPLAY_B2B 220PF 10V 01005 C0G-CERM 5% C0G-CERM 5% 10V 01005 220PF ROOM=DISPLAY_B2B 0201-1 X5R-CERM 6.3V 20% ROOM=DISPLAY_B2B 2.2UF ROOM=DISPLAY_B2B 2.2UF 20% 6.3V 0201-1 X5R-CERM 220PF 5% ROOM=DISPLAY_B2B 10V C0G-CERM 01005 0201 ROOM=DISPLAY_B2B 240-OHM-25%-0.42A-0.31DCR 0201 ROOM=DISPLAY_B2B 240-OHM-25%-0.42A-0.31DCR ROOM=DISPLAY_B2B 220PF C0G-CERM 10V 5% 01005 5% ROOM=DISPLAY_B2B 220PF 10V 01005 C0G-CERM ROOM=DISPLAY_B2B 2.2UF X5R-CERM 6.3V 20% 0201-1 0201 ROOM=DISPLAY_B2B 240-OHM-25%-0.42A-0.31DCR CRITICAL ROOM=DISPLAY_B2B TAM0605 65OHM-0.7-2GHZ-3.4OHM TAM0605 65OHM-0.7-2GHZ-3.4OHM ROOM=DISPLAY_B2B CRITICAL ROOM=DISPLAY_B2B TAM0605 CRITICAL65OHM-0.7-2GHZ-3.4OHM 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 5% ROOM=DISPLAY_B2B 56PF 25V 01005 NP0-C0G-CERM 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 56PF NP0-C0G-CERM 01005 ROOM=DISPLAY_B2B 25V 5% 150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B 01005 56PF NP0-C0G-CERM ROOM=DISPLAY_B2B 5% 25V 01005 37 37 37 52 48 47 46 29 25 18 17 16 13 12 11 9 8 7 5 45 45 20 45 459 45 45 47 46 38 18 45 45 53 23 20 13 37 37 9 45 9 9 12 45 37 13 11 11 45 45 45 45 12 45 45 12 11 11 37 20 45 13 9 4538 37 53 52 46 41 40 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 45 11 45 45 9 SYM_VER-1 SYM_VER-1 SYM_VER-1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 41.
    AC return pathfor USB pairs which is referenced to GND and VDD_MAIN POW_GATE_EN* is 6V-tolerant z=0.45mm Sm Footprint: 376S00135 TRISTAR 2 <rdar:/24285280> EVT: 343S00091 (P2:343S00078) #25714843: Remove R4003 Weak PD I2C0_AP_SDA 47 I2C0_AP_SCL 47 1 PP4001 2 1 3 Q4001 F4 F3 A1 B1 A3 B3 D2 D1 F2 F1 E2 E1 E4 D3 D4 D6 F6 B5 A5 C6 B6 F5 C1 A6 A4 A2 B4 B2 C3 C4 E3 E6 C2 D5 E5 C5 U4001 2 1 C4006 2 1 C4008 2 1 C4007 21 L4021 21 L4022 2 1 R4002 21 R4001 2 1 C4001 2 1 C4002 2 1 C4003 2 1 C4005 2 1 C4004 PP5V0_USB_RVP TRISTAR_CON_DETECT_L PP_TRISTAR_ACC1 90_TRISTAR_DP1_CONN_P PP_TRISTAR_ACC2 PP3V0_TRISTAR_ANT_PROX TRISTAR_USB_BRICK_ID_R 90_USB_AP_DATA_L_P TRISTAR_TO_PMU_HOST_RESET PMU_TO_AOP_TRISTAR_ACTIVE_READY TRISTAR_REVERSE_GATE TRISTAR_TO_TIGRIS_VBUS_OFF TRISTAR_TO_AOP_INT 90_TRISTAR_DP1_CONN_N 90_TRISTAR_DP2_CONN_P 90_TRISTAR_DP2_CONN_N 90_USB_BB_DATA_P 90_USB_BB_DATA_N 90_USB_AP_DATA_P 90_USB_AP_DATA_N PP_VDD_MAIN TRISTAR_BYPASS PP1V8_SDRAM UART_AP_DEBUG_RXD UART_ACCESSORY_TO_AP_RXD UART_AP_DEBUG_TXD SWD_DOCK_TO_AP_SWCLK 90_USB_AP_DATA_L_N SWD_DOCK_BI_AP_SWDIO UART_AP_TO_ACCESSORY_TXD PP_ACC_VAR 90_MIKEYBUS_DATA_N 90_MIKEYBUS_DATA_P PP5V0_USB TRISTAR_TO_PMU_USB_BRICK_ID 20% 6.3V X5R 1.0UF 0201-1ROOM=TRISTAR 10% ROOM=TRISTAR 6.3V X5R 0.01UF 01005 P2MM-NSM SM DFN ROOM=TRISTAR RV3CA01ZP CRITICAL WLCSP CBTL1610A3BUK 1UF 16V 20% 0201 CER-X5R ROOM=TRISTAR 220PF ROOM=SOC 01005 5% 10V C0G-CERM ROOM=SOC 5% 10V C0G-CERM 220PF 01005 0201 ROOM=TRISTAR 15NH-250MA 0201 15NH-250MA ROOM=TRISTAR MF 10K 5% 1/32W 01005 ROOM=TRISTAR ROOM=PMU 01005 6.34K 1/32W MF 1% ROOM=PMU 01005 10% 6.3V X5R 0.01UF 01005 20% 6.3V X5R-CERM 0.1UF ROOM=TRISTARROOM=TRISTAR 0201-1 20% 6.3V X5R 1.0UF 414 414 414 414 53 41 29 19 20 3720137 21 13 414 414 414 53 53 7 7 53 52 46 41 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 48 47 41 37 36 32 21 20 18 16 12 12 12 7 7 12 462719 31 31 41214 20 PP S D G BRICK_ID POW_GATE_EN* BYPASS SCL INT SDA SWITCH_EN HOST_RESET CON_DET_L DN2 DP2 DN1 DP1 ACC2 ACC1 P_IN VDD_1V8 VDD_3V0 ACC_PWR JTAG_DIO UART2_RX JTAG_CLK UART1_RX UART2_TX UART0_RX UART1_TX USB0_DN UART0_TX USB0_DP USB1_DN USB1_DP DIG_DN DVSS DVSS DVSS DIG_DP NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 42.
    when changing thesecomponents! #22499940:Change Net Name to POS/NEG SPEAKER1 Please loop in Matt Mow (Antenna Team) ANTENNA LOWER MIC1/4 USB AC CouplingAC return path for USB pairs which is referenced to GND and VDD_MAIN ARC1 DOCK FLEX CONNECTOR Antenna GPIO TRISTAR #25098110: Decrease DCR #25429221:Carrier Dock flex to add +1 ACC2 pin Per ANT Erdinc, change to cap ARC CONTROL #26118161: Update FL4104 to 49.9ohm CKPLUS_WAIVE=I2C_PULLUP CKPLUS_WAIVE=I2C_PULLUP VOLTAGE=4.3V VOLTAGE=3.0V VOLTAGE=4.3V VOLTAGE=14.0V 21 FL4112 21 R4104 21 FL4106 2 1 C4111 2 1 C4136 2 1 C4135 54 53 5251 5049 4847 4645 4443 4241 4039 3837 3635 3433 3231 3029 2827 2625 2423 2221 2019 1817 1615 1413 1211 109 87 65 43 21 J4101 2 1 FL4102 2 1 C4110 2 1 FL4101 2 1 C4143 2 1C4109 2 1C4105 2 1C4106 2 1C4107 2 1C4108 21 R4110 21 R4109 2 1 C4127 2 1 C4103 2 1 C4104 2 1 FL4115 2 1C4102 2 1C4101 2 1 C4118 2 1 C4134 2 1 FL4103 2 1 C4128 2 1 C4129 2 1 FL4116 2 1 FL4117 2 1 FL4118 2 1 C4130 2 1 C4131 2 1 C4132 2 1 FL4119 2 1 FL4120 2 1 FL4121 2 1 C4133 2 1 C4126 2 1 FL4114 2 1 C4119 2 1 C4120 2 1 FL4107 2 1 FL4108 2 1 C4121 2 1 C4122 2 1 C4116 2 1 C4117 21 FL4105 2 1 R4102 I2C_HOMER_SDA_CONN PP_CODEC_TO_LOWERMIC1_BIAS I2C_HOMER_SCL_CONNPP3V0_LAT_CONN I2C_HOMER_SCL BB_TO_LAT_ANT_SCLK_CONN BB_TO_LAT_GPO1_CONN ARC1_TO_SOLENOID1_OUT_NEG ARC1_TO_SOLENOID1_OUT_POS PP_TRISTAR_ACC2_CONN BB_TO_LAT_GPO2_CONN LOWERMIC4_TO_CODEC_AIN2_CONN_POS BB_TO_LAT_GPO1_CONN BB_TO_LAT_ANT_SCLK_CONN LOWERMIC4_TO_CODEC_BIAS_FILT_RET BB_TO_LAT_ANT_DATA_CONN PP1V8_LAT_ARC_CONN PP3V0_LAT1_CONN LOWERMIC4_TO_CODEC_AIN2_CONN_NEG SPEAKERAMP1_TO_SPEAKER_OUT_NEG PP_CODEC_TO_LOWERMIC4_BIAS_CONN ARC1_TO_SOLENOID1_OUT_NEG TRISTAR_CON_DETECT_CONN_L PP_TRISTAR_ACC2 PP_TRISTAR_ACC2_CONN PP_TRISTAR_ACC1 PP3V0_TRISTAR_ANT_PROX BB_TO_LAT_ANT_DATA_CONNBB_TO_LAT_ANT_DATA BB_TO_LAT_ANT_SCLK PP1V8_SDRAM BB_TO_LAT_GPO2 BB_TO_LAT_GPO1 PP3V0_LAT1_CONN PP_CODEC_TO_LOWERMIC1_BIAS_CONN LOWERMIC1_TO_CODEC_AIN1_N LOWERMIC4_TO_CODEC_AIN2_P PP_VDD_MAIN PP_CODEC_TO_LOWERMIC4_BIAS_CONN SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS SPEAKERAMP1_TO_SPEAKER_OUT_POS SPEAKER_TO_SPEAKERAMP1_VSENSE_N LOWERMIC4_TO_CODEC_AIN2_N PP_CODEC_TO_LOWERMIC4_BIAS SPEAKER_TO_SPEAKERAMP1_VSENSE_P PP1V8_LAT_ARC_CONN PP_TRISTAR_ACC1_CONN 90_TRISTAR_DP2_CONN_P 90_TRISTAR_DP2_CONN_N LOWERMIC4_TO_CODEC_AIN2_CONN_NEG LOWERMIC4_TO_CODEC_AIN2_CONN_POS LOWERMIC1_TO_CODEC_AIN1_CONN_NEG LOWERMIC1_TO_CODEC_AIN1_CONN_POS SPEAKERAMP1_TO_SPEAKER_OUT_POS PP3V0_LAT_CONN MIKEYBUS_REFERENCE BB_TO_LAT_GPO2_CONN PP_TRISTAR_ACC1_CONN SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG I2C_MIC1_SDA_CONN BB_TO_LAT_GPO3_CONN 90_TRISTAR_DP1_CONN_N 90_TRISTAR_DP1_CONN_P ARC1_TO_SOLENOID1_OUT_POS SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS LOWERMIC1_TO_CODEC_BIAS_FILT_RET LOWERMIC1_TO_CODEC_AIN1_CONN_POS LOWERMIC1_TO_CODEC_AIN1_CONN_NEG PP_CODEC_TO_LOWERMIC1_BIAS_CONN I2C_MIC1_SCL_CONN ARC1_TO_SOLENOID1_OUT_POS SOLENOID1_TO_ARC1_VSENSE_POS I2C_HOMER_SCL_CONN I2C_HOMER_SDA_CONN SOLENOID1_TO_ARC1_VSENSE_NEG SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG TRISTAR_CON_DETECT_CONN_L SPEAKERAMP1_TO_SPEAKER_OUT_NEG TRISTAR_CON_DETECT_L LOWERMIC1_TO_CODEC_AIN1_P I2C_HOMER_SDA PP5V0_USB C0G-CERM 220PF ROOM=DOCK_B2B 5% 10V 01005 01005 ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR NP0-C0G-CERM 25V 01005 ROOM=DOCK_B2B 5% 56PF 25V ROOM=DOCK_B2B 01005 NP0-C0G-CERM 56PF5% 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 01005 ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 10V ROOM=DOCK_B2B 5% C0G-CERM 220PF 01005 56PF 25V NP0-C0G-CERM 5% 01005 ROOM=DOCK_B2B 56PF NP0-C0G-CERM 25V 01005 ROOM=DOCK_B2B 5% ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR 01005 ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 01005 10V C0G-CERM 220PF 5% ROOM=DOCK_B2B 220PF C0G-CERM 10V 01005 5% ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 220PF C0G-CERM 5% 10V 01005 ROOM=DOCK_B2B 10-OHM-1.1A 01005 220PF ROOM=DOCK_B2B 10V C0G-CERM 5% 01005 150OHM-25%-200MA-0.7DCR 01005 ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR ROOM=DOCK_B2B 01005 NP0-C0G-CERM ROOM=DOCK_B2B 5% 01005 16V 33PF 33PF NP0-C0G-CERM ROOM=DOCK_B2B 16V 01005 5% 01005 1/32W ROOM=DOCK_B2B MF 5% 1.00K 01005 150OHM-25%-200MA-0.7DCR 49.9 1% MF 01005 ROOM=DOCK_B2B 1/32W ROOM=DOCK_B2B 0201 22-OHM-25%-1800MA 5% 25V NP0-C0G-CERM 01005 ROOM=DOCK_B2B 56PF 01005 25V NP0-C0G-CERM ROOM=DOCK_B2B 5% 56PF 01005 5% 25V ROOM=DOCK_B2B NP0-C0G-CERM 56PF 245857 F-ST-SM ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR 25V 5% 56PF NP0-C0G-CERM 01005 ROOM=DOCK_B2B 01005 ROOM=DOCK_B2B 150OHM-25%-200MA-0.7DCR ROOM=SOC 01005 C0G-CERM 220PF 5% 10V 10% ROOM=DOCK_B2B 0.1UF 25V 0201 X5R ROOM=DOCK_B2B X5R 0.1UF 25V 10% 0201 ROOM=DOCK_B2B X5R 0201 25V 0.1UF 10% ROOM=DOCK_B2B 01005 16V CER-X7R 330PF 10% 10% 330PF CER-X7R 16V 01005 ROOM=DOCK_B2B ROOM=DOCK_B2B 01005 0.00 0% 1/32W MF 27PF 5% 16V 01005 NP0-C0G ROOM=DOCK_B2B 0.00 ROOM=DOCK_B2B 01005 0% 1/32W MF ROOM=DOCK_B2B 01005 10V C0G-CERM 220PF 5% 10V C0G-CERM 220PF 01005 ROOM=DOCK_B2B 5% 01005 220PF C0G-CERM 10V ROOM=DOCK_B2B 5% ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR 01005 5% 10V C0G-CERM 220PF ROOM=DOCK_B2B 10V C0G-CERM 220PF 01005 ROOM=DOCK_B2B 5% 5% ROOM=DOCK_B2B 01005 NP0-C0G 16V 100PF ROOM=DOCK_B2B 01005 NP0-C0G 5% 16V 100PF 41 32 41 41 47 36 41 41 41 35 41 35 41 41 41 41 41 32 41 41 41 41 41 34 41 4135 41 40 4 41 40 4 53 40 29 19 4153 53 53 52 48 47 40 37 36 32 21 20 18 16 53 53 41 41 31 31 53 52 46 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 41 41 41 34 34 31 32 34 41 41 40 4 40 4 41 41 41 41 41 34 41 31 41 41 41 47 46 40 4 40 4 4135 41 32 41 41 41 47 41 35 35 41 41 35 41 41 41 34 40 4 31 47 36 40 21 4 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 43.
    6 OF 81 6OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 44.
    6 OF 81 6OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 45.
    MIC2 (ANC REF) BUTTONSSTROBE2STROBE1 HAWKING #24544474:Can R4401 be changed to 5%? #24678255:DOE with 10% and/20% cap CKPLUS_WAIVE=MISS_N_DIFFPAIR 21 FL4407 2 1 C4422 21 R4402 21 R4405 21 R4406 2 1C4420 2 1C4419 2 1C4418 2 1 DZ4404 2 1 DZ4403 2 1 DZ4402 2 1 R4401 21 C4417 21 C4421 2 1 C4416 2 1 C4414 21 FL4406 21 FL4405 2 1 C4415 2 1 FL4402 2 1 C4405 2 1 C4404 2 1 FL4401 2 1 FL4403 2 1 C4403 2 1 C4407 21 FL4404 2 1C4406 2 1C4402 2 1 C4408 2 1 C4409 2 1C4411 2 1C4410 2 1 C4412 2 1 C4413 2 1C4401 2 1 DZ4401 HAWKING_TO_CODEC_AIN7_N PP_CODEC_TO_REARMIC2_BIAS_CONN HAWKING_TO_CODEC_AIN7_N_CONN HAWKING_TO_CODEC_AIN7_C_PHAWKING_TO_CODEC_AIN7_P REARMIC2_TO_CODEC_AIN3_CONN_P REARMIC2_TO_CODEC_AIN3_CONN_NREARMIC2_TO_CODEC_AIN3_N PP_CODEC_TO_REARMIC2_BIAS BUTTON_VOL_DOWN_L BUTTON_VOL_UP_L CHASSIS_GND_BS401 BUTTON_VOL_UP_CONN_L CHASSIS_GND_BS401 BUTTON_VOL_DOWN_CONN_L CHASSIS_GND_BS401 BUTTON_POWER_KEY_CONN_L PP1V8_HAWKING PP_STROBE_DRIVER2_COOL_LED PP_STROBE_DRIVER2_WARM_LED BUTTON_RINGER_A_CONNBUTTON_RINGER_A BUTTON_POWER_KEY_L CHASSIS_GND_BS401 STROBE_MODULE_NTC_CONN REARMIC2_TO_CODEC_AIN3_P PP_STROBE_DRIVER1_WARM_LED PP_STROBE_DRIVER1_COOL_LED STROBE_MODULE_NTC PP1V8_HAWKING_CONN HAWKING_TO_CODEC_AIN7_P_CONN 20% X5R ROOM=RIGHT_BUTTON 01005 6.3V 0.22UF X5R-CERM 6.3V 20% ROOM=RIGHT_BUTTON 0201-1 2.2UF C0G-CERM 5% 01005 10V ROOM=RIGHT_BUTTON 220PF 150OHM-25%-200MA-0.7DCR ROOM=RIGHT_BUTTON 01005 ROOM=RIGHT_BUTTON 27PF NP0-C0G 16V 5% 01005 150OHM-25%-200MA-0.7DCR ROOM=RIGHT_BUTTON 01005 ROOM=RIGHT_BUTTON 56PF 25V 5% 01005 NP0-C0G-CERM 27PF NP0-C0G 16V 5% 01005 ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON 150OHM-25%-200MA-0.7DCR 01005 ROOM=RIGHT_BUTTON 56PF NP0-C0G-CERM 25V 5% 01005 01005 ROOM=RIGHT_BUTTON NP0-C0G-CERM 25V 56PF 5% 150OHM-25%-200MA-0.7DCR 01005 ROOM=RIGHT_BUTTON 150OHM-25%-200MA-0.7DCR ROOM=RIGHT_BUTTON 01005 ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 5% 01005 27PF ROOM=RIGHT_BUTTON NP0-C0G 6.3V 5% 0201 0201 5.5V-6.2PF ROOM=RIGHT_BUTTON 01005 ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 5% 150OHM-25%-200MA-0.7DCR 01005 ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 5% 01005 ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 5% 01005 ROOM=RIGHT_BUTTON 27PF 16V NP0-C0G 5% 01005 27PF NP0-C0G 16V 5% 01005 ROOM=RIGHT_BUTTON ROOM=LEFT_BUTTON 120-OHM-0.220A 01005 ROOM=RIGHT_BUTTON NOSTUFF 180PF 01005 10V 10% CERM ROOM=RIGHT_BUTTON 01005 100 1/32W MF 5% ROOM=LEFT_BUTTON 01005 100 1/32W MF 5% 01005 100 1/32W MF 5% ROOM=LEFT_BUTTON 220PF C0G-CERM 10V 5% 01005 ROOM=RIGHT_BUTTON 100PF NP0-C0G 16V 5% 01005 ROOM=LEFT_BUTTON ROOM=LEFT_BUTTON 100PF NP0-C0G 16V 5% 01005 ROOM=LEFT_BUTTON 27PF NP0-C0G 6.3V 5% 0201 5% ROOM=RIGHT_BUTTON 220PF C0G-CERM 10V 01005 12V-33PF01005-1 ROOM=LEFT_BUTTON 01005-1 12V-33PF ROOM=LEFT_BUTTON 0201 5.5V-6.2PF ROOM=LEFT_BUTTON ROOM=RIGHT_BUTTON 0.5% 1/32W 01005 MF 27K 0.22UF ROOM=RIGHT_BUTTON 20% X5R 01005 6.3V 31 45 45 31 45 4531 32 20 20 12 444 45 444 45 444 45 19 4526 4526 4520 20 444 45 31 4526 4526 26 45 45 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 46.
    #25614112: Remove PP1V8_EEPROMSupport 200MA 516S00151 PLUG FOREHEAD FLEX CONNECTOR FLEX APN: 516S00149 MLB APN: 516S00150 COMBINED BUTTON FLEX CONNECTOR #24543369: Keep PP 20MA DISPLAY / TOUCH FLEX CONNECTOR 516S00138 RCPT (USED ON MLB) 516S00137 PLUG 10MA 10MA 50MA 20MA 70MA 100MA 100MA THIS ONE ---> 516S00152 RCPT (USED ON MLB) THIS ONE ---> THIS PAGE UNIQUE TO SMALL FORM FACTORUTAH-C FLEX CONNECTOR THIS ONE ---> 516S00145 PLUG 516S00146 RCPT (USED ON MLB) GND I2C_TOUCH_BI_MAMBA_SDA 47 MAKE_BASE=TRUE I2C_TOUCH_TO_MAMBA_SCL472 1 R4501 1PP4501 2 1 C4507 21 XW4501 2221 2019 1817 1615 1413 1211 109 87 65 43 21 J4504 46 45 4443 4241 4039 3837 3635 3433 3231 3029 2827 2625 2423 2221 2019 1817 1615 1413 1211 109 87 65 43 21 J4502 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 J4501 3635 3433 3231 3029 2827 2625 2423 2221 2019 1817 1615 1413 1211 109 87 65 43 21 42 41 4039 3837 J4503 AP_TO_UT_CLK_CONN 90_LPDP_UT_TO_AP_D1_CONN_P 90_LPDP_UT_TO_AP_D1_CONN_N 90_LPDP_UT_TO_AP_D0_CONN_P PP3V0_ALS_CONVOY_CONN ALS_TO_AP_INT_CONN_L I2C_ALS_CONVOY_SCL_CONN 90_MIPI_NH_TO_AP_DATA0_P PDM_ADARE_TO_CONVOY_CLK_CONN PDM_CONVOY_TO_ADARE_DATA_CONN SPEAKERAMP2_TO_SPEAKER_OUT_POS 90_MIPI_NH_TO_AP_CLK_P 90_MIPI_NH_TO_AP_CLK_N 90_MIPI_NH_TO_AP_DATA0_N SPEAKERAMP2_TO_SPEAKER_OUT_NEG PP3V0_PROX_CONN I2C_PROX_SCL_CONN FRONTMIC3_TO_CODEC_AIN4_CONN_P 90_LPDP_UT_TO_AP_D0_CONN_N AP_TO_NH_SHUTDOWN_CONN_L PP1V2_NH_DVDD_CONN PP2V9_NH_AVDD_CONN PP2V9_UT_AVDD_CONN STROBE_MODULE_NTC_CONN PP1V8_HAWKING_CONN REARMIC2_TO_CODEC_BIAS_FILT_RET REARMIC2_TO_CODEC_AIN3_CONN_N PP_CODEC_TO_REARMIC2_BIAS_CONN PP_STROBE_DRIVER2_COOL_LED HAWKING_TO_CODEC_AIN7_N_CONN PP_CODEC_TO_FRONTMIC3_BIAS_CONN FRONTMIC3_TO_CODEC_AIN4_CONN_N SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P I2C_NH_SCL_CONN SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N I2C_PROX_SDA_CONN I2C_ALS_CONVOY_SDA_CONN I2C_NH_SDA_CONN I2C_UT_SCL_CONN UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN AP_TO_UT_SHUTDOWN_CONN_L I2C_UT_SDA_CONN PP3V0_UT_SVDD_CONN PP2V8_UT_AF_VAR_CONN PP1V8_UT_CONN I2C_DISP_EEPROM_SCL_CONN 90_MIPI_AP_TO_LCM_CLK_CONN_N 90_MIPI_AP_TO_LCM_DATA1_CONN_P AP_TO_CUMULUS_CLK_32K_CONN SPI_AP_TO_TOUCH_MOSI_CONN SPI_TOUCH_TO_AP_MISO_CONN I2C_MIC2_SDA_CONN I2C_MIC2_SCL_CONN BUTTON_POWER_KEY_CONN_L PP_STROBE_DRIVER1_COOL_LED BUTTON_VOL_UP_CONN_L HAWKING_TO_CODEC_AIN7_P_CONN BUTTON_RINGER_A_CONN PP_STROBE_DRIVER2_WARM_LED PP_STROBE_DRIVER1_WARM_LED PP1V8_NH_IO_CONN AP_TO_NH_CLK_CONN 90_MIPI_NH_TO_AP_DATA1_P 90_MIPI_NH_TO_AP_DATA1_N PROX_BI_AP_AOP_INT_PWM_L_CONN PP1V2_UT_VDD_CONN LPDP_UT_BI_AP_AUX_CONN TOUCH_TO_AP_INT_L_CONN PP5V1_TOUCH_VDDH_CONN PP1V8_TOUCH_CONN PP1V8_LCM_CONN PN5V7_LCM_MESON_AVDDN_CONN PP5V7_MESON_AVDDH_CONN PP5V7_LCM_AVDDH_CONN LCM_TO_CHESTNUT_PWR_EN_CONN PP_LCM_BL_CAT2_CONN UART_TOUCH_TO_AOP_RXD_CONN 90_MIPI_AP_TO_LCM_DATA0_CONN_P 90_MIPI_AP_TO_LCM_CLK_CONN_P PP_LCM_BL_ANODE_CONN MAMBA_TO_LCM_MDRIVE AP_TO_LCM_RESET_CONN_L PP_LCM_BL_CAT1_CONN PMU_TO_LCM_PANICB_CONN LCM_TO_MAMBA_MSYNC_CONN TP_LCM_PIFA UART_AOP_TO_TOUCH_TXD_CONN SPI_AP_TO_TOUCH_CS_CONN_L SPI_AP_TO_TOUCH_SCLK_CONN 90_MIPI_AP_TO_LCM_DATA0_CONN_N LCM_TO_MANY_BSYNC_CONN I2C_DISP_EEPROM_SDA_CONN 90_MIPI_AP_TO_LCM_DATA1_CONN_N AP_TO_TOUCH_MAMBA_RESET_CONN_L I2C_TOUCH_SCL_CONN BUTTON_VOL_DOWN_CONN_L REARMIC2_TO_CODEC_AIN3_CONN_P 1/32W 1% 49.9 01005 MF ROOM=DISPLAY_B2B P2MM-NSM SM ROOM=TEST ROOM=DISPLAY_B2B 5% 01005 56PF 25V NP0-C0G-CERM ROOM=RIGHT_BUTTON SHORT-20L-0.05MM-SM AA37D-S014SVA1 F-ST-SM BB35C-RA40-3A F-ST-SM AA26D-S022VA1 F-ST-SM ROOM=RCAM_B2B 245858036201829 CRITICAL ROOM=FOREHEAD F-ST-SM 25 25 25 25 29 29 47 9 29 29 463329 9 9 9 463329 29 48 29 25 29 29 29 46 25 44 44 32 44 44 4426 44 29 29 29 48 29 48 47 48 48 25 25 48 25 25 25 47 39 39 39 39 39 47 47 44 44 26 44 44 44 4426 44 26 29 29 9 9 29 25 25 39 39 39 39 39 39 39 39 39 4 39 39 39 39 4 38 39 39 4 39 38 39 39 39 39 39 47 39 3938 44 44 PP 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 47.
    UT B2B Dock B2B(Pg 41) Top Speaker Compass Coil OTHER SMALL FORM FACTOR SPECIFIC PAGES: THIS PAGE UNIQUE TO SMALL FORM FACTOR 4 - MECHANICAL ISP I2C1 NC Nets in Small FF ACC Buck Caps #26682438:Move to Page 46 TOUCH I2C #25742582,Add back C3531 in layout at ARC Pg37Pg35Pg21 #26104509:C3525 Change to 1UF 0201 in DVT Pg34 #26634069:D10x Only, 5x VDD_MAIN CAPS Change to 10UF/10V VDD_MAIN Cap I2C_ISP_NV_SDA 26 I2C_ISP_NV_SCL 26 NC_AP_LPDP_AUX210 NC_90_LPDP_NV_TO_AP_D3_P10 NC_90_LPDP_NV_TO_AP_D3_N10 NC_90_LPDP_NV_TO_AP_D2_N10 NC_90_LPDP_NV_TO_AP_D2_P10 2 1C3424 2 1C2113 2 1C3530 2 1C3722 2 1 R4711 2 1C3525 2 1 C2707 2 1C3531 2 1 R3333 2 1 C3333 2 1 XW3333 2 1 R3332 2 1 C3332 2 1 FL4604 2 1 C4608 2 1 C2531 2 1 C2507 2 1 R4604 2 1 R4603 2 1C4601 PP2V9_UT_AVDD_CONN PP_VDD_MAIN PP_VDD_MAINPP_VDD_MAIN I2C_TOUCH_TO_MAMBA_SCL PP1V8_TOUCH PP_ACC_VAR MAKE_BASE=TRUEI2C_ISP_NV_SDA MAKE_BASE=TRUE NC_AP_LPDP_AUX2 NC_90_LPDP_NV_TO_AP_D2_N MAKE_BASE=TRUE NC_90_LPDP_NV_TO_AP_D2_P MAKE_BASE=TRUE PP1V8 MAKE_BASE=TRUEI2C_ISP_NV_SCL NEG_COMPASS_COIL_COMP POS_COMPASS_COIL_COMP MAKE_BASE=TRUE NC_90_LPDP_NV_TO_AP_D3_N NC_90_LPDP_NV_TO_AP_D3_P MAKE_BASE=TRUE BB_TO_LAT_GPO3 SPEAKERAMP2_TO_SPEAKER_OUT_POS SPEAKERAMP2_TO_SPEAKER_OUT_NEG BB_TO_LAT_GPO3_CONN 10V X5R-CERM ROOM=SPKAMP1 20% 10UF 0402-8 10V X5R-CERM ROOM=CHARGER 20% 10UF 0402-8 10UF 20% 10V X5R-CERM ROOM=ARC1 0402-8 X5R-CERM 10V 20% 10UF ROOM=CHESTNUT 0402-8 NOSTUFF ROOM=MAMBA_MESA 10K 01005 1/32W 5% MF 6.3V 20% ROOM=ARC1 0201-1 X5R 1.0UF 0201-1 ROOM=TRISTAR 20% 2.2UF X5R-CERM 6.3V 10UF X5R-CERM 0402-8 10V ROOM=ARC1 20% 01005 1% 1/32W ROOM=SPKAMP2 TK 910 01005 5% 10V 220PF ROOM=SPKAMP2 C0G-CERM SHORT-20L-0.05MM-SM OMIT ROOM=MAMBA_MESA NO_XNET_CONNECTION 910 1% 1/32W 01005 ROOM=SPKAMP2 TK 220PF 5% ROOM=SPKAMP2 01005 C0G-CERM 10V ROOM=DOCK_B2B 01005 150OHM-25%-200MA-0.7DCR 01005 25V ROOM=DOCK_B2B NP0-C0G-CERM 5% 56PF 2.2UF 20% 6.3V 0201-1 ROOM=RCAM_B2B X5R-CERM 6.3V ROOM=RCAM_B2B 2.2UF 20% X5R-CERM 0201-1 ROOM=SOC 1/32W 2.2K MF 5% 0100501005 1/32W 5% ROOM=SOC MF 2.2K X5R-CERM VOLTAGE=10V 20% 10UF ROOM=BACKLIGHT 0402-8 45 25 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 47 47 39 38 18 40 27 19 9 52 48 47 39 29 25 18 17 16 13 12 11 9 8 7 5 9 53 453329 453329 41 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 48.
    TO FOREHEAD FLEX I2C3 #26633265:mitigateMIC1 undershoot #24544426 D11/111 ONLY #26682438:Move to Page 46 ADDING R3803, R3804 AS OPTION FOR TWEAKING VALUE NOTE:MAMBA I2C 2.2K PULL-UPS TO PP1V8_TOUCH INSIDE GALILEO TOUCH I2C5 TO DOCK FLEX TO MAMBA / MESA FLEX TO DISPLAY FLEX AP TO DISPLAY / TOUCH FLEX I2C0 TO COMBINED BUTTON FLEX I2C2 #24544434 I2C1 HOMER I2C1_AP_SDA 20 I2C1_AP_SCL 20 I2C0_AP_SCL 37 I2C0_AP_SCL 40 I2C0_AP_SDA 40 I2C0_AP_SDA 23 I2C0_AP_SCL 20 37 I2C0_AP_SDA 37 I2C0_AP_SDA 37 I2C_TOUCH_TO_MAMBA_SCL 38 I2C2_AP_SCL 33 I2C2_AP_SDA 33 I2C0_AP_SCL 23 I2C1_AP_SCL 21 I2C1_AP_SDA 21 I2C1_AP_SCL I2C1_AP_SDA I2C_TOUCH_TO_MAMBA_SCL 45 I2C_TOUCH_BI_MAMBA_SDA 45 I2C_TOUCH_BI_MAMBA_SDA 38 ckplus_waive=I2C_PULLUP CKPLUS_WAIVE=I2C_PULLUP 2 1 FL4729 2 1 R4715 2 1 R4716 2 1 R4703 2 1 R4704 2 1 C4704 2 1C4703 2 1 FL4741 2 1 FL4742 2 1 C4741 2 1 C4742 2 1 R4714 2 1 R4713 2 1 R4702 2 1 R4701 2 1 FL4731 2 1 FL4732 2 1 C4731 2 1C4732 21 R4708 21 R4707 2 1 FL4730 2 1 C4702 2 1C4701 2 1C4730 2 1 C4729 2 1 R4709 2 1 R4710 2 1 R4712 2 1C4711 2 1 C4712 2 1 C4710 2 1C4709 2 1C4707 2 1 C4708 2 1 R4705 2 1 R4706 I2C3_AP_SCL I2C3_AP_SDA PP1V8_SDRAM I2C5_SCL I2C5_SDA PP1V8 I2C_HOMER_SCL MAKE_BASE=TRUEI2C1_AP_SCL MAKE_BASE=TRUEI2C1_AP_SDA PP1V8 I2C_DISP_EEPROM_SCL_CONN I2C_DISP_EEPROM_SDA_CONN I2C_ALS_CONVOY_SCL_CONN PP1V8 I2C_ALS_CONVOY_SDA_CONN PP1V8 MAKE_BASE=TRUEI2C2_AP_SDA MAKE_BASE=TRUEI2C2_AP_SCL I2C_HOMER_SDA CKPLUS_WAIVE=I2C_PULLUP I2C_MIC2_SDA_CONN CKPLUS_WAIVE=I2C_PULLUP I2C_MIC2_SCL_CONN PP1V8_TOUCH MAKE_BASE=TRUEI2C0_AP_SDA MAKE_BASE=TRUEI2C0_AP_SCL I2C_TOUCH_BI_MAMBA_SDA MAKE_BASE=TRUE I2C_TOUCH_TO_MAMBA_SCL MAKE_BASE=TRUE PP1V8 I2C_MIC1_SCL_CONN I2C_MIC1_SDA_CONN 01005 2.2K ROOM=SOC MF 1/32W 5% ROOM=SOC 5% MF 01005 1/32W 2.2K ROOM=DOCK MF 01005 5% 1/32W 100 5% 01005 1/32W ROOM=SOC MF 2.2K 5% 1/32W 2.2K ROOM=SOC 01005 MF 1% MF 1/32W 01005 4.02K ROOM=SOC 1% 01005 1/32W MF 4.02K ROOM=SOC ROOM=PMU 25V 56PF 01005 NOSTUFF NP0-C0G-CERM 5% NP0-C0G-CERM 01005 25V ROOM=PMU NOSTUFF 5% 56PF ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR 01005 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR 01005 56PF NP0-C0G-CERM 01005 ROOM=DISPLAY_B2B 5% 25V ROOM=DISPLAY_B2B 01005 56PF NP0-C0G-CERM 5% 25V ROOM=HOMER 5% 01005 MF 1/32W 1.00K MF 1.00K 5% 01005 1/32W ROOM=HOMER 1/32W 01005 ROOM=SOC 1% MF 4.02K ROOM=SOC 01005 4.02K 1/32W MF 1% ROOM=RIGHT_BUTTON 01005 150OHM-25%-200MA-0.7DCR 01005 ROOM=RIGHT_BUTTON 150OHM-25%-200MA-0.7DCR 56PF 5% 25V 01005 NP0-C0G-CERM ROOM=RIGHT_BUTTONROOM=RIGHT_BUTTON NP0-C0G-CERM 01005 25V 5% 56PF 0% 01005 MF ROOM=FOREHEAD 1/32W 0.00 0% MF 1/32W 01005 0.00 ROOM=FOREHEAD 01005 ROOM=DOCK 150OHM-25%-200MA-0.7DCR 56PF 5% 25V NOSTUFF NP0-C0G-CERM 01005 ROOM=SOC 5% 25V 56PF 01005 ROOM=SOC NOSTUFF NP0-C0G-CERM NP0-C0G-CERM ROOM=DOCK_B2B 01005 5% 56PF 25V NP0-C0G-CERM ROOM=DOCK_B2B 01005 25V 5% 56PF MF 2.2K 5% ROOM=SOC 01005 1/32W MF 5% 1/32W 01005 ROOM=SOC 2.2K 10K 1/32W ROOM=MAMBA_MESA MF NOSTUFF 5% 01005 NP0-C0G-CERM ROOM=DISPLAY_B2B 01005 56PF 25V 5% NP0-C0G-CERM 01005 25V 5% 56PF ROOM=DISPLAY_B2B NP0-C0G-CERM 25V 56PF ROOM=MAMBA_MESA 5% NOSTUFF 01005 NOSTUFF ROOM=MAMBA_MESA 5% 01005 25V 56PF NP0-C0G-CERM 25V 5% ROOM=FOREHEAD 01005 NP0-C0G-CERM 56PF 25V 5% 01005 ROOM=FOREHEAD NP0-C0G-CERM 56PF 11 11 53 52 48 41 40 37 36 32 21 20 18 16 11 11 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 4136 11 11 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 45 45 45 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 45 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 11 11 4136 45 45 46 39 38 18 11 11 46 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 41 41 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 49.
    #24958320:Intentional R4815 Change IntentionalR4815 Change TO FCAM FLEX TO MAMBA/MESA FLEX See page 46 I2C0I2C AOP Reduce undershoot when Prox Driving I2C2 I2C1 ISP #24544699: Support 1MHz #24550735: ISP I2C0 PU CKPLUS_WAIVE=I2C_PULLUP I2C_AOP_SCL 35 I2C_AOP_SCL 34 I2C_AOP_SDA 34 CKPLUS_WAIVE=I2C_PULLUP I2C_ISP_UT_SCL 26 CKPLUS_WAIVE=I2C_PULLUP CKPLUS_WAIVE=I2C_PULLUP CKPLUS_WAIVE=I2C_PULLUP I2C_AOP_SDA 35 I2C_ISP_UT_SDA 26 CKPLUS_WAIVE=I2C_PULLUP 2 1 R4802 2 1 R4801 2 1 R4815 2 1 R4811 2 1 R4810 2 1 FL4815 2 1 R4805 2 1 C4810 2 1 C4809 4 1 3 5 6 2 U4806 4 1 3 5 6 2 U4805 2 1 C4803 2 1 C4804 B1 B2 A2 A1 U4802 2 1 C4807 2 1 R4803 2 1 R4804 2 1 R4806 2 1 R4807 21 R4813 21 R4812 2 1 R4808 2 1 R4809 21 R4817 2 1 C4816 2 1 C4817 21 R4816 2 1 C4813 2 1 C4812 I2C_AOP_SDA MAKE_BASE=TRUE I2C_AOP_SDA_ISO AOP_TO_MESA_I2C_ISO_EN I2C_PROX_SCL_CONN PP1V8_SDRAM I2C_AOP_SCL_ISO PP1V8_SDRAM I2C_PROX_SDA_CONN PP1V8_SDRAM PP1V8_MESA PP1V8 I2C_UT_SCL_CONN I2C_MESA_TURTLE_SCL_CONN MAKE_BASE=TRUEI2C_ISP_NH_SDA I2C_MESA_TURTLE_SDA_CONN I2C_NH_SDA_CONN I2C_NH_SCL_CONN MAKE_BASE=TRUEI2C_AOP_SCL I2C_UT_SDA_CONN I2C_ISP_NH_SCL MAKE_BASE=TRUE PP1V8 I2C_ISP_UT_SCL MAKE_BASE=TRUE PP1V8_SDRAM I2C_ISP_UT_SDA MAKE_BASE=TRUE 0.00 1/32W0% 01005MF ROOM=MAMBA_MESA 0% MF ROOM=MAMBA_MESA 1/32W 01005 0.00 1/32W ROOM=FOREHEAD 0.00 MF 0% 01005 0.00 0% 1/32W MF ROOM=FOREHEAD 01005 1.00K ROOM=SOC 1/32W 01005 5% MF 1.00K ROOM=SOC 1/32W 01005 MF 5% ROOM=RCAM_B2B 0.00 MF 1/32W 0% 01005 25V ROOM=RCAM_B2B 01005 NP0-C0G-CERM 5% 56PF ROOM=RCAM_B2B 5% 01005 56PF 25V NP0-C0G-CERM ROOM=RCAM_B2B 1/32W 0.00 01005 0% MF ROOM=FOREHEAD 01005 NP0-C0G-CERM 56PF 25V 5% 56PF 5% ROOM=FOREHEAD 25V NP0-C0G-CERM 01005 2.2K 1/32W 5% 01005 MF 5% MF 2.2K 01005 1/32W 1% 33.2 01005 MF 1/32W ROOM=FOREHEAD ROOM=SOC 5% 01005 MF 1/32W 2.2K2.2K ROOM=SOC 01005 MF 1/32W 5% 01005 150OHM-25%-200MA-0.7DCR ROOM=FOREHEAD MF 1/32W 1% 01005 511K 56PF 5% 25V 01005 NP0-C0G-CERM ROOM=MAMBA_MESA 56PF ROOM=MAMBA_MESA 01005 25V NP0-C0G-CERM 5% X2SON6 74LVC1G3157GX X2SON6 74LVC1G3157GX ROOM=FOREHEAD 56PF 25V 5% 01005 NP0-C0G-CERM 56PF 25V 01005 ROOM=FOREHEAD 5% NP0-C0G-CERM WLP MAX20312 ROOM=SOC 0.1UF20% 6.3V 01005 X5R-CERM ROOM=SOC 1% 1/32W MF 4.7K 01005 ROOM=MAMBA_MESA 1/32W 1% 01005 4.7K MF ROOM=MAMBA_MESA 13 13 45 535248 47414037363221201816 535248 47414037363221201816 45 53 52 48 47 41 40 37 36 32 21 20 18 16 38 19 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 45 38 9 38 45 45 13 45 9 52 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 9 53 52 48 47 41 40 37 36 32 21 20 18 16 9 NC GND S VCC Z Y0 Y1 NC GND S VCC Z Y0 Y1 GND IOVCC1 VCC IOVCC2 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 50.
    6 OF 81 6OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 51.
    6 OF 81 6OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 52.
    6 OF 81 6OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 53.
    This page containsitems which differ accross all MLB designs PCIe lanes #24556007:Parallel to 100kohm R5906_RF(nostuff) #24535276: D101 EVT 1x Desense Cap (220pF) #24535235: D10 EVT 1x Desense Cap (68pF)#25811920: D10 CRB: 2x 01005 Cap for Backlight Desense D101 CRB: No additional Cap PCIE_AP_TO_WLAN_RESET_L8 PCIE_WLAN_BI_AP_CLKREQ_L8 PCIE_BB_BI_AP_CLKREQ_L8 PCIE_AP_TO_BB_RESET_L8 90_PCIE_AP_TO_BB_REFCLK_N8 90_PCIE_AP_TO_WLAN_REFCLK_P8 90_PCIE_AP_TO_WLAN_REFCLK_N8 90_PCIE_AP_TO_BB_REFCLK_P8 2 1 C2620 2 1 C2619 2 1 R5206 2 1 C1756 1 PP0801 1 PP0802 21 C0816 21 C0817 21 C0815 21 C0818 2 1 R0807 21 C0811 21 C0812 21 C0814 21 C0813 PP_VDD_MAIN PCIE_WLAN_BI_AP_CLKREQ_L MAKE_BASE=TRUE PP3V0_NAND PCIE_BB_BI_AP_CLKREQ_L PP1V8_SDRAM MAKE_BASE=TRUE90_PCIE_WLAN_TO_AP_RXD_P 90_AP_PCIE2_TXD_C_N 90_AP_PCIE2_TXD_C_P 90_AP_PCIE3_RXD_C_P 90_AP_PCIE3_RXD_C_N MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_REFCLK_N MAKE_BASE=TRUE90_PCIE_WLAN_TO_AP_RXD_N MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_TXD_P MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_REFCLK_P MAKE_BASE=TRUE90_PCIE_AP_TO_BB_REFCLK_P MAKE_BASE=TRUEPCIE_AP_TO_WLAN_RESET_L MAKE_BASE=TRUE90_PCIE_BB_TO_AP_RXD_P 90_PCIE_AP_TO_BB_REFCLK_N MAKE_BASE=TRUE 90_AP_PCIE2_RXD_C_P 90_AP_PCIE3_TXD_C_P 90_AP_PCIE3_RXD_C_N 90_AP_PCIE2_RXD_C_N 90_AP_PCIE3_TXD_C_N MAKE_BASE=TRUE90_PCIE_AP_TO_BB_TXD_P MAKE_BASE=TRUE90_PCIE_BB_TO_AP_RXD_N MAKE_BASE=TRUE90_PCIE_AP_TO_WLAN_TXD_N PP1V8 90_AP_PCIE3_RXD_C_P PCIE_WLAN_BI_AP_CLKREQ_L MAKE_BASE=TRUE90_PCIE_AP_TO_BB_TXD_N PCIE_BB_BI_AP_CLKREQ_L MAKE_BASE=TRUE PCIE_AP_TO_BB_RESET_L MAKE_BASE=TRUE 5% 220PF 10V C0G-CERM 01005 ROOM=STROBEROOM=STROBE 01005 5% 25V NP0-C0G-CERM 56PF 1/32W 100K MF 1% 01005 ROOM=RADIO_BB 68PF NP0-C0G 01005 ROOM=NAND 16V 5% SM ROOM=SOC P2MM-NSM P2MM-NSM ROOM=SOCSM 0.1UF 01005 6.3V20% X5R-CERM GND_VOID=TRUEROOM=SOC 20% 6.3V 0.1UF 01005X5R-CERM GND_VOID=TRUEROOM=SOC X5R-CERM 0.1UF 01005 6.3V20% GND_VOID=TRUEROOM=SOC 0.1UF 20% 6.3V 01005X5R-CERM GND_VOID=TRUEROOM=SOC 100K 5% 01005 ROOM=SOC MF 1/32W 20% 01005 6.3V X5R-CERM ROOM=SOC GND_VOID=TRUE 0.1UF GND_VOID=TRUE 01005 6.3V 0.1UF 20%ROOM=SOC X5R-CERM 0.1UF 20% 6.3V 01005X5R-CERM ROOM=SOC GND_VOID=TRUE X5R-CERM 01005 0.1UF 6.3V GND_VOID=TRUE ROOM=SOC 20% 53 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 5352 1917 53 52 53 48 47 41 40 37 36 32 21 20 18 16 53 8 8 528 528 53 53 53 53 53 53 53 53 8 8 8 8 8 53 53 53 48 47 46 39 29 25 18 17 16 13 12 11 9 8 7 5 8 52 53 5352 53 PP PP 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 54.
    Cellular FF SPECIFIC NFC Wifi/BT Opposite polarityon Karoo --> To LAT To UAT AP_TO_ICEFALL_FW_DWLD_REQ12 MAKE_BASE=TRUE MAKE_BASE=TRUE 1 PP5304 1PP5301 1PP5302 1PP5303 PP_VDD_BOOST PP1V8_SDRAM PP_VDD_MAIN BBPMU_TO_PMU_AMUX1 90_PCIE_BB_TO_AP_RXD_P AOP_TO_WLAN_CONTEXT_B UART_AP_TO_WLAN_RTS_L UART_BT_TO_AP_RXD PMU_TO_BB_USB_VBUS_DETECT I2S_AP_TO_BT_DOUT 90_USB_BB_DATA_P SWD_AP_TO_MANY_SWCLK SWD_AOP_BI_BB_SWDIO UART_AOP_TO_BB_TXD I2S_BB_TO_AP_BCLK BB_TO_PMU_PCIE_HOST_WAKE_L PCIE_BB_BI_AP_CLKREQ_L 90_PCIE_BB_TO_AP_RXD_N 90_PCIE_AP_TO_BB_TXD_N 90_PCIE_AP_TO_BB_REFCLK_N UART_BB_TO_AOP_RXD I2S_BB_TO_AP_LRCLK I2S_AP_TO_BB_DOUT I2S_BB_TO_AP_DIN 90_PCIE_AP_TO_BB_REFCLK_P 90_PCIE_AP_TO_BB_TXD_PUART_WLAN_TO_AP_CTS_L UART_BT_TO_AP_CTS_L UART_AP_TO_NFC_TXD UART_NFC_TO_AP_RXD UART_AP_TO_NFC_RTS_L UART_NFC_TO_AP_CTS_L AP_TO_WLAN_DEVICE_WAKE 90_PCIE_AP_TO_WLAN_TXD_N 90_PCIE_AP_TO_WLAN_REFCLK_P WLAN_TO_PMU_HOST_WAKE 90_PCIE_AP_TO_WLAN_TXD_P AP_TO_BT_WAKE PP_VDD_MAIN UART_AP_TO_BT_RTS_L BT_TO_PMU_HOST_WAKE 90_PCIE_AP_TO_WLAN_REFCLK_N 90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N PCIE_AP_TO_WLAN_RESET_L UART_WLAN_TO_AP_RXD PP1V8_SDRAM PCIE_WLAN_BI_AP_CLKREQ_L UART_AP_TO_WLAN_TXD PMU_TO_BT_REG_ON PMU_TO_WLAN_REG_ON PMUGPIO_TO_WLAN_CLK32K UART_AP_TO_BT_TXD I2S_BT_TO_AP_DIN I2S_AP_TO_BT_LRCLK AOP_TO_WLAN_CONTEXT_A NFC_SWP_MUX SE2_PRESENT NFC_SWP 50_UAT_WLAN_2G_EAST 50_UAT_WLAN_5G_WEST 50_LAT_WLAN_A_1 50_LAT_WLAN_G_1 50_LAT_WLAN_5G_EAST 50_UAT2_M BB_TO_LAT_ANT_SCLK NFC_SWP UART_BB_TO_WLAN_COEX PCIE_AP_TO_BB_RESET_L LCM_TO_MANY_BSYNC BB_TO_AP_RESET_DETECT_L BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX2 AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L AP_TO_BB_RESET_L UART_WLAN_TO_BB_COEX BB_TO_LAT_ANT_DATA PP_VDD_MAIN PP1V8_SDRAM PMU_TO_NFC_EN AP_TO_NFC_FW_DWLD_REQ AP_TO_NFC_DEV_WAKE NFC_TO_PMU_HOST_WAKE PP3V0_TRISTAR_ANT_PROX PP1V8_SDRAM BB_TO_UAT_DATA BB_TO_UAT_SCLK 50_UAT1_TUNER 50_UAT1_WEST BB_TO_STROBE_DRIVER_GSM_BURST_IND AP_TO_BB_MESA_ON AP_TO_BB_TIME_MARK AP_TO_BB_COREDUMP AP_TO_BB_IPC_GPIO1 MAKE_BASE=TRUE AP_TO_ICEFALL_FW_DWLD_REQ ICEFALL_LDO_ENABLE 50_UAT_LB_MLB_SOUTH 50_UAT_MB_HB_SOUTH 50_UUAT_LB_MLB_NORTH 90_USB_BB_DATA_N 50_UAT_WLAN_2G_WEST_PLEXER BB_BUFFER_GPO1 BB_BUFFER_GPO2 BB_TO_LAT_ANT_SCLK SE2_READY SE2_PWR_REQ BB_TO_LAT_ANT_DATA BB_TO_LAT_GPO1 BB_TO_LAT_GPO2 BB_TO_LAT_GPO3 BB_TO_NFC_CLK NFC_TO_BB_CLK_REQ SE2_PRESENT NFC_SWP_MUX I2S_AP_TO_BT_BCLK ROOM=UAT_DEBUG P2MM-NSM SM I2 TRUE I16 ieee ieee.std_logic_1164.all work.all I15 SM P2MM-NSM ROOM=UAT_DEBUG SM P2MM-NSM ROOM=UAT_DEBUG P2MM-NSM SM ROOM=UAT_DEBUG 65 38 37 32 25 23 19 68 60 58 55 53 52 48 47 41 40 37 36 32 21 20 18 16 77 58 55 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 65 20 67 52 55 13 55 12 55 12 64 20 55 11 67 40 67 36 17 13 67 13 68 13 68 11 68 20 68 52 67 52 67 52 67 52 68 13 68 11 68 11 68 11 67 52 67 5255 12 55 12 58 12 58 12 58 12 58 12 55 12 55 52 55 52 55 20 55 52 55 12 77 58 55 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 55 12 55 20 55 52 55 52 55 52 55 52 55 12 68 60 58 55 53 52 48 47 41 40 37 36 32 21 20 18 16 55 52 55 12 55 20 55 20 55 20 55 12 55 11 55 11 55 13 78 58 53 81 58 53 81 58 53 59 56 68605341 81 58 53 68 55 68 52 64 39 23 20 13 68 12 69 20 65 20 64 12 64 20 64 12 68 55 68605341 77 58 55 53 52 46 41 40 39 37 35 34 33 31 28 27 26 25 23 21 19 18 10 9 4 68 60 58 55 53 52 48 47 41 40 37 36 32 21 20 18 16 58 20 58 12 58 12 58 20 6041402919 68605855535248 47414037363221201816 76 60 75 59 68 37 26 68 12 68 12 68 12 68 12 78 78 58 73 59 73 59 75 59 67 40 76 59 68 60 68 60 68 60 53 41 78 58 78 58 68 60 53 41 68 41 68 41 68 46 64 58 64 58 81 58 53 78 58 53 55 11 PP STOCKHOLM_MLB ICEFALL_LDO_ENABLE AP_TO_NFC_DEV_WAKE AP_TO_NFC_FW_DWLD NFC_TO_BB_CLK_REQ PMU_TO_NFC_EN BB_TO_NFC_CLK NFC_SWP_MUX SE2_PRESENT UART_NFC_TO_AP_RXD PP_VDD_MAIN PP1V8_SDRAM UART_AP_TO_NFC_RTS_L SE2_PWR_REQ SE2_READY NFC_SWP UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_TXD NFC_TO_PMU_HOST_WAKE BB_TO_AP_RESET_ACT_L PMU_TO_GNSS_EN AP_TO_GNSS_TIME_MARK UART_AP_TO_GNSS_RTS_L GNSS_TO_PMU_HOST_WAKE UART_GNSS_TO_AP_CTS_L UART_GNSS_TO_AP_RXD UART_AP_TO_GNSS_TXD UART_AOP_TO_GNSS_TXD UART_GNSS_TO_AOP_RXD UART_BB_TO_AP_RXD UART_AP_TO_BB_TXD AP_TO_BB_IPC_GPIO2 RADIO_MLB AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L UART_BB_TO_AOP_RXD UART_AOP_TO_BB_TXD PCIE_BB_TO_PMU_WAKE_L AP_TO_BB_COREDUMP_TRIG TOUCH_TO_BBPMU_FORCE_PWM AP_TO_BB_IPC_GPIO 100_PCIE_AP_TO_BB_TX_P 50_UAT_WLAN_2G_WEST_PLEXER 50_UAT_LB_MLB_SOUTH UART_WLAN_TO_BB_COEX I2S_BB_TO_AP_DIN 100_PCIE_AP_TO_BB_TX_N 100_PCIE_BB_TO_AP_RX_P 100_PCIE_BB_TO_AP_RX_N PCIE_AP_TO_BB_PERST_L PCIE_AP_BI_BB_CLKREQ_L SWD_AP_TO_BB_CLK SWD_AP_BI_BB_IO USB_BB_VBUS 90_USB_BB_P 90_USB_BB_N 50_UAT_MB_HB_SOUTH 50_UUAT_LB_MLB_NORTH 50_UAT1_WEST UAT_RFFE_CLK BUFFER_GPO1 UAT_RFFE_DATA 50_UAT1_TUNER BUFFER_GPO2 LAT_RFFE_CLK LAT_RFFE_DATA RFFE_GPO1 RFFE_GPO2 RFFE_GPO3 NFC_SWP NFC_TO_BB_CLKREQ BB_TO_NFC_CLK NFC_SWP_MUX SE2_READY ICEFALL_LDO_ENABLE SE2_PRESENT SE2_PWR_REQ PP_VDD_MAIN AP_TO_BB_TIME_MARK BBPMU_TO_PMU_AMUX2 AP_TO_BB_MESA_ON AP_TO_BB_RESET_L BBPMU_TO_PMU_AMUX3 BB_TO_AP_RESET_DETECT_L BB_TO_AP_GSM_TXBURST I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_LRCLK I2S_AP_TO_BB_DOUT UART_BB_TO_WLAN_COEX AP_TO_ICEFALL_FW_DWLD PP1V8_SDRAM BBPMU_TO_PMU_AMUX1 PP_VDD_BOOST_RF 100_PCIE_AP_TO_BB_REFCLK_P 100_PCIE_AP_TO_BB_REFCLK_N RADIO_MLB_FF BB_TO_LAT_ANT_SDATA BB_TO_LAT_ANT_SCLK BUFFER_GPO2 BUFFER_GPO1 UAT_TUNER_RFFE_DATA UAT_TUNER_RFFE_CLK VDD_TUNER_RFFE_VIO_1V8 PP3V0_TRISTAR_ARC_PROX 50_UAT2_M 50_UAT_WLAN_5G_EAST 50_WLAN_G_1 50_WLAN_A_1 50_UAT_MB_HB_SOUTH 50_UAT_LB_MLB_SOUTH 50_UAT_WLAN_5G_WEST 50_UAT_WLAN_2G_EAST 50_UAT1_TUNER 50_UUAT_LB_MLB_NORTH 50_UAT_WLAN_2G_WEST_PLEXER 50_UAT1_WEST PP PP PP WIFI_MLB 50_UAT2_M 50_UAT_WLAN_5G_WEST I2S_AP_TO_BT_DOUT UART_WLAN_TO_BB_COEX 50_WLAN_G_1 UART_AP_TO_BT_TXD UART_WLAN_TO_AP_CTS_L I2S_BT_TO_AP_DIN AP_TO_WLAN_DEV_WAKE 100_PCIE_AP_TO_WLAN_TX_N 100_PCIE_AP_TO_WLAN_REFCLK_P UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L UART_BT_TO_AP_CTS_L UART_AP_TO_WLAN_TXD PCIE_WLAN_TO_PMU_WAKE 100_PCIE_AP_TO_WLAN_TX_P 100_PCIE_WLAN_TO_AP_RX_P PMU_TO_BT_REG_ON PP_VDD_MAIN 100_PCIE_WLAN_TO_AP_RX_N PP1V8_SDRAM BT_TO_PMU_HOST_WAKE UART_BB_TO_WLAN_COEX I2S_AP_TO_BT_LRCK I2S_AP_TO_BT_BCLK AOP_TO_WLAN_CONTEXT_B AOP_TO_WLAN_CONTEXT_A 50_UAT_WLAN_2G_EAST AP_TO_BT_WAKE PMU_TO_WLAN_32K PMU_TO_WLAN_REG_ON 100_PCIE_AP_TO_WLAN_REFCLK_N PCIE_AP_TO_WLAN_PERST_L PCIE_AP_BI_WLAN_CLKREQ_L 50_UAT_WLAN_5G_EAST 50_WLAN_A_1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 55.
    D11_JP: C7700_RF,C7702_RF, C7703_RF,C7704_RF NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF,C7707_RF NOSTUFF:C7706_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF C7700_RF,C7702_RF, C7703_RF,C7704_RF D111_WIFI: BOM OPTIONS: FEBRUARY 1, 2016 D1X WIFI_MLB (PERENNIAL) C7700_RF, C7703_RF,C7704_RF D10_ROW: NOSTUFF: C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF C7700_RF, C7703_RF,C7704_RF D10_JP: BLUETOOTH UART POWER WLAN PCIE CONTROL CLOCKS WLAN UART AOP AUDIO COEX ANTENNA D11_ROW: NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF D101_WIFI: C7700_RF, C7703_RF,C7704_RF NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF C7700_RF,C7702_RF, C7703_RF,C7704_RF NOSTUFF:C7706_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 5355 PCIE_WLAN_BI_AP_CLKREQ_L PMUGPIO_TO_WLAN_CLK32K 90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_N 90_PCIE_AP_TO_WLAN_TXD_P 90_PCIE_AP_TO_WLAN_TXD_N PCIE_AP_TO_WLAN_RESET_L AP_TO_WLAN_DEVICE_WAKE I2S_AP_TO_BT_LRCLK 90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N WLAN_TO_PMU_HOST_WAKE 50_LAT_WLAN_5G_EAST 50_LAT_WLAN_G_1 50_LAT_WLAN_A_1 2016-06-1400064008778 ENGINEERING RELEASED IND,0.7NH,UH-Q,01005 IND,0.6NH,UH-Q,01005 152S1986 118S0724 152S2054 1 1 1 1 D11_ROWCRITICAL L7701_RF CAP,CER,0.2PF,+/-0.05PF,01005 CAP,CER,0.2PF,+/-0.05PF,01005 D11_ROW D11_ROW D11_ROW D11_ROW D11_ROW CRITICALC6729_RF RES,MF,0 OHM,1/32W,01005 IND,9.1NH,UH-Q,0201 RES,MF,0 OHM,1/20W,0201 D11_ROW CRITICAL R6711_RF CRITICAL C7729_RF CRITICAL TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE 1 CRITICAL117S0161 RES,MF,0 OHM,1/32W,01005 D11_JPR7701_RF CRITICAL152S1853 IND,9.1NH,UH-Q,01005 D11_JPL7701_RF1 1 CRITICAL D11_JPL7700_RFRES,MF,0 OHM,1/32W,01005117S0161 1 CRITICALC7729_RF131S0893 CAP,CER,0.2PF,+/-0.05PF,01005 D11_JP 1 CRITICALC7705_RF131S0893 CAP,CER,0.2PF,+/-0.05PF,01005 D11_JP 1 CRITICAL D11_JPR7700_RF117S0161 RES,MF,0 OHM,1/32W,01005 C6729_RFIND,7.5NH,UH-Q,02011 D11_JPCRITICAL152S2055 CRITICALR6711_RFCAP,3.9PF,+/-1.0PF,0201,HI-Q D11_JP1131S0593 D11_JPCRITICALCAP,CER,0.3PF,+/-0.05PF,01005 C7708_RF1131S0648 D11_JPCRITICALR7704_RF1152S1986 IND,FILM,2.2NH,UH-Q,01005 1 CRITICALR7711_RF152S1976 IND,0.7NH,UH-Q,01005 D11_JP R7702_RF CRITICAL1131S0400 CAP,CER,3.5PF+/-0.1,01005 D11_JP R7703_RF1 CRITICAL152S00273 IND,0.6NH,UH-Q,01005 D11_JP CAP,CER,3.5PF+/-0.1,01005131S0400 1 CRITICALR7702_RF 152S00273 CRITICAL1 R7703_RF 152S1976 R7711_RF1 D11_ROW131S0893 C7705_RF CRITICAL1 D11_ROW131S0893 CRITICAL1 CAP,CER,0.2PF,+/-0.05PF,01005131S0893 C7705_RF D111CRITICAL1 CAP,CER,0.2PF,+/-0.05PF,01005131S0893 C7729_RF D111CRITICAL1 TRUE IND,0.7NH,UH-Q,01005152S1976 R7711_RF CRITICAL1 D111 CAP,CER,3.5PF+/-0.1,01005131S0400 1 CRITICALR7702_RF D111 IND,0.6NH,UH-Q,01005152S00273 CRITICAL D1111 R7703_RF IND,FILM,2.2NH,UH-Q,01005 L7700_RF R7700_RF CRITICAL CRITICAL CRITICAL RES,MF, 0 OHM,1/20W, 0201 D111 CRITICALC6729_RF R7700_RF RES,MF,0 OHM,1/32W,01005 1 117S0161 R7701_RF D111CRITICAL1 IND,9.1NH,UH-Q,01005 RES,MF,0 OHM,1/32W,01005 RES,MF,0 OHM,1/32W,01005 IND,9.1NH,UH-Q,0201 152S1853 CRITICAL CRITICAL D111 L7700_RF IND,6.2NH,UH-Q,01005 IND, 0.8NH,UH-Q,01005 R7700_RF CRITICAL D101 IND, 0.8NH,UH-Q,01005152S1998 117S0161 1 152S00029 1 77 76 CSA PAGE WIFI FRONT-END CRITICAL C7702_RF C6729_RF CAP,CER,0.3PF,+/-0.05,01005 CRITICAL RES,MF,0 OHM,1/32W,01005 D10_ROW D10_ROW D10_ROW 131S0893 C7706_RFCAP,CER,0.2PF,+/-0.05,01005131S0893 1 CRITICAL C7706_RFCAP,CER,0.2PF,+/-0.05,01005131S0893 D1011 CRITICALR7703_RF1152S00029 IND,1.1NH,UH-Q,01005 IND,1.1NH,UH-Q,01005152S00029 1 R7703_RF D101 C7705_RF 131S0648 C7705_RF1 CRITICAL 131S0648 C7705_RF1 D101 D10_JP 1 D10_JP 1 D10_JP 152S1980 1 117S0161 1 D11_ROW D11_ROW R7701_RF IND,9.1NH,UH-Q,01005 RES,MF,0 OHM,1/32W,01005 1 IND,FILM,2.2NH,UH-Q,01005 D11_ROW 117S0161 152S1853 117S0161 CRITICAL117S0161 TRUE CRITICAL1 1 D111 D111 D111 TRUE R6711_RF R7704_RF TRUE 1 1 50_UAT2_M 50_UAT_WLAN_5G_WEST 50_UAT_WLAN_2G_EAST UART_BB_TO_WLAN_COEX UART_WLAN_TO_BB_COEX I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN I2S_AP_TO_BT_BCLK AOP_TO_WLAN_CONTEXT_B UART_BT_TO_AP_CTS_L AOP_TO_WLAN_CONTEXT_A UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD UART_WLAN_TO_AP_CTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_RTS_L UART_AP_TO_WLAN_TXD AP_TO_BT_WAKE PMU_TO_BT_REG_ON PMU_TO_WLAN_REG_ON BT_TO_PMU_HOST_WAKE PP1V8_SDRAM PP_VDD_MAIN 2 3 2 3 3 3 2 3 2 PDF PAGE PERENNIAL CONTENTS TRUE 117S0161 R7704_RF D111 L7701_RF CRITICAL 1152S2054 1 TRUE 152S1986 118S0724 1 117S0161 D101R7711_RF1 RES,MF,0 OHM,1/32W,01005 D1011 RES,MF,0 OHM,1/32W,01005 R7702_RF TRUE IND,2.4NH,UH-Q,010051 R7704_RF D101 TRUE C7708_RF CRITICAL1 D101CAP,CER,0.3PF,+/-0.05PF,01005 RES,MF, 0 OHM,1/20W, 0201 TRUE 1 CRITICALR6711_RF IND,9.1NH,UH-Q,0201 TRUE 1 D101 TRUE CRITICAL1 D101 RES,MF,0 OHM,1/32W,01005 D101R7701_RF117S0161 1 CRITICAL RES,MF,0 OHM,1/32W,01005 D1011117S0161 117S0161 117S0161 152S1988 131S0648 118S0724 152S2054 CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL 1 1 1 131S0404 R7704_RF 152S2061 117S0161 CAP,CER,0.3PF,+/-0.05,01005 RES,MF,0 OHM,1/32W,01005 152S2043 CRITICAL1 L7701_RF D101 1 CRITICAL152S2043 IND,6.2NH,UH-Q,01005 152S1998 CRITICAL1 L7700_RF D101 1 TRUE TRUE 152S1988 R7704_RFIND,2.4NH,UH-Q,010051 D10_ROWCRITICAL 117S0161 CRITICAL D10_ROWRES,MF,0 OHM,1/32W,01005 R7702_RF1 117S0161 RES,MF,0 OHM,1/32W,01005 R7711_RF CRITICAL1 D10_ROW RES,MF,0 OHM,1/32W,01005 117S0161 1 1131S0648 R7703_RF R6711_RF C6729_RF R7700_RF R7701_RF L7700_RF C7702_RF CRITICAL D10_JP CRITICAL L7701_RF CRITICAL D10_JP D10_JP CAP,CER,0.3PF,+/-0.05,01005 IND,1.1NH,UH-Q,01005 CAP,CER,0.2PF,+/-0.05,01005 RES,MF,0 OHM,1/32W,01005 CRITICAL D10_JP D10_JP D10_JP D10_JP CRITICAL D10_JPCRITICAL D10_JPCRITICAL D10_JP CRITICAL CRITICAL CRITICAL CRITICAL C7706_RF R7711_RF R7702_RF CRITICALRES,MF,0 OHM,1/32W,01005 IND,1.0NH,UH-Q,01005 IND,7.5NH,UH-Q,01005 CAP,3.9PF,+/-1.0PF,01005 IND,6.2NH,UH-Q,01005152S2043 IND,6.2NH,UH-Q,01005152S2043 CRITICAL D10_ROWR6711_RF117S0161 1 RES,MF,0 OHM,1/32W,01005 TRUE CRITICALC7702_RF1 TRUE D10_ROW152S2043 IND,6.2NH,UH-Q,01005 RES,MF,0 OHM,1/32W,01005 R7700_RF D10_ROWCRITICAL1117S0161 TRUE D10_ROWCRITICALC6729_RF1 IND,9.1NH,UH-Q,01005152S1853 TRUE 152S1998 1 IND, 0.8NH,UH-Q,01005 CRITICALL7700_RF D10_ROW L7701_RF1 CRITICAL152S2043 IND,6.2NH,UH-Q,01005 D10_ROW 1 R7701_RF D10_ROW117S0161 CRITICAL TRUE RES,MF,0 OHM,1/32W,01005 TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. CK APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL IO IO IO IO IO IO OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IO OUT IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 56.
    TDI TDO WIFI/BT 56 53 54 55 5354 55 53 54 55 53 54 55 53 54 55 53 54 53 54 53 54 53 54 55 53 54 55 53 54 53 54 53 54 55 53 54 55 53 54 55 53 54 53 54 55 535455 535455 5354 55 535455 5354 5354 55 53 54 55 53 54 5354 5354 535455 535455 535455 56 I2S_AP_TO_BT_LRCLK AP_TO_WLAN_DEVICE_WAKE PMUGPIO_TO_WLAN_CLK32K 90_PCIE_AP_TO_WLAN_REFCLK_N PCIE_WLAN_BI_AP_CLKREQ_L 90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N 90_PCIE_AP_TO_WLAN_REFCLK_P WLAN_TO_PMU_HOST_WAKE 90_PCIE_AP_TO_WLAN_TXD_N 90_PCIE_AP_TO_WLAN_TXD_P PCIE_AP_TO_WLAN_RESET_L12 PMUGPIO_TO_WLAN_CLK32K12 90_PCIE_AP_TO_WLAN_TXD_P12 90_PCIE_AP_TO_WLAN_REFCLK_P12 AP_TO_WLAN_DEVICE_WAKE12 90_PCIE_AP_TO_WLAN_REFCLK_N2 1 90_PCIE_AP_TO_WLAN_TXD_N12 WLAN_TO_PMU_HOST_WAKE12 50_LAT_WLAN_A_1 50_LAT_WLAN_G_1 PCIE_AP_TO_WLAN_RESET_L 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 65 60 58 57 53 51 50 49 48 47 46 45 36 34 32 27 24 21 18 6 4 1 WLAN_RF 92 1413 35 15 29 28 31 30 33 7 8 22 23 25 26 19 20 16 17 54 2 62 64 61 11 10 9 12 3 63 42 41 43 44 93 37 40 39 38 56 55 66 59 5 52 WLAN_RF 2 1 C7606_RF 1 PP7623_RF 1 PP7622_RF 1 PP7621_RF 1 PP7620_RF 1 PP7624_RF 2 1 C7603_RF 21 L7600_RF 4 3 2 1 C7604_RF 2 1 C7602_RF 2 1 C7607_RF 2 1 C7601_RF 2 1 C7600_RF 2 1 R7600_RF 1 PP7608_RF 1 PP7609_RF 1 PP7616_RF 1 PP7611_RF 1 PP7610_RF 1 PP7612_RF 1 PP7613_RF 1 PP7614_RF 1 PP7615_RF 1 PP7618_RF 1 PP7619_RF 1 PP7600_RF 1 PP7601_RF 1 PP7603_RF 1 PP7617_RF 1 PP7604_RF 1 PP7605_RF 1 PP7606_RF 1 PP7607_RF 339S00199339S00201 ALTERNATE ALT WIFI/BT MODULEWLAN_RF LBEE5W11GJ-943 LGA P2MM-NSM AP_TO_BT_WAKE NOSTUFF SR_LVX AOP_TO_WLAN_CONTEXT_B 50_WLAN_A_0 BT_TO_PMU_HOST_WAKE 50_WLAN_G_0 1 UART_WLAN_TO_AP_CTS_L UART_AP_TO_BT_RTS_L OMIT X5R UART_AP_TO_BT_TXD I2S_AP_TO_BT_BCLK PMU_TO_BT_REG_ON JTAG_WLAN_SEL CERM 7.5UF 20% 4V LGA LBEE5W11GJ-943 NP0-C0G JTAG_WLAN_TMS UART_AP_TO_WLAN_RTS_L AP_TO_BT_WAKE I2S_BT_TO_AP_DIN AOP_TO_WLAN_CONTEXT_A VIN_LDO UART_BB_TO_WLAN_COEX UART_WLAN_TO_BB_COEX PMU_TO_WLAN_REG_ON JTAG_WLAN_TRST_L JTAG_WLAN_TCK UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_BT_TO_AP_RXD UART_AP_TO_BT_RTS_L UART_BT_TO_AP_CTS_L I2S_AP_TO_BT_DOUT OMIT OMIT 1 01005 0.01UF X5R 10% 6.3V WLAN WLAN PP_VDD_MAIN 01005 PP1V8_SDRAM OMIT UART_BT_TO_AP_CTS_L OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM SM OMIT JTAG_WLAN_SEL PMU_TO_WLAN_REG_ON PMU_TO_BT_REG_ON UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD AOP_TO_WLAN_CONTEXT_A AOP_TO_WLAN_CONTEXT_B JTAG_WLAN_SEL PP1V8_SDRAM JTAG_WLAN_TRST_L BT_TO_PMU_HOST_WAKE JTAG_WLAN_TMS JTAG_WLAN_TCK UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD SR_LVX_1 0.01UF WLAN 6.3V 10% 01005 P2MM-NSM OMIT SM 27PF WLAN 16V 5% 01005 NP0-C0G P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM 10K WLAN 5% 01005 MF 1/32W P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM SM P2MM-NSM SM OMIT SM P2MM-NSM SM OMITP2MM-NSM P2MM-NSM SM 100PF WLAN 16V 5% 01005 NP0-C0G 2.2UH-20%-0.68A-0.25OHM 0806 P2MM-NSM OMIT SM 0402 10UF 6.3V 20% 0402-9 CERM-X5R P2MM-NSM OMIT SM 27PF 16V 5% P2MM-NSM SM OMIT SM P2MM-NSM P2MM-NSM OMIT SM 2 2 2 2 1 2 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 2 1 2 2 2 1 2 1 TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER TABLE_ALT_ITEM BI PP IN IN IN OUT OUT OUT IN IN OUT IN BI OUT IN IN IN OUT IN PP PP PP IN PP IN IN OUT PP PP PP PP PP PP PP SYM 2 OF 2 THRM_PAD GND THRM_PAD SYM 1 OF 2 JTAG_TMS FAST_UART_CTS_IN BT_DEV_WAKE VBAT_RF_VCC VBAT_RF_VCC VBAT_VCC VBAT_VCC VDDIO_1P8V BT_PCM_OUT PCIE_RDP PCIE_RDN WL_HOST_WAKE PCIE_REFCLK_P PCIE_TDN PCIE_TDP PCIE_CLKREQ* PCIE_PERST* PCIE_REFCLK_N CXT_A/JTAG_TDI CXT_B/JTAG_TDO SR_VLX VIN_LDO LPO_IN SECI_RX SECI_TX WL_REG_ON BT_REG_ON JTAG_TRST* JTAG_SEL JTAG_TCK WL_DEV_WAKE FAST_UART_TX FAST_UART_RX FAST_UART_RTS_OUT 5G_ANT_CORE0 5G_ANT_CORE1 BT_UART_RXD BT_UART_TXD BT_UART_CTS* BT_UART_RTS* BT_PCM_CLK BT_PCM_SYNC BT_PCM_IN BT_HOST_WAKE 2G_ANT_CORE0 2G_ANT_CORE1 PP PP PP PP PP PP PP IO IO IN PP OUT PP IN IN IN PP IN OUT IN OUT IN PP BI PP 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 57.
    5GHZ UAT WIFI UPPERANTENNA FEEDS 2GHZ UAT 5354 53 54 53 54 55 55 50_LAT_WLAN_5G_EAST 21 R7704_RF 31 2 W5BPF_RF 2 1 C7711_RF 2 1 C7729_RF 21 R7711_RF 21 3 JUAT2_RF 2 1 C7709_RF 2 1 C7710_RF 21 R7702_RF 2 1 C7707_RF 2 1 C7708_RF 2 1 C7706_RF 21 R7703_RF 2 1 C7705_RF OMIT OMIT NP0-C0G 16V OMIT_TABLE OMIT_TABLE 1/32W 0% MF 01005 +/-0.1PF 50_UAT_WLAN_5G_WEST 2.4NH+/-0.1NH-0.370A 50_UAT_WLAN_2G_EAST 0.6PF OMIT_TABLE 01005 NP0-C0G 0.2PF OMIT_TABLE WLAN_UP_RFFE 01005 NOSTUFF +/-0.1PF 16V +/-0.05PF 01005 1/32W 01005 WLAN_UP_RFFE 50_WLAN_A_0 50_UAT2_BPF50_UAT_WLAN_5G_BPF 50_UAT2_TEST 50_UAT2_M LFB185G53CGZE200 16V +/-0.1PF 01005 NP0-C0G WLAN_UP_RFFE 01005 0.00 MM8830-2600B UP_RFFE F-RT-SM 0.2PF WLAN_UP_RFFE 16V +/-0.1PF 01005 NP0-C0G 0.2PF 16V +/-0.1PF 01005 NP0-C0G 0.00 01005 MF 0.00 0% MF 1 5.15-5.85GHZ-1.2DB 0% WLAN_UP_RFFE CERM 16V WLAN_UP_RFFE 01005 NP0-C0G +/-0.1PF 0.2PF 50_WLAN_G_0 OMIT_TABLE WLAN_UP_RFFE 16V NP0-C0G 01005 WLAN_UP_RFFE OMIT OMIT 16V +/-0.1PF 0.2PF 1/32W 0.2PF0.2PF OMIT OMIT BI C R GND BI BIBI BI 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 58.
    JUNE 9, 2016 ALTERNATES STOCKHOLM_MLB BOMOPTIONS 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 5358 AP_TO_NFC_FW_DWLD_REQ 00064008778 ENGINEERING RELEASED AP_TO_NFC_DEV_WAKE UART_NFC_TO_AP_CTS_L PP_VDD_MAIN NFC_SWP PP1V8_SDRAM PMU_TO_NFC_EN BB_TO_NFC_CLK UART_AP_TO_NFC_TXD UART_AP_TO_NFC_RTS_L UART_NFC_TO_AP_RXD NFC_TO_BB_CLK_REQ NFC_TO_PMU_HOST_WAKE SE2_READY SE2_PWR_REQ SE2_PRESENT NFC_SWP_MUX ICEFALL_LDO_ENABLE 131S00118 180PF, 0201 2% 50V 131S00118 180PF, 0201 2% 50V 131S00033 680PF, 0201 2% 50V 270PF, 0201 2% 25V 100PF, 0201 2% 50V 680PF, 0201 2% 50V 2 1 C7516_RF D11_ROW 1 D11_ROWC7518_RF D11_ROW270PF, 0201 2% 25V1131S00081 C7514_RF 131S00033 1 D11_JPC7516_RF 131S0731 C7518_RF D11_JP1 C7514_RF D11_JP1131S00081 C7516_RF D111 131S00026 1 820PF, 0201 2% 50V C7516_RF D10_ROW C7516_RF131S0825 1 D10_JP C7518_RF1 D10_JP 131S0883 1 220PF, 0201 2% 50V C7512_RF131S00055 1 D10_JP D101820PF, 0201 2% 50V1131S00026 C7516_RF 1131S00117 120PF, 0201 2% 50V C7518_RF D101 132S0400 ?0.22UF 20% 6.3V 01005C7504_RF132S0436 131S00081 270PF, 0201 2% 25V C7514_RF1 D111 D1111 C7518_RF 220PF, 0201 2% 50V131S0883 D1011 C7514_RF 1131S00055 22PF, 0201 2% 50V D101C7512_RF 131S0883 C7514_RF1 D10_ROW220PF, 0201 2% 50V C7512_RF131S00055 1 D10_ROW22PF, 0201 2% 50V 131S00117 C7518_RF D10_ROW1 120PF, 0201 2% 50V 680PF, 0201 2% 50V1131S00033 D10_JPC7514_RF 22PF, 0201 2% 50V 560PF, 0201 2% 50V 131S00019 150PF, 0201 2% 50V TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM PART# DESCRIPTIONQTY TABLE_5_HEAD BOM OPTIONREFERENCE DESIGNATOR(S) DESCRIPTION BOM OPTIONREFERENCE DESIGNATOR(S) PART NUMBER ALTERNATE FORPART NUMBER TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM PART# DESCRIPTIONQTY TABLE_5_HEAD BOM OPTIONREFERENCE DESIGNATOR(S) TABLE_5_ITEM ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. CK APPD1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM OUT OUT IN IN IN OUT OUT OUT IN IN IN IN IN IN IN OUT IO 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 59.
    NFC LOAD SWITCH DONEFOR BEST ROUTING 180 PHASE SHIFT INTRODUCED BY BALUN NFC CONTROLLER STOCKHOLM 5V BOOSTER NFC FRONT END 5357 53 57 58 53 57 5357 5357 53 57 58 5357 53 57 58 535758 535758 535758 535758 535758 5357 5357 5357 535758 VOLTAGE=1.80V VOLTAGE=1.80V AP_TO_NFC_FW_DWLD_REQ A1A2 B2 B1 NFCSW_RF 2 1 R7599_RF 21 R7520_RF F2 B3 B4 A6 F1 E6 C3 E5 G2 E2 F7 E1 C6 C7 D5 G5 G3 B1 G4 E7 A5 B7 E3 E4 A4 B5 G1 F6 F5 C1 A1 C2 D3 A3 D1 A7 C5 F4 G6 G7 B2 C4 B6 D2 A2 F3 D6 D4 D7 NFC_RF 2 1 C7518_RF 21 C7512_RF 21 C7514_RF 2 1 C7509_RF 2 1 C7510_RF 21 R7509_RF 21 R7508_RF 1 PP7509_RF 1 PP7508_RF 1 PP7507_RF 1 PP7506_RF 1 PP7505_RF 1 PP7504_RF 1 PP7503_RF 2 1 C7527_RF 2 1 C7506_RF 2 1 C7526_RF 2 1 C7516_RF 2 1 C7515_RF 1TP7500_RF 41 32 BALUN_RF 1TP7505_RF 2 1 C7504_RF 2 1 C7520_RF 2 1 C7521_RF 2 1 C7522_RF 2 1 C7500_RF 21 R7502_RF 21 L7501_RF 21 L7500_RF 21 L7502_RF 2 1 C7517_RF 2 1 C7511_RF A2 A1A3 B2 B1 C2 C1 B3 C3 NFBST_RF 21 C7507_RF 21 C7508_RF 2 1 C7505_RF 2 1 C7503_RF 2 1 C7502_RF PP1V8_SDRAM PP_VDD_MAIN PP_VDD_MAIN_NFC SE2_PWR_REQ BB_TO_NFC_CLK UART_NFC_TO_AP_RXD PMU_TO_NFC_EN NFC_RXN PP_VDD_MAIN_NFCPP_VDD_MAIN VDD_NFC_AVDD VDD_NFC_5V NFC_BALN NFC_BOOST_SW PP_VDD_MAIN_NFC NFC_ANT_MATCH NFC_RXN_CAP NFC_TXP NFC_ANT NFC_SWP_MUX SE2_READY VDD_NFC_ESE NFC_BOOST_EN NFC_RXP VDD_NFC_ESE VDD_NFC_AVDD VDD_NFC_DVDD SE2_PRESENT NFC_TO_BB_CLK_REQ NFC_RXN NFC_RXP_CAP NFC_TEST_OUT PP_VDD_MAIN_NFC NFC_TXN NFC_TXP NFC_RXP NFC_BOOST_EN VDD_NFC_5V UART_AP_TO_NFC_TXD UART_NFC_TO_AP_RXD UART_AP_TO_NFC_RTS_L AP_TO_NFC_DEV_WAKE UART_NFC_TO_AP_CTS_L NFC_BALP UART_NFC_TO_AP_CTS_L PMU_TO_NFC_EN NFC_TO_PMU_HOST_WAKE NFC_TO_PMU_HOST_WAKE UART_AP_TO_NFC_RTS_L ICEFALL_LDO_ENABLE UART_AP_TO_NFC_TXD NFC_TEST_OUT NFC_SWP PP1V8_SDRAM VDD_NFC_TVDD PP1V8_SDRAM SE2_PWR_REQ NFC_VMID AP_TO_NFC_DEV_WAKE NFC_TXN FPF1204UCX 15UF FAN48614BUC50X 15UF 1.8UH-0.7A 160NH-10%-0.48A-0.33OHM 160NH-10%-0.48A-0.33OHM 1UF 0.00 1UF 0.1UF 100PF100PF 1UF 0.22UF ATB161006F-20011 1000PF 820PF 2.2UF2.2UF 2.2UF P2MM-NSM P2MM-NSM P2MM-NSM P2MM-NSM P2MM-NSM P2MM-NSM P2MM-NSM 560 560 680PF 680PF 220PF 22PF 120PF PN67VEU3-B001D004 0.00 1.00K 1UF 1000PF 1000PF NFC NFC NFC NFC NFC NFC NFC NFC NFC NFC NFCNFC NFC NFC NFC NFC NFC NFC NFC NFC NFC NFC NFC NFC OMIT OMIT OMIT_TABLE OMIT OMIT OMIT OMIT OMIT OMIT OMIT OMIT_TABLE OMIT OMIT_TABLE NOSTUFF 6.3V 6.3V 10V10V 6.3V 16V16V 10V 6.3V 25V 25V 6.3V6.3V 6.3V 25V 25V 50V 50V 50V 10V 25V 25V 20% 20% 20% 0% 20% 20% 5%5% 20% 20% 2% 2% 20%20% 20% 1% 1% 2% 2% 2% 2% 2% 1% 5% 20% 2% 2% WLCSP-COMBO 0402-1 WLCSP 0402-1 0603 0402 0402 0201 01005 0201 01005 0100501005 0201 01005 TP-P55 SM SM-TP1P25-TOP 0201 0201 0201-10201-1 0201-1 SM SM SM SM SM SM SM 201 201 0201 0201 0201 0201 0201 UFLGA 0201 01005 0201 0201 0201 X5R X5R X5R MF X5R X5R-CERM NP0-C0GNP0-C0G X5R X5R C0G-NP0 C0G-NP0 X5R-CERMX5R-CERM X5R-CERM MF MF C0G-NP0 C0G-NP0 C0G C0G-CERM NP0-C0G MF MF X5R C0G-NP0 C0G-NP0 1/32W 1/20W 1/20W 1/20W 1/32W 2 12 2 12 12 12 1212 12 12 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 12 2 2 12 22 1 2 1 VIN GND VOUT ON SMX_RST* EXT_MUX SE2_BUSY XTAL2 IC2 TX RX NFC_CLK_XTAL1 IRQ DWL ESE_IO1 RTS VEN CLK_REQ CTS SVDD_REQ VDD VBAT PVDD VUP SIM_PMU_VCC TVDD AVDD SVDD ESE_VDD VMID TX2 RX- TX1 RX+ WKUP_REQ SE2_ENABLE TX_PWR_REQ SIM_SWIO SE2_SVDD_IN GPIO0 IC00 IC01 ESE_DWPM_DBG ESE_DWPS_DBG PVSS TVSS DVSS AVSS DVSS AVSS AVSS VSS SMX_CLK OUT OUT PP PP PP PP PP PP PP BI IN OUT IN IN A NC NC UNBAL BAL0 GND BAL1 A NC NC IN IN OUT OUT IN IN IN OUT IN OUT NC SW PGND PGND VIN SW VOUT AGND EN VOUT NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 60.
    D10 NORTH-SOUTH METROCIRC D10RADIO_MLB_FF FEB 19, 2016 339S00086 WIFI LOWER ANTENNA FEED D10 EAST-WEST METROCIRC 339S00110 LOWER MLB EAST MLB ADD REV ID FOR D10/D11 HERE THROUGH METROCIRC UPPER MLB COAX WEST MLB 59 53 53 59 50_LAT_WLAN_A_1 50_LAT_WLAN_G_1 50_LAT_WLAN_5G_EAST 2016-06-1400064008778 ENGINEERING RELEASED 21 R6711_RF 2 1 C6729_RF 11 10 7 5 1 3 28 27 26 25 24 23 22 21 12 9 8 6 4 2 MCEW_RF 2 6 4 5 3 1 W25DI_RF 1 3 2 JLAT3_RF 2 1 C7704_RF 21 R7701_RF 2 1 C7703_RF 2 1 L7703_RF 2 1 C7702_RF 21 C7701_RF 21 R7700_RF 2 1 L7702_RF 2 1 C7700_RF 41 5 3 2 W2BPF_RF 2 1 L7701_RF 21 L7700_RF 9 11 7 4 2 6 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 12 10 8 5 3 1 MCNS_RF 50_UAT_MB_HB_SOUTH 50_UAT_LB_MLB_SOUTH FLTPSSL-381E TRUE GND I11 TRUE GND I12 INOUT INOUT INOUT INOUT INOUT INOUT SM OMIT TRUE 0.00 0% MF WLAN_RFFE 1/32W 01005 11 OMIT 9.1NH-3%-0.17A-1.7OHM 01005 WLAN_RFFE 885118 WLAN-BT-LTE LGA NP0-C0G WLAN_RFFE OMIT 01005 0.2PF 16V +/-0.1PF 9.1NH-3%-0.17A-1.7OHM WLAN_RFFE 01005 01005 WLAN_RFFE OMIT 0% 1/32W 0.00 MF WLAN_RFFE NP0-C0G 01005 16V 3.6PF +/-0.1PF OMIT 4.3NH-3%-0.270A 01005 WLAN_RFFE 01005 WLAN_RFFE 4.0NH-+/-0.1NH-0.27A OMIT NP0-C0G WLAN_RFFE 0.2PF +/-0.1PF 01005 16V OMIT 0.00 1/32W WLAN_RFFE 0% MF OMIT 16V NP0-C0G 01005 WLAN_RFFE 0.2PF +/-0.1PF MM7829-2700 F-ST-SM WLAN_RFFE LGA LFD212G45MP2E013 FLTPSSL-382E SM 7.5NH+/-3%-0.2A OMIT UP_RFFE 01005 OMIT UP_RFFE 16V NP0-C0G +/-0.1PF 3.9PF 01005-1 INOUT INOUT 50_WLAN_G_1_BPF 50_WLAN_G_1_M 50_LAT_WLAN_M 50_WLAN_A_1_DPLX 50_LAT_WLAN_SOUTH50_LAT_WLAN_NORTH 50_UAT1_EAST 50_WLAN_G_1_DPLX 50_LAT_WLAN_SOUTH 50_UAT1_EAST 50_LAT_WLAN_NORTH 50_UAT_WLAN_2G_WEST 50_UAT_WLAN_2G_WEST 50_UAT_WLAN_2G_EAST 50_UAT1_WEST 50_UAT_WLAN_5G_WEST 50_UUAT_LB_MLB_NORTH 50_UAT_WLAN_2G_WEST_PLEXER 01005 11 11 1 1 ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. IO BI OUT IOIN GND SIGNAL2-W SIGNAL1-W SIGNAL3-W GND SIGNAL3-E SIGNAL2-E SIGNAL1-E GND P3 P2 P1 IO INPUT GND OUTPUTIO BI SIGNAL1-U SIGNAL1-L SIGNAL2-L SIGNAL3-L GND GND SIGNAL3-U SIGNAL2-U IO IO IO IO 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 61.
    UAT GROUND RINGSTANDOFF FOR ANY COMPONENT CHANGE. PLEASE CONTACT ANTENNA (MATT MOW) 5G WIFI ALT UAT1 GND LB/MLB/GNSS/MB/HB UAT TUNER FLEX STANDOFF 5360 53 60 53 60 53 53 53 53 53 PP3V0_TRISTAR_ANT_PROX 2 BB_TO_UAT_DATA2 BB_TO_UAT_SCLK2 PP3V0_TRISTAR_ANT_PROX 2 BB_BUFFER_GPO1 BB_BUFFER_GPO2 BB_TO_LAT_ANT_DATA PP1V8_SDRAM PP3V0_TRISTAR_ANT_PROX BB_TO_UAT_SCLKBB_TO_UAT_DATA 2 1 L6710_RF 21 C7731_RF 2 1 C7730_RF 2 1 C6714_RF 2 1 C6700_RF 2 1 L6707_RF 21 L8008_RF 2 1 L8009_RF 2 1 C5909_RF 2 1 C5908_RF 2 1 C5905_RF 2 1 C5904_RF 21 L8007_RF 21 C6704_RF 1 SUAT1_RF 21 C6716_RF 21 R6706_RF 2 1 C6720_RF 4 2 6 1 5 3 USPDT2_RF 2 1 C6721_RF 2 1 L7709_RF 1 PP8000_RF 1 TP8000_RF 109 87 65 43 21 TUNFX_RF 21 FL6703_RF 21 FL6700_RF 2 1 C8008_RF 4 2 6 1 5 3 USPDT_RF 2 1 C8007_RF 2 1 C8005_RF 2 1 C6733_RF 2 1 C6732_RF 2 1 C6731_RF 2 1 C6730_RF 2 1 C6735_RF 2 1 C6734_RF 1 SUAT2_RF 1 SGND_RF 21 FL6702_RF 2 1 C6705_RF 2 1 C6703_RF 21 FL6701_RF 2 1 C6702_RF 2 1 C6701_RF NOSTUFF STDOFF-2.56OD1.4ID.99H-SM STDOFF-2.56OD1.4ID.99H-SM 50_UAT1_FEED 2% 0201 0.01UF 18PF 1% MF P2MM-NSM SM X5R 01005 USPDT2_RF VDD_TUNER_RFFE_VIO_1V8_FILT 50_UAT2_M ALT_GND CHASSIS_GND CHASSIS_GND 50_UAT1_NOTCH UAT_TUNER_RFFE_DATA_FILT UAT_TUNER_RFFE_CLK_FILT PP3V0_TRISTAR_UAT_TUNER_B2B_FILT BB_TO_LAT_ANT_SCLK 01005 NP0-C0G 16V 100PF UP_RFFE 5% UP_RFFE UP_RFFE 01005 0.00 0% MF 1/32W 01005 5% 16V UAT NP0-C0G 27PF UAT 01005 NP0-C0G 27PF 16V 5% 0.00 1/32W MF 0% 01005 27PF 16V UAT 01005 NP0-C0G 5% 27PF 16V UAT 5% NP0-C0G 01005 16V 33PF5% 01005 01005 16V 5% 33PF NP0-C0G-CERM 01005 6.3V NP0-C0G 68PF 2% 01005 120PF 10V CER-X7R 10% UP_RFFE C0H-CERM 25V 10% X5R 6.3V 01005 RF1341 WLCSP 33PF 5% 01005 16V 3.0NH+/-0.1NH-0.6A OMIT SM-TP1P25-TOP F-ST-SM 505066-0620 01005 150OHM-25%-200MA-0.7DCR 01005 0201 C0H-CERM 25V WLCSP RF1341 10% 0.01UF 5% 16V 33PF 220PF UP_RFFE 6.3V 5% 01005 CERM 4.0PF UP_RFFE 16V +/-0.1PF 01005 NP0-C0G 56PF 16V 5% 01005 UP_RFFE NP0-C0G UP_RFFE 6.3V 5% 01005 CERM 220PF18PF UP_RFFE 16V 5% 01005 CERM 2%NP0-C0G-CERM 50_UAT2_FEED 0201 STDOFF-2.56OD1.4ID.99H-SM 560NH-5%-2.80OHM 0201 01005 18PF OMIT_TABLE 9.1NH-0.4A 03015 UP_RFFE USPDT_VDD 6.3V DC_BLOCKUSPDT_RF 3.0NH+/-0.1NH-0.6A 0201 0201 UP_RFFE 9.1NH+/-0.3%-0.3A 1/20W NP0-C0G-CERM 150OHM-25%-200MA-0.7DCR C0G-CERM 1.2PF +/-0.05PF 25V 0201 0201-1 2.2NH+/-0.1NH-0.6A 50_UAT1_TUNER_M UP_RFFE 5.6NH+/-3%-0.4A 0201 0201 UP_RFFE 0.00 1.8NH+/-0.1NH-0.8A 0201 1.2PF C0G-CERM 25V 0201 NP0-C0G-CERM +/-0.05PF NOSTUFF 4.3NH+/-3%-0.5A 0201 50_UAT1_TUNER 2 2 IO IO IN IN IN IN IN IO GNDA VDD RF1 RFGND CBIN PP A GNDA VDD RF1 RFGND CBIN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 62.
    BOM LIST 3.0 NH,03015152S0570L8009_RF1 NOLMBRFCRITICAL LONGER PATH INDUCTOR CRITICAL152S1860 1 LMBRFL8009_RF REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 63.
    SCH: 951-00964 BOM: 939-00826 ALL:C5616_RF-C5618_RF,C5632_RF-C5634_RF ALTERNATES MAV16RADIO_MLB PCIE BB CONTROL DEBUG WLAN DOCK TUNER NFC AMUX AP CONNECTIONS ANTENNA AUDIO AOP POWER 5367 536878 536878 65 65 536478 53647881 5364 65 5364657781 53647881 536481 536878 536878 5368 5368 536778 536778 5367 5367 536468 536781 5368 5368 5368 5368 53687881 5368 537881 5368 5368 5368 536478 537881 5368 536881 5381 537881 537881 537881 5381 536478 53687881 5368 536878 536878 5367 BB_TO_UAT_DATA 147 MAKE_BASE=TRUE BB_TO_LAT_ANT_DATA 177 BB_TO_LAT_ANT_SCLK 177 BB_TO_UAT_SCLK 147 MAKE_BASE=TRUE 90_PCIE_BB_TO_AP_RXD_N BB_TO_PMU_PCIE_HOST_WAKE_L 90_USB_BB_DATA_P SWD_AOP_BI_BB_SWDIO PCIE_BB_BI_AP_CLKREQ_L BB_TO_UAT_DATA BB_TO_UAT_SCLK AP_TO_ICEFALL_FW_DWLD_REQ BB_TO_LAT_ANT_DATA BB_TO_LAT_ANT_SCLK BB_BUFFER_GPO1 NFC_TO_BB_CLK_REQ BB_TO_LAT_GPO1 BB_TO_LAT_GPO2 BB_TO_LAT_GPO3 BB_BUFFER_GPO2 90_USB_BB_DATA_N I2S_BB_TO_AP_LRCLK I2S_BB_TO_AP_BCLK SWD_AP_TO_MANY_SWCLK 90_PCIE_AP_TO_BB_TXD_N 90_PCIE_AP_TO_BB_TXD_P 90_PCIE_AP_TO_BB_REFCLK_N 90_PCIE_AP_TO_BB_REFCLK_P AP_TO_BB_IPC_GPIO1 AP_TO_BB_COREDUMP PMU_TO_BB_USB_VBUS_DETECT LCM_TO_MANY_BSYNC PP_VDD_BOOST BB_TO_STROBE_DRIVER_GSM_BURST_IND 90_PCIE_BB_TO_AP_RXD_P PCIE_AP_TO_BB_RESET_L <SYNC_MASTER24> <SYNC_DATE26> <SYNC_DATE8> <SYNC_MASTER28> <SYNC_MASTER27> <SYNC_MASTER26> <SYNC_MASTER30> 78 BOM_OMIT_TABLE PMU: CONTROL AND CLOCKS <SYNC_MASTER6> <SYNC_MASTER21> LOWER ANTENNA & COUPLERS TRANSCEIVER0/1: TX PORTS DIVERSITY RECEIVE LNA'S FDD TRANSMIT <SYNC_DATE12> BASEBAND: POWER2 70 71 <CSA_PAGE13> UPPER ANTENNA FEEDS PMU: ET MODULATOR TEST POINTS & BOOT CONFIG TDD TRANSMIT <CSA_PAGE22> 81 <SYNC_DATE24> <SYNC_DATE3> <SYNC_DATE4> <SYNC_DATE5> <SYNC_DATE15> <SYNC_DATE13> <SYNC_DATE14> <SYNC_DATE18> <SYNC_DATE27> <SYNC_DATE19> <SYNC_DATE22> <SYNC_DATE23> <SYNC_DATE21> <SYNC_MASTER2> <SYNC_MASTER25> BASEBAND: CONTROL page1 BASEBAND GPIOS <CSA_PAGE2> <CSA_PAGE3> <CSA_PAGE4> 63 62 <CSA_PAGE5> 67 <CSA_PAGE7> <CSA_PAGE6> 68 <CSA_PAGE8> <CSA_PAGE10> 72 <CSA_PAGE14> <CSA_PAGE15> <CSA_PAGE16> <CSA_PAGE17> 76 77 75 74 73 79 <CSA_PAGE28> <CSA_PAGE27> <CSA_PAGE19> <CSA_PAGE20> <CSA_PAGE21> <CSA_PAGE23> <CSA_PAGE24> <CSA_PAGE26> <CSA_PAGE25> <CSA_PAGE29> <SYNC_DATE17> <CSA_PAGE1> <SYNC_MASTER23> <SYNC_DATE16> <SYNC_DATE7> <SYNC_MASTER4> <SYNC_MASTER3> <SYNC_MASTER1> 80 <CSA_PAGE18> <SYNC_MASTER5> <SYNC_DATE2> <SYNC_DATE1> <SYNC_DATE20> <SYNC_MASTER19> <SYNC_MASTER14> <SYNC_MASTER16> <SYNC_DATE6> <SYNC_MASTER13> <SYNC_MASTER15> <SYNC_DATE9> <SYNC_MASTER8> <SYNC_DATE11> TRANSCEIVER0/1: POWER LAST_MODIFICATION=Wed Jun 8 12:54:09 2016 <SYNC_MASTER18> <CSA_PAGE11> 66 65 64 <SYNC_MASTER11> <SYNC_MASTER20> <CSA_PAGE9> <SYNC_MASTER22> <SYNC_DATE25> <SYNC_MASTER9> <SYNC_DATE10> <SYNC_MASTER12> DIVERSITY RECEIVE ASM'S RECEIVE MATCHING TRANSCEIVER0/1: PRX PORTS 69 <CSA_PAGE12> <SYNC_MASTER17> PMU: SWITCHERS AND LDOS <SYNC_MASTER7> <SYNC_MASTER10> ICEFALL, SIM, DEBUG_CONN <SYNC_MASTER29> <CSA_PAGE30> <SYNC_DATE28> <SYNC_DATE29> <SYNC_DATE30> 2016-06-1400064008778 ENGINEERING RELEASED page1 page1 UPPDI_RF155S00235 NOLMBRF155S00234 ALTERNATE 353S00321 IC SWITCH SPDT353S00253 SWPMX_RFALTERNATE 335S0894 IC EEPROM335S00013 EPROM_RFALTERNATE TRANSITION CAP138S00095138S00101 ALLALTERNATE 197S0565 197S0593 19P2 MHZ XTAL 19P2 MHZ XTAL 197S0593 Y5501_RFALTERNATE197S0598 Y5501_RFALTERNATE 61720 620 7 14 15 12 12 14 15 61720 BB_TO_AP_RESET_DETECT_L BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX2 PMU_TO_BBPMU_RESET_L AP_TO_BBPMU_RADIO_ON_L BBPMU_TO_PMU_AMUX1 PP_VDD_MAIN AP_TO_BB_RESET_L AP_TO_BB_TIME_MARK AP_TO_BB_MESA_ON UART_AOP_TO_BB_TXD I2S_AP_TO_BB_DOUT UART_BB_TO_WLAN_COEX ICEFALL_LDO_ENABLE SE2_PWR_REQ PP1V8_SDRAM SE2_PRESENT SE2_READY NFC_SWP_MUX NFC_SWP 50_UAT1_TUNER 50_UUAT_LB_MLB_NORTH 50_UAT_MB_HB_SOUTH 50_UAT_LB_MLB_SOUTH 50_UAT_WLAN_2G_WEST_PLEXER 50_UAT1_WEST BB_TO_NFC_CLK UART_WLAN_TO_BB_COEX I2S_BB_TO_AP_DIN UART_BB_TO_AOP_RXD PP_VDD_BOOST MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE 4 20 DATESYNCCONTENTSCSAPAGE TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_HEAD COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR PART NUMBER ECNREV DESCRIPTION OF REVISION 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. CK APPD DATE 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. OUT OUT OUT OUT OUT IN IN IN IN OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IO OUT IN OUT OUT OUT IN IN OUT OUT IO IN OUT IN OUT IN IN IO IO IO IO OUT IO IO IO IO IO IO OUT OUT OUT OUT OUT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 64.
    D10 SPECIFIC: D11 SPECIFIC: NOLMBRF: BOMOPTIONS: LMBRF: LMBRF1 C7501_RF C7523_RF1138S0739 LMBRF1138S0739 CAP,1UF,0201 CRITICAL1 LMBRF138S00032 CAP,2.2UF,0201 LMBRF1353S00026 CRITICALLDO,BGA,2X2 LMBRFCRITICAL1131S0630 LMBRFCRITICAL1 CRITICAL LMBRF LMBRF1 CRITICAL 152S2006 1 LMBRFCRITICAL MLBPA_RFMLB PAD CRITICAL LMBRF 117S0002 LMBRF CRITICAL1 353S00627 CRITICAL1 MLB LNA LMBRF 138S00032 1 CAP,2.2UF,0201 LMBRFCRITICAL C7528_RF LMBRF 155S00158 1 LMBRFCRITICAL RES,MF,4.99K OHM,01005118S0643 1 CRITICAL LMBRF MLB LNA OUTPUT MATCH LMBRFR6710_RF CRITICAL1 155S00139 PENTAPLEXER LMBRF1 CRITICAL 155S00193 1 LMBRFCRITICAL C7201_RF138S0739 LMBRF1 1 SE2_RF CAP,100PF,010051 LMBRF131S0217 CRITICAL 1118S0627 RES,10KOHM,01005 LMBRFCRITICAL1131S0341 LMBRF1131S0630 CRITICAL 152S2006 1 CRITICAL LMBRF 1 CRITICAL LMBRF IND,1.3NH,1.1A,02011 CRITICAL LMBRF 1 LMBRFCRITICAL152S2000 CRITICAL LMBRF LMBRF1 CRITICAL1118S0724 RES,MF,0OHM,1/20W,0201 CRITICAL LMBRF1118S0724 1 CRITICAL LMBRF131S00001 1131S0341 LMBRFCRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL LMBRF LMBRF C7524_RF RES,MF,0OHM,1/20W,0201 IND,FILM,6.2NH,3%,400MA,UH-Q,0201 CAP,1UF,0201 CAP,1UF,0201 337S00284 CAP,1UF,0201 132S0316 138S0739 1 CAP,0.1UF,01005 CAP,CER,NPO/COG,27PF,2%,16V,01005 IND,FILM,6.2NH,3%,400MA,UH-Q,0201 CAP,CER,NPO/COG,27PF,2%,16V,01005 117S0002 1 1 LMBRFCRITICAL CAP,CER,C0G,HQ,0.6PF,+/-0.05PF,25V,0201131S0363 152S2042 FLTR,DIPLEXER,LB-MB/HB,MIRROR,0805 IC,SECURE ELEMENT,BCM20211,WLBGA25 C6348_RF L6322_RF 1131S0275 152S2002 RES,MF,0OHM,1/20W,0201 1 IND,2.7NH,+/-0.1NH,600MA,0201,UH-Q R6605_RF 131S0337 118S0724 C6416_RF R6606_RF C6610_RF R6703_RF C7119_RF R7104_RF R6404_RF C6106_RF C6306_RF L6305_RF C6315_RF C6345_RF SE2LDO_RF R7512_RF C7531_RF C7530_RF C7529_RF MLBLN_RF FLTR,DIPLEXER,LB-MB-HB,DPX,SHIELD,0805 CAP,CER,COG,3.0PF,+/-0.05,25V,0201,HI-Q R6708_RF CAP,CER,0.1PF,25V,0201 IND,2.0NH,600MA,0201 152S2051 131S0630 353S00723 MLB PAD LAT OUTPUT MATCH MLB PAD UAT OUTPUT MATCH UPPDI_RF UATDI_RF R7506_RF PPLXR_RF R7106_RF R7105_RF LMBRF CRITICALC7123_RF CAP,CER,C0G,0.3PF,+/-0.1PF,25V,0201,HQ 118S0608 1 R5911_RF LMBRFCRITICAL C6613_RFIND,10NH,3%,250MA,HI-Q,0201 CRITICAL LMBRF1152S1356 RES,MF,1K OHM,1%,1/32W,01005 CAP,1.5PF,+/-0.05PF,25V,0201,HQ CAP,CER,NPO/COG,27PF,2%,16V,01005 CAP,CER,COG,3.0PF,+/-0.05PF,25V,0201,HI-Q CRITICAL LMBRF CRITICAL 152S2020 L6320_RFDCS/PCS RX FILTER MATCH CRITICAL NOLMBRF1 DCS/PCS RX FILTER MATCH1 R6301_RF131S0444 CRITICAL NOLMBRF 155S00149 GSMRX_RF NOLMBRFDCS/PCS RX FILTER CRITICAL1 DCS/PCS RX MATCH (DCS) C6332_RF CRITICAL131S0319 NOLMBRF1 DCS/PCS RX MATCH (DCS) L6318_RF NOLMBRFCRITICAL152S2005 1 DCS/PCS RX MATCH (DCS)131S0630 C6340_RF CRITICAL NOLMBRF1 1 DCS/PCS RX MATCH (DCS) C6341_RF CRITICAL131S0630 NOLMBRF DCS/PCS RX MATCH (DCS) L6319_RF NOLMBRF152S2005 1 CRITICAL DCS/PCS RX MATCH (DCS) C6333_RF CRITICAL NOLMBRF1131S0385 155S00163 1 QUADPLEXER PPLXR_RF NOLMBRFCRITICAL 1 NOLMBRFCRITICALUPPDI_RF155S00234 FLTR,DPX,PASS THRU,LB-MB-HB,UNSHLD,0805 155S00199 FLTR,DPX,PASS THRU,LB-MB-HB,SHLD,0805 CRITICALUATDI_RF1 NOLMBRF 1118S0724 RES,MF,0OHM,1/20W,0201 R6404_RF CRITICAL NOLMBRF 18PF,0201,25V CRITICALR6708_RF131S0549 1 1.2NH,+/-0.05NH,1.1A,UH-Q,0201152S00157 1 R6703_RF NOLMBRFCRITICAL 152S2044 IND,2.2NH,+/-0.1NH,600MA,0201 NOLMBRF1 R7104_RF CRITICAL CAP,CER,12PF,5%,25V,0201,HI-Q NOLMBRF1 CRITICAL131S0445 CRITICAL 1 C7120_RF D10131S0278 1 131S0425 CAP,CER,COG,0.5PF,+/-0.05PF,25V,0201,HI-Q CAP,CER,COG,1PF,+/-0.1PF,25V,0201,HI-Q D11CRITICAL NOLMBRF C7120_RF R6606_RF TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART# TABLE_5_HEAD BOM OPTIONCRITICAL 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 65.
    51.1K 51.1K 0.60V 0.50V 0.40V 0.70V 0.80V 0.90V 1.00V 1.10V 1.20V 63.4K 100K50.0K 0.30V EVT DOE DEV1 51.1K 82.5K 422K 51.1K 102K 51.1K EVT GND_XO_CLK: VIADOWN TO GND PLANE PCIE PERST OPTION PCIE PERST OPTION RESET AND CONTROL: PMU 51.1K XTAL AND CLOCK: PMU DEV5 P2 51.1K 124K 180K 100K 82.5K 51.1K 63.4K DEV 2.1 1.30V 39.0K DEV6 EVT ALT/CARBON 51.1K 887K R5505 R5501 REVISION MPPS AND GPIOS: PMU REV_ID DEV2 DEV 3 PP/P1 T181 51.1K 255K 0.20V 0.10V PMU: CONTROL AND CLOCKS 1.40V 14.7K 51.1K CARRIER 51.1K 1.50V 40.2K 200K 1.60V 6.34K DVT PVT DEV4 51.1K 51.1K HW_REV_ID 6778 67 67 78 53 62 78 68 78 66 67 5362 7881 6778 5362 78 6778 6778 536281 67 67 78 53 62 68 53627881 70 53 62 78 53 62 646566 PCIE_AP_TO_BB_RESET_L PP_VDD_MAIN LCM_TO_MANY_BSYNC PMU_TO_BB_USB_VBUS_DETECT NFC_TO_BB_CLK_REQ 2 1 R5505_RF 2 1 R5501_RF 21 R5511_RF 2 1 R5503_RF 65 55 76 72 77 66 45 41 71 56 35 BBPMU_RF 88 83 20 4 9 61 51 13 38 32 37 21 15 26 BBPMU_RF 62 57 46 36 BBPMU_RF 31 25 43 82 63 75 42 52 98 67 58 53 BBPMU_RF 2 1 C5501_RF 4 3 2 1 Y5501_RF 21 R5504_RF 21 R5502_RF 2 1 C5502_RF WLNSP RADIO_PMIC PMD9645 RADIO_PMIC PMD9645 WLNSP RADIO_PMIC WLNSP PMD9645 RADIO_PMIC WLNSP PMD9645 0.00 0201 1/20W MF 1% RADIO_PMIC 1% 1/32W 01005 MF 1.00K MF 01005 1/32W 5% 19.2MHZ-10PPM-7PF-80OHM RADIO_PMIC 2.0X1.6-SM 01005 MF 1/32W 1% 100K RADIO_PMIC 20% X5R-CERM 6.3V 0.1UF 01005 RADIO_PMIC 10% 6.3V 1000PF X5R-CERM 01005 RADIO_PMIC PP_1V8_LDO7 HW_REV1_ID PS_HOLD_PMIC PMIC_RESOUT_L AP_TO_BBPMU_RADIO_ON_L PMU_TO_BBPMU_RESET_L XO_OUT_D0_EN XO_THERM XTAL_19P2M_IN SPMI_DATA PS_HOLD VREF_DAC_BIAS PP_1V8_LDO7 XTAL_19P2M_OUT XO_THERM XTAL_19P2M_IN XTAL_19P2M_OUT SHIELD_SLEEP_CLK_32K SHIELD_WTR_19P2M_CLK BB_TO_NFC_CLK 50_MDM_PCIE_CLK SHIELD_MDM_19P2M_CLK PCIE_AP_TO_BB_PERST_PMU_L SIM1_REMOVAL_ALARM SPMI_CLK PP_VDD_MAIN MAKE_BASE=TRUE VDDPX_BIAS_UIM2 40.2K MF 1/32W 1% RADIO_PMIC AP_TO_BB_RESET_L 20.0K 01005 200K 1% 01005 MF 1/32W 3 4 5 3 33 3 3 3 1 4 16 20 IN OUT OUT IN IN NCOUT OUT IN OUT IN BI BI IN IN OUT IN NC NC NC IN OUT OUT NC CLOCK SYM 2 OF 5BB_CLK_EN XO_THERM GND_XOADC XTAL_19M_IN XTAL_19M_OUT GND_XO_CLK LN_BB_CLK BB_CLK RF_CLK1 RF_CLK2 SLEEP_CLK GPIO_MPP SYM 3 OF 5 PA_THERM2 PA_THERM1 GPIO_06 GPIO_05 GPIO_04 GPIO_03 GPIO_02 GPIO_01 MPP_06 MPP_05 MPP_04 MPP_03 MPP_02 MPP_01 GND SYM 5 OF 5 GND GND GND GNDCONTROL SYM 1 OF 5 GND GND CBL_PWR* PON_1 SPMI_CLK SPMI_DATA OPT_1 OPT_2 BAT_ID_THERM PS_HOLD PON_RST* RESIN* IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 66.
    MDM MEMORY, MDMUSB XO SHUTDOWN: ON LOW VOLTAGE LDOS HIGH VOLTAGE LDOS XO SHUTDOWN: ON XO SHUTDOWN: ON SWITCHERS BULK CAPS MEMORY MDM PCIE RFFE VIO FRONT END SUPPLY UIM1 PMU: SWITCHERS AND LDOS MDM MODEM XO SHUTDOWN: OFF XO SHUTDOWN: BYP XO SHUTDOWN: OFF XO SHUTDOWN: OFF XO SHUTDOWN: OFF XO SHUTDOWN: ON XO SHUTDOWN: OFF XO SHUTDOWN: ON XO SHUTDOWN: OFF XO SHUTDOWN: OFF XO SHUTDOWN: BYP XO SHUTDOWN: ON XO SHUTDOWN: BYP XO SHUTDOWN: OFF XO SHUTDOWN: BYP XO SHUTDOWN: OFF XO SHUTDOWN: ON 1.25V/693MA 0.90V/2685MA 1.01V/1059MA 1.85V/1241MA CORE DESENSE CAPS PLACE C5635 AND C5636 NEAR THE PMU PLACE XW CLOSE TO PMU VIA XW DOWN TO THE GND PLANE PLACE XW CLOSE TO PMU XO_GND VIA XW DOWN TO THE GND PLANE RF_CLK_GND UIM2 GPS LNA MDM CORE MDM LOW VOLTAGE ANALOG MDM HIGH VOLTAGE ANALOG MDM EBI1, DDR CORE 1.80V/133MA 3.20V/15MA 2.70V/62MA 1.80V/245MA 1.80V/60MA 1.11V/1253MA 1.80V/60MA 2.70V/5MA 1.00V/88MA 1.80V/366MA 1.23V/124MA 1.20V/569MA 1.00V/610MA 1.80V/52MA 1.80V/15MA 1.16V/1951MA MDM HIGH VOLTAGE USB MDM LOW VOLTAGE USB MDM 1.8V I/O, DDR, SHARED 1.8V VOLTAGE RAIL MDM PLL 68 73 74 75 77 79 80 67 66 BBPMU_TO_PMU_AMUX3-53[I16]6569 536264657781 BBPMU_TO_PMU_AMUX1-53[I16]6566 BBPMU_TO_PMU_AMUX3-53[I16]6569 536264657781 66 66 69 66 66 64 66 66 66 66 536264 6577 81 66 81 73 74 75 66 71 536264 6577 81 536264657781 5362646577 81 81 62 62 62 536264657781 GND4 GND4 GND4 GND4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 GND4 GND4 PP_VDD_MAIN4 PP_VDD_MAIN4 PP_VDD_MAIN4 BBPMU_TO_PMU_AMUX24 BBPMU_TO_PMU_AMUX3 GND4 GND4 PP_VDD_MAIN4 GND4 GND PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 PP_VDD_MAIN 4 BBPMU_TO_PMU_AMUX348 MAKE_BASE=TRUE BBPMU_TO_PMU_AMUX24 BBPMU_TO_PMU_AMUX145 PP_VDD_MAIN4 GND 4 GND 4 GND 4 GND 4 GND 4 BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX2 4 BBPMU_TO_PMU_AMUX1 MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE 2 1 C5607_RF 2 1 C5605_RF 21 L5604_RF 21 L5602_RF 21 L5605_RF 2 1 L5603_RF 2 1 C5634_RF 2 1 C5633_RF 2 1 C5632_RF 2 1 C5631_RF 2 1 C5618_RF 2 1 C5617_RF 2 1 C5616_RF 2 1 C5615_RF 2 1 XW5617_RF 2 1 XW5616_RF 2 1 C5604_RF 2 1 C5636_RF 2 1 C5635_RF 2 1 XW5615_RF 2 1 XW5614_RF 2 1 C5602_RF 2 1 R5601_RF2 1 C5629_RF 2 1 C5630_RF 99 2 64 59 97 27 22 11 34 87 12 69 91 10 60 30 101 96 85 95 84 100 29 18 3 19 48 39 81 80 78 47 90 24 94 8 70 103 92 16 5 73 89 23 14 44 86 79 40 93 7 1 54 49 102 33 28 17 6 50 68 74 BBPMU_RF 2 1 C5620_RF 2 1 C5608_RF 2 1 C5627_RF 2 1 C5626_RF 2 1 C5609_RF 2 1 C5628_RF 2 1 C5610_RF 2 1 C5612_RF 2 1 C5611_RF 2 1 C5613_RF 2 1 C5614_RF 2 1 C5603_RF 21 L5601_RF 2 1 C5625_RF 2 1 C5601_RF 2 1 C5621_RF 2 1 C5622_RF 2 1 C5623_RF 2 1 C5624_RF PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN MAKE_BASE=TRUE PP_VDD_MAIN AVDD_BYP_GND VREG_XO_GND MDM_VREF_LPDDR2 PP_1V225_SMPS2 AVDD_BYP REF_BYP PP_VDD_BOOST VDD_OTP GND_REF PP_VDD_MAIN PP_VDD_MAIN MAKE_BASE=TRUE MAKE_BASE=TRUE PP_VDD_MAIN VREG_XO VREG_RF_CLK_GND VREG_RF_CLK VREG_RF_CLK MAKE_BASE=TRUE MAKE_BASE=TRUE VREG_XO_GND VREG_XO BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX1 BBPMU_TO_PMU_AMUX2 VREG_RF_CLK_GND PP_VSW_S4 PP_0V95_LDO4 PP_1V8_LDO6 VDD_SIM1 PP_VSW_S2 PP_1V2_LDO2 PP_1V8_LDO8 VDD_SIM2 PP_0V9_LDO3 PP_1V8_LDO15 PP_2V7_LDO12 PP_3V075_LDO10 PP_1V0_LDO9 PP_1V8_LDO7 PP_1V7_LDO5 PP_VSW_S5 PP_1V5_LDO1 PP_1V8_LDO14 PP_1V0_SMPS5 PP_VSW_S3 PP_1V225_SMPS2 PP_VSW_S1 RADIO_PMIC 0402 15UF CERM 6.3V 20% RADIO_PMIC 15UF 20% 6.3V CERM 0402 RADIO_PMIC X5R 20% 1UF 10V 0201 1UF 10V X5R 0201 RADIO_PMIC 20% 2.2UH-20%-0.14OHM-1.6A 0806 RADIO_PMIC 2.2UH-20%-0.14OHM-1.6A 0806 RADIO_PMIC 1.0UH-20%-2.7A-0.056OHM RADIO_PMIC 0806 RADIO_PMIC 0806 1.0UH-20%-2.7A-0.056OHM 6.3V X5R 25UF20% 0402 25UF 0402 6.3V 20% X5R 0402 6.3V 20% 25UF X5R 0402 6.3V 20UF 20% CERM-X5R 25UF X5R 20% 6.3V 0402 25UF 6.3V 0402 20% X5R 0402 6.3V 20% 25UF X5R 0402 6.3V CERM-X5R 20UF20% SHORT-10L-0.1MM-SM OMIT SHORT-10L-0.1MM-SM OMIT RADIO_PMIC 0402 6.3V 10UF 20% CERM-X5R 01005 CERM 16V 2% 27PF100PF 01005 NP0-C0G 16V 5% SHORT-10L-0.1MM-SM OMIT SHORT-10L-0.1MM-SM OMIT 0.47UF 0201 6.3V CERM-X5R 10% 20% 20UF 6.3V CERM-X5R 0402 15UF 20% 6.3V 0402 CERM RADIO_PMIC PMD9645 WLNSP RADIO_PMIC 0402 RADIO_PMIC 15UF 6.3V 20% CERM X5R-CERM1 20% 4.7UF RADIO_PMIC 6.3V 402 RADIO_PMIC CER-X5R 01005 0.1UF 10% 6.3V RADIO_PMIC 10UF CERM-X5R 6.3V 20% 0402 0201 X5R 10V 1UF RADIO_PMIC 20% RADIO_PMIC 20% 10V 1UF X5R 0201 20% 1UF 10V 0201 X5R RADIO_PMIC 20% 1UF RADIO_PMIC 0201 10V X5R 1UF 20% RADIO_PMIC 0201 10V X5R RADIO_PMIC 20% 10V 1UF X5R 0201 1UF 10V X5R 0201 RADIO_PMIC 20% 43UF20% 0603 X5R 4V RADIO_PMIC 1UF X5R 20% 0201 10V RADIO_PMIC 20% X5R 10V 1UF 0201 1UH-20%-0.054OHM-3.4A RADIO_PMIC 2520 RADIO_PMIC CERM 15UF 6.3V 20% 0402 0.00 1/32W MF 0% 01005 RADIO_PMIC 0402 20% 15UF 6.3V CERM 4 4 4 4 4 4 4 4 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST OUT OUT OUT IN IN OUT OUT IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT OUT OUT IN IN IN IN POWER SYM 4 OF 5 GND_S1 GND_S1 VDD_S1 VDD_S1 VREG_L10 VREG_L11 VREG_L4_16 VREG_S1 VSW_S1 VSW_S1 VSW_S1 VSW_S2 VREG_S2 VREG_S3 VSW_S3 VSW_S3 VREG_S4 VSW_S4 VREG_L1 VSW_S5 VREG_S5 VREG_L2 VREG_L3 VREG_L7 VREG_L5 VREG_L12 VREG_L13 GND_XO VREG_XO VREG_L15 VREG_L14 GND_RF_CLK VREG_RF GND_S1 GND_S1 VDD_S3 GND_S2 VDD_S4 GND_S3 GND_S4 GND_S4 GND_S3 VDD_S2 VDD_S2 VDD_S5 GND_S5 VDD_L9 VDD_L1_2_16 VDD_L3_4 VDD_L5_6_15 VDD_L7_8 VDD_OTP REF_BYP GND_REF VIN_VPH1 VIN_VPH2 VREF_DDR AVDD_BYP VDD_XO_RF VREG_L6 VREG_L9 VREG_L8 OUT OUT OUT IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 67.
    (MSM MODEM) (MSM CORE) (MODEMSUB MEMORY) (PP_UIM2_LDO13) (PP_UIM1_LDO11) BASEBAND: POWER BBPMU_TO_PMU_AMUX145 BBPMU_TO_PMU_AMUX14 5 2 1 C5755_RF 2 1 C5752_RF 2 1 C5701_RF 2 1 C5702_RF 2 1 C5703_RF 2 1 C5726_RF 2 1 C5723_RF 2 1 C5720_RF 2 1 C5727_RF 2 1 C5728_RF 2 1 C5724_RF 2 1 C5721_RF 2 1 C5725_RF 2 1 C5722_RF 2 1 C5717_RF 2 1 C5714_RF 2 1 C5711_RF 2 1 C5718_RF 2 1 C5715_RF 2 1 C5719_RF 2 1 C5716_RF 2 1 C5712_RF 2 1 C5713_RF 2 1 C5708_RF 2 1 C5705_RF 2 1 C5709_RF 2 1 C5706_RF 2 1 C5710_RF 2 1 C5707_RF Y8 Y4 V6 V1 U9 U23 U17 U15 U10 T7 T23 T17 T16 T15 T14 T11 T10 R7 R18 R17 R12 R11 P9 P8 P18 P17 P13 P12 P1 N9 N6 N18 N17 N16 N15 N14 N13 N10 M7 M6 M18 M14 M11 M10 L8 L7 L23 L16 L12 L11 K9 K8 K17 K16 K13 K12 K1 J9 J6 J22 J17 J16 J10 H7 H6 H23 H19 H18 H17 H12 H11 G23 G19 G15 G14 G13 G10 F23 F17 F16 F15 F14 F11 E9 E8 E6 E23 E22 E21 E18 E16 E15 E14 D23 D21 D2 C9 C4 C21 C20 C2 C16 C11 C1 B5 B22 B21 B20 B19 B13 AB9 AB7 AB5 AB23 AB21 AB15 AB10 AB1 AA5 A9 A7 A6 A4 A23 A22 A2 A17 A15 A12 A11 A1 BB_RF T9 T8 T13 R9 R8 R14 R13 R10 P14 P11 P10 N8 N11 M9 M8 L9 L6 L14 L13 L10 K7 K6 K14 K11 K10 J11 G7 F8 F7 V18 U6 U18 U13 U12 U11 T6 T18 T12 P7 P6 N7 N12 M13 M12 L18 L17 K18 J8 J7 J15 J14 J13 J12 H9 H8 H14 H13 H10 G18 F19 F18 E19 V17 V16 U8 U7 U16 R16 R15 P16 P15 M17 M16 M15 L15 K15 J19 J18 H16 H15 G9 G8 G17 G16 G12 G11 F9 F13 F12 BB_RF 2 1 C5754_RF 2 1 C5735_RF 2 1 C5753_RF V11 AA10 V9 Y20 U21 AA3 W3 AB3 F10 P19 E13 Y7 Y6 Y5 M19 AB11 AA15 AA21 P2 K2 E2 AB16 AA23 R23 Y2 W2 U22 T22 M22 L22 H22 G22 D22 C22 U1 K23 E1 B23 W1 J23 D1 C23 AA1 U14 E17 E7 E3 C7 C6 C18 C15 C12 B18 B15 B12 E10 B10 B8 B7 B3 BB_RF 2 1 C5745_RF 2 1 C5704_RF 2 1 C5750_RF 2 1 C5741_RF 2 1 C5731_RF 2 1 C5732_RF 2 1 C5740_RF 2 1 C5737_RF 2 1 C5734_RF 2 1 C5749_RF 2 1 C5747_RF 2 1 C5748_RF 2 1 C5751_RF 2 1 C5746_RF 2 1 C5744_RF 2 1 C5743_RF 2 1 C5738_RF 2 1 C5730_RF 2 1 C5729_RF 2 1 C5733_RF 2 1 C5736_RF 2 1 C5739_RF 2 1 C5742_RF PP_1V0_LDO9 PP_1V0_LDO9 PP_1V0_SMPS5 PP_1V0_SMPS5 VDD_SIM2 PP_3V075_LDO10 PP_1V8_LDO8 PP_0V95_LDO4 PP_1V8_LDO6 PP_1V8_LDO7 PP_1V7_LDO5 PP_1V0_LDO9 VDDPX_BIAS_UIM2 PP_0V95_LDO4 VDD_SIM1 PP_1V8_LDO7 PP_1V5_LDO1 PP_1V8_LDO6 PP_1V8_LDO6 PP_1V2_LDO2 PP_1V2_LDO2 PP_1V8_LDO6 RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC 0201-1 X5R-CERM 2.2UF 20% 6.3V RADIO_PMIC 20% 2.2UF X5R-CERM 6.3V 0201-1 RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC NOSTUFF 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC X5R-CERM 0201-1 20% 6.3V 2.2UF 0201-1 6.3V X5R-CERM 20% 2.2UF RADIO_PMIC 2.2UF RADIO_PMIC 0201-1 20% 6.3V X5R-CERM 6.3V RADIO_PMIC 0201-1 20% 2.2UF X5R-CERM RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC 0201-1 6.3V X5R-CERM 20% 2.2UF2.2UF 6.3V RADIO_PMIC 20% 0201-1 RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% 2.2UF 20% X5R-CERM 6.3V 0201-1 RADIO_PMIC RADIO_PMIC 0201-1 X5R-CERM 6.3V 20% 2.2UF RADIO_PMIC 2.2UF 20% X5R-CERM 6.3V 0201-1 RADIO_PMIC 0201-1 X5R-CERM 2.2UF 6.3V 20% RADIO_PMIC X5R-CERM 0201-1 6.3V 2.2UF 20% RADIO_PMIC X5R-CERM 20% 2.2UF 6.3V 0201-1 6.3V X5R-CERM 2.2UF 20% 0201-1 RADIO_PMIC 15UF RADIO_BB CERM 0402 6.3V 20% RADIO_BB 15UF CERM 0402 6.3V 20% CERM RADIO_BB 15UF 0402 6.3V 20% X5R-CERM 2.2UF 4V 20% 0201 RADIO_BB X5R-CERM 2.2UF 20% 4V 0201 RADIO_BB 4V X5R-CERM 2.2UF 20% 0201 RADIO_BB RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 2.2UF 0201 20% 4V 2.2UF 20% 0201 X5R-CERM RADIO_BB 4V RADIO_BB X5R-CERM 0201 2.2UF 20% 4V RADIO_BB 4V X5R-CERM 0201 2.2UF 20% 4V X5R-CERM 2.2UF 20% 0201 RADIO_BB X5R-CERM 2.2UF 20% 4V 0201 RADIO_BB X5R-CERM 2.2UF 4V 20% 0201 RADIO_BB 4V RADIO_BB X5R-CERM 0201 2.2UF 20% RADIO_BB X5R-CERM 0201 2.2UF 20% 4V RADIO_BB 4V X5R-CERM 0201 2.2UF 20% RADIO_BB X5R-CERM 0201 2.2UF 20% 4V RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 4V 2.2UF 20% 0201 X5R-CERM 4V 2.2UF 20% 0201 RADIO_BB RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 2.2UF 4V 0201 20% RADIO_BB X5R-CERM 4V 0201 2.2UF 20% RADIO_BB X5R-CERM 4V 0201 2.2UF 20% MDM9645 BGA MDM9645 BGA RADIO_PMIC X5R-CERM 0201-1 6.3V 2.2UF 20% RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% RADIO_PMIC 0201-1 6.3V X5R-CERM 2.2UF 20% MDM9645 BGA RADIO_PMIC 0201-1 X5R-CERM 2.2UF 20% 6.3V X5R-CERM NOSTUFF RADIO_PMIC 0201-1 6.3V 2.2UF 20% X5R-CERM 0.1UF RADIO_PMIC 01005 6.3V 20% RADIO_PMIC 01005 NOSTUFF 0.1UF 4V 20% X5R 5 4 5 4 5 4 5 4 4 4 4 5 4 20 17 7 6 5 4 543 4 54 3 54 20 4 543 4 20 17 7 6 5 4 20 17 7 6 5 4 5 4 5 4 20177654 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST NC SYM 8 OF 8 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 6 OF 8 PWR1 VDD_CORE VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_MODEM VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM NC NC NC SYM 7 OF 8 PWR2 VDD_A2 VDD_A2 VDD_A1 VDD_A1 VDD_A2 VDD_A1 VDD_A2 VDD_A1 VDD_A2 VDD_ALWAYS_ON VDD_PLL VDD_USB_HS_MX VDD_A2 VDD_A2 VDD_A2 VDD_A3 VDD_A3 VDD_DDR_CORE_1P2 VDD_A1 VDD_A2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P8 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VREF_SDC VREF_UIM VDD_PLL VDD_QFPROM_PRG VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P1 VDD_P2 VDD_P3 VDD_P1 VDD_P1 VDD_P1 VDD_P3 VDD_P3 VDD_P1 VDD_P1 VDD_P4 VDD_P3 VDD_P3 VDD_P5 VDD_USB_HS_1P8 VDD_USB_HS_3P3 VDD_P7 VDD_USB_SS_0P9 VDD_USB_SS_1P8 VDD_USB_SS_0P9 VDD_P7 VDD_PCIE_1P8 VDD_PCIE_0P9 VDD_PCIE_0P9 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 68.
    PLACEPLACE CLOSECLOSE TO T3TO E1 TOAA10 PLACE CLOSE CLOSE TO U12 PLACE NOSTUFF AT CARRIER BASEBAND: CONTROL AND INTERFACES 536278 81 53 62 78 53 62 78 6478 7881 70 71 70 71 71 71 70 70 70 70 77 77 71 71 71 71 71 71 71 71 71 71 71 71 64 64 64 78 64 78 6478 6478 64 6478 53 62 53 62 53 62 53 62 536278 81 SWD_AP_TO_MANY_SWCLK 120 90_PCIE_AP_TO_BB_REFCLK_P 90_PCIE_AP_TO_BB_REFCLK_N 90_PCIE_BB_TO_AP_RXD_P 90_PCIE_BB_TO_AP_RXD_N 90_PCIE_AP_TO_BB_TXD_P 90_PCIE_AP_TO_BB_TXD_N 90_USB_BB_DATA_N 90_USB_BB_DATA_P SWD_AOP_BI_BB_SWDIO120 2 1 R5807_RF 2 1 C5804_RF 4 5 1 3 2 U5801_RF 2 1 C5801_RF 2 1 R5806_RF AB2 AA2 AA4 AB4 Y1 Y9 V10 Y10 AA9 AB6 AA6 AA8 AB8 AA7 V8 V7 BB_RF C19 C13 A13 A14 C14 B14 A16 B16 C17 B17 J21 H21 F22 F21 E12 E11 A18 A19 A20 A21 Y3 G6 G1 F6 F1 B11 B1 C3 A5 B6 C8 A10 C10 B2 A3 B4 C5 A8 B9 BB_RF K22 U5 K21 G21 V5 D3 BB_RF U19 W22 V21 V22 W23 V19 AB18 Y17 T2 R22 R19 T19 T21 V23 R21 V2 V3 U2 T3 R6 U3 F2 BB_RF 2 1 R5803_RF 2 1 R5802_RF 2 1 R5801_RF SHIELD_XCVR0_DRX_CA2_Q SHIELD_XCVR1_DRX_I SHIELD_XCVR0_DRX_CA2_I SHIELD_XCVR0_PRX_CA2_Q XO_OUT_D0_EN SHIELD_SLEEP_CLK_32K SHIELD_XCVR0_PRX_CA2_I PP_1V8_LDO6 MDM_VREF_LPDDR2 EBI1_CAL BDM_CAL PCIE_CAL_RES 50_MDM_PCIE_CLK BB_USB_TRXTUNE SHIELD_XCVR0_TX_FB_RX_I SHIELD_ET_DAC_N SHIELD_ET_DAC_P SHIELD_XCVR0_TX_FB_RX_Q SHIELD_GPS_RX_I SHIELD_XCVR0-1_TX_Q_P PS_HOLD SPMI_CLK VREF_DAC_BIAS SHIELD_XCVR0_PRX_CA1_I SHIELD_XCVR0_PRX_CA1_Q SHIELD_XCVR0_DRX_CA1_Q SHIELD_XCVR0_DRX_CA1_I SHIELD_XCVR1_DRX_Q SHIELD_XCVR1_PRX_I SHIELD_XCVR1_PRX_Q SHIELD_GPS_RX_Q SHIELD_XCVR0-1_TX_Q_N SHIELD_XCVR0-1_TX_I_N SHIELD_XCVR0-1_TX_I_P PMIC_RESOUT_L SHIELD_MDM_19P2M_CLK SPMI_DATA BB_JTAG_RST_L SWD_AP_TO_BB_CLK_BUFFER PP_1V8_LDO6 SWD_AP_TO_BB_CLK_BUFFER5% 1.00K 1/32W MF 01005 SOT1226 NOSTUFF 74AUP1G34GX X5R-CERM 01005 6.3V 20% 0.1UF 1% MF 1/32W 01005 4.02K BGA MDM9645 BGA MDM9645 MDM9645 BGA BGA MDM9645 1.43K 1% 01005 RADIO_BB 1/32W MF RADIO_BB 01005 240 1% 1/32W MF RADIO_BB MF 240 1/32W 1% 01005 0201 10% 10V X5R-CERM 0.1UF RADIO_BB 20 6 5 4 4 176 20 17 7 6 5 4 17 6 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST BI IN IN IN NC NC NC NCIN NC NC NCNC NC NC NC NC NC NC NC USB_PCIE SYM 5 OF 8 PCIE_REFCLK_M PCIE_REFCLK_P PCIE_REXT PCIE_RX_M PCIE_RX_P PCIE_TX_P PCIE_TX_M PCIE_USB_SYSCLK USB_HS_REXT USB_HS_DM USB_HS_DP USB_SS_REXT USB_SS_RX_M USB_SS_RX_P USB_SS_TX_M USB_SS_TX_P IN IN IN IN OUT OUT OUT OUT OUT OUT NC NC NC NC NC NC NC ANALOG_RF SYM 2 OF 8 GNSS_BB_QP BBRX_IP_FB BBRX_QP_FB GNSS_BB_IP TX_DAC0_IP TX_DAC0_QP TX_DAC0_QM TX_DAC1_IP TX_DAC1_IM TX_DAC1_QP TX_DAC1_QM ET_DAC0_P ET_DAC0_M ET_DAC1_P ET_DAC1_M TX_DAC0_IM DNC DNC DNC DNC DNC BBRX_IP_CH0 BBRX_QP_CH0 BBRX_IP_CH1 BBRX_IP_CH3 BBRX_QP_CH2 BBRX_IP_CH2 BBRX_QP_CH1 BBRX_QP_CH6 BBRX_IP_CH6 BBRX_QP_CH5 BBRX_IP_CH5 BBRX_QP_CH3 TX_DAC_VREF TX_DAC_VREF NC NC NC NCNC NC IN IN IN IN IN IN IN IN IN IN IN IN IN SYM 4 OF 8 MEMORYBDM_ZQ VREF_DQ_BDM EBI1_CAL EBI1_VREF EBI1_VREF EBI1_VREF OUT BI BI NC NC OUT IN IN IN NC NC NC NC SYM 1 OF 8 CONTROL SPMI_DATA SPMI_CLK RESOUT* SDC1_DATA_3 SDC1_DATA_2 SDC1_DATA_0 SDC1_CMD SDC1_CLK PS_HOLD SDC1_DATA_1 SRST* CXO_EN CXO SLEEP_CLK RESIN* TCK MODE_0 MODE_1 TRST* TDO TDI TMS IN IN NC NC NC NC OUT OUT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 69.
    RFFE USAGE TABLE JP1.0 KOHM NOSTUFF R5911_RF BASEBAND: GPIOS R5912_RF USID=0X8 USID=0XF NOSTUFF SKU ROW NOSTUFF IMPROVES RXBN BY 4DB RFFE1 WTR3925 MAV13 = BB_LAT_0 RF_BB_LAT_2 WDOG DIS CONFLICT RFFE3 DIV MODULES RF_BB_LAT_1 MAV13 = WDOG DIS RFCAL_QCN PLACE CAP CLOSE TO MDM BUFFER ON RFFE5 SCLK/SDATA_A IS OUTPUT PCIE PULL-UPS TO BB RAIL RF_BB_LAT_3 RFFE5 TUNERS + ELNAS RFFE7 LB PA, COUPLERS BB EEPROM RFFE6 2G PA,MLB PA,MB/HB TDD PA,MB/HB FDD PA RFFE4 WTR4905 RFFE2 QFE3100 53 62 78 70 78 81 53 62 78 536278 5362 5362 5362 5362 5362 536278 7478 53 62 53 62 68 7380 7879 80 77 78 70 78 74 78 70 78 70 78 74 78 70 78 77 78 53 62 64 64 78 53 62 78 7378 7378 53 62 78 53 62 78 81 53 62 78 81 53 62 78 81 78 81 78 81 BB_BUFFER_GPO2 1 BB_BUFFER_GPO1 1 BB_TO_UAT_SCLK 1471 BB_TO_UAT_DATA 1471 BB_TO_LAT_ANT_DATA 1771 I2S_BB_TO_AP_BCLK BB_TO_LAT_ANT_DATA17 7 1 PCIE_BB_BI_AP_CLKREQ_L BB_TO_LAT_GPO2 1 BB_TO_LAT_GPO3 1 BB_TO_LAT_GPO1 1 BB_TO_LAT_ANT_DATA 17 7 1 BB_TO_LAT_ANT_SCLK17 7 1 BB_TO_LAT_ANT_SCLK17 7 1 PCIE_BB_BI_AP_CLKREQ_L7 1 I2S_BB_TO_AP_LRCLK BB_TO_UAT_SCLK 1471 BB_TO_UAT_DATA 1471 BB_TO_LAT_ANT_SCLK 17 7 1 BB_TO_LAT_ANT_DATA 17 7 1 PCIE_AP_TO_BB_RESET_L BB_TO_PMU_PCIE_HOST_WAKE_L AP_TO_BB_IPC_GPIO1 AP_TO_BB_COREDUMP BB_TO_LAT_ANT_SCLK 1771 BB_TO_STROBE_DRIVER_GSM_BURST_IND 2 1 R5912_RF 2 1 C5907_RF 2 1 C5906_RF A3 A2 A1 B4 B2 B1 A4 B3 GPIO_RF 2 1 R5911_RF 21 R5910_RF 21 R5909_RF 2 1 C5903_RF 4 63 52 8 1 7 RFBUF_RF 2 1 R5907_RF A2A1 B2B1 EPROM_RF 2 1 C5902_RF AA20 AB20 Y19 Y21 G5 G2 G3 H5 AB12 N21 AA18 AA17 W21 L21 AA11 Y11 M21 Y22 AB17 Y12 AB22 M23 AA22 L19 Y23 K19 V12 AA16 N23 Y16 H1 H2 H3 J5 J1 J2 J3 K5 K3 F3 F5 N22 L1 L2 L3 L5 M5 M1 M2 M3 N5 N1 N2 N3 P22 N19 Y18 P23 P21 AB19 AB13 Y14 AA14 V14 AA13 Y13 AA12 V13 P5 R5 P3 T5 R1 R2 R3 T1 Y15 AB14 AA19 V15 BB_RF 2 1 C5901_RF 2 1 R5906_RF 2 1 R5908_RF 1% MF 100K 1/32W RADIO_BB 01005 NOSTUFF 1UF 20% 10V RADIO_BB 0201 X5R WLCSP RF1352 MDM9645 BGA 22PF 16V CERM 2% 01005 CAT24C08C4A WLCSP RADIO_BB RADIO_BB 1/32W MF 01005 1% 10K 100PF 5% 16V NP0-C0G 01005 NOSTUFF 0%0.00 MF 01005 RADIO_BB 1/32W 1/32W 0.00 MF 0% NOSTUFF 01005 RADIO_BB 01005 MF 1/32W 1% 1.00K RADIO_BB OMIT_TABLE WLCSP QM18064 01005 6.3V X5R 10% 0.01UF 16V NP0-C0G-CERM 33PF 01005 5% NOSTUFF 1% MF 1/32W 1.00K RADIO_BB 01005 1% 10K MF 01005 1/32W RADIO_BB RX-DSPDT_CTL2 SIM1_DETECT SIM1_RST SKU_ID2 FAST_BOOT_SELECT0 75_RFFE6_SCLK SIM1_IO SIM1_REMOVAL_ALARM FAST_BOOT_SELECT1 PP1V8_SDRAM AP_TO_BB_TIME_MARK UART_BB_TO_WLAN_COEX I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT PP_1V8_LDO6 FBRX-DSPDT_CTL1 BB_EEPROM_I2C_SCL BB_EEPROM_I2C_SDA 75_RFFE3_SCLK UART_WLAN_TO_BB_COEX BB_EEPROM_I2C_SCL PP_1V8_LDO6 75_RFFE7_SDATA PP_1V8_LDO15 UART_BB_TO_AOP_RXD UART_AOP_TO_BB_TXD 75_RFFE4_SCLK 75_RFFE3_SDATA 75_RFFE4_SDATA BB_TO_AP_RESET_DETECT_L AP_TO_BB_MESA_ON SHIELD_GSM_TX_PHASE FBRX-DSPDT_CTL2 75_RFFE1_SCLK PP_1V8_LDO6 SKU_ID BB_EEPROM_I2C_SDA 75_RFFE6_SDATA 75_RFFE7_SCLK 75_RFFE2_SDATA 75_RFFE2_SCLK 75_RFFE1_SDATA SIM1_CLK 17 17 120 45671720 7 7 7 4 5 6 7 17 20 1219 4121314161819 45671720 7 171819 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST OUT OUT IN IN OUT NC NC SDATA GPO4 GPO3 GPO2 GND VIO SCLK GPO1 NC NC NC NC NC NC NC IN OUT IN IN IN OUT NC NC NC NC OUT NC NC NC NC BI NC NC NC NC BI OUT OUT OUT BI OUT OUT BI BI BI BI NC NC NC IN NC NC NC NC NC NC NC NC NC NC BI IN OUT OUT VCC VSS SDASCL GPIO SYM 3 OF 8 GPIO_39 GPIO_38 GPIO_37 GPIO_36 GPIO_35 GPIO_34 GPIO_33 GPIO_32 GPIO_31 GPIO_30 GPIO_29 GPIO_28 GPIO_27 GPIO_24 GPIO_25 GPIO_23 GPIO_26 GPIO_22 GPIO_20 GPIO_21 GPIO_19 GPIO_17 GPIO_18 GPIO_16 GPIO_15 GPIO_12 GPIO_13 GPIO_14 GPIO_7 GPIO_9 GPIO_10 GPIO_11 GPIO_8 GPIO_3 GPIO_4 GPIO_6 GPIO_5 GPIO_2 GPIO_0 GPIO_1 GPIO_78 GPIO_79 GPIO_77 GPIO_76 GPIO_75 GPIO_74 GPIO_73 GPIO_72 GPIO_71 GPIO_70 GPIO_69 GPIO_68 GPIO_67 GPIO_66 GPIO_65 GPIO_64 GPIO_63 GPIO_62 GPIO_61 GPIO_60 GPIO_59 GPIO_58 GPIO_57 GPIO_56 GPIO_55 GPIO_54 GPIO_53 GPIO_52 GPIO_51 GPIO_50 GPIO_46 GPIO_45 GPIO_44 GPIO_43 GPIO_42 GPIO_41 GPIO_49 GPIO_48 GPIO_47 GPIO_40 SDATA SCLK_A SDATA_A GPO2 GND VIO SCLK GPO1 OUT IN OUT NC BI BI OUT 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 70.
    250MA 35MA 175MA TRANSCEIVER: POWER STAR ROUTING 40MA 250MA 25MA 175MA 40MA STARROUTING 25MA 250MA C6380_RF CAN BE 0201 (TBD) BBPMU_TO_PMU_AMUX3-53[I16]65 69 6569 BBPMU_TO_PMU_AMUX3-53[I16]65 69 6569 BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX3 2 1 C6017_RF 2 1 C6016_RF 2 1 C6015_RF 2 1 C6022_RF 2 1 C6024_RF 2 1 C6023_RF 2 1 C6021_RF 2 1 C6020_RF 2 1 C6019_RF 2 1 C6018_RF 21 R6008_RF 21 R6007_RF 21 R6006_RF 21 R6005_RF 2 1 C6004_RF 2 1 C6002_RF 2 1 C6009_RF 2 1 C6008_RF 2 1 C6007_RF 21 R6004_RF 21 R6003_RF 2 1 C6006_RF 21 R6002_RF 52 48 45 42 40 39 37 35 32 30 29 27 26 25 24 21 16 13 9 XCVR1_RF 34 44 23 33 50 XCVR1_RF 2 1 C6005_RF 2 1 C6014_RF 2 1 C6013_RF 2 1 C6012_RF 2 1 C6011_RF 2 1 C6010_RF 21 R6001_RF 2 1 C6001_RF 2 1 C6003_RF 31 25 38 48 41 63 71 27 26 83 82 57 54 53 61 36 37 52 17 81 87 94 55 102 89 19 90 20 91 21 84 28 72 42 56 58 3 XCVR0_RF 23 30 88 67 49 64 45 XCVR0_RF WTR3925-2-TR-03-1 RADIO_TRANSCEIVER DEFAULT_CAPACITOR_27.000000pF_2_1 RADIO_TRANSCEIVER WLPSP WTR3925-2-TR-03-1 RADIO_TRANSCEIVER PP_0V9_LDO3 PP_VDD_XCVR1_RF1_DIG PP_VDD_XCVR1_RF1_TX PP_VDD_XCVR1_RF1_RX PP_VDD_XCVR0_RF1_DIG PP_VDD_XCVR0_RF1_RX2 PP_VDD_XCVR0_RF1_RX1 PP_0V9_LDO3 PP_VDD_XCVR0_RF1_TX PP_VDD_XCVR0_RF1_TX_VCO VDD_XCVR1_RF2_LDO_BYPASS VDD_XCVR0_RF2_LDO_BYPASS RADIO_TRANSCEIVER NP0-C0G 27PF 5% 16V 01005 DEFAULT_CAPACITOR_27.000000pF_2_1 NP0-C0G 27PF 01005 16V 5% RADIO_TRANSCEIVER NP0-C0G 27PF 01005 16V 5% DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 01005 6.3V 20% 20% 2.2UF X5R-CERM 6.3V 0201-1 0201-1 X5R-CERM 2.2UF 20% 6.3V DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 01005 6.3V 20% DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 01005 6.3V 20% DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 01005 6.3V 20% DEFAULT_CAPACITOR_100000pF_2_1 0.1UF X5R-CERM 20% 6.3V 01005 DEFAULT_RESISTOR_0.001OHM_2_1 MF 0% 0.00 01005 1/32W DEFAULT_RESISTOR_0.001OHM_2_1 MF 0% 01005 0.00 1/32W DEFAULT_RESISTOR_0.001OHM_2_1 0% MF 01005 1/32W 0.00 0% 0.00 1/32W MF 01005 DEFAULT_CAPACITOR_100000pF_2_1 20% CERM-X5R-1 201 4V 0.47UF RADIO_TRANSCEIVER DEFAULT_CAPACITOR_4700pF_2_1 RADIO_TRANSCEIVER 4700PF X5R 10% 01005 6.3V RADIO_TRANSCEIVER CERM-X5R-1 0.47UF 4V 20% 201 RADIO_TRANSCEIVER 0.1UF X5R-CERM 20% 6.3V 01005 RADIO_TRANSCEIVER 0.1UF X5R-CERM 01005 6.3V 20% RADIO_TRANSCEIVER 0.1UF X5R-CERM 01005 6.3V 20% 0.00 MF 0% 01005 1/32W RADIO_TRANSCEIVER 0% MF 01005 1/32W 0.00 RADIO_TRANSCEIVER 6.3V X5R-CERM 0201-1 2.2UF 20% DEFAULT_RESISTOR_0.001OHM_2_1 RADIO_TRANSCEIVER MF 0% 01005 1/32W 0.00 WTR4905 WLNSP WLNSP WTR4905 DEFAULT_CAPACITOR_4700pF_2_1 RADIO_TRANSCEIVER 10% 6.3V 01005 X5R 4700PF RADIO_TRANSCEIVER DEFAULT_CAPACITOR_27.000000pF_2_1 NP0-C0G 27PF 01005 5% 16V DEFAULT_CAPACITOR_27.000000pF_2_1 27PF NP0-C0G 01005 5% 16V RADIO_TRANSCEIVER RADIO_TRANSCEIVER 27PF NP0-C0G 01005 5% 16V NP0-C0G 27PF 01005 5% 16V DEFAULT_CAPACITOR_27.000000pF_2_1 RADIO_TRANSCEIVER 27PF NP0-C0G 5% 16V 01005 RADIO_TRANSCEIVER DEFAULT_RESISTOR_0.001OHM_2_1 0% MF 01005 0.00 1/32W DEFAULT_CAPACITOR_1e+06pF_2_1 RADIO_TRANSCEIVER CERM-X5R 20% 6.3V 10UF 0402 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IN IN GND SYM 5 OF 5 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SRM 4 OF 5 PWR VDD_RF1_TX VDD_RF1_DIG VDD_RF1_RX VDD_RF2 VDD_RF2_LDO IN IN GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GNDGND GND PWR SYM 4 OF 5 VDD_RF1_TSIG VDD_RF2 LDO_CAP VDD_RF1_DIG VDD_RF1_RX1 VDD_RF1_RX2 VDD_RF1_TVCO 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 71.
    TRANSCEIVER: TX PORTS 68 6878 6470 80 79 80 80 79 6470 6770 79 6770 80 80 79 6770 6770 6770 6770 6770 6878 6770 6771 6771 6878 73 6878 2 1C6117_RF 2 1 C6118_RF 21 L6111_RF 2 1 L6103_RF 2 1 L6102_RF21 C6105_RF 21 C6115_RF 2 1 C6114_RF 21 L6109_RF 21 C6116_RF 2 1 C6113_RF 21 L6110_RF 21 C6110_RF 21 C6109_RF 2 1 C6111_RF 21 C6106_RF 21 C6107_RF 21 C6108_RF 2 1 L6101_RF 21 C6101_RF 2 1 L6104_RF 21 C6102_RF 21 C6103_RF 21 C6104_RF 86 93 100 101 1 9 46 44 51 59 66 74 80 8 16 68 60 76 75 62 47 XCVR0_RF 2 1 C6112_RF 55 31 7 2 12 18 1 3 8 14 19 56 51 57 XCVR1_RF 50_XCVR1_TX_G1800_G1900_PA_IN 27PF RADIO_TRANSCEIVER CERM 2% 50_XCVR0_TX_HMLB2_B34_B39 50_XCVR1_TX_B8_B20_B26_B27_PA_IN RADIO_TRANSCEIVER 10NH-3%-140MA 01005 NOSTUFF SHIELD_XCVR0-1_TX_Q_P 50_XCVR1_TX_HMLB1_G1800_G1900 WLPSP SHIELD_XCVR0-1_TX_I_N SHIELD_XCVR0-1_TX_Q_P SHIELD_XCVR0-1_TX_Q_N SHIELD_XCVR0_TX_FB_RX_I 75_RFFE1_SCLK SHIELD_XCVR0_TX_FB_RX_Q 50_XCVR0_TX_HMB3_B1_B3_B4_B25 50_XCVR0_TX_HMB1_B11_B21 50_XCVR0_TX_HMB2_B38_B40_B41 50_XCVR0_TX_HMB4_B7_B30 50_XCVR0_TX_HMLB2_B34_B39 100_XCVR0_TX_FBRX_IN_WTR 75_RFFE1_SDATA SHIELD_XCVR0-1_TX_I_P WTR3925-2-TR-03-1 RADIO_TRANSCEIVER SHIELD_WTR_19P2M_CLK SHIELD_XCVR0_19P2M_CLK_WTR_IN SHIELD_XCVR0-1_TX_I_N SHIELD_XCVR0-1_TX_Q_N 75_RFFE4_SCLK 75_RFFE4_SDATA SHIELD_XCVR0-1_TX_I_P SHIELD_GSM_TX_PHASE 50_XCVR1_TX_HMLB1_G1800_G1900 50_XCVR1_TX_HMLB2_B8_B20_B26_B27 50_XCVR1_TX_HMLB4_B12_B13_B28 50_XCVR1_TX_HMLB5_G850_G900 50_XCVR1_TX_FBRX_IN 50_XCVR1_TX_HMLB5_G850_G900 50_XCVR1_TX_HMLB4_B12_B13_B28 50_XCVR0_TX_FBRX_IN_UNBAL 50_XCVR0_TX_FBRX_IN 50_XCVR0_TX_HMB3_B1_B3_B4_B25 50_XCVR0_TX_HMB4_B7_B30 50_XCVR1_TX_G850_G900_PA_IN 50_XCVR0_TX_HMB4_B7_B30_MATCH 50_XCVR0_TX_HMB2_B38_B40_B41 50_XCVR0_TX_HMB1_B11_B21 50_XCVR0_TX_HMB2_B38_B40_B41_MATCH 50_XCVR0_TX_B34_B39_PA_IN 50_XCVR0_TX_B7_B30_PA_IN 50_XCVR0_TX_B11_B21_PA_IN 50_XCVR0_TX_B38_B40_B41_PA_IN 50_XCVR0_TX_B1_B3_B4_B25_PA_IN 50_XCVR1_TX_HMLB2_B8_B20_B26_B27 50_XCVR1_TX_B12_B13_B28_PA_IN SHIELD_WTR_19P2M_CLK SHIELD_XCVR1_19P2M_CLK_WTR_IN DEFAULT_CAPACITOR_1.200000pF_2_1 NP0-C0G-CERM 01005 16V +/-0.05PF 1.2PF DEFAULT_INDUCTOR_2.800000nH_2_1 01005 2.8NH-+/-0.1NH-0.36A DEFAULT_CAPACITOR_22.000000pF_2_1 22PF 01005 CERM 16V 5%DEFAULT_CAPACITOR_1.200000pF_2_1 NP0-C0G-CERM 16V +/-0.05PF 01005 1.2PF 2.8NH-+/-0.1NH-0.36A DEFAULT_INDUCTOR_2.800000nH_2_1 01005 DEFAULT_CAPACITOR_1000pF_2_1 6.3V 10% 01005 1000PF X5R-CERM DEFAULT_CAPACITOR_1000pF_2_1 100PF 5% 6.3V 01005 CERM 5% 01005 NOSTUFF NP0-C0G-CERM 25V 68PF OMIT_TABLE 27PF 2% 16V CERM 01005 RADIO_TRANSCEIVER 27PF CERM 16V 01005 RADIO_TRANSCEIVER 2% 16V 27PF 01005 OFFPAGE=TRUE RADIO_TRANSCEIVER 01005 CERM 2% 16V RADIO_TRANSCEIVER NOSTUFF 10NH-3%-140MA 01005 01005 RADIO_TRANSCEIVER 27PF 16V 2% CERM RADIO_TRANSCEIVER 27PF 2% 01005 16V CERM RADIO_TRANSCEIVER 27PF 16V CERM 01005 2% 1.0PF NP0-C0G NOSTUFF 01005 16V +/-0.1PF WLNSP WTR4905 1.5PF +/-0.1PF NP0-C0G 16V 01005-1 +/-0.1PF NP0-C0G 1.5PF 01005-1 16V 3.0NH+/-0.1NH-200MA 01005 NOSTUFF 01005 RADIO_TRANSCEIVER 10NH-3%-140MA RADIO_TRANSCEIVER 10NH-3%-140MA 01005 NOSTUFF 27PF 2% RADIO_TRANSCEIVER 01005 16V CERM DEFAULT_CAPACITOR_22.000000pF_2_1 22PF 01005 CERM 16V 5% 9 9 9 9 9 9 9 9 9 9 12 9 9 9 9 9 9 9 9 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IN IN IN OUT OUT OUT OUT OUT IN IN OUT IN OUT OUT OUT IN IN NC NC NC TX SYM 3 OF 5 TX_LB1 TX_BB_IM TX_BB_QP TX_BB_QM TX_FBRX_BBI RFFE_CLK TX_FBRX_BBQ XO_IN TX_LB2 TX_LB4 TX_LB3 TX_MHB3 TX_MHB1 TX_MHB2 TX_MHB4 TX_HMLB1 TX_HMLB2 TX_FBRX_M TX_FBRX_P RFFE_DATA TX_BB_IP NC IN IN IN IN IN OUT OUT IN NC NC SYM 2 OF 5 TX TX_BB_QP TX_BB_IM TX_BB_QM TX_BB_IP GP_DATA RFFE_DATA RFFE_CLK XO_IN TX_DA1 TX_DA2 TX_DA3 TX_DA4 TX_DA5 TX_FBRX IN NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 72.
    GPS FILTER PLACE NEARU_WTR TRANSCEIVER: PRX, DRX, & GPS PORTS 67 67 76 67 67 67 67 67 72 72 72 72 72 72 67 67 67 67 70 67 70 72 72 72 67 67 67 67 41 6 5 3 2 GFILT_RF 21 L6200_RF 2 1 C6201_RF 7 91 3 8 6 5 4 2 GLNA_RF 21 R6201_RF 2 1 C6205_RF 2 1 C6204_RF 21 L6201_RF 2 1 C6203_RF 24 10 32 18 40 34 70 78 2 13 6 14 7 22 15 11 4 12 5 35 29 50 43 XCVR0_RF 58 41 46 53 59 60 54 49 43 38 36 47 XCVR1_RF 33 39 77 69 97 105 98 106 92 99 95 103 96 104 79 85 65 73 XCVR0_RF 5 10 4 6 11 17 22 28 20 15 XCVR1_RF 50_XCVR0_PRX_PHB3_B38_B40_B41 50_XCVR0_DRX_DMB2_B34 50_XCVR0_DRX_DMB3_B1_B4 50_XCVR0_DRX_DMB5_B3_B25 50_XCVR0_DRX_DHB4_B30_B40 WLPSP SHIELD_GPS_RX_Q SHIELD_XCVR0_DRX_CA2_Q SHIELD_XCVR0_DRX_CA2_I SHIELD_XCVR0_DRX_CA1_Q 50_XCVR0_DRX_DMB4_B39 50_XCVR0_DRX_DHB2_B7_B38_B41 50_XCVR0_DRX_DMLB6_B11_B21 50_GPS_RX SHIELD_XCVR0_DRX_CA1_I SHIELD_GPS_RX_I WTR3925-2-TR-03-1 RADIO_TRANSCEIVER WLPSP WTR3925-2-TR-03-1 SHIELD_XCVR0_PRX_CA2_Q SHIELD_XCVR0_PRX_CA1_Q SHIELD_XCVR0_PRX_CA2_I 50_XCVR0_PRX_PHB2_B40_EXT 50_XCVR0_PRX_PHB1_B7 50_XCVR0_PRX_PMB3_B3 SHIELD_XCVR0_PRX_CA1_I 50_XCVR0_PRX_PHB4_B30 50_XCVR0_PRX_PMLB6_B11_B21 50_XCVR0_PRX_PMB5_B25 50_XCVR0_PRX_PMB4_B34_B39 50_XCVR0_PRX_PMB2_B1_B4 50_XCVR0_PRX_PMB1_B4 RADIO_TRANSCEIVER PP_1V8_LDO14 50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29 SHIELD_XCVR1_PRX_Q 50_GPS_RX 50_XCVR1_DRX_DLB1_B12_B13_B20_B28_B29 50_XCVR1_DRX_DMB2_B3 50_XCVR1_DRX_DLB2_B8_B26_B27 SHIELD_XCVR0_TX_FB_RX_Q SHIELD_XCVR0_TX_FB_RX_I SHIELD_XCVR1_DRX_Q SHIELD_XCVR1_DRX_I SHIELD_XCVR1_PRX_I 50_XCVR1_PRX_PMB2_G1900 50_XCVR1_PRX_PMB1_G1800 50_XCVR1_PRX_PLB2_B8_B26_B27 50_DRX_GPS_LNA_MATCH 50_GPS_FILTER_OUT50_DRX_GPS_LNA_OUT50_GNSS LGA SAFGB1G56XA0F57 GPS-GNSS 120NH-5%-40MA 0201 GNSS 01005 0.1UF 6.3V 20% X5R-CERM GNSS GNSS LGA SKY65766-13 DEFAULT_RESISTOR_0.001OHM_2_1 0.00 0% MF 1/32W 01005 2.0PF +/-0.1PF 16V NOSTUFF 01005 NP0-C0G 2.0PF 01005 NP0-C0G 16V +/-0.1PF NOSTUFF 01005 10NH-3%-0.170A 01005 NP0-C0G 1.6PF +/-0.1PF 16V WTR4905 WLNSP WLNSP WTR4905 11 10 11 11 11 11 11 11 11 11 11 4 11 10 11 11 11 11 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST UNBAL_PRT UNBAL_PRT GND NC OUT NC NC NC NC NC OUT NC RFIN GND RFOUT VDD LNA_EN NC NC IN OUT OUT OUT OUT OUT NC NC NC NC PRX SYM 1 OF 5 PRX_CA2_BBQ PRX_CA1_BBQ PRX_CA2_BBI PRX_HB2 PRX_HB1 PRX_MB3 PRX_CA1_BBI PRX_HB4 PRX_HB3 PRX_MLB6 PRX_MB5 PRX_MB4 PRX_MB2 PRX_MB1 PRX_LB4 PRX_LB2 PRX_LB3 PRX_LB1 IN IN IN IN IN IN OUT OUT OUT OUT NC OUT NC NC SYM 2 OF 5 DRX_GPS GNSS_BBQ DRX_CA2_BBQ DRX_CA2_BBI DRX_CA1_BBQ DRX_LB1 DRX_LB2 DRX_LB4 DRX_MB2 DRX_MB1 DRX_LB3 DRX_MB5 DRX_MB4 DRX_MB3 DRX_HB1 DRX_HB4 DRX_HB3 DRX_HB2 DNC DRX_MLB6 GNSS_L1 DRX_CA1_BBI GNSS_BBI GP_DATANC NC NC NC SYM 1 OF 5 DRX_GPS GNSS_BBQ GNSS_BBI DRX_BBQ DRX_BBI GNSS_IN DRX_HB1 DRX_HB2 DRX_MB1 DRX_MB2 DRX_LB3 DRX_LB1 DRX_LB2 NC NC IN IN IN OUT OUT OUT OUT PRX SYM 3 OF 5 PRX_LB2 PRX_LB1 PRX_LB3 PRX_BBI PRX_BBQ PRX_MB3 PRX_MB1 PRX_MB2 PRX_HB2 PRX_HB1 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 73.
    PRIMARY & DIVERSITYRECEIVE MATCHING DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF SHUNT COMPONENT WITH BAND 40 FILTER DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF 74 74 74 74 80 80 80 80 80 80 79 80 80 80 80 74 79 80 74 74 74 74 80 21 C6333_RF 21 C6345_RF 21 L6322_RF 21 C6318_RF 21 L6310_RF 21 C6316_RF 21 L6306_RF 21 C6314_RF 21 L6304_RF 21 C6338_RF21 C6324_RF 21 C6349_RF 21 L6323_RF 21 C6350_RF 21 L6328_RF 21 L6319_RF 21 C6332_RF 21 L6318_RF 21 C6348_RF 21 C6302_RF 21 C6317_RF 21 C6301_RF 21 L6309_RF 21 C6309_RF 21 C6343_RF 21 L6308_RF 21 C6308_RF 21 C6342_RF 21 L6307_RF 21 C6306_RF 21 C6315_RF 21 L6305_RF 21 C6305_RF 21 L6325_RF 21 L6324_RF 3 4 6 5 2 1 GSMRX_RF 21 R6301_RF 2 1 L6320_RF 21 L6321_RF 21 L6301_RF 21 C6311_RF 21 C6307_RF 21 L6313_RF 21 C6310_RF 21 L6311_RF 21 L6312_RF 2 1 C6351_RF 2 1 C6352_RF 21 C6346_RF 21 C6334_RF 21 C6344_RF 21 C6336_RF 21 C6337_RF 21 C6323_RF 21 C6325_RF 21 C6335_RF 21 C6340_RF 21 C6341_RF 21 C6328_RF 21 C6329_RF 21 C6319_RF 21 C6320_RF 50_XCVR0_PRX_PMB2_B1_B4 50_XCVR0_PRX_PMB1_B4 50_XCVR0_B7_PA_PRX 50_XCVR0_DRX_DMLB6_B11_B21_MATCH 50_XCVR0_DRX_DMLB6_B11_B21 50_XCVR0_B34_B39_PA_PRX 50_XCVR0_PRX_PHB1_B7 50_XCVR0_PRX_PHB1_B7_MATCH 50_XCVR0_PRX_PMB4_B34_B39 50_XCVR0_PRX_PMB1_B4_MATCH 50_XCVR0_PRX_PMB5_B25_MATCH 50_XCVR0_PRX_PMLB6_B11_B21_MATCH 50_XCVR0_B11_B21_PA_DRX 1.9NH-+/-0.1NH-0.6A-0.12OHM 50_XCVR0_PRX_PMB2_B1_B4_MATCH 50_XCVR0_PRX_PMB4_B34_B39_MATCH 50_XCVR0_B1_B4_PA_PRX 2% CERM RADIO_TRANSCEIVER 27PF 01005 16V 16V 27PF 01005 CERM 2% RADIO_TRANSCEIVER 16V CERM 01005 RADIO_TRANSCEIVER 27PF 2% 01005 CERM 16V 2% 27PF RADIO_TRANSCEIVER CERM 2% 16V 27PF 01005 2% CERM RADIO_TRANSCEIVER 16V 01005 27PF 2% 27PF CERM 16V 01005 RADIO_TRANSCEIVER RADIO_TRANSCEIVER 01005 CERM 16V 2% 27PF NOSTUFF 27PF 01005 16V 2% CERM 01005 27PF 16V CERM 2% NOSTUFF 20NH-3%-0.25A-0.8OHM RADIO_TRANSCEIVER 0201 0201 0.00 MF 1/20W 1% RADIO_TRANSCEIVER 0201 0.00 MF 1/20W 1% 0201 RADIO_TRANSCEIVER 15NH-3%-0.3A-0.7OHM 3.0NH+/-0.1NH-0.6A RADIO_TRANSCEIVER 0201 2.1NH-+/-0.1NH-0.6A-0.12OHM 0201 RADIO_TRANSCEIVER 0201 2.5NH+/-0.1NH-0.6A RADIO_TRANSCEIVER 0201 4.3NH+/-3%-0.5A RADIO_TRANSCEIVER 0201 3.6NH+/-0.1NH-0.5A RADIO_TRANSCEIVER OMIT_TABLE 27PF RADIO_TRANSCEIVER NOSTUFF NP0-C0G 0201 5% 6.3V GSM1800-1900 OMIT_TABLELGA B8856 2.4NH+/-0.1NH-0.6A 0201 3.2NH+/-0.1NH-0.5A 3.1NH-+/-0.1NH-0.5A-0.17OHM RADIO_TRANSCEIVER 0201 6.2NH-3%-0.4A 0201 OMIT_TABLE RADIO_TRANSCEIVER 01005 16V 2% CERM 27PF OMIT_TABLE RADIO_TRANSCEIVER 2% 16V 01005 CERM 27PF RADIO_TRANSCEIVER C0G-CERM 0201 25V +/-0.05PF 3.0PF OMIT_TABLE 0201 4.3NH+/-3%-0.5A RADIO_TRANSCEIVER 01005 CERM 16V 2% 27PF 1.2PF C0G-CERM 25V +/-0.1PF 0201 RADIO_TRANSCEIVER 0201 4.3NH+/-3%-0.5A RADIO_TRANSCEIVER 27PF 2% 16V CERM 01005 RADIO_TRANSCEIVER 01005 16V CERM 2% 27PF RADIO_TRANSCEIVER 1.2PF C0G-CERM 25V 0201 +/-0.1PF 0201 RADIO_TRANSCEIVER 0201 3.3NH+/-0.1NH-0.5A RADIO_TRANSCEIVER 16V 2% CERM 27PF 01005 RADIO_TRANSCEIVER +/-0.1PF 201 1.0PF 25V C0G 3.0PF 25V 0201 +/-0.05PF OMIT_TABLE RADIO_TRANSCEIVER C0G-CERM RADIO_TRANSCEIVER 0201 OMIT_TABLE5.1NH-3%-0.4A 2.0PF +/-0.1PF RADIO_TRANSCEIVER OMIT_TABLE 0201 25V C0G-CERM 5.1NH-3%-0.4A RADIO_TRANSCEIVER OMIT_TABLE 0201 0201 3.0NH+/-0.1NH-0.6A +/-0.1PF 0201 C0G-CERM 25V 2.2PF RADIO_TRANSCEIVER 0201 RADIO_TRANSCEIVER 2.4NH+/-0.1NH-0.6A RADIO_TRANSCEIVER 0201 3.2NH+/-0.1NH-0.5A 2% 16V 01005 CERM RADIO_TRANSCEIVER 27PF 27PF 0201 NP0-C0G 6.3V 5% 1.6NH-+/-0.1NH-1A-0.05OHM RADIO_TRANSCEIVER 0201 27PF 01005 2% CERM 16V RADIO_TRANSCEIVER 1.9NH-+/-0.1NH-0.6A-0.12OHM RADIO_TRANSCEIVER 0201 RADIO_TRANSCEIVER 2% 16V CERM 01005 27PF 3.9NH+/-0.1NH-0.5A 0201 RADIO_TRANSCEIVER 27PF 2% 01005 CERM 16V 0201 6.2NH-3%-0.4A OMIT_TABLE 27PF RADIO_TRANSCEIVER 2% 16V CERM 01005 OMIT_TABLE OMIT_TABLE +/-0.1PF NP0-C0G 2.0PF 16V 01005 01005 RADIO_TRANSCEIVER 27PF 16V CERM 2% 27PF RADIO_TRANSCEIVER CERM 01005 2% 16V OMIT_TABLE RADIO_TRANSCEIVER 16V 2% 27PF 01005 CERM RADIO_TRANSCEIVER 01005 16V CERM 2% 27PF OMIT_TABLE 50_XCVR0_B7_B41_B38_MBHB-DRX-ASM_OUT 50_XCVR1_DRX_DMB2_B3 50_XCVR1_PRX_PLB2_B8_B26_B27_MATCH 50_XCVR1_G1800_G1900_DIPLEX_OUT 50_XCVR1_B3_DRX-DSPDT_OUT 50_XCVR1_DRX_DMB2_B3_MATCH 50_XCVR1_DRX_DLB2_B8_B26_B27 50_XCVR1_G1800_DIPLEX_IN 50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29 50_XCVR1_B12_B13_B20_B28_B29_LB-DRX-ASM_OUT 50_XCVR1_B8_B26_B27_LB-DRX-ASM_OUT 50_XCVR1_G1900_DIPLEX_IN 50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29_MATCH 50_XCVR0_PRX_PMB2_G1900_MATCH 50_XCVR0_PRX_PMB1_G1800_MATCH 50_XCVR0_B30_PA_PRX 50_XCVR1_PRX_PMB2_G1900 50_XCVR0_PRX_PHB2_B40_EXT_MATCH 50_XCVR0_PRX_PHB4_B30 50_XCVR_PRX_PHB4_B30_MATCH 50_XCVR0_B38_B40_B41_PA_PRX 50_XCVR0_PRX_PHB3_B38_B40_B41_MATCH 50_XCVR0_PRX_PMB3_B3_MATCH 50_XCVR0_B34_MBHB-DRX-ASM_OUT 50_XCVR1_PRX_PLB2_B8_B26_B27 50_XCVR1_B12_B13_B20_B28_B29_PA_PRX 50_XCVR0_B39_MBHB-DRX-ASM_OUT 50_XCVR0_B3_B25_DRX-DSPDT_OUT 50_XCVR0_DRX_DMB5_B3_B25_MATCH 50_XCVR0_B40_PA_PRX_EXT_FIL 50_XCVR0_PRX_PHB3_B38_B40_B41 50_XCVR0_B3_PRX-DSPDT_OUT 50_XCVR1_PRX_PMB1_G1800 50_LAT_MLB_G1800_G1900_PA_RX 50_XCVR0_B30_B40_MBHB-DRX-ASM_OUT 50_XCVR0_DRX_DHB2_B7_B38_B41_MATCH 50_XCVR0_DRX_DMB3_B1_B4 50_XCVR0_DRX_DMB2_B34 50_XCVR0_DRX_DMB5_B3_B25 50_XCVR1_DRX_DLB1_B12_B13_B20_B28_B29 50_XCVR0_DRX_DHB4_B30_B40 50_XCVR0_DRX_DHB2_B7_B38_B41 50_XCVR0_DRX_DMB4_B39 50_XCVR0_B1_B4_MBHB-DRX-ASM_OUT 50_XCVR1_B8_B26_B27_PA_PRX RADIO_TRANSCEIVER RADIO_TRANSCEIVER 0201 RADIO_TRANSCEIVER 50_XCVR0_PRX_PHB2_B40_EXT 50_XCVR0_B25_PA_PRX 50_XCVR0_B11_B21_PA_PRX 50_XCVR0_PRX_PMB3_B3 50_XCVR0_PRX_PMB5_B25 50_XCVR0_PRX_PMLB6_B11_B21 50_XCVR0_B4_PA_PRX 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN GSM1800 COMMON GSM1900 GND IN IN IN IN IN IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 74.
    UPPER ANTENNA COUPLER USID=0X7 USID=0X6 LOWERANTENNA AND COUPLER 70 70 6568737475777980 687380 687380 656873747577 7980 687380 687380 53 62 80 80 80 53 62 80 21 FL6401_RF 21 FL6402_RF 2 1 C6420_RF 2 1 C6419_RF 4 6 5 3 1 2 UATDI_RF 4 6 5 3 1 2 LATDI_RF 2 1 C6418_RF 2 1 C6416_RF 21 R6404_RF 2 1 C6415_RF 5 9 6 12 8 14 2 13 1 16 4 15 11 10 7 3 UATCP_RF 5 9 6 12 8 14 2 13 1 16 4 15 11 10 7 3 LATCP_RF 8 9 7 1 2 10 4 56 3 SWLATCP_RF 21 R6402_RF 21 R6401_RF 1 3 2 JLAT1_RF 2 1 C6414_RF 2 1 C6411_RF 2 1 C6410_RF 2 1 C6409_RF 2 1 C6407_RF 21 R6405_RF 2 1 C6408_RF 2 1 C6401_RF 2 1 C6406_RF 2 1 C6417_RF 2 1 C6400_RF 2 1 C6402_RF 2 1 C6403_RF 2 1 C6404_RF 21 R6400_RF 2 1 C6405_RF 50_XCVR0_LAT_CPLD PP_2V7_LDO12 FBRX-DSPDT_CTL1 FBRX-DSPDT_CTL2 50_XCVR0_TX_FBRX_IN 50_XCVR1_TX_FBRX_IN 50_LAT_LB_COMBINER_IN 50_LAT_MB_HB_COMBINER_IN 50_UAT_LB_COMBINER_IN 50_UAT_MLB_COMBINER_IN 50_XCVR0_UAT_CPLD 50_XCVR1_LAT_CPLD 50_XCVR0_LAT_CPLD PP_2V7_LDO12 50_UAT_LB_MLB_SOUTH 50_XCVR0_UAT_CPLD 50_LAT_LB_MB_HB_COMBINER_OUT 50_LAT_LB_MB_HB_CPL_ANT PP_2V7_LDO12 50_UAT_LB_MLB_CPL_OUT 50_UAT_MB_HB_SOUTH 50_UAT_MB_HB_CPL_ANT 50_XCVR1_UAT_CPLD 50_XCVR1_LAT_CPLD 50_UAT_LB_MLB_COMBINE 50_LAT1_ANT 75_RFFE7_SDATA PP_1V8_LDO15_UATCP 75_RFFE7_SCLK 50_UAT_MB_HB_CPL_IN PP_1V8_LDO15 50_XCVR1_UAT_CPLD 50_UAT_LB_MLB_CPL_IN PP_1V8_LDO15 PP_1V8_LDO15_LATCP 75_RFFE7_SDATA 50_LAT_LB_MB_HB_CPL_IN 75_RFFE7_SCLK 01005 2% 16V CERM 18PF NOSTUFF C0H-CERM 0201 2% 25V 18PF NOSTUFF C0G-CERM 0201 +/-0.05PF 0.7PF 25V NOSTUFF 25V 0201 18PF 2% C0H-CERM 0.1UF X5R-CERM 01005 6.3V 20% 18PF CERM 01005 16V 2% 1% 0201 MF 1/20W 0.00 6.3V 20% 0.1UF 01005 X5R-CERM 01005 X5R-CERM 0.033UF 4V 20% 2% CERM 16V 01005 18PF 2% 18PF 25V 0201 C0H-CERM NOSTUFF 0.033UF 20% X5R-CERM 01005 4V NOSTUFF 18PF 2% 25V 0201 C0H-CERM 2% 18PF C0H-CERM 25V 0201 NOSTUFF 10-OHM-1.1A 01005 10-OHM-1.1A 01005 18PF 2% 01005 16V CERM 18PF CERM 01005 16V 2% OMIT_TABLE 0805-LGA LFD21829MMY1E339 0805-LGA LFD21829MMY1E339 16V 5% CERM 18PF 01005 NOSTUFF C0G-CERM 25V 201 OMIT_TABLE 0.3PF +/-0.1PF OMIT_TABLE 1.3NH+/-0.1NH-1.1A 0201 2% NOSTUFF 0201 C0H-CERM 25V 18PF LGA SKY16705-21 SKY16705-21 LGA CXA4439GC-E LGA-1 C0H-CERM 18PF NOSTUFF 0201 25V 2% 0201 1.3NH+/-0.1NH-1.1A 0201 2NH+/-0.1NH-0.6A F-ST-SM MM7829-2700 0201 MF 1/20W 1% 0.00 12 14 13 12 4 17 7 17 7 12 12 12 14 13 12 4 12 14 13 12 4 12 12 19 12 OUT OUT IN IN BI IN IN BI OUT BI BI BI ANT GND LB MB-HB ANT GND LB MB-HB NCNC OUT VIO USID SCLK SDATA RFIN2 RFIN1 RF_CPL2 RF_CPL1 RFOUT1 RFOUT2 VDD GND VIO USID SCLK SDATA RFIN2 RFIN1 RF_CPL2 RF_CPL1 RFOUT1 RFOUT2 VDD GND GND RF1 RF1A VDD RF2 RF1B RF2A RF2B VCTL1 VCTL2 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 75.
    MB HB DRXASM USID=0XA DIVERSITY RECEIVE USID=0X9 LB DRX ASM 687478 687478 6568737475777980 80 75 80 6568737475777980 687478 687478 2 1 C6515_RF 2 1 C6514_RF 12 2 5 9 21 20 19 7 6 11 3 18 17 15 14 13 10 8 4 1 16LBDSM_RF 2 1 C6513_RF 3 2 6 4 5 1 SWDSM_RF 2 1 C6504_RF 26 25 24 23 22 18 20 21 19 17 12 11 9 7 6 5 4 1 14 13 15 16 2 3 8 10 MHBDSM_RF 2 1 C6507_RF 21 R6501_RF 2 1 C6510_RF 2 1 C6512_RF 2 1 C6509_RF 2 1 C6511_RF 2 1 C6508_RF 21 R6503_RF 21 R6502_RF 2 1 C6502_RF 2 1 C6506_RF 2 1 C6505_RF 2 1 C6501_RF 2 1 C6503_RF 50_XCVR0_B3_B25_DRX-DSPDT_OUT 50_XCVR1_B8_B26_B27_LB-DRX-ASM_OUT 75_RFFE3_SCLK 75_RFFE3_SDATA PP_1V8_LDO15 PP_2V7_LDO12 50_XCVR1_B12_B13_B20_B28_B29_LB-DRX-ASM_OUT RX-DSPDT_CTL2 50_XCVR1_B3_DRX-DSPDT_OUT 50_LAT_MB_HB_DRX 50_UAT_MB-HB-DRX-LNA_OUT_RX PP_2V7_LDO12 50_XCVR0_B34_MBHB-DRX-ASM_OUT 50_UAT_MB-HB-DRX-ASM_ANT2 50_LAT_MB-HB-DRX-ASM_ANT150_XCVR0_B39_MBHB-DRX-ASM_OUT 75_RFFE3_SCLK 75_RFFE3_SDATA 50_XCVR0_B30_B40_MBHB-DRX-ASM_OUT 50_XCVR0_B1_B4_MBHB-DRX-ASM_OUT 50_XCVR0-1_B3_B25_MBHB-DRX-ASM_OUT 50_XCVR0_B7_B41_B38_MBHB-DRX-ASM_OUT PP_2V7_LDO12 PP_1V8_LDO15 50_LAT-UAT_LB-DRX-ASM_ANT 50_LB_DRX SYNC_DATE=04/17/2015 01005 2% 16V CERM 18PF NOSTUFF 25V 0201 C0G-CERM +/-0.1PF 2.0PF 0201 3.9NH+/-0.1NH-0.5A NOSTUFF C0G-CERM 25V 0201 +/-0.1PF 2.0PF 0201 NOSTUFF +/-0.1PF C0G-CERM 2.0PF 25V 0201 NOSTUFF 2.0PF 25V C0G-CERM +/-0.1PF 25V C0G-CERM NOSTUFF 0201 +/-0.1PF 2.0PF 25V NOSTUFF 0201 C0G-CERM +/-0.1PF 2.0PF 5% MF 1/20W 0 201 201 1/20W 5% 0 MF D5315 LGA 6.3V 20% 0.1UF 01005 X5R-CERM 18PF 16V 01005 2% CERM 01005 CERM 16V 2% 18PF0.1UF 20% 01005 6.3V X5R-CERM 4V 20% 0.033UF X5R-CERM 01005 2% 01005 16V 18PF CERM CERM 16V 2% 18PF 01005 LGA HFQSWEWUA CERM 16V 2% 01005 18PF CXA4430GC-E LGA 11 11 14 13 12 4 11 177 11 14 13 12 4 11 11 11 11 11 14 13 12 4 NC MIPI_VIO B34_RX MIPI_VDD ANT2 ANT1 THRM_PADGND B39_RX MIPI_SCLK MIPI_SDATA B30_B40_RX B1_B4_RX B3_B25_RX B7_B38/B41B_B41_RX BI IN IN IN IN IN IN BI IN LB_RX1 VLB_RX0 LB_RX0 VLB_RX1 ANT VDD EPADGND SCLK SDATA VIO VDD RF1 RF2 GND CTRL RFIN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 76.
    USID=0X3 MB/HB DRX LNA DIVERSITYRECEIVE LNAS USID=0X4 MLB DRX LNA LB DRX LNA USID=0X2 BB_TO_UAT_SCLK-53[I16]626875 BB_TO_UAT_DATA-53[I16]626875 53 BB_TO_UAT_DATA-53[I16]626875 BB_TO_UAT_SCLK-53[I16]6268 75 6568737475777980 BB_TO_UAT_DATA-53[I16]626875 BB_TO_UAT_SCLK-53[I16]626875 6568737475777980 6568737475777980 BB_TO_UAT_DATA BB_TO_UAT_SCLK BB_TO_UAT_SCLK BB_TO_UAT_DATA BB_TO_UAT_DATA BB_TO_UAT_SCLK 9 10 3 25 24 23 7 8 22 21 20 19 18 17 16 15 13 12 11 6 5 4 2 1 14LBLN_RF 2 1 16 15 4 3 6 14 12 11 10 9 8 7 5 13MLBLN_RF 2 1 C6610_RF 2 1 C6613_RF 21 R6605_RF 6 4 5 3 1 2 UPPDI_RF 21 FL6602_RF 2 1 C6629_RF 2 1 C6625_RF 21 20 28 27 26 25 23 22 2 4 24 19 18 17 15 14 13 12 11 10 9 8 7 6 5 3 1 16MHBLN_RF 21 FL6603_RF 2 1 C6620_RF 2 1 C6619_RF 2 1 C6617_RF 2 1 C6627_RF 2 1 C6622_RF 2 1 C6614_RF 21 R6606_RF 2 1 C6611_RF 2 1 C6602_RF 21 R6601_RF 2 1 C6601_RF 1.5PF OMIT_TABLE 0201 OMIT_TABLE 10NH-3%-250MA C0G-CERM 50_UAT_MLB_SPLIT_OUT NOSTUFF LFD21829MMP5E222 0201 OMIT_TABLE 25V +/-0.05PF PP_2V7_LDO12 150OHM-25%-200MA-0.7DCR 50_UAT_MLB-DRX-LNA_TX_RX 18PF 50_UAT_LB-DRX-LNA_TX_RX PP_2V7_LDO12 50_UUAT_LB_MLB_NORTH 50_UAT_LB_MLB_SPLIT_IN 50_UAT_MLB-DRX-LNA_TX_RX PP_MLBLN_RF PP_1V8_LDO15 50_UUAT_MLB PP_1V8_LDO15 50_UAT_LB-DRX-LNA_TX_RX 50_UAT_LB-DRX-LNA_ANT PP_MHBLN_RF 50_UAT_MB-HB-DRX-LNA_OUT_RX 50_UAT1_WEST PP_1V8_LDO15 50_UAT_MB-HB-DRX-LNA_ANT PP_MHBLN_RF 50_UAT_LB_SPLIT_OUT X5R-CERM 0.033UF 20% 4V 01005 18PF 16V CERM 01005 2% 01005 18PF 2% CERM 16V 0.1UF 01005 X5R-CERM 6.3V 20% 01005 16V 18PF 2% CERM C0H-CERM NOSTUFF 0201 25V 2% 0.00 0201 MF 1% 1/20W OMIT_TABLE 18PF 25V C0H-CERM 2% 0201 C0H-CERM 0201 18PF 2% 25V NOSTUFF MF 1% 1/20W 0201 0.00 25V 2% 18PF 0201 NOSTUFF C0H-CERM LGA SKY13702-17 LGA LMRX2HJB-H68 OMIT_TABLE LGA 01005 20% X5R-CERM 0.1UF 6.3V 01005 CERM 18PF 01005 2% 16V SKY13703-19 LGA 01005 150OHM-25%-200MA-0.7DCR 2.7NH+/-0.1NH-0.6A 0201 OMIT_TABLE 14 13 12 4 14 13 12 4 14 15 14 15 14 13 1 15 14 14 14 IN BI BI SCLK SDATA VIO TX_RX GND EPAD ANT VDD OUT_RX GND EPAD VDD VIO SDATA SCLK ANT ANT GND LB MB-HB BI IN IN OUT_RX IN_TX VIO SDATA VDD EPAD ANT GND SCLK BI IN IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 77.
    UAT1 TO ANTENNA TUNER UPPERANTENNA FEEDS 53 62 75 75 5362 75 71 21 R6705_RF 2 1 L6700_RF 21 R6708_RF 21 R6703_RF 2 1 C6713_RF 21 3 JUAT1_RF 21 R6715_RF 2 1 C6726_RF 21 R6709_RF 1 19 8 14 10 17 18 16 15 13 12 11 9 7 6 4 3 2 5 PPLXR_RF 2 1 C6728_RF 21 R6710_RF 2 1 C6711_RF 2 1 C6727_RF 50_UAT1_TUNER 50_UAT1 50_GNSS 50_UUAT_MLB_PLEXER50_UUAT_MLB 50_UUAT_LB_PLEXER 50_UAT_WLAN_2G_WEST_PLEXER 50_UAT_MB-HB-DRX-LNA_ANT 50_UUAT_HB_PLEXER 50_UAT_LB-DRX-LNA_ANT 50_UAT1_MATCH 50_GNSS_PLEXER 50_UAT1_TEST 0.00 UP_RFFE 0201 MF 1/20W 1% 56NH-100MA-3.9OHM 0201 UP_RFFE NOSTUFF 0201 MF UP_RFFE OMIT_TABLE 1/20W 1% 0.00 UP_RFFE 1% OMIT_TABLE 0201 0.00 1/20W MF 25V 2% NOSTUFF 0201 C0H-CERM 18PF 0.00 UP_RFFE MF 0201 1/20W 1% 25V C0H-CERM UP_RFFE NOSTUFF 0201 2% 18PF MM8830-2600B F-RT-SM UP_RFFE 0.00 1% 1/20W MF 0201 UP_RFFE OMIT_TABLE LGA ACFM-W312-AP1 NOSTUFF 0201 UP_RFFE 2% 25V C0H-CERM 18PF C0H-CERM 25V 2% UP_RFFE NOSTUFF 0201 18PF 1% 1/20W MF 0201 UP_RFFE OMIT_TABLE 0.00 NOSTUFF UP_RFFE 0201 C0H-CERM 18PF 2% 25V BI BI BI BI C R GND MB-HB GNSS GND WIFI EPAD ANT LB MLB BI 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 78.
    PMU: ET MODULATOR DESENSECAPS PLACE C6806 AND C6807 NEAR THE QPOET 536264657781 67 67 65 68 73 74 75 79 80 53 62 64 65 77 81 22 14 9 1 13 12 25 24 21 20 15 8 7 6 5 19 23 26 16 17 10 32 31 30 29 28 27 18 11 4 2 3 QPOET_RF 2 1 C6807_RF 2 1 C6806_RF 2 1 C6805_RF 2 1 C6803_RF 2 1 C6804_RF 2 1 C6802_RF 2 1 C6801_RF PP_VDD_MAIN 75_RFFE2_SDATA 75_RFFE2_SCLK SHIELD_ET_DAC_P PP_VDD_MAIN PP_1V8_LDO15PP_VPA_APT PP_QPOET_VCC_PA PP_PA_VBATT SHIELD_ET_DAC_N LGA 2103-601507-10 01005 CERM 16V 2% 27PF 5% NP0-C0G 16V 100PF 01005 0201-1 20% 6.3V X5R-CERM 2.2UF 0201-1 20% 2.2UF 6.3V X5R-CERM 0201-1 20% X5R-CERM 2.2UF 6.3V20% 6.3V 2.2UF X5R-CERM 0201-10201-1 6.3V X5R-CERM 2.2UF20% 17 7 17 7 18 19 18 19 18 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST SDATA SCLK AMP_IN+ VDD_VBATT VDD_LDO VDD_VBATT VDD_LDO GND VDD_BUCK VDD_BUCK VDD_1P8 VCC_PA_GSM VCC_PA_GSM VCC_PA_ET VCC_PA_ET PA_VBATT USID_LSB TRIM_18 TRIM_14 AMP_IN- IN NCIN IN IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 79.
    SIM BASEBAND PCIE GND PCIE BBPMU USB =0X2 BOOT CONFIG DEFAULT FAST_BOOT[2:0] ICEFALL MLB TEST POINTS PMU_TO_BB_USB_VBUS_DETECT 1 3 20 AP_TO_ICEFALL_FW_DWLD_REQ 1 20 90_USB_BB_DATA_P 1 6 20 AP_TO_BB_COREDUMP 1 7 BB_TO_PMU_PCIE_HOST_WAKE_L 1 7 BB_TO_STROBE_DRIVER_GSM_BURST_IND1 7 NFC_TO_BB_CLK_REQ 1 3 90_PCIE_AP_TO_BB_REFCLK_N 1 6 90_PCIE_AP_TO_BB_REFCLK_P 1 6 BB_TO_LAT_ANT_DATA 1 7 BB_TO_LAT_ANT_SCLK 1 7 90_USB_BB_DATA_N 1 6 20 1 PP6981_RF 1 PP6912_RF 1 PP7502_RF 1 PP7501_RF 1 PP7500_RF 1 PP6980_RF 1 PP6979_RF 1 PP6978_RF 1 PP6977_RF 1 PP6974_RF 1 PP6973_RF 1 PP6972_RF 1 PP6969_RF 1 PP6953_RF 1 PP6900_RF 1 PP6905_RF 1 PP6945_RF 1 PP6938_RF 1 PP6931_RF 1 PP6930_RF 1 PP6929_RF 1 PP6926_RF 1 PP6925_RF 1 PP6924_RF 1 PP6923_RF 1 PP6921_RF 1 PP6920_RF 1 PP6919_RF 1 PP6918_RF 1 PP6917_RF 1 PP6933_RF 1 PP6914_RF 1 PP6913_RF 1 PP6911_RF 1 PP6909_RF 1 PP6908_RF 1 PP6907_RF 1 PP6906_RF 1 PP6971_RF 1 PP6970_RF 1 PP6916_RF 1 PP6915_RF 1 PP6936_RF 1 PP6935_RF 1 PP6904_RF 1 PP6903_RF 1 PP6942_RF 1 PP6941_RF 1 PP6940_RF 1 PP6939_RF 1 PP6944_RF 1 PP6943_RF 1 PP6952_RF 1 PP7000_RF 2 1 R6922_RF 2 1 R6921_RF UART_BB_TO_WLAN_COEX BB_TO_AP_RESET_DETECT_L SE2_PWR_REQ NFC_SWP_MUX SE2_READY SIM1_RST SIM1_CLK BB_JTAG_RST_L UART_BB_TO_AOP_RXD PMU_TO_BBPMU_RESET_L AP_TO_BBPMU_RADIO_ON_L PMIC_RESOUT_L RX-DSPDT_CTL2 AP_TO_BB_TIME_MARK SPMI_DATA SPMI_CLK FBRX-DSPDT_CTL1 75_RFFE6_SCLK 75_RFFE6_SDATA SHIELD_SLEEP_CLK_32K SIM1_REMOVAL_ALARM SWD_AP_TO_BB_CLK_BUFFER 75_RFFE1_SCLK 75_RFFE2_SDATA 75_RFFE2_SCLK 75_RFFE3_SDATA 75_RFFE3_SCLK 75_RFFE4_SDATA 75_RFFE1_SDATA PP_1V8_LDO6 FAST_BOOT_SELECT0 FAST_BOOT_SELECT1 75_RFFE4_SCLK UART_WLAN_TO_BB_COEX FBRX-DSPDT_CTL2 50_MDM_PCIE_CLK BB_TO_NFC_CLK XO_OUT_D0_EN SIM1_SWP SE2_SWP ICEFALL_LDO_ENABLE SIM1_IO SIM1_DETECT P2MM-NSM SM OMIT P2MM-NSM OMIT SM P2MM-NSM SM OMIT P2MM-NSM SM OMIT SM OMIT P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT OMIT SM P2MM-NSM P2MM-NSM SM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT OMIT SM P2MM-NSM SM P2MM-NSM OMIT SM P2MM-NSM OMIT OMIT SM P2MM-NSM P2MM-NSM OMIT SM P2MM-NSM OMIT SM OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM P2MM-NSM SM OMIT P2MM-NSM SM OMIT P2MM-NSM SM OMIT OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM OMIT SM OMIT SM P2MM-NSM OMIT SM P2MM-NSM OMIT SM P2MM-NSM P2MM-NSM SM OMIT P2MM-NSM SM OMIT 01005 1/32W MF 10K RADIO_DEBUG 1% NOSTUFF 1/32W 01005 RADIO_DEBUG MF 10K 1% 2071 71 201 201 201 207 207 206 71 31 2031 63 137 71 63 63 127 19187 19187 63 73 6 97 167 167 137 137 97 97 20 7 6 5 4 7 7 97 2071 127 63 31 63 20 20 201 207 207 PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PP PPPP PP PP PP PP PP PP PP PP PP PP PP PP PP PP 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 80.
    MB HB TDDPA TDD TRANSMIT 2G PA USID=0XF USID=0X5 68 78 79 80 68 78 79 80 70 70 72 72 80 65 68 73 74 75 77 79 80 80 80 68787980 68787980 6568737475777980 70 70 2 1 C7017_RF 14 9 8 11 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 12 13 27 25 3 5 18 20 23 28 26 24 22 21 19 17 15 10 7 6 4 2 1 16 TDDPA_RF 2 1 C7016_RF 2 1 C7015_RF 11 3 8 9 10 17 612 5 4 2 13 GSMPA_RF 21 R7002_RF 2 1 C7006_RF 2 1 C7004_RF 2 1 C7005_RF 21 FL7001_RF 2 1 C7007_RF 2 1 C7010_RF 21 C7012_RF 2 1 C7014_RF 2 1 C7009_RF 21 C7011_RF 2 1 C7013_RF 2 1 C7001_RF 2 1 C7008_RF 50_XCVR1_TX_G1800_G1900_PA_IN PP_1V8_LDO15 75_RFFE6_SDATA 75_RFFE6_SCLK 50_TX_G850_G900_PA_OUT 50_XCVR1_TX_G850_G900_PA_IN 600-OHM-25%-0.1A 27PF NP0-C0G 01005 50_TX_G1800_G1900_PA_OUT PP_PA_VBATT PP_VPA_APT 50_TX_G850_G900_PA_OUT_M 50_TX_G1800_G1900_PA_OUT_M MLB_PA_VBATT 50_TDD_PA_ANT_M 50_XCVR0_TX_B38_B40_B41_PA_IN PP_1V8_LDO15 75_RFFE6_SDATA 50_XCVR0_B34_B39_PA_PRX 50_XCVR0_B38_B40_B41_PA_PRX 50_XCVR0_TX_B34_B39_PA_IN TDD_PAD_VCC1 2GPA_VBATT PP_QPOET_VCC_PA 75_RFFE6_SCLK 16V 5% 01005 NP0-C0G 27PF LGA-1 AFEM-8065-AP1 01005 5.6PF +/-0.1PF 16V NP0-C0G NP0-C0G 01005 16V 5.6PF +/-0.1PF SKY77363 LGA MF0% 01005 1/32W 0.00 2.2UF X5R-CERM 20% 6.3V 0201-1 1.0UF 6.3V 20% X5R 0201-1 5% 16V 0201-1 2.2UF X5R-CERM 20% 6.3V 0201-1 18PF 25V 2% C0H-CERM 0201 NOSTUFF 27PF 5% 0201 NP0-C0G 6.3V 0201 25V NOSTUFF C0H-CERM 18PF 2% NOSTUFF C0H-CERM 18PF 2% 25V 0201 27PF NP0-C0G 0201 6.3V 5% 25V 0201 C0H-CERM 18PF NOSTUFF 2% 0.1UF 20% X5R-CERM 6.3V 01005 18PF 2% 16V CERM 01005 19 16 16 19 19 16 BI IN IN IN OUT OUT VBATT ANT RFIN_HB THRM_PAD VIO SDATA SCLK GND RX_B34_B39 RX_B38_B40_B41 RFIN_MB VCC1 VCC2 VCCVBATT LBRFIN HBRFIN LBRFOUT HBRFOUT VIO SDATA SCLK GND EPAD OUT IN OUT OUT IN BI IN IN IN 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 81.
    1428-1463 MLB PA USID=0XE 1710-2690 1428-1463 824-915 LB PA USID=0XD 1710-2690 MB/HBPA 824-915 FDD TRANSMIT USID=0XB 65 68 73 74 75 77 79 80 68 73 68 73 65 68 73 74 75 77 79 80 68 78 79 80 68 78 79 80 73 73 74 70 73 73 72 72 72 70 68 78 79 80 65 68 73 74 75 77 79 80 68 78 79 80 72 70 79 74 72 72 72 7280 72 79 79 70 70 72 80 73 72 21 R7111_RF 2 1 C7133_RF 21 R7104_RF 22 27 28 25 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 24 23 2 20 26 21 19 17 16 15 13 11 10 9 8 7 6 5 4 3 1 18 12 14 MLBPA_RF 23 24 10 40 41 7 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 8 9 3 2 25 26 12 42 39 38 37 36 35 34 33 32 31 30 29 28 27 22 21 20 19 17 15 13 11 6 5 4 1 14 16 18 LBPA_RF 2 1 C7126_RF 21 R7112_RF 2 1 C7101_RF 21 R7114_RF 2 1 C7128_RF 2 1 C7129_RF 2 1 C7127_RF 2 1 R7131_RF 2 1 C7131_RF 2 1 C7132_RF 2 1 R7132_RF 2 1 C7130_RF 2 1 R7130_RF 26 38 37 29 8 7 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 28 27 21 19 5 17 3 1 31 32 34 10 9 6 42 41 40 39 36 35 33 30 25 24 23 22 20 18 16 15 12 4 2 11 13 14 MBHBPA_RF 2 1 C7117_RF 21 R7103_RF 2 1 L7123_RF 2 1 L7122_RF 6 5 3 2 1 4 RXFIL_RF 2 1 C7125_RF 2 1 C7124_RF 2 1 C7121_RF 2 1 C7120_RF 2 1 R7108_RF 2 1 R7110_RF 21 R7107_RF 21 R7113_RF 21 R7109_RF 2 1 C7106_RF 2 1 C7113_RF 2 1 C7103_RF 2 1 C7104_RF 2 1 C7105_RF 2 1 C7114_RF 2 1 C7108_RF 2 1 C7110_RF 21 R7105_RF 2 1 C7122_RF 21 R7106_RF 2 1 C7123_RF 21 R7101_RF 21 R7102_RF 2 1 C7111_RF 2 1 C7112_RF 2 1 C7118_RF 2 1 C7119_RF 0.033UF 18PF 25V OMIT_TABLE 1.0PF 0.00 1% 50_LAT_MLB_G1800_G1900_PA_RX OMIT_TABLE 0201 50_UAT_MLB_COMBINER_IN 50_LAT_LB_COMBINER_IN +/-0.1PF 20% NOSTUFF 33PF 50_UAT_LB_PA_ANT DEFAULT_RESISTOR_0.001OHM_2_1 1/32W 01005 DEFAULT_RESISTOR_0.001OHM_2_1 0.00 0201 OMIT_TABLE 1.8NH+/-0.1NH-0.8A +/-0.05PF OMIT_TABLE 0201 25V CERM 0.6PF 50_UAT_MLB_PA_ANT PP_PA_VBATT PP_PA_VBATT LB_SNUBBER MLB_TDD_SNUBBER MBHB_SNUBBER MBHB_FDD_PA_VBATT MBHB_FDD_PAD_VCC1 50_XCVR0_B30_PA_PRX 50_XCVR0_B25_PA_PRX 50_XCVR0_B1_B4_PA_PRX 50_XCVR0_B4_PA_PRX 50_XCVR0_B7_PA_PRX 50_LAT_MLB_G1800_G1900_PA_RX 50_LAT_MB_HB_DRX LB_PA_VBATT LB_PAD_VCC1 PP_1V8_LDO15 50_XCVR0_B11_B21_PA_PRX 50_XCVR0_B11_B21_PA_DRX PP_QPOET_VCC_PA 75_RFFE6_SCLK 75_RFFE6_SDATA 75_RFFE6_SCLK 75_RFFE6_SDATA PP_1V8_LDO15 50_XCVR1_TX_B8_B20_B26_B27_PA_IN PP_QPOET_VCC_PA 50_XCVR1_TX_B12_B13_B28_PA_IN 50_TDD_PA_ANT_M 50_LAT_MB_HB_PA_ANT 50_UAT_MB_HB_CPL_IN 50_XCVR0_TX_B11_B21_PA_IN 50_UAT_MB_HB_PA_ANT 50_XCVR0_B3_PRX-DSPDT_OUT 50_XCVR0_B40B_PA_PRX 50_XCVR0_TX_B7_B30_PA_IN 50_XCVR0_TX_B1_B3_B4_B25_PA_IN 50_TX_G1800_G1900_PA_OUT_M PP_QPOET_VCC_PA 50_XCVR1_B12_B13_B20_B28_B29_PA_PRX 50_XCVR1_B8_B26_B27_PA_PRX 50_LB_DRX 50_TX_G850_G900_PA_OUT_M PP_PA_VBATT 50_LAT_MLB_PA_ANT 50_LAT_MB_HB_COMBINER_IN 50_XCVR0_B40B_PA_PRX 50_XCVR0_B40_PA_PRX_EXT_FIL MLB_PA_VBATT 75_RFFE7_SDATA 75_RFFE7_SCLK PP_1V8_LDO15PP_1V8_LDO15_PA 75_RFFE7_SCLK_PA 50_UAT_LB_COMBINER_IN 50_LAT_LB_PA_ANT 75_RFFE7_SDATA_PA SYNC_DATE=04/17/2015 MF 1/20W C0H-CERM 18PF 2% 0201 25V NOSTUFF 2% C0H-CERM 0201 25V 1% MF 0201 0.00 1/20W 0201 22NH-3%-0.25A 2% 18PF 25V C0H-CERM 0201 NOSTUFF C0H-CERM 0201 2% 18PF 25V C0G +/-0.05PF OMIT_TABLE 0201 25V 0.1PF 1/32W MF 0% 01005 0.00 4V 20% 0.033UF 01005 0201 OMIT_TABLE 2NH+/-0.1NH-0.6A OMIT_TABLE LGA HRPDAF025 LGA1 SKY78100-14 NOSTUFF 01005 16V 33PF 5% NP0-C0G-CERM 01005 MF 1/32W 0% 0.00 10% 10V CERM 180PF 01005 01005 10-OHM-1.1A 16V 5% NP0-C0G-CERM 01005 NOSTUFF NOSTUFF 20% X5R-CERM 4V 01005 0.033UF X5R-CERM 01005 4V 1/32W 1% NOSTUFF 1.00 MF 01005 NP0-C0G 01005 68PF 2% 6.3V NOSTUFF 6.3V 68PF 2% NP0-C0G 01005 NOSTUFF NOSTUFF 01005 1.00 1% 1/32W MF NOSTUFF 01005 NP0-C0G 68PF 2% 6.3V NOSTUFF 1% 1/32W 1.00 MF 01005 LGA AFEM-8055-AP1 01005 2% CERM 0201 1.8NH+/-0.1NH-0.8A NP0-C0G 1.0PF 16V +/-0.1PF 01005 4.7NH-3%-0.270A 01005 LGA QM21140 BAW-B40F-RX 25V C0H-CERM 18PF 2% NOSTUFF 0201 25V 18PF 0201 2% C0H-CERM NOSTUFF 0201 25V 18PF 2% DEFAULT_RESISTOR_0.001OHM_2_1 0% 01005 MF 1/32W 0.00 0% 01005 MF 1/32W 0.00 01005 0% MF 1/32W 0.00 0% MF 01005 1/32W DEFAULT_RESISTOR_0.001OHM_2_1 0.00 MF 0% DEFAULT_CAPACITOR_1e+06pF_2_1 1.0UF 6.3V X5R 0201-1 20% 1.0UF 20% X5R 0201-1 6.3V 1.0UF 20% 6.3V X5R DEFAULT_CAPACITOR_1e+06pF_2_1 0201-1 18PF 16V 2% 01005 CERM 18PF 2% 01005 CERM 16V 18PF 2% CERM 16V 01005 01005 CERM 16V 2% 18PF 16V 2% 18PF 01005 CERM NOSTUFF C0H-CERM NOSTUFF X5R-CERM C0G 201 16V 18PF 19 18 16 19 18 16 11 19 18 16 19 18 16 11 19 19 18 16 19 18 16 19 18 IN BI IN IN BI IN BI BI OUT IN BI BI OUT OUT OUT IN BI IN IN OUT IN IN OUT NC NC OUT OUT VIO SCLK SDATA VBATT GND PRX DRX THRM_PAD ANT2 ANT1 RFIN_MLB VCC2 VCC1 RFIN0 SDATA VIO SCLK GND ANT2 ANT1 VBATT VCC1 VCC2 RFIN1 THRM_PAD 2G_TX LB_DIV LB_RX0 LB_RX1 VLB_RX0 VLB_RX1 OUT OUT VBATT VCC1 SDATA VIO TRX2 RFIN_MB RFIN_GSM VCC2 RFIN_HB SCLK RX_B30 RX_B25 RX_B4 RX_B7 RX_B3 RX_B1 MB_HB_DRX DCS_PCS_RX TRX3 EPAD ANT2 ANT1 GND B40RXOUT GND B40ANT OUT IN IN IN IN BI BI 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
  • 82.
    SIM CARD CONNECTOR ICEFALLSWP MUX DEBUG CONNECTOR ICEFALL LDO 5362 78 5362 687881 687881 68 78 81 68 78 81 536267 536264 536267 53626778 53626478 53626778 67 78 53 62 68 78 53 62 68 78 68 78 81 68 78 81 68 78 81 68 78 81 53 53 62 78 53626881 53 62 78 536278 AP_TO_ICEFALL_FW_DWLD_REQ SWD_AP_TO_MANY_SWCLK SWD_AOP_BI_BB_SWDIO 90_USB_BB_DATA_N 90_USB_BB_DATA_P PMU_TO_BB_USB_VBUS_DETECT1317 2 1 R6904_RF 2 1 C7531_RF 2 1 R6900_RF 2 1C7528_RF 2 1C7201_RF 2 1 R7512_RF 2 1 C7530_RF 2 1 C7529_RF 21 R7511_RF A2A1 B1 B2 SE2LDO_RF 2 1 C6901_RF 2 1 DZ6904_RF 2 1 DZ6903_RF 2 1 DZ6905_RF 2 1 DZ6902_RF 2 1 DZ6901_RF 21 R7510_RF 2 1 C6900_RF 2 1 DZ6900_RF1 6 9 8 2 7 16 15 14 13 12 11 10 5 3 J_SIM_RF 3635 3433 3231 3029 2827 2625 2423 2221 2019 1817 1615 1413 1211 109 87 65 43 21 42 41 4039 3837 J_DEBUG 2 1 R7506_RF C1 D1 C4 D5 B5 E1 A5 E5 C5 D2 C3 C2 B2 E3 A2 A1 B1 A3 B3 D3 D4 E4 E2 A4 B4 SE2_RF 2 1 C7524_RF 5 6 2 1 34 SWPMX_RF 2 1 C7525_RF 2 1 C7501_RF 2 1C7523_RF VOLTAGE=1.80V VOLTAGE=1.20V SE2_PWR_REQ PP1V8_ICEFALL_LDO PP_VDD_MAIN VDD_SE2_1V8 SE2_READY NFC_SWP_R SIM1_RST SIM1_IO SIM1_CLK SIM1_SWPSIM1_IO SIM1_CLK AP_TO_BB_RESET_L BB_JTAG_RST_L SIM1_IO PP_VDD_BOOST VDD_SIM1 VDD_SIM1 SIM1_IO ICEFALL_LDO_ENABLE SE2_PRESENT PP1V8_ICEFALL_LDOPP1V8_SDRAM SE2_SWP NFC_SWP_MUX SIM1_SWP NFC_SWPPP1V8_SDRAM SIM1_RST SE2_SWP VDD_SE2_1V2 PP1V8_SDRAM SIM1_DETECT PP_1V8_LDO6 SIM1_SWP SIM1_DETECT SIM1_CLK SIM1_RST VDD_SIM1 PP1V8_ICEFALL_LDO AP_TO_BBPMU_RADIO_ON_L UART_WLAN_TO_BB_COEX UART_BB_TO_WLAN_COEX SIM1_DETECT SIM1_SWP PP_VDD_MAIN SG-WLL-2-2 SIM ESD202-B1-CSP01005ESD202-B1-CSP01005 SG-WLL-2-2 SIM SG-WLL-2-2 SIM ESD202-B1-CSP01005 SG-WLL-2-2 SIM ESD202-B1-CSP01005 01005-1 12V-33PF SIM 0.00 0% 1/32W MF 01005 NFC SIM X5R-CERM 2.2UF 20% 6.3V 0201-1 SIM 0201 5.5V-6.2PF F-RT-SM SIM RCPT-WIDE-HSG-THICK-PIVOT NOSTUFF F-ST-SM 20-5857-036-001-829 OMIT_TABLE NFC 01005 1/32W 4.99K 1% MF OMIT_TABLE WLBGA SE2 BCM20211CP SE2 1UF 20% 10V 0201 X5R OMIT_TABLE NLAS3257CMX2TCG DFN SE2 0.1UF 20% 6.3V X5R-CERM 01005 OMIT_TABLE 0.1UF SE2 01005 X5R-CERM 20% 6.3V 10V 20% 0201 X5R OMIT_TABLE 1UF SE2 SIM MF 1/32W 01005 1% 100K CERM 6.3V 5% 01005 100PF OMIT_TABLE MF 1% 1/32W 01005 15.00K SIM 1UF OMIT_TABLE X5R 0201 SE2 20% 10V NOSTUFF 10V X5R 0201 20% SE2 1UF MF 10K 1/32W 1% OMIT_TABLE 01005 SE2 20% X5R-CERM 0201-1 6.3V 2.2UF OMIT_TABLE SE2 6.3V 20% 0201-1 X5R-CERM OMIT_TABLE 2.2UF 1% 1/20W MF NOSTUFF 0.00 0201 LP5907UVX-1.825-S OMIT_TABLE DSBGA 5% 16V NP0-C0G 01005 SIM 100PF 20 20 16 4 3 1 20 17 7 20 17 7 20 1720 17 7 20 17 7 4 1 20 5 4 20 5 4 17 1 20 2017 2017 2071 2017 20 7 1 20177 17 7 6 5 4 2017 2054 20 2017 20 16 4 3 1 IN IN NC IN IN NC BI OUT GND SIM_DETECTSIM_DETECT_GND CLK VCC RESET IO SWP OUT NC OUT OUT BI OUT BI NC OUT IN IN NC OUT IN BI IN OUT VDDO_NFC REG_PU TCAL_CLK SWP NC GPIO_1 DWP DB_TX DB_RX GPIO_0 SPI_MISO SPI_MOSI VDDO_HOST_2 VDDC VDD1P2 VDD1P8 VDD1P8_BYP VDDC SPI_CLK SPI_CS SPI_INT VSS VSS VSS VSS VER 1 B1 VCC B0A S GND IN NC NC IN GND VOUT VEN VIN NC IN NC 6 OF 81 6 OF 53 8.0.0 051-00419 spare SYNC_DATE=05/17/2016SYNC_MASTER=Sync II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART THE POSESSOR AGREES TO THE FOLLOWING: 36 BRANCH REVISION DRAWING NUMBER SIZE D IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 345678 D B 8 7 5 4 2 1 PROPRIETARY PROPERTY OF APPLE INC. THE INFORMATION CONTAINED HEREIN IS THE R Apple Inc. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE