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iPhone 5c schematic (searchable)

This document contains various tables related to parts lists and bills of materials (BOM) for electronic components. The tables include parts listed by part number, description and quantity along with their reference designators. There are also sections listing alternate parts that can be substituted in the BOM. Notice statements indicate the proprietary nature of the information and restrictions on its distribution or reproduction.

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C1_RF C10_RF C102_RF C103_RF C104_RF C106_RF C107 C107_RF C108_RF C109 C109_RF C11 C11_RF C110_RF C111_RF C114 C115 C118_RF C119_RF C12_RF C120_RF C1201_RF C1214_RF C1215_RF C126_RF C127_RF C13_RF C130 C133 C135 C137 C138 C143 C145_RF C147 C148_RF C149 C149_RF C150 C151C152 C153 C153_RF C154 C156C156_RF C16 C162 C163 C163_RF C164_RF C165 C165_RF C166 C167_RF C168_RF C169 C169_RF C17 C170 C170_RF C171 C1726_RF C173 C174 C185 C187 C189 C189_RF C190 C190_RF C195 C195_RF C2_RF C200_RF C201_RF C202_RF C203 C203_RF C204 C205 C207 C208_RF C209 C210_RF C212_RF C213 C214 C214_RF C215_RF C216_RF C217 C217_RF C218 C219 C220 C221 C222 C223 C224 C225 C226 C226_RF C227 C227_RF C228 C228_RF C229 C229_RF C230 C230_RF C231 C231_RF C232 C232_RF C233 C233_RF C234 C234_RF C235 C236 C236_RF C237 C237_RF C238 C238_RF C239 C239_RF C240_RF C242_RF C243 C243_RF C245 C246 C247 C247_RF C248 C248_RF C249_RF C250 C250_RF C251 C251_RF C252 C252_RF C253_RF C254 C254_RF C255 C256_RF C257 C257_RF C258 C26 C260 C261 C262 C263 C264 C265 C267 C27 C271 C273 C276 C277 C278 C281 C281_RF C282 C283_RF C285 C288 C29 C290 C291 C292 C293 C294 C295 C297 C299 C3 C3_RF C301 C302 C304 C305 C306 C307 C310 C312 C315 C317 C318 C319 C320C321 C322 C323 C325 C326 C328 C329 C330 C332 C333 C334 C335 C336 C337 C338 C339 C34 C340 C341 C342 C344 C345 C346 C347 C348 C349 C360 C363 C364 C365 C368 C369 C370 C371 C372 C378 C379 C38 C38_RF C385 C386 C387 C389 C39 C39_RF C391 C392 C394 C396 C4 C4_RF C40_RF C41_RF C412 C413 C414 C416 C42_RF C420 C421 C422 C424 C425 C429 C43_RF C44_RF C444 C45_RF C46_RF C47 C47_RF C48_RF C488 C49_RF C5_RF C50 C50_RF C500 C501 C51_RF C52 C52_RF C53_RF C54 C54_RF C55 C55_RFC56_RF C562 C57_RF C58_RF C59 C59_RF C6 C6_RF C605 C61 C627 C63_RF C64 C65 C65_RF C66_RF C662 C67_RF C68 C686 C687 C688 C689 C69 C7 C7_RF C73 C74 C746 C762 C77 C79 C8_RF C9_RF C918 C92 C93_RF C935 C942 C95 C96_RF C961 C962 C97 C97_RF C98 C98_RF C987 C99 C99_RF C997 D1 D2 D4 D5 DZ4 FL1_RF FL10_RF FL1701_RF FL6 FL9 FL96 J10_RF J5_RF J6_RF L1_RF L10_RF L11 L11_RF L12_RF L13_RF L16_RF L17 L17_RF L1732_RF L18_RF L19 L19_RF L2_RF L21 L21_RF L3L3_RF L33_RF L4 L4_RF L44_RF L5 L5_RF L6_RF L66_RF L67_RFL68_RF L69_RF L7_RF L70_RF L71_RF L72_RF L73_RF L74_RF L75_RF L77_RF L8_RF L9_RF Q2 Q3 Q4 Q5 R10 R100 R102 R103 R129 R13_RF R136 R145 R15 R17 R20_RF R21_RF R22_RF R23_RF R24_RF R25_RF R26 R26_RF R27_RF R28_RF R29_RF R3_RF R30_RF R34_RF R35 R463 R488 R5_RF R50 R54 R55 R55_RFR56 R58 R59 R592 R593 R594 R60 R65 R66 R73 R74 R83 R84 R8401 R857 R86 R90 SH3 SP1_RF U11U11_RF U12 U12_RF U1317_RF U14 U14_RF U15 U17 U18 U2 U2_RF U2000_RF U207_RF U21 U22 U23 U23_RF U3 U4 U5_RF U58_RF U7 U7_RF U8 U8_RF Y1_RF Y2 ＩＰＨＯＮＥ　５Ｃ　 Ａ
BS1BS2 BS3 C1 C10 C100 C101 C102 C103 C104 C105 C105_RF C106 C108 C111 C112 C113 C117 C118 C119 C12 C1201 C121_RF C123 C125_RF C127C128 C128_RF C13 C132 C134 C136 C139 C14 C14_RF C140 C141 C142 C144 C144_RF C145 C146 C147_RF C148 C15 C15_RF C155 C157 C158 C159 C16_RF C161C164 C167 C168 C17_RF C172 C175 C176 C177 C177_RF C178 C179 C18 C18_RF C181 C182 C183 C183_RF C184_RF C185_RF C186_RF C187_RF C188 C188_RF C19 C19_RF C191 C192 C193 C193_RF C194 C196 C197 C198 C199 C2 C20 C20_RF C200 C201 C202 C206 C208 C21 C21_RF C210 C211 C212 C215 C216 C22 C22_RF C23 C23_RF C2307 C24 C24_RF C240 C241 C242 C244 C245_RF C246_RF C249 C25 C25_RF C253 C255_RF C256 C259 C26_RF C266 C268 C27_RF C274 C275C279 C28 C28_RF C282_RF C284 C286 C287 C29_RFC296 C298 C30 C30_RF C300 C303 C308 C31 C311 C313 C314 C316 C32 C32_RF C324 C327 C33_RF C331 C34_RF C343 C35 C35_RF C350 C351 C352 C353 C355 C357 C358 C359 C36 C36_RF C361 C37 C37_RF C373 C376 C380 C381 C388 C390 C397 C398 C399 C40 C402 C407 C41 C410 C42 C427 C43 C430 C432 C433 C434 C435 C436 C437 C438 C44 C441 C45 C46 C48 C49 C5 C53 C56 C57 C58 C60 C61_RF C610 C62 C62_RF C63 C66 C67 C68_RF C69_RF C70 C70_RF C71 C71_RFC72 C72_RF C73_RF C74_RF C745 C75 C75_RF C76 C76_RF C78 C78_RF C79_RF C8 C80 C80_RF C81 C81_RF C82 C82_RF C83 C83_RF C84 C85 C85_RF C855 C86 C86_RF C87 C87_RF C878 C879 C88 C88_RF C883 C89 C89_RF C9 C90 C90_RF C91 C91_RF C913 C914 C92_RF C93 C94 C953 C96 CL1 D3 DZ1 DZ10 DZ11 DZ12 DZ16 DZ17 DZ2 DZ23 DZ24 DZ3 DZ5 DZ6 DZ7 DZ75 DZ76 DZ9 FL1 FL10 FL11 FL12 FL13 FL14 FL15 FL16 FL17 FL18 FL2 FL2_RF FL20 FL21 FL22 FL23 FL2302 FL24 FL25 FL26 FL27 FL28 FL29 FL3 FL30 FL31 FL34 FL35 FL36 FL38 FL39 FL4 FL4_RF FL40 FL43 FL44 FL45 FL46 FL47 FL48 FL49 FL495 FL5 FL51 FL52 FL53 FL57 FL58 FL6_RF FL60 FL61 FL68 FL69 FL7 FL751FL752 FL753 FL8 FL9_RF J1 J11_RF J2 J3 J4 J4_RF J5 J6J7 L1 L10 L14_RF L15_RF L2 L20_RF L22_RF L25_RF L27 L28 L29 L33 L34 L35 L36 L36_RF L37 L37_RF L38 L38_RF L39 L39_RF L45_RF L46_RF L49_RF L50_RF L51_RF L52_RF L53_RF L54_RF L55_RF L6 L64_RFL65_RF L7 L78_RF L79_RF L8 L9 Q1 Q7 R1 R10_RF R107 R108 R11 R110 R12 R12_RF R13 R130 R137 R14 R143 R15_RF R16 R16_RF R17_RF R18 R18_RF R19 R19_RF R2 R20 R21 R22 R24 R25 R27 R28 R29 R 3 R31 R32 R33 R33_RF R34 R35_RF R36 R37 R38 R39 R4_RF R40 R41 R42 R43_RF R44_RF R45 R46 R46_RF R47 R47_RF R48_RF R5 R51_RF R52 R52_RF R53 R53_RF R57 R6 R6_RF R67 R7 R7_RF R71 R72 R78 R79 R8 R82 R85 R9_RF R91 R92 R921 R9401 R953 SH1 SH2 SP3_RF U1 U1_RF U13 U16 U16_RF U20_RF U25 U3_RF U5 U6_RF U9_RF Y1 ＩＰＨＯＮＥ　５Ｃ　Ｂ
TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PROPRIETARY PROPERTY OF APPLE INC. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DESCRIPTION OF REVISION CK APPD 2 1 1245678 B D 6 5 4 3 C A NOTICE OF PROPRIETARY PROPERTY: PAGE THE INFORMATION CONTAINED HEREIN IS THE C A D DATE R SHEET Apple Inc. THE POSESSOR AGREES TO THE FOLLOWING: DRAWING TITLE D SIZE REVISION DRAWING NUMBER BRANCH REV ECN 7 B 3 II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE IV ALL RIGHTS RESERVED III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 8 TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEMTABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) BOARD_ID RADIO BOM OPTIONS COMPASS BOM OPTIONS NAND BOM OPTIONS TO DO: CLEANUP ALTERNATES FOR X155 ALTERNATES X155 BOM CALLOUTS HORIZONTAL CAP BOM OPTIONS SCH 051-9584 BRD 820-3329 BOM 639-3796 X155 TRISTAR BOM OPTIONS X155 PROTO1 SINGLE_BRD GYRO BOM OPTIONS CHESTNUT BOM OPTIONS 1 OF 46 Mon Oct 8 11:06:07 2012 2012-10-14ENGINEERING RELEASED 1 OF 23 2.0.0 051-9584 2 0001669557 138S0801 5 HRZN CAPS_1:10UF,0402,6.3V HRZN_CAP_GRP6C386,C387,C333,C332,C335 Y Y2 C52,C156 HRZN_CAP_GRP11HRZN CAPS_1:10UF,0402,10V138S0794 4.7UF 0.55MM HEIGHT LOW_Z_CAPC193138S0582 1 Y 138S0801 HRZN_CAP_GRP2C293,C294,C257,C299,C262HRZN CAPS_1:10UF,0402,6.3V5 Y 138S0801 HRZN CAPS_1:10UF,0402,6.3V C205,C243,C247,C252,C297 HRZN_CAP_GRP55 Y HRZN CAPS_1:10UF,0402,6.3V138S0801 HRZN_CAP_GRP73 C42_RF,C43_RF,C44_RF Y 12 12 N/AN/AAGATHA PMU(1/2) 11 11 N/AN/ACG FLEX B2B L67 AUDIO CODEC (2/2)10 10 N/AN/A H5P SOC/CPU/SRAM PWR N/A5 5 N/A SCH,SINGLE_BRD,X155 HRZN CAPS_1:10UF,0402,6.3V138S0801 C182,C307,C209,C1874 HRZN_CAP_GRP10Y HRZN CAPS_1:10UF,0402,6.3V5138S0801 HRZN_CAP_GRP3C264,C378,C189,C203,C245 Y C190,C204,C239,C246,C195138S0801 HRZN CAPS_1:10UF,0402,6.3V HRZN_CAP_GRP4Y5 COMPASS_POPU16639-4024 1 YST GYRO - COMPASS POP H5P IO POWER4 4 N/AN/A DATECSA PAGE SYNC MASTERCONTENTSPDF PAGE 2 N/AN/AH5P JTAG, USB ,PLL2 339S0176339S0177 H5P ALTERNATEALTERNATE ? ?339S0178 339S0176 ALTERNATE H5P ALTERNATE BUTTON FLEX B2B N/AN/A88 HRZN CAPS_1:10UF,0402,6.3V138S0801 HRZN_CAP_GRP8C1201_RF1 Y H5P W/ NAND N/A6 6 N/A 118S0626 100K 1% 01005 Y1 R25_RF N53_CFG_B 499K 1% 01005118S0650 Y1 N49_CFG_AR26_RF 267K 1% 01005118S0623 Y1 R26_RF N53_CFG_B 162K 1% 01005118S0726 N53_CFG_AY1 R26_RF 118S0621 Y1.00M 1% 01005 R25_RF N51_CFG_A1 R26_RF50K 1% 01005118S0732 Y1 N51_CFG_A 118S0626 100K 1% 01005 Y1 N49_CFG_AR25_RF 338S1158 U8 Y GYRO_ST1 ST GYRO 138S0652138S0648 4.7UF CERM 0402 6.3VALTERNATE ? LABEL FOR X155 639-3796 EEEE_16G825-6838 Y1 EEEE_F284 N/AH5P GPIO & CONTROL3 N/A3 14 14 CHESTNUT + BACKLIGHT DRIVER N/A N/A 18 18 N/AN/AD404 (TOUCH B2B, DRIVER ICS) 1717 N/ADOCKFLEX B2B N/A 15 15 N/AN/ASPKR AMP + LED DRIVER N/A13 13 N/AAGATHA PMU(2/2) L67 AUDIO CODEC (1/2) N/A9 9 N/A N/A19 19 N/ALCM CONNECTOR 21 21 N/ACAM0 CONNECTOR N/A 20 20 N/ASENSORS N/A ?YSCH051-9584 1 SCH, SINGLE_BRD, X155 1 ?YPCB820-3329 PCB, SINGLE_BRD, X155 N/A22 22 N/ABATT B2B, TPS, PD FEATURES 50K 1% 01005118S0732 N49_CFG_BY1 R25_RF 1.00M 1% 01005118S0621 N49_CFG_BY1 R26_RF 118S0626 100K 1% 01005 Y1 N48_CFG_BR26_RF N48_CFG_BR25_RF147K 1% 01005 Y1118S0689 R25_RF Y N48_CFG_A255K 1% 010051118S0659 118S0626 1 Y100K 1% 01005 R26_RF N48_CFG_A 470K 5% 01005 R25_RF117S0159 Y1 N51_CFG_B 7 7 N/AH5P VIDEO N/A R26_RF100K 1% 01005 Y1 N51_CFG_B118S0626 N53_CFG_A118S0626 1 100K 1% 01005 YR25_RF 335S0878 Y1 U4 NAND_16GNAND,19NM,16GX8,MLC,PPN1.5 N/A23 23 RADIO_MLB HIERARCH. SYMBOL N/A Y1 TI CHESTNUT U3 CHESTNUT_TI338S1172 152S1649 1 YL19 CHESTNUT_TITI CHESTNUT - 1.5 UH IND 152S1611 1 INTERSIL CHESTNUT -2.2 UH IND L19 Y CHESTNUT_INTERSIL5 C422,C74,C92,C250,C265 HRZN_CAP_GRP1HRZN CAPS_1:10UF,0402,6.3V138S0801 Y 338S1168 U3 Y CHESTNUT_INTERSIL1 INTERSIL CHESTNUT 16 16 N/ATRISTAR N/A 1 GYRO_STC11 Y132S0391 ST GYRO - CP CAP U2 TRISTAR1 CBTL1608A1UK,WCSP,TRISTAR343S0614 Y CBTL1610A0UK,WCSP,TRISTAR21 TRISTAR2U2343S0639 Y 118S0671 2 RES 15OHM 01005 5% R102,R103 TRISTARY 2 RES 200HM 01005 5%117S0202 R102,R103 TRISTAR2Y ＩＰＨＯＮＥ　５Ｃ　原理图　
FAST_SCAN_CLK HOLD_RESET USB_ASW_VSS18 USB_ID USB_ANALOGTEST USB_DM USB_DP USB11_DM USB11_DP USB_BRICKID TST_STPCLK JTAG_TRST* HSIC3_DATA XI0 WDOG VDD_ANA_PLLUSB VDD_ANA_PLL7 VDD_ANA_PLL6 VDD_ANA_PLL5 VDD_ANA_PLL4 VDD_ANA_PLL3 VDD_ANA_PLL2 VDD_ANA_PLL1 USB_VDD330 USB_DVDD USB_ASW_VDD18 TST_CLKOUT TESTMODE JTAG_TRTCK JTAG_TDO JTAG_SEL HSIC1_DVDD101 HSIC_VDD123 HSIC_VDD122 HSIC_VDD121 HSIC2_DVDD102 HSIC3_DVDD103 VDD_ANA_PLL0 HSIC3_STB HSIC2_STB CPU0_SWITCH XO0 USB_VBUS HSIC1_STB HSIC1_DATA HSIC_VSS121 HSIC_VSS122 DDR1_CKEIN DDR0_CKEIN CFSB FUSE1_FSRC USB_REXT RESET* JTAG_TCK JTAG_TMS JTAG_TDI CPU1_SWITCH USB_BRICKID_DM_MON USB_VSSA0 USB_VSSA0 USB_VSSA0 HSIC2_DVSS HSIC1_DVSS HSIC_VSS123 HSIC3_DVSS HSIC2_DATA SYM 1 OF 12 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT FINAL XTAL PASSIVES 11/30/2011 (22MA) (28MA) (1MA) (1MA) (1MA) (2X1MA) (3X2.7MA) (5.4MA) (3X11.9MA) (2X1MA) NO_CONNECT OKAY (1MA) USBHS ON/OFF TOLERANCE 5V/1.98V SERIAL MODE NAMES WLAN (TOP) BASEBAND (1MA) 1.8V TOLERANT PLACE R49 AND C1 CLOSE TO EACH OTHER AND U1 PER EMC 01005 1% MF 1/32W 1.00M 1/32W 5% 1.00K 01005 MF X5R 6.3V 20% 0.22UF 0201 0.22UF 0201 X5R 20% 6.3V 01005 MF 1% 43.2 1/32W 10% X5R-CERM 1000PF 6.3V 01005 0.01UF 01005 10% X5R 6.3V X5R 01005 6.3V 10% 0.01UF 12PF CERM 16V 5% 01005 12PF 5% 01005 CERM 16V 20% X5R 6.3V 0.22UF 0201 10% NOSTUFF 01005 X5R 6.3V 0.01UF X5R 0201 6.3V 20% 0.22UF 1.60X1.20MM-SM 24.000MHZ-30PPM-9.5PF-60OHM SHORT-10L-0.1MM-SM SM NO_XNET_CONNECTION=TRUE 100PF 5% 01005 NP0-C0G 10V 0.00 0% 010051/32W MF 01005 0.00 0% MF 1/32W FCMSP H5P-SC58950C03 6.3V 01005 NP0-C0G 5% 56PF CERM-X5R 20% 6.3V 10UF 0402-1 0201 X5R 6.3V 20% 0.22UF MF 1/32W 5% 47.0K 01005 0.01UF 6.3V 10% X5R 01005 10% 0.01UF X5R 6.3V 01005 SYNC_MASTER=N/A SYNC_DATE=N/A H5P JTAG, USB ,PLL XTAL_GND 90_AP_BI_TRISTAR_USB0_P 90_USBHS_H5P_N 90_AP_BI_TRISTAR_USB0_N 45_XTAL_24M_I XTAL_24M_O_R WDOG CPU0_SWITCH 45_XTAL_24M_O USB_VBUS_DETECT CPU1_SWITCH 50_AP_BI_BB_HSIC1_DATA 50_AP_BI_BB_HSIC1_STB 50_AP_BI_WLAN_HSIC3_DATA 50_AP_BI_WLAN_HSIC3_STB TRISTAR_TO_AP_JTAG_SWCLK TRISTAR_BI_AP_JTAG_SWDIO USB_REXT 90_USBHS_H5P_P PP1V8 PP1V8 PP1V0 PP3V3_USB AP_TO_PMU_TEST_CLKOUT PP1V2 PP1V8_PLL PP1V0 RESET_1V8_L PP1V8 C341 2 C321 2 R7 12 R71 1 2 C2 1 2 C93 1 2 R61 2 C11 2 C211 2 C201 2 C36 1 2 C37 1 2 C3921 2 C331 2 C281 2 Y1 24 13 XW44 1 2 XW51 2 C141 1 2 R1 1 2 R30 1 2 U1 AV13 AR9 AU10 K16 N8 A19 R28 AP14 F34 M29 M28 F33 E34 K29 K28 E33 AV15 AK16 AL16 AU15 L29 J29 AK17 L28 J28 AL17 AN15 AM14 AM16 AP15 AN16 AN13 AM15 AV11 AT15 AR16 AV10 D34 C34 E27 G28 H28 F28 G27 A31 A32 G29 E29 A30 F29 J26 H27 H26 H29 G19 J19 G18 J18 J21 G20 J20 G21 J22 AT13 A12 A13 C351 2 C1281 2 C1571 2 R671 2 051-9584 2.0.0 2 OF 23 2 OF 46 16 16 13 12 12 12 23 23 23 23 16 16 234567101112141819 2021 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 7 12 12 13 412 2712 12131416192223 234567101112141819 2021
PP PP 1Y GND 2Y2A 1A VCC PP SYM 2 OF 12 GPIO7 GPIO9 UART6_TXD UART6_RXD UART6_RTSN UART6_CTSN UART5_TXD UART5_RXD UART3_TXD UART3_RTSN UART3_CTSN UART2_RXD UART1_RXD UART1_CTSN UART0_TXD UART0_RXD TMR32_PWM2 TMR32_PWM1 TMR32_PWM0 GPIO_VSEL25_SPI3 GPIO_VSEL25_I2C2 GPIO_SVSEL18_FMI GPIO_3V1 GPIO_3V0 GPIO8 GPIO6 GPIO5 GPIO4 GPIO39 GPIO38 GPIO37 GPIO36 GPIO35 GPIO34 GPIO33 GPIO32 GPIO31 GPIO30 GPIO3 GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO2 GPIO19 GPIO18 GPIO17 GPIO16 GPIO1 GPIO0 EHCI_PORT_PWR3 EHCI_PORT_PWR2 EHCI_PORT_PWR1 EHCI_PORT_PWR0 UART3_RXD GPIO_SVSEL25_FMI GPIO12/SDIO_D1 GPIO13/SDIO_D0 GPIO14/SDIO_CMD GPIO15/SDIO_CLK UART4_CTSN/SPI4_SSIN UART4_RTSN/SPI4_SCLK UART4_RXD/SPI4_MISO UART4_TXD/SPI_MOSI UART1_RTSN UART2_TXD UART2_RTSN UART2_CTSN UART1_TXD GPIO11/SDIO_D2 GPIO10/SDIO_D3 SYM 3 OF 12 SPI3_SSIN SPI3_MOSI SPI3_MISO SPI3_SCLK I2S4_MCK I2S4_LRCK I2S4_DIN I2S4_BCLK I2S4_DOUT SPDIF SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN SPI1_MISO SPI1_SCLK SPI1_MOSI SPI1_SSIN SPI2_MISO SPI2_SCLK SPI2_MOSI SPI2_SSIN I2S1_BCLK I2S1_MCK I2S0_DOUT I2S0_DIN I2S3_DIN I2S3_DOUT SWI_DATA I2S3_MCK I2S3_LRCK I2S3_BCLK I2S2_MCK I2S2_LRCK I2S2_DIN I2S2_BCLK I2S1_LRCK I2S1_DOUT I2S1_DIN I2S0_MCK I2S0_BCLK I2C2_SDA DWI_DO DWI_DI DWI_CLK I2S2_DOUT I2C2_SCL I2C1_SDA I2C1_SCL I2C0_SDA I2C0_SCL I2S0_LRCK Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BOOT_CONFIG0 (OPEN DRAIN@PMU) NEW ---> R12 MUST WIN OVER 6X INTERNAL PULL-DOWNS THAT ARE ~100K COMMON PULL UP FOR BOARD_REV, BOARD_ID AND BOOT_CONFIG PINS 0101 FMI0 4CS CODEC ASP GRAPE BOARD_REV1 BOARD_REV0 BOARD_ID0 BB_JTAG_TCK L19A KEEP (STAYING) ALIVE --> NOSTUFF FOR TRISTAR2 MENU & POWER / HOLD KEY 1010 FMI1 4CS W/TEST 1001 FMI1 4 CS 1101 FMI0/1 4/4 CS I2C2 I2C0 BASEBAND BB RESERVED FOR NON-TRISTAR DESIGN ---> DEV_HSIC1_RDY BOOT_CONFIG2 RESERVED 0100 FMI0 2CS CODEC VSP <50MHZ BT CODEC FMI, 00=1.8V | 01=3.0V | 10=3.3V AK8963C COMPASS: 0101001XCT814 ALS: 1110100X 0011010X 0011101X 1101010X <50MHZ I2C1 AGATHA PMU: DEBUG UART: TOLERANCE 1.98V I2C2, 0=1.8V | 1=3.0V SPI3, 0=1.8V | 1=3.0V 0011 SPI3 W/TEST BOOT_CONFIG1 0110 FMI0 4CS W/TEST 1000 FMI1 2 CS FLOAT=LOW, PULLUP=HIGH 0010 SPI0 W/TEST 0111 RESERVED BOARD_REV3 BOOT_CONFIG3 DFU STATUS BOARD_REV[3:0]={EHCI_PORT3,EHCI_PORT_PWR2,EHCI_PORT_PWR1,EHCI_PORT_PWR0} GAS GAUGE BOARD_ID2 BLUETOOTH WIFI UART FLOAT=LOW, PULLUP=HIGH 1010 X155 MLB BB_JTAG_TDO BB_JTAG_TMS BB_JTAG_TDI BOARD_ID3 BOARD_ID1 <--- SELECTED1100 FMI0/1 2/2 CS BOARD_REV2 STUFF FOR TRISTAR 1111 X155 INITIAL 1110 FMI0/1 4/4 CS W/TEST AP3DSH ACCEL: AP3GDL20-BC GYRO: ???????? 0001100X CS35L20 AMP: LM3534: TRISTAR: CHESTNUT: 1100011X 0100111X FLOAT=LOW, PULLUP=HIGH 0000 SPI0 0001 SPI3 1100 - PROTO1 TRISTAR 2 1101 - PROTO1 TRISTAR <---PROTO1 SELECTED BOARD_ID[3:0]={GPIO16,SPIO0_MISO,SPI0_MOSI,SPI0_SCLK} <--- SELECTED BOOT_CONFIG[3:0]={GPIO29_CONFIG3,GPIO28_CONFIG2,GPIO25_CONFIG1,GPIO18_CONFIG0} CODEC XSP & SPKR AMP 1111 RESERVED 01005 MF 33.2 1/32W 1% 1.00K01005 2.2K 01005 MF 5% 1/32W 1/32W MF 5% 01005 2.2K 01005 MF 5% 2.2K 1/32W 01005 MF 5% 1/32W 2.2K 01005 MF 33.2 1% 1/32W 220K MF 5% 1/32W 01005 01005 1/32W MF 392K 1% MF 1/32W 01005 392K 1% SM P4MM SM P4MM 74AUP2G34GN SOT1115 P2MM SM 1/32W MF1% 01005 33.2 FCMSP H5P-SC58950C03 FCMSP H5P-SC58950C03 2.2K 5% 1/32W MF 01005 MF 5% 2.2K 1/32W 01005 1.00K 01005 H5P GPIO & CONTROL SYNC_DATE=N/ASYNC_MASTER=N/A BOARD_INFO AP_TO_BB_HSIC1_RDY WLAN_TO_AP_HSIC2_REMOTE_WAKE BUTTON_TO_AP_HOLD_KEY_BUFF_L PP1V8 PP1V8 PP1V8 BOARD_REV0 PP1V8 BUTTON_TO_AP_VOL_UP_L GYRO_TO_AP_INT2 45_AP_TO_PMU_DWI_DO ACCEL_TO_AP_INT2 ALS_TO_AP_INT_L AP_TO_HEADSET_HS3_CTRL AP_TO_HEADSET_HS4_CTRL VIB_PWM AP_TO_CODEC_SPI3_CS_L BUTTON_TO_AP_VOL_DOWN_L AP_BI_I2C2_SDA 45_AP_TO_PMU_DWI_CLK 45_AP_TO_PMU_DWI_DI 45_AP_TO_PMU_DWI_CLK_H5P AP_TO_I2C1_SCL AP_TO_I2C2_SCL PP1V8 AP_TO_I2C0_SCL AP_BI_I2C0_SDA AP_TO_BB_I2S1_DOUT CODEC_TO_AP_SPI3_MISO VIB_LDO_EN BB_TO_AP_PP_SYNC AP_TO_SPKAMP_RESET_L AP_TO_TOUCH_GRAPE_RESET_L PP1V8 AP_TO_BB_WAKE_MODEM COMPASS_TO_AP_INT_2 PP1V8 CODEC_TO_AP_INT_L SPKAMP_TO_AP_INT_L FCAM_TO_AP_ALS_INT_L BB_TO_AP_IPC_GPIO AP_TO_BB_JTAG_TDI BB_TO_AP_UART1_CTS_L ACCEL_TO_AP_INT1 AP_TO_BB_UART1_TXD AP_TO_LEDDRV_EN BUTTON_TO_AP_MENU_KEY_BUFF_L 45_AP_TO_SPKAMP_I2S2_MCLK BUTTON_TO_AP_HOLD_KEY_L 45_AP_TO_CODEC_I2S_MCLK BUTTON_TO_AP_MENU_KEY_L BB_TO_AP_HSIC1_REMOTE_WAKE AP_TO_BB_UART1_RTS_LAP_TO_BB_JTAG_TMS BT_TO_AP_UART3_RXD KEEPACT TOUCH_TO_AP_INT_L AP_TO_LCM_RESET_L LCM_TO_AP_HIFA_BSYNC FORCE_DFU 45_AP_TO_TOUCH_CLK32K_RESET_L AP_TO_SPKAMP_BEE_GEES AP_TO_CODEC_ASP_I2S0_LRCLK AP_TO_CODEC_XSP_I2S2_DOUT 45_I2S0_MCK_R BB_TO_AP_I2S1_DIN 45_AP_TO_CODEC_XSP_I2S2_BCLK CODEC_TO_AP_XSP_I2S2_DIN AP_TO_CODEC_XSP_I2S2_LRCLK 45_I2S2_MCK_R 45_AP_TO_BT_I2S3_BCLK AP_TO_BT_I2S3_LRCLK AP_TO_BT_I2S3_DOUT BT_TO_AP_I2S3_DIN CODEC_TO_AP_ASP_I2S0_DIN AP_TO_CODEC_ASP_I2S0_DOUT 45_AP_TO_BB_I2S1_BCLK WLAN_TO_AP_HSIC2_RDY AP_TO_WLAN_HSIC2_RDY AP_TO_TOUCH_SPI1_CS_L AP_TO_TOUCH_SPI1_MOSI AP_TO_TOUCH_SPI1_CLK AP_TO_CODEC_VSP_I2S4_LRCLK AP_TO_CODEC_SPI3_MOSI AP_TO_CODEC_SPI3_CLK BB_TO_AP_UART1_RXD AP_TO_TRISTAR_ACC_UART2_TXD TRISTAR_TO_AP_ACC_UART2_RXD TRISTAR_TO_AP_DEBUG_UART6_RXD AP_BI_BATTERY_SWI AP_TO_CAM_RF_VDDCORE_EN BB_TO_AP_RESET_DET_L AP_TO_WLAN_UART4_TXD WLAN_TO_AP_UART4_RXD AP_TO_BB_JTAG_TRST_L AP_TO_BT_UART3_TXD AP_TO_BT_UART3_RTS_L BT_TO_AP_UART3_CTS_L AP_TO_BB_I2S1_LRCLK 45_AP_TO_CODEC_VSP_I2S4_BCLK CODEC_TO_AP_VSP_I2S4_DIN AP_TO_CODEC_VSP_I2S4_DOUT BB_TO_AP_HSIC1_RDY AP_TO_RADIO_ON_L GYRO_TO_AP_INT1 TRISTAR_TO_AP_INT PP1V8_SDRAM AP_TO_TRISTAR_DEBUG_UART6_TXD BUTTON_TO_AP_HOLD_KEY_BUFF_L PP1V8_ALWAYS 45_AP_TO_CODEC_ASP_I2S0_BCLK BUTTON_TO_AP_MENU_KEY_BUFF_L BOARD_INFO AP_TO_BT_WAKE BUTTON_TO_AP_RINGER_A BOARD_INFO TOUCH_TO_AP_SPI1_MISO LCM_TO_AP_PIFA AP_TO_BB_JTAG_TCK AP_TO_BB_RST_L BB_TO_AP_JTAG_TDO PMU_TO_AP_IRQ_L AP_BI_I2C1_SDA R16 1 2 R121 2 R171 2 R181 2 R191 2 R211 2 R5 1 2 R521 2 R201 2 R221 2 PP15 1 PP13 1 U25 1 6 3 4 25 PP5 1 R47 1 2 U1 AE4 AD3 AD4 AE3 W3 N2 W1 M2 R3 N3 M1 AC3 T3 V1 AC2 V4 M4 R31 P34 P33 P32 N32 L33 P30 P31 L34 M32 V3 K32 L32 C22 D22 C21 D21 C20 D20 C19 D19 T4 W2 P3 M3 U3 P4 AT11 AP12 AU13 AR14 AR13 AT12 AT6 AP8 AP1 AR15 AU12 AA3 AB2 AB3 AF5 AG3 AA1 AE2 AF3 AH3 AB1 AF4 AG4 AJ4 AE1 AJ2 AH4 AK4 AJ3 AH2 AL1 AK3 AD1 U1 AT7 AV7 AM8 AR7 AT4 AV6 AT3 AT9 AR8 AM30 AH30 AJ30 AH31 AP30 AL31 AH29 AH32 AN31 AK29 AM28 AM33 AN30 AJ31 AM29 AK31 AL30 AP31 AL28 AM31 AM32 AK32 AR32 AP32 AK30 AR31 AM4 AR5 AM2 AP3 AN3 AL3 AK1 AR4 AN4 AM3 AN6 AN1 AP9 AM9 AM13 AN12 AP5 R911 2 R921 2 R511 2 051-9584 2.0.0 3 OF 23 3 OF 46 3 23 23 313 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 3 4 5 6 7 10 11 12 14 18 19 20 21 813 20 13 14 20 11 17 17 8 10 813 11 13 14 13 20 11 2 3 4 5 6 7 10 11 12 14 18 19 20 21 13 14 15 16 20 13 14 15 16 20 23 10 8 23 15 18 23 456710111214181920 21 23 20 23 456710111214181920 21 10 15 11 23 23 23 20 16 23 15 3 13 15 8 10 17 23 2323 23 13 18 19 1819 22 18 15 10 10 15 23 1015 1015 1015 23 23 23 23 10 10 23 23 23 18 18 18 10 10 10 16 23 16 16 16 13 22 21 23 23 23 23 23 23 23 23 10 10 10 23 23 20 13 16 4101213141623 16 3 13 12 10 313 3 23 813 3 18 19 23 23 23 13 20
SYM 7 OF 12 DDR1_RREF VDDCA DDR1_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ VDD2 DDR0_VDD_CKE DDR1_VDD_CKE DDR0_ZQ DDR1_ZQ DDR0_VREF_CA VSS VDD1 VDDQ DDR0_RREF SYM 9 OF 12 PVDDP_I2C2_SDA VDDIO18_GPIO22 VSS VDDIO18_I2S0_MCK VDDIO18_GRP2 VDDIO18_GRP1 VDDIOD Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT (666MA) POR CAPS 9/1/11 (80MA) BUCK4 1P2 (20MA) (<1MA) (45MA) (7MA) POR CAPS NOV/1/2010 (INCLUDED IN VDDQ) (8MA) (<1MA) CAPS FOR VDDIOD ARE SHARED WITH VDDQ (340MA) (18MA) (DDR IMPEDANCE CONTROL) 1/32W 1% 243 MF 01005 1/32W 01005 MF 243 1% 1% 1/32W MF 10K 01005 1/32W 1% MF 10K 01005 1/32W MF 1% 10K 01005 1/32W 1% MF 10K 01005 MF 1/32W 4.7K 1% 01005 MF 1/32W 1% 4.7K 01005 4.7K 1% 1/32W MF 01005 4.7K 1% 1/32W MF 01005 20% 4V 0.47UF X7S 02040204 1UF X6S 4V 20% 6.3V CERM-X5R 0402-1 20% 10UF 0610 X5R-CERM 4.3UF 4V 20% 0204 X7S 20% 0.47UF 4V X5R-CERM 4.3UF 0610 4V 20% 6.3V CERM-X5R 0402-1 10UF 20% 1UF 0204 X6S 20% 4V4V 20% 0610 4.3UF X5R-CERM 20% 0.1UF 6.3V X5R-CERM 01005 0.01UF 6.3V 10% X5R 01005 6.3V 0.01UF 10% X5R 01005 0.01UF 6.3V 10% X5R 01005 6.3V 0.01UF 10% X5R 01005 10% 0.01UF 6.3V X5R 01005 10% 0.01UF 6.3V X5R 01005 10% 0.01UF 6.3V X5R 01005 10% 0.01UF 6.3V X5R 01005 2.2UF 0201 X5R-CERM 4V 20% 20% 4V 0.47UF X7S 0204 NP0-C0G 56PF 5% 6.3V 01005 NP0-C0G 01005 6.3V 5% 56PF 0201 1KOHM-25%-0.2A FCMSP H5P-SC58950C03 FCMSP H5P-SC58950C03 NOSTUFF X5R-CERM 20% 6.3V 01005 0.1UF 01005 15PF 5% 16V NP0-C0G-CERM SYNC_DATE=N/ASYNC_MASTER=N/A H5P IO POWER PP1V2 PP1V2_SDRAM PP1V8 PP1V2PP1V2_SDRAM DDR0_VREF_CA DDR1_VREF_DQ DDR0_VREF_DQDDR1_VREF_CA DDR0_ZQ PP1V8_SDRAM DDR0_VREF_CA DDR1_ZQ DDR0_ZQ PP1V2_SDRAM DDR1_VREF_DQ DDR0_VREF_DQ DDR1_VREF_CA DDR1_ZQ PP1V2 PP1V8_XTAL R34 1 2 R33 1 2 R131 2 R111 2 R141 2 R241 2 R251 2 R271 2 R281 2 R291 2 C881 2 C751 2 C681 2 C871 2 C891 2 C851 2 C761 2 C771 2 C721 2 C811 2 C601 2 C661 2 C781 2 C801 2 C901 2 C911 2 C941 2 C961 2 C123 1 2 C8831 2 C3901 2 C3881 2 FL40 1 2 U1 AV4 L16 AV8 B31 AV3 AN34 N9 AK34 R2 AP34 A10 A11 AB33 AF2 AT33 AU3 AV16 B32 M33 T2 AA34 AF1 M34 P1 R1 AL33 AR33 AT1 AU16 AU7 B10 B11 B29 AD33 AJ33 AN33 AU14 AU5 AU9 A3 AA2 B20 B22 B25 B27 B30 B5 B7 B9 C33 D2 AD2 F2 G33 J2 K33 L2 N33 P2 T33 U2 W33 AG2 AK2 AN2 AR2 B12 B14 B17 A1 A2 AT30 AV9 B15 C1 C12 C27 D18 D7 E1 E12 E23 F16 F5 G3 G32 H15 J1 K3 K30 L19 M16 N15 P10 R32 R9 T20 U6 V2 V29 W21 W23 W25 Y1 Y12 Y14 Y16 Y18 Y2 Y20 Y22 Y24 Y10 Y29 Y3 Y32 Y4 Y5 Y8 U1 AT10 R29 AA7 AB7 AK11 AK12 AK13 AK14 AK15 AK7 AK8 AK9 AC7 AD7 AE7 AF7 AG7 AH7 AJ7 AK10 K20 K21 AJ28 AK28 G11 G13 H16 H6 H8 J10 J11 J12 J13 J14 J15 J16 G15 J17 J5 J7 J8 J9 K6 K7 L5 L7 M6 G17 M7 N5 N7 P6 P7 R5 R7 T6 T7 U5 G5 U7 V6 V7 W5 W7 Y6 Y7 G7 G9 H10 H12 H14 AE13 AE15 AE17 AE19 AE21 AE23 AE25 AE27 K26 AF10 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF6 AF8 AG1 AG11 AG13 AG15 AG17 AG19 AG21 AG23 AG25 AG27 AG28 AG29 AG30 AG31 AG32 AG33 AG34 AG5 AG6 AG9 AH10 AH12 AH14 AH16 AH18 AH20 AH22 AH24 AH26 AH28 AH33 AH5 AH6 AH8 AJ1 AJ11 AJ13 AJ15 AJ17 AJ19 AJ21 AJ23 AJ25 AJ27 AJ29 AJ32 AJ5 AJ6 AJ9 AK33 AK5 AK6 AR25 D33 C816 1 2 C9531 2 051-9584 2.0.0 4 OF 23 4 OF 46 2412 412 23567101112141819 2021 2412412 4 4 44 4 3101213141623 4 4 4 412 4 4 4 4 2412
SYM 8 OF 12 VDD_ANA_TMPSADC0 VDD_ANA_TMPSADC1 VDD_ANA0 VDD_ANA1 PVDDP_FAST_SCAN_CLK VSS VDDIOD1 VDDIOD0 VDDIO30_GPIO_3V0 VDDIO30_USB11_DM VDDIO30_FAST_SCAN_CLK VDD_SRAM VDD_CPU1 VDD_CPU0 VDD_CPUB VDDIOD3 VDDIOD2 SYM 10 OF 12 VDD VDD Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT C104 MOVED TO CPU0 FROM PP1V8 PER SEG SIMS C86 MOVED TO PP1V1_SOC FROM PP1V2, PER SEG SIMS C83 MOVED TO CPUB FROM 1V2_SDRAM PER SEG SIM RESULTS POR CAPS 5/6/2011 (1500MA) (1500MA) POR CAPS 12/14/2011 (2MA SPI3) (2MA I2C2) (5MA) (5MA) (5MA) (45MA NAND 1CH) (7MA) (2MA) (40MA) THERE WERE 10X 0.01UF HERE (400MA) POR CAPS 9/1/2011 (716MA) (45MA NAND 1CH) NAND POWER GROUP BUT THEY WERE NOT NEEDED PER P.CODD 1/6/11 (VDD_SOC 3700MA) PER SEG - ZHENGGANG - 09/01/12 PRE-PROTO1 C181,C177,C174 CHANGED FROM 0.47UF TO 1UF 4V 20% 0204 0.47UF X7S 4.3UF 0610 4V 20% X5R-CERM 0204 4V 0.47UF 20% X7S 0.47UF X7S 4V 20% 0204 CERM-X5R 20% 10UF 0402-1 6.3V 4V 0.47UF 20% X7S 0204 20% X5R 0201 0.22UF 6.3V 4V X5R-CERM 0610 4.3UF 20% 0204 4V 1UF 20% X6S 0610 X5R-CERM 4V 20% 4.3UF CERM-X5R 20% 6.3V 0402-1 10UF 20% X5R-CERM 0.1UF 01005 6.3V CERM-X5R 10UF 0402-1 6.3V 20% 01005 20% X5R-CERM 0.1UF 6.3V 4V X5R-CERM 0610 4.3UF 20% X5R-CERM 20% 4.3UF 0610 4V 20% X6S 1UF 4V 02040204 20% 1UF 4V X6S 10UF 0402-1 CERM-X5R 6.3V 20% 10UF 0402-1 CERM-X5R 6.3V 20% 10UF 6.3V 20% CERM-X5R 0402-10402-1 CERM-X5R 10UF 6.3V 20% SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM 4V X5R-CERM 0610 4.3UF 20% 0.00 1/32W 01005 MF 0% 1/32W 0% MF 01005 0.00 4.3UF 20% 4V X5R-CERM 0610 20% 4V X5R-CERM 0610 4.3UF 6.3V 0.47UF CERM 0402 20% 0402 CERM 1UF 20% 4V CERM 4V 20% 1UF 0402 20% CERM 0.47UF 6.3V 0402 1UF 20% 0402 4V CERM 6.3V CERM 20% 0402 0.47UF 1UF 0402 20% 4V CERM CERM 4V 1UF 20% 0402 20% 0402 0.47UF 6.3V CERM 4V 20% 0204 X6S 1UF 20% 1UF 4V X6S 0204 FCMSP H5P-SC58950C03 FCMSP H5P-SC58950C03 1UF X6S 20% 4V 0204 0.47UF 20% 0204 X7S 4V 4.3UF 0610 X5R-CERM 4V 20% 4.3UF 0610 X5R-CERM 4V 20% 0.00 MF 0% 1/32W 01005 5% NP0-C0G 01005 6.3V 56PF 0204 20% 1UF X6S 4V X6S 20% 0204 4V 1UF 1UF 20% X6S 0204 4V X6S 4V 1UF 20% 0204 X6S 4V 1UF 20% 0204 0402 20% 4V CERM 1UF H5P SOC/CPU/SRAM PWR SYNC_DATE=N/ASYNC_MASTER=N/A PP1V1_CPU0 PP1V1_CPUB PP1V8 CPU0_SENSE CPU1_SW_S BUCK2_FB CPU0_SW_S CPU1_SENSE PP1V1_CPU1 PP1V8 PP3V0_NAND_XW PP1V0_SRAM PP3V0_IO PP1V1_SOC C1581 2 C1171 2 C1401 2 C1421 2 C1001 2 C1541 2 C1391 2 C1271 2 C1451 2 C1121 2 C1711 2 C1831 2 C1621 2 C1781 2 C1721 2 C1641 2 C1791 2 C1751 2 C1611 2 C1551 2 C1341 2 C1111 2 XW1 1 2 XW3 1 2 XW4 1 2 C1151 2 R46 1 2 R53 1 2 C1461 2 C1521 2 C135 1 2 3 4 C151 1 2 3 4 C113 1 2 3 4 C132 1 2 3 4 C114 1 2 3 4 C133 1 2 3 4 C166 1 2 3 4 C173 1 2 3 4 C169 1 2 3 4 C1031 2 C1011 2 U1 F19 AJ18 AJ22 Y17 K18 AE16 AE18 AJ20 AE20 AF19 AG16 AG18 AG20 AH17 AH19 AJ16 AE22 AE24 AF21 AF23 AG22 AG24 AH21 AH23 AH25 AJ24 AA16 AA18 AA20 AA22 AA24 AC16 AC18 AC20 AC22 AC24 AB17 AB19 AF17 AF25 AB21 AB23 AB25 AD17 AD19 AD21 AD23 AD25 F20 AR10 G30 AN10 AP11 AB27 AC27 AD27 V27 W27 Y26 A14 A15 A16 A17 A18 A20 A23 A26 A29 A33 A34 A4 A5 A6 A7 A8 A9 AA11 AA13 AA15 AA17 AA19 AA21 AA23 AA25 AA33 AA4 AA5 AA6 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AB24 AB26 AB29 AB32 AB4 AB5 AB6 AB8 AC1 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AC25 AC34 AC4 AC5 AC6 AC9 AD10 AD12 AD14 AD16 AD18 AD20 AD22 AD24 AD26 AD29 AD32 AD5 AD6 AD8 AE11 AE5 AE6 AE9 AK27 AL13 AM22 AN21 AP16 AP33 AR26 AT19 U1 AA10 AA12 AC12 T13 T15 T17 T19 T21 T23 T25 T27 T9 U10 AC14 U12 U14 U16 U18 U20 U22 U24 U26 U8 V11 AC26 V13 V15 V17 V19 V21 V23 V25 V9 W10 W12 AC8 W14 W16 W18 W20 W22 W24 W26 W8 Y11 Y13 AD11 Y15 Y9 Y19 Y21 Y23 Y25 AD13 AD15 AD9 AE10 AE12 AA14 AE14 AE26 AE8 AF11 AF13 AF15 AF27 AF9 AG10 AG12 AA26 AG14 AG26 AG8 AH11 AH13 AH15 AH27 AH9 AJ10 AJ12 AA8 AJ14 AJ26 AJ8 K11 K13 K15 K17 K23 K25 K27 AB11 K9 L10 L12 L14 L18 L20 L22 L24 L26 L8 AB13 M11 M13 M15 M17 M19 M21 M23 M25 M27 M9 AB15 N10 N12 N14 N16 N18 N20 N22 N24 N26 P11 AB9 P13 P15 P17 P19 P21 P23 P25 P27 P9 R10 AC10 R12 R14 R16 R18 R20 R22 R24 R26 R8 T11 C7451 2 C7461 2 C1061 2 C1081 2 R953 1 2 C1481 2 C831 2 C1041 2 C861 2 C1811 2 C1771 2 C174 1 2 3 4 051-9584 2.0.0 5 OF 23 5 OF 46 12 12 234567101112141819 2021 12 12 12 12 234567101112141819 2021 6 12 12
IO0-1 IO7-1 IO6-1 IO3-1 IO4-1 IO5-1 IO1-1 IO2-1 IO7-0 IO5-0 IO6-0 IO4-0 IO2-0 IO3-0 IO1-0 IO0-0 VCC CLE1 CE1* CLE0 CE0* WE0* ALE0 RE0 RE0* DQS0* R/B0* DQS0 ALE1 WE1* RE1 RE1* DQS1 DQS1* R/B1* ZQ VREF VSSQVSS VCCQ VDDI TMSC TCKC PP PP PP PP PP SYM 4 OF 12 FMI1_VREFFMI0_VREF FMI0_REN FMI1_WEN FMI1_DQS FMI1_REN FMI0_CLE FMI0_WEN FMI0_IO2 FMI0_IO3 FMI0_IO5 FMI1_DQSN FMI0_ALE FMI0_CEN0 FMI0_CEN1 FMI0_CEN2 FMI0_CEN3 FMI0_CEN4 FMI0_CEN5 FMI0_CEN6 FMI0_CEN7 FMI0_DQS FMI0_DQSN FMI0_DQVREF FMI0_IO0 FMI0_IO1 FMI0_IO4 FMI0_IO6 FMI0_IO7 FMI1_ALE FMI1_CEN0 FMI1_CEN1 FMI1_CEN2 FMI1_CEN3 FMI1_CEN4 FMI1_CEN5 FMI1_CEN6 FMI1_CEN7 FMI1_CLE FMI1_DQVREF FMI1_IO0 FMI1_IO1 FMI1_IO2 FMI1_IO3 FMI1_IO4 FMI1_IO5 FMI1_IO6 FMI1_IO7 PVDDP_FMI0 PVDDP_FMI1 FMI0_WENN/RE_P FMI1_WENN/RE_P Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT POR CAPS 1/7/11 500MA NOTE: NAND PADS SHOULD BE SHIELDED FROM TRACES WITH A GROUND PLANE 1000MA FOR NAND CURRENT MEASUREMENT NAND SM OMIT_TABLE CERM-X5R 20% 0402-1 6.3V 10UF 0204 X6S 4V 20% 1UF10UF 0402-1 20% 6.3V CERM-X5R 01005 1/32W MF 243 1% 01005 NOSTUFF MF 5% 1/32W 100K XXNM-XGBX8-MLC-PPN1.5-ODP LGA-12X17 OMIT 5% 01005 MF 100K 1/32W 5% 100K MF 1/32W 01005 10% X5R 6.3V 0.01UF 01005 01005 0.01UF X5R 6.3V 10% OMIT_TABLE 20% 10UF 6.3V 0402-1 CERM-X5R SM P4MM P4MM SM SM P4MM 1% 1/32W MF 50K 01005 50K 1% 1/32W 01005 MF OMIT_TABLE 0402-1 20% 6.3V CERM-X5R 10UF OMIT_TABLE CERM-X5R 0402-1 6.3V 10UF 20% P2MM SM SM P2MM X5R 4V 20% 0402 15UF 4V 2.2UF 20% 0201 X5R-CERM 0204 X6S 4V 20% 1UF X7S 0.47UF 20% 4V 0204 20% 4.3UF 4V 0610 X5R-CERM 20% 4V X7S 0204 0.47UF NOSTUFF 100K 01005 MF 1/32W 5% NOSTUFF 0201 X5R-CERM 20% 2.2UF 4V H5P-SC58950C03 FCMSP 4V 20% X6S 1UF 0204 SYNC_MASTER=N/A SYNC_DATE=N/A H5P W/ NAND FMI1_IO<5> FMI0_IO<0> FMI0_IO<1> FMI0_IO<2> FMI0_IO<3> FMI0_IO<4> FMI1_IO<0> FMI1_IO<1> FMI0_DQVREFFMI0_DQVREF 45_FMI0_RE_L FMI1_WE_L 45_FMI1_DQS 45_FMI1_RE_L FMI0_CLE FMI0_WE_L FMI0_IO<5> FMI0_ALE FMI0_CEN0 45_FMI0_DQS FMI0_DQVREF FMI0_IO<6> FMI0_IO<7> FMI1_ALE FMI1_CEN0 FMI1_CLE FMI0_DQVREF FMI1_IO<2> FMI1_IO<3> FMI1_IO<4> FMI1_IO<6> FMI1_IO<7> PP1V8 PP1V8 NAND_TMSC 45_FMI0_RE_L FMI0_DQVREF 45_FMI0_DQS PPN_ZQ 45_FMI0_DQS PP3V0_NAND NAND_TCKC FMI0_IO<3> FMI0_IO<2> FMI0_IO<0> FMI0_IO<4> 45_FMI0_RE_L FMI0_IO<1> FMI0_IO<5> FMI0_CEN0 FMI1_ALE FMI1_CEN0 FMI1_WE_L FMI1_CLE FMI0_IO<0> FMI0_IO<6> FMI0_ALE FMI0_DQVREF PP1V2_NAND_VDDI NAND_RDYBSY1_L FMI0_WE_L FMI0_CLE PP1V8 45_FMI1_DQS 45_FMI1_RE_L NAND_RDYBSY0_L FMI0_IO<7> PP3V0_NAND_XW PP1V8 C31 2 XW2 1 2 C1821 2 C1071 2 C951 2 R8 1 2 R1601 2 U4 C1 D2 A5 C5 A3 C3 H4 F4 M4 K4 G3 G1 H2 J1 J3 L1 K2 N3 L5 N5 K6 L7 J5 J7 H6 G7 E5 E7 B4 C7 D4 D6 OA0 OB0 B6 F2 M6 N1 N7 OC8 OD8 OE0 OF8 G0 OA8 OB8 G5 B2 F6 L3 A7 M2 OC0 OD0 OE8 OF0 G8 E3 E1 A1 R821 2 R781 2 C1361 2 C1441 2 C3071 2 PP3 1 PP2 1 PP14 1 R1371 2 R1431 2 C2091 2 C1871 2 PP17 1 PP19 1 C1091 2 C501 2 C1851 2 C1051 2 C6271 2 C6051 2 R481 2 C261 2 U1 AC31 AE29 AE30 AE32 AE34 AA29 AB30 AA30 AB28 AD30 AC33 AC32 AD28 AA28 AA31 AB34 AB31 AD31 AE31 AD34 AE33 AC30 AE28 AC29 AC28 W29 W28 Y34 AA32 Y33 T34 V31 U34 U31 Y28 V34 V33 V30 U33 U29 V32 W32 W34 W31 Y30 Y31 W30 Y27 V28 U28 AA27 U27 051-9584 2.0.0 6 OF 23 6 OF 46 6 6 6 6 6 66 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 234567101112141819 2021 2 3 4 5 6 7 10 11 12 14 18 19 20 21 6 6 6 6 12 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 234567101112141819 2021 6 6 6 5 2 3 4 5 6 7 10 11 12 14 18 19 20 21
SYM 11 OF 12 VSS VSS SYM 12 OF 12 VSSVSS SYM 5 OF 12 MIPI0D_VDD18 MIPI1D_VDD18 MIPI0D_VDD10_PLL MIPI1D_VDD10_PLL MIPI0C_DPDATA1 SENSOR1_RST MIPI1D_DPCLK MIPI1D_VREG_0P4V MIPI0D_VREG_0P4V MIPI_VDD10 MIPI_VSS MIPI_VSYNC MIPI0C_DNCLK MIPI0C_DNDATA0 MIPI0C_DNDATA1 MIPI0C_DNDATA2 MIPI0C_DNDATA3 MIPI0C_DPCLK MIPI0C_DPDATA0 MIPI0C_DPDATA2 MIPI0C_DPDATA3 MIPI0D_DNCLK MIPI0D_DNDATA0 MIPI0D_DNDATA1 MIPI0D_DNDATA2 MIPI0D_DNDATA3 MIPI0D_DPCLK MIPI0D_DPDATA0 MIPI0D_DPDATA1 MIPI0D_DPDATA2 MIPI0D_DPDATA3 MIPI1C_DPDATA1 SENSOR0_CLK SENSOR0_RST SENSOR1_CLK MIPI1C_DNDATA1 MIPI1C_DPDATA0 ISP1_SDA MIPI1C_DNDATA0 MIPI1D_DNCLK MIPI1D_DPDATA1 MIPI1D_DNDATA1 MIPI1D_DPDATA0 MIPI1D_DNDATA0 ISP1_FLASH ISP1_SCL ISP0_PRE_FLASH ISP0_SCL ISP0_SDA ISP1_PRE_FLASH ISP0_FLASH MIPI1C_DPCLK MIPI1C_DNCLK LPDP_PAD_TX0P LPDP_PAD_TX0N LPDP_PAD_TX1P LPDP_PAD_TX1N LPDP_PAD_R_BIAS DAC_COMP DP_PAD_DC_TP DP_PAD_R_BIAS LPDP_HPD LPDP_PAD_AUXP LPDP_PAD_AUXN DAC_IREF DAC_VREF DAC_AVSS18D DP_PAD_AVSS_AUX DP_PAD_AVSS0 DP_PAD_AVSS1 DP_PAD_AVSSP0 DP_PAD_AVSSX DP_PAD_DVSS LPDP_PAD_AVSS0 LPDP_PAD_AVSS1 LPDP_PAD_AVSS2 DAC_AVSS18A2 DP_PAD_TX1N DP_PAD_TX1P DP_PAD_TX0N DP_PAD_TX0P DP_PAD_AUXN DP_HPD DAC_OUT1 DP_PAD_AUXP DAC_OUT2 DAC_OUT3 LPDP_PAD_LN1_AVDD LPDP_PAD_CMN_AVDD LPDP_PAD_CMN_AVDDH LPDP_PAD_LN0_AVDD DP_PAD_AVDDX DP_PAD_DVDD LPDP_PAD_AUX_AVDD DP_PAD_AVDD0 DP_PAD_AVDD1 DP_PAD_AVDDP0 DP_PAD_AVDD_AUX DAC_AVDD18D DAC_AVDD18A SYM 6 OF 12 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT LPDP NOT USED, NO CAP NEEDED ON THIS PIN (0MA LPDP) (2X65MA) (8MA) (2MA) (2MA) FF CAMERA RESET CAM1 SHUTDOWN IS ALSO MAIN CAMERA (12MA) (12MA) (11MA) (15MA) (28MA) (1MA) 01005 2200PF 6.3V 10% X5R-CERM 01005 X5R-CERM 10% 6.3V 2200PF 20% 0.1UF X5R-CERM 6.3V 01005 33.2 1/32W 01005MF 1% MF 1% 1/32W 33.2 01005 20% X5R-CERM 6.3V 0.1UF 01005 X5R-CERM 20% 0.1UF 01005 6.3V 1.00K 01005 5% MF 1/32W 01005 MF 5% 1/32W 1.00K 01005 MF 5% 1.00K 1/32W 01005 1.00K 5% 1/32W MF 6.3V 20% 0.1UF 01005 X5R-CERM 20% 0.1UF 01005 X5R-CERM 6.3V 01005 6.3V NP0-C0G 5% 56PF NP0-C0G 6.3V 01005 56PF 5% 01005 6.3V 56PF 5% NP0-C0G 5% 56PF NP0-C0G 6.3V 01005 20% 4V 4.3UF X5R-CERM 0610 H5P-SC58950C03 FCMSP FCMSP H5P-SC58950C03 H5P-SC58950C03 FCMSP FCMSP H5P-SC58950C03 SYNC_DATE=N/ASYNC_MASTER=N/A H5P VIDEO PP1V0 PP1V8 90_AP_TO_LCM_MIPI_DATA2_P AP_TO_CAM_FF_SCL PP1V8 90_CAM0_TO_AP_MIPI_CLK_P 90_CAM0_TO_AP_MIPI_CLK_N 90_AP_TO_LCM_MIPI_DATA1_N 90_AP_TO_LCM_MIPI_DATA2_N 90_CAM0_TO_AP_MIPI_DATA3_P 90_CAM0_TO_AP_MIPI_DATA2_N PP1V8 PP1V0 90_CAM0_TO_AP_MIPI_DATA1_P MIPI1D_VREG MIPI0D_VREG 90_CAM0_TO_AP_MIPI_DATA0_N 90_CAM0_TO_AP_MIPI_DATA1_N 90_CAM0_TO_AP_MIPI_DATA2_P 90_AP_TO_LCM_MIPI_CLK_N 90_AP_TO_LCM_MIPI_DATA0_N 90_AP_TO_LCM_MIPI_DATA3_N 90_AP_TO_LCM_MIPI_CLK_P 90_AP_TO_LCM_MIPI_DATA0_P 90_AP_TO_LCM_MIPI_DATA1_P AP_BI_CAM_FF_SDA CAM0_TORCH AP_TO_CAM_RF_SCL AP_BI_CAM_RF_SDA 45_AP_TO_CAM_FF_CLK 45_AP_TO_CAM_RF_CLK AP_TO_CAM_RF_SHUTDOWN 45_AP_TO_CAM_RF_CLK_R AP_TO_CAM_FF_SHUTDOWN 45_AP_TO_CAM_FF_CLK_R 90_CAM1_TO_AP_MIPI_DATA0_N 90_CAM1_TO_AP_MIPI_DATA0_P 90_CAM1_TO_AP_MIPI_CLK_N 90_CAM1_TO_AP_MIPI_CLK_P 90_CAM0_TO_AP_MIPI_DATA3_N 90_CAM0_TO_AP_MIPI_DATA0_P 90_AP_TO_LCM_MIPI_DATA3_P C6 1 2 C71 2 C1911 2 R381 2 R401 2 C531 2 C571 2 R371 2 R391 2 R411 2 R421 2 C2681 2 C58 1 2 C2591 2 C2741 2 C2801 2 C2841 2 C2661 2 U1 AL10 AL11 AL7 B24 B26 B28 B3 B33 B34 B4 B6 B8 C10 AL8 C11 C13 C14 C15 C16 C17 C18 C2 C23 C24 AL9 C25 C26 C28 C29 C3 C30 C31 C32 C4 C5 AM1 C6 C7 C8 C9 D1 D10 D11 D12 D13 D14 AM17 D15 D16 D17 D23 D24 D25 D26 D27 D28 D29 AM18 D3 D30 D31 D32 D4 D5 D6 D8 D9 E10 AM26 E11 E13 E14 E15 E16 E17 E18 E19 E2 E20 AM5 E21 E22 E24 E25 E26 E28 E3 E30 E4 E5 AM6 E6 E7 E8 E9 AM7 AL12 AN11 AN14 AN17 AN18 AN19 AN20 AN22 AN23 AN24 AN25 AL14 AN26 AN32 AN5 AN7 AN8 AP10 AP13 AP17 AP18 AP19 AL15 AP20 AP21 AP22 AP23 AP24 AP25 AP26 AP4 AP7 AR1 AL29 AR11 AR17 AR18 AR19 AR20 AR21 AR22 AR23 AR24 AR27 AL32 AR28 AR29 AT14 AT16 AT17 AT18 AT2 AT20 AT21 AT22 AL4 AT23 AT24 AT25 AT26 AT27 AT28 AT29 AT31 AT32 AT5 AL5 AT8 AU1 AU2 AU33 AU34 AU4 AV1 AV14 AV2 AV33 AL6 AV34 AV5 B1 B13 B16 B18 B19 B2 B21 B23 U1 E31 E32 F1 F10 F11 F12 F13 F14 F15 F17 F18 F21 F22 F27 F3 F30 F31 F32 F4 F6 F7 F8 F9 G1 G10 G12 G14 G16 G2 G22 M31 G31 G34 G4 G6 G8 H1 H11 H13 H17 H18 H19 H2 H20 H21 H22 H3 H30 H31 H32 H33 H4 H5 H7 H9 J27 J3 J30 J31 J32 J33 J4 J6 K1 K10 K12 K14 U30 K19 K2 K22 K24 K31 K4 K5 K8 L1 L11 L13 L15 L17 L21 L23 L25 L27 L3 L31 L4 L6 L9 M10 M12 M14 M18 M20 M22 M24 M26 M5 M8 N1 N11 N13 N17 N19 N21 N23 N25 N27 N31 N34 N4 N6 P12 P14 P16 P18 P20 P22 P24 P26 P5 P8 R11 R13 R15 R17 R19 R21 R23 R25 R27 R30 R33 R34 R4 R6 T1 T10 T12 T14 T16 T18 T22 T24 T26 T28 T29 T30 T31 T32 T5 T8 U1 U11 U13 U15 U17 U19 U21 U23 U25 U32 U4 U9 V10 V12 V14 V16 V18 V20 V22 V24 V26 V5 V8 W11 W13 W15 W17 W19 W4 W6 W9 U1 AR12 AM11 AR6 AH1 AU11 AM12 AL2 AU6 AV19 AV21 AV20 AV18 AV17 AU19 AU21 AU20 AU18 AU17 AV24 AV26 AV25 AV23 AV22 AU24 AU26 AU25 AU23 AU22 AM21 AM19 AM20 AV31 AV30 AV32 AU31 AU30 AU32 AV28 AV27 AV29 AU28 AU27 AU29 AM23 AM25 AM24 AK18 AK19 AK20 AK21 AK22 AK23 AK24 AK25 AK26 AL18 AL19 AL20 AL21 AL22 AL23 AL24 AL25 AL26 AR3 AN9 AP6 AP2 AM10 U1 N29 L30 N28 M30 P28 P29 K34 J34 H34N30 AU8 A27 A28 J23 G23 J24 G24 G25 H23 F23 H24 F24 F25 G26 J25 H25 F26 A24 A25 A21 A22 AV12 AP27 AR34 AT34 AN27 AN28 AN29 AM27 AL27 AP28 AP29 AR30 AL34 AM34 AH34 AJ34 051-9584 2.0.0 7 OF 23 7 OF 46 2712 2 3 4 5 6 7 10 11 12 14 18 19 20 21 19 11 2 3 4 5 6 7 10 11 12 14 18 19 20 21 21 21 19 19 21 21 2 3 4 5 6 7 10 11 12 14 18 19 20 212712 21 21 21 21 19 19 19 19 19 19 11 15 15 21 15 21 11 21 21 11 11 11 11 11 21 21 19
VEN VOUT GND VIN G SYM_VER_1 D S Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT VDD (3.0V) 516S1040 PLUG WIFI FLEX PAC: R970 TO VIB NET MINIMIZE DCR ON MLB ----> MIC2/3 BIAS, STROBE NTC STROBE: STROBE: VIBE DRIVE PAC SPI BUS WIFI FLEX PAC: VIBE RETURN BUTTON FLEX MIC2_P,_N BUTTONS: RINGER, HOLD, VOL_UP/DOWN 516S1041 RCPT (FLEX) MIC2 (ANC REF MIC): LED COOL (VIBE DRIVER, BUTTONS, ANC REF MIC, STROBE, STROBE_NTC) 12V-33PF 01005-1 120-OHM-210MA 01005 100PF 5% 10V NP0-C0G 01005 120-OHM-210MA 01005 120-OHM-210MA 01005 120-OHM-210MA 01005 01005 NP0-C0G 10V 100PF 5% 01005 NP0-C0G 10V 100PF 5% 5% NP0-C0G 10V 01005 100PF 01005-1 12V-33PF 01005-1 12V-33PF 12V-33PF 01005-1 27PF NP0-C0G 16V 01005 5% 100PF NP0-C0G 16V 5% 01005 M-ST-SM 105847-018 01005 5% 6.3V 56PF NP0-C0G 01005 120-OHM-210MA 120-OHM-210MA 01005 NP0-C0G 01005 56PF 6.3V 5% 0201-1 1.0UF X5R 20% 6.3V NO_XNET_CONNECTION=TRUE NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM 01005 120-OHM-210MA 56PF 6.3V 01005 5% 120-OHM-210MA 01005 01005 6.3V 56PF 5% 120-OHM-210MA 01005 6.3V 01005 5% 56PF 16V NP0-C0G 5% 100PF 01005 BAS40LP LLP-DFN1006-2 01005 1/32W MF 0% 0.00 NOSTUFF LP5907UVX-3.3V USMD NOSTUFF MF 01005 1/32W 100K NOSTUFF 5% 100PF 5% 01005 NP0-C0G 16V 1% 10K 1/32W MF 01005 DFN1006H4-3 DMN3730UFB4 56PF 6.3V 01005 NP0-C0G 5% SM 20% 6.3V 4.7UF X5R 0402 1/32W 01005 MF 0% 0.00 5% NP0-C0G 6.3V 56PF 01005 1/32W MF 0% 0.00 01005 SYNC_DATE=N/ASYNC_MASTER=N/A BUTTON FLEX B2B BUTTON_TO_AP_VOL_UP_CONN_L BB_TO_ANT_PAC_SPI_CS_BUTTON_CONN_L BB_TO_ANT_PAC_SPI_MOSI_BUTTON_CONN BB_TO_ANT_PAC_SPI_SCLK_BUTTON_CONN MIC2_TO_CODEC_P MIC2_TO_CODEC_N BUTTON_TO_AP_HOLD_KEY_CONN_L CODEC_TO_MIC2_BIAS_CONN BUTTON_TO_AP_RINGER_A_CONN BUTTON_TO_AP_VOL_DOWN_CONN_L PP_VIBE PP3V0_ALWAYS_CONN PP3V0_ALWAYS_CONN PP3V0_ALWAYS PP_STRB_DRIVER_TO_LED PGND_VIBE_RETURN PP_VIBE CODEC_TO_MIC2_BIAS_CONN CAM_RF_TO_STROBE_NTC_CONN MIC2_TO_CODEC_N MIC2_TO_CODEC_P PP_CODEC_TO_MIC2_3_BIAS PGND_VIBE_RETURN CAM_RF_TO_STROBE_NTC BUTTON_TO_AP_VOL_DOWN_L BB_TO_ANTENNA_PAC_SPI_CS_L BB_TO_ANTENNA_PAC_SPI_MOSI BB_TO_ANTENNA_PAC_SPI_SCLK BUTTON_TO_AP_VOL_UP_L BUTTON_TO_AP_RINGER_A BUTTON_TO_AP_HOLD_KEY_L PP_BATT_VCC VIB_LDO_EN VIB_PWM VIBE_PWM_G PP3V3_VIB PP3V0_VIBE DZ11 2 FL3 1 2 C314 1 2 FL7 1 2 FL8 1 2 FL46 1 2 C311 1 2 C197 1 2 C313 1 2 DZ21 2 DZ31 2 DZ71 2 C2081 2 C2411 2 J2 19 20 21 22 1 10 11 12 13 14 15 16 17 18 2 3 4 5 6 7 8 9 C244 1 2 FL47 1 2 FL21 12 C451 2 C2161 2 XW41 1 2 FL70 1 2 C384 1 2 FL71 1 2 C3831 2 FL72 1 2 C382 1 2 C120 1 2 D3 A K R70 1 2 U70 B2 B1 A1 A2 R691 2 C1201 1 2 R94011 2 Q7 3 1 2 C3971 2 XW80 1 2 C1181 2 R970 1 2 C6971 2 R977 1 2 051-9584 2.0.0 8 OF 23 8 OF 46 8922 89 8 8 8 8 1216 15 8 8 8 8 9 8 9 22 10 11 8 15 313 23 23 23 313 313 3 12152223 3 3 12
AIN1- AIN2+ AIN2- AIN6+ AIN6- DMIC2_SCLK DMIC2_SD DMIC1_SD DMIC1_SCLK AIN8+ AIN7- AIN7+ AIN5- AIN4+ AIN1+ LINEOUT_REF AOUT2- AOUT2+ AOUT1- AOUT1+ AIN8- AIN5+ AIN4- AIN3- AIN3+ LINEOUTB LINEOUTA HPOUTA HPOUTB HS3 HS4 HS3_REF HS4_REF HPDETECT DN DP MBUS_REF SYM 1 OF 3 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 15OHM FOR TRISTAR, 20OHM FOR TRISTAR2 R102, R103 VALUE CONTROLLED VIA BOMOPTION MIKEY TO TRISTAR MIC IN ANALOG N/C,INTERNAL WEAK BIAS TO VCM HEADPHONE ANC N/C,INTERNAL WEAK BIAS TO VCM REF MIC1 N/C,INTERNAL WEAK BIAS TO VCM 50PF LIMIT ON AOUTX PINS WHICH INPUT FOR WHICH MIC, ETC. (ANALOG MIC IN, DIG MIC IN, HPOUT, LINEOUT, RECEIVER OUT, MIKEYBUS) AUDIO I/O LINEIN LINEIN ANC REF MIC2 ANC ANALOG ERROR MIC PRIMARY ANALOG MIC HEADPHONES ANC ERROR MIC ANC REF MIC HEADPHONE MIC VOICE MIC L67 AUDIO CODEC TO DO: REVIEW AUDIO MIC PATHS, WHICH BIAS OUTPUT USED FOR WHICH MIC, (VOICE) MIC NP0-C0G 56PF 01005 6.3V 5% 20% X5R 4V 01005 0.1UF 01005 56PF NP0-C0G 6.3V 5% 01005 X5R 4V 20% 0.1UF 20% 0.1UF 01005 X5R 4V 6.3V 5% NP0-C0G 01005 56PF 6.3V 5% 01005 NP0-C0G 56PF 4V 0.1UF 20% X5R 01005 01005 0.1UF 20% 4V X5R NP0-C0G 01005 6.3V 5% 56PF56PF 6.3V 01005 NP0-C0G 5% X5R 01005 0.1UF 20% 4V 10% 01005 X5R 6.3V 0.01UF 01005 0.01UF 10% 6.3V X5R 6.3V 01005 5% NP0-C0G 56PF 20% 01005 0.1UF 4V X5R 01005 NP0-C0G 6.3V 5% 56PF 20% X5R 4V 0.1UF 01005 01005 6.3V 5% 56PF NP0-C0GNP0-C0G 01005 5% 56PF 6.3V 5% NP0-C0G 01005 10V 100PF 100PF 10V 01005 NP0-C0G 5% NOSTUFF 01005 MF5% 15.0 1/32W OMIT_TABLE 1/32W 5% MF 01005 15.0 OMIT_TABLE 01005 10V NP0-C0G 5% 100PF 01005 0.01UF 10% 6.3V X5R WLCSP CS42L67-CWZR-A0 SYNC_DATE=N/ASYNC_MASTER=N/A L67 AUDIO CODEC (1/2) CODEC_TO_HPHONE_HS4 90_CODEC_BI_TRISTAR_MIKEYBUS_P RCVR_TO_CODEC_RCVR_TEST_L67 HPHONE_TO_CODEC_DET CODEC_TO_HPHONE_HS3 EXTMIC_TO_CODEC_L67_N CODEC_TO_HPHONE_HS4_REF CODEC_TO_HPHONE_HS3_REF 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_N 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_P 90_CODEC_BI_TRISTAR_MIKEYBUS_N HAC_TO_CODEC_TEST_L67 EXTMIC_TO_CODEC_L67_P MIC3_TO_CODEC_L67_P MIC3_TO_CODEC_L67_N HPHONE_TO_CODEC_HPHONE_TEST_L67 MIC2_TO_CODEC_L67_P MIC2_TO_CODEC_L67_N MIC1_TO_CODEC_P HAC_TO_CODEC_TEST HPHONE_TO_CODEC_HPHONE_TEST RCVR_TO_CODEC_RCVR_TEST MIC1_TO_CODEC_N MIC2_TO_CODEC_N EXTMIC_TO_CODEC_N EXTMIC_TO_CODEC_P MIC3_TO_CODEC_N CODEC_TO_HPHONE_R CODEC_TO_RCVR_P CODEC_TO_HAC_P CODEC_TO_HAC_N MIC1_TO_CODEC_L67_N CODEC_TO_HPHONE_L CODEC_TO_RCVR_N MIC2_TO_CODEC_P MIC3_TO_CODEC_P MIC1_TO_CODEC_L67_P C2301 2 C222 1 2 C2271 2 C224 1 2 C223 1 2 C2311 2 C2281 2 C225 1 2 C55 1 2 C651 2 C641 2 C61 1 2 C354 1 2 C356 1 2 C2291 2 C220 1 2 C2261 2 C221 1 2 C236 1 2 C235 1 2 C138 1 2 C511 2 R102 1 2 R103 1 2 C143 1 2 C362 1 2 U21 G1 G2 F3 F4 F1 F2 E3 E4 E2 E1 D2 D1 D4 D3 C2 C1 L7 K7 K5 L5 B6 A6 A2 A3 G10 F10 G8 J9 K9 K1 L9 L2 L8 K8 J8 H8 F11 051-9584 2.0.0 9 OF 23 9 OF 46 17 16 17 17 17 17 16 1722 11 17 11 17 8 17 17 11 17 11 11 11 17 11 822 1122
MIC3_BIAS MIC2_BIAS_FILT_IN MIC2_BIAS_FILT FLYP VD FLYC MIC1_BIAS MIC2_BIAS_IN MIC2_BIAS VCP MIC1_BIAS_FILT MIC3_BIAS_FILT MIC4_BIAS_FILT MIC4_BIAS GNDHS0 GNDHS1 GNDD VA VPROG_CP VL VP +VCP_FILT GNDCP0 GNDCP1 -VCP_FILT GNDP SPEAKER_VQ FILT+ FILT- GNDA FLYN SYM 2 OF 3 XSP_LRCK/FSYNC XSP_SDIN/DAC2B_MUTE WAKE* MCLK ASP_LRCK ASP_SDIN ASP_SDOUT VSP_SCLK VSP_SDOUT VSP_LRCK/FSYNC GND INT* CDOUT CDIN CS* VSP_SDIN ASP_SCLK XSP_SCLK TSTI TSTO RESET* CCLK XSP_SDOUT SYM 3 OF 3 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT KEEP THESE CAPS AT CODEC PINS DIGITAL SYSTEM I/OPOWER, MICBIAS L67 AUDIO CODEC KEEP THIS CAP AT CODEC PINS TSTO MUST BE NC KEEP THIS CAP AT CODEC PINS KEEP THESE CAPS AT CODEC PINS PCB: C421 AT U21.L6 KEEP THESE CAPS AT CODEC PINS X5R 20% 0.1UF 01005 4V 0.1UF 4V 20% X5R 01005 0402-1 CERM-X5R 6.3V 20% 10UF OMIT_TABLE 10% 6.3V X5R 0.1UF 201 X5R-CERM1 4.7UF 20% 6.3V 402 0.1UF 10% 6.3V X5R 201 CERM-X5R 20% 0402-1 6.3V 10UF X5R 6.3V 1.0UF 20% 0201-1 01005 1% 1/32W 2.21K MF 20% 4.7UF 6.3V 402 X5R-CERM1 5% MF 01005 1/32W 1.00K 402 4.7UF X5R-CERM1 6.3V 20% 402 20% 4.7UF 6.3V X5R-CERM1 6.3V X5R 1.0UF 20% 0201-1 CERM-X5R 0402-1 6.3V 20% 10UF 20% 6.3V 402 4.7UF X5R-CERM1 6.3V 4.7UF 402 X5R-CERM1 20% 6.3V X5R-CERM1 402 20% 4.7UF 402 4.7UF 6.3V 20% X5R-CERM1 SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM WLCSP CS42L67-CWZR-A0 WLCSP CS42L67-CWZR-A0 120-OHM-210MA 01005 SYNC_DATE=N/ASYNC_MASTER=N/A L67 AUDIO CODEC (2/2) PP_EXTMIC_BIAS_FILT_IN PP_EXTMIC_BIAS PP1V7_VA_L67 PP1V8_SDRAM PP_CODEC_VCPFILT- PP_CODEC_SPKR_VQ PP_CODEC_FILT+ PP1V8 PGND_MIC2_3_TO_CODEC_RET_FILT PP_CODEC_VHP_FLYC PP_CODEC_VCPFILT+ AP_TO_CODEC_SPI3_MOSI PP_EXTMIC_BIAS_FILT PP_CODEC_TO_MIC1_BIAS PP_CODEC_TO_MIC2_3_BIAS PP_VCC_MAIN PP_EXTMIC_BIAS_IN PP_CODEC_VHP_FLYN PP_CODEC_VHP_FLYP CODEC_TO_AP_XSP_I2S2_DIN AP_TO_CODEC_SPI3_CLK CODEC_RESET_L 45_AP_TO_CODEC_XSP_I2S2_BCLK 45_AP_TO_CODEC_ASP_I2S0_BCLK AP_TO_CODEC_VSP_I2S4_DOUT AP_TO_CODEC_SPI3_CS_L CODEC_TO_AP_SPI3_MISO CODEC_TO_AP_INT_L AP_TO_CODEC_VSP_I2S4_LRCLK CODEC_TO_AP_VSP_I2S4_DIN 45_AP_TO_CODEC_VSP_I2S4_BCLK CODEC_TO_AP_ASP_I2S0_DIN AP_TO_CODEC_ASP_I2S0_DOUT AP_TO_CODEC_ASP_I2S0_LRCLK 45_AP_TO_CODEC_I2S_MCLK CODEC_TO_PMU_MIKEY_INT_L AP_TO_CODEC_XSP_I2S2_DOUT AP_TO_CODEC_XSP_I2S2_LRCLK PGND_CODEC_GNDCP PGND_MIC1_TO_CODEC_RET_FILT PP_VCC_MAIN_CODEC PP1V8_SDRAM C4221 2 C4211 2 C4201 2 C4131 2 C4161 2 C2341 2 C4141 2 C4121 2 R1001 2 C2381 2 R1451 2 C218 12 C219 12 C2371 2 C424 1 2 C2321 2 C2331 2 C4291 2 C4251 2 XW43 1 2 XW48 1 2 U21 H2 H1 G9 H10 J10 H9 J11 J2 K10 L11 A10 L1 K2 K6 L10 J5 J6 L3 K3 K4 L4 H7 G6 H6 H5 K11 J7 J1 G11 A11 B10 B9 L6 H11 U21 B11 C10 C9 A8 B4 B3 A4 B5 A1 C5 F6 F7 F8 G7 H3 H4 J3 J4 B1 F9 D5 D7 E5 E6 E7 F5 G4 A9 G3 D8 D9 B2 C3 C4 C11 E10 E11 A5 C6 C8 D6 E8 E9 D10 D11 G5 B7 B8 C7 A7 FL96 12 051-9584 2.0.0 10 OF 23 10 OF 46 34101213141623 234567111214181920 21 3 17 811 12131423 315 3 315 3 3 3 3 3 3 3 3 3 3 3 3 13 315 315 34 1012 13 1416 23
SYM_VER-2 G SYM_VER_1 D S SYM_VER-2 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT FRONT CAM: POWER AND MIPI NOTE: J1.30 IS GND ON POR BOARDS, J1.30 IS ALS_INT FROM FF CAM FOR SPECIAL CONFIG OF PROTO2 (CONTROLLED VIA BOMOPTION) 516S0986 RCPT FCAM ANALOG GROUND NOTE: MIC3_TO_CODEC_N NOTE: MIC3_TO_CODEC_P CG FLEX B2B MIPI GROUND MIPI GROUND MIPI GROUND CLK, I2C, SHDN PCB: PLACE THESE AT J1 CONN THIS ON ONE MLB ---> 516S0987 PLUG (FF CAM, PROX, ALS, RECEIVER, ANC ERROR MIC) (ANC ERROR MIC) CAM1 ALS INT PROX: PWR, TX EN RX, RX_EN PROX: POWER, -21.4 DB SIGNAL OF HAC VPP I2C, INT 5 MA 0.25 MA ALS: POWER, HAC RECEIVER 50 MA NOTE: IRLED_A SPECIAL Z = 0.60 MM MAX IRLED = 104-128MA MIC3 PROX GROUND -21.4 DB SIGNAL OF RCVR VPP FRONT CAM: PROX_RX SIGNAL MUST BE TREATED WITH CARE 1/32W MF 01005 1% 10K 01005-1 70-OHM-300MA 120-OHM-25%-250MA-0.5DCR 01005 01005 120-OHM-25%-250MA-0.5DCR NO_XNET_CONNECTION=TRUE 01005-1 70-OHM-300MA F-ST-SM AA22L-S034VA1 X5R 6.3V 603 20% 4.7UF OMIT_TABLE 5% NP0-C0G 6.3V 01005 56PF 6.3V 56PF 5% NP0-C0G 01005 120-OHM-210MA 01005 1/20W 201 11.5 1% MF 01005 0.1UF 20% 4V X5R 01005 5% 6.3V NP0-C0G 56PF 01005 NP0-C0G 6.3V 5% 56PF 1.00M 5% 1/32W MF 01005 TCM0605-1 90-OHM-50MA DFN1006H4-3 DMN3730UFB4 56PF 6.3V 01005 NP0-C0G 5% 120-OHM-210MA 01005 12V-33PF 01005-1 56PF 5% 6.3V 01005 NP0-C0G 5% 6.3V 01005 NP0-C0G 56PF 120-OHM-25%-250MA-0.5DCR 01005 01005 120-OHM-25%-250MA-0.5DCR 120-OHM-25%-250MA-0.5DCR 01005 NP0-C0G 01005 5% 6.3V 56PF 01005 56PF 5% 6.3V NP0-C0G 56PF 6.3V 01005 NP0-C0G 5% NP0-C0G 6.3V 5% 56PF 01005 01005 6.3V NP0-C0G 5% 56PF NP0-C0G 6.3V 5% 56PF 01005 TCM0605-1 90-OHM-50MA 56PF 01005 5% 6.3V NP0-C0G 6.3V 01005 56PF 5% NP0-C0G 01005 120-OHM-25%-250MA-0.5DCR 1.0UF 6.3V 20% X5R 0201-1 1/32W 0% 0.00 01005 MF 01005 120-OHM-210MA 01005 120-OHM-210MA 120-OHM-210MA 01005 01005-1 12V-33PF 56PF 6.3V 5% 01005 NP0-C0G 0.1UF X5R 20% 01005 4V 70-OHM-300MA 01005-1 15.8K 1% MF 1/32W 01005 01005-1 70-OHM-300MA 12V-33PF 01005-1 12V-33PF 01005-1 01005-1 70-OHM-300MA 01005-1 70-OHM-300MA 01005 0.1UF X5R 4V 20% 10K 1% MF 01005 1/32W 15.8K MF 1% 1/32W 01005 0402 20% X5R 4.7UF 6.3V SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE 1UF 6.3V 20% X5R 0201 FF_ALS_INT 01005 0.00 1/32W 0% MF 0.00 MF NO_FF_ALS_INT 0% 1/32W 01005 SYNC_MASTER=N/A SYNC_DATE=N/A CG FLEX B2B 90_CAM1_TO_AP_MIPI_CLK_CONN_N 90_CAM1_TO_AP_MIPI_CLK_CONN_P 90_CAM1_TO_AP_MIPI_DATA0_CONN_N 90_CAM1_TO_AP_MIPI_DATA0_CONN_P PP2V8_CAM_AVDD PP3V0_PROX_IRLED FCAM_TO_AP_ALS_INT_L CUMULUS_TO_PROX_TX_EN_BUFF PP2V8_FCAM_CONN PP1V8_FCAM_CONN CODEC_TO_RCVR_CONN_P CODEC_TO_HAC_CONN_P CODEC_TO_HAC_CONN_N AP_TO_I2C2_SCL_ALS_CONN ALS_TO_AP_INT_CONN_L PP3V0_ALS AP_BI_I2C2_SDA_ALS_CONN CUMULUS_TO_PROX_RX_EN_1V8_CONN 45_PROX_TO_CUMULUS_RX_CONN AP_BI_CAM_FF_SDA_CONN 45_AP_TO_CAM_FF_CLK_CONN AP_TO_CAM_FF_SCL_CONN AP_BI_I2C2_SDA CODEC_TO_RCVR_CONN_N AP_TO_CAM_FF_SHUTDOWN AP_TO_CAM_FF_SHUTDOWN_CONN PP3V0_PROX_ALS PP3V0_PROX_ALS ALS_TO_AP_INT_L CUMULUS_TO_PROX_RX_EN_1V8 45_AP_TO_CAM_FF_CLK PGND_IRLED_DRAIN AP_TO_I2C2_SCL AP_BI_CAM_FF_SDA RCVR_TO_CODEC_RCVR_TEST CODEC_TO_HAC_N HAC_TO_CODEC_TEST CODEC_TO_HAC_P CODEC_TO_RCVR_P CODEC_TO_RCVR_N 90_CAM1_TO_AP_MIPI_DATA0_P AP_TO_CAM_FF_SCL 45_PROX_TO_CUMULUS_RX 90_CAM1_TO_AP_MIPI_DATA0_N PP3V0_PROX MIC3_TO_CODEC_P MIC3_TO_CODEC_N PP_CODEC_TO_MIC3_BIAS_CONN FCAM_TO_AP_ALS_INT_CONN_L PGND_IRLED_K PP_CODEC_TO_MIC2_3_BIAS 90_CAM1_TO_AP_MIPI_CLK_N 90_CAM1_TO_AP_MIPI_CLK_P PP1V8 R31 2 FL57 1 2 L35 1 2 3 4 L39 1 2 3 4 C441 2 C402 1 2 C410 1 2 R451 2 C407 1 2 C671 2 C200 1 2 R851 2 Q1 3 1 2 C2531 2 FL48 1 2 DZ161 2 C1981 2 C1921 2 FL13 1 2 FL15 1 2 FL12 1 2 C2021 2 C1961 2 C621 2 C63 1 2 C2011 2 C2111 2 C2121 2 C2101 2 FL14 1 2 C194 1 2 R125 12 FL58 12 FL2 1 2 FL20 1 2 DZ171 2 C1991 2 C561 2 FL51 12 R91 2 FL52 12 DZ181 2 DZ191 2 FL65 1 2 FL64 1 2 R941 2 R951 2 C2561 2 XW42 1 2 C3801 2 R133 1 2 R132 1 2 FL44 12 FL45 12 FL4 1 2 FL23 1 2 J1 35 36 37 38 39 40 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 4 5 6 7 8 9 C1931 2 051-9584 2.0.0 11 OF 23 11 OF 46 12 21 12 3 18 3 7 1112 1112 3 18 7 3 7 9 9 9 9 9 9 7 7 18 7 9 22 9 8 10 7 7 2 3 4 5 6 7 10 12 14 18 19 20 21
S G D G S D G S D GND VOUT ON VIN CPUA_EN VDD_BUCK2R BUCK2_LXM VDD_BUCK2LM VDD_BUCK4 BUCK0A_LXM VDD_BUCK0A BUCK0A_LXL BUCK0B_LXM VDD_BUCK0B VDD_BUCK0C CPUB_EN VBAT ACT_DIO BUCK0A_FB IBAT BUCK3_FB VCC_MAIN VDD_BUCK3 CHG_LX BUCK3_LX VCENTER CPUB_SW_OUT VCC_MAIN_S VBUCK3_SW VBUS TCAL CPUA_SW_OUT VPUMP TDEV4 TBAT VBUCK4_SW XTAL2 VDD_LDO5 XTAL1 TDEV2 VLDO1 VDD_LDO2 VDD_LDO9 VDD_LDO12 VDD_LDO11 VDD_LDO10 VLDO4 VLDO7 ON_BUF VLDO3 VLDO8 VIB_PWM_EN VLDO5 TDEV1 TDEV3 VDD_LDO1_6 VLDO6 VLDO2 VLDO9 VLDO12 VLDO11 VLDO10 VDD_LDO4_7 VDD_LDO16 VLDO16 VDD_VIB VIB VDD_LDO3_8 WDIG_SW CPU1V2_SW BUCK4_FB BUCK4_LXM BUCK4_LXL CPU1V8_SW BUCK0C_FB BUCK2_FB BUCK2_LXR BUCK2_LXL BUCK0C_LX BUCK0B_FB BUCK0B_LXL CPUB_SW_S CPUA_SW_S (1 OF 3) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT NOTE: ROUTE TRACES BETWEEN LDO AND CAP TO ALLOW 0.050 OHM ESR TBD: VALUE MUST BE TUNED H5P NTC PLACE CLOSE TO PMU NOTE: PLACE C987 UNDERNEATH C270 SAMEPOLARITY THIS XW LINK AT PMU AREA RADIO PA NTC 100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU PLACE CLOSE TO PMU SAMEPOLARITY TO SOC 19-25 MILLIOHM PLACE CLOSE TO PMUPLACE CLOSE TO PMUPLACE CLOSE TO PMU SAMEPOLARITY CAMERA NTCFOREHEAD NTC CALIBRATION L11-L13 POLARITY ALL SAME 01005 18PF 16V CERM 2% 2012-1 32.768K-20PPM-12.5PF 18PF CERM 2% 16V 01005 0.01UF 201 10% X5R 10V 1UF 25V 10% 0402 X5R 20% 6.3V X5R-CERM1 402 4.7UF 15UF 4V 20% X5R 0402 0402 15UF 4V X5R 20% 20% 0.1UF 6.3V X5R-CERM 01005 0201-1 X5R-CERM 20% 10V 1.0UF 20% 6.3V CERM-X5R 0402-1 10UF OMIT_TABLE 20% 1.0UF 6.3V X5R 0201-1 10UF 6.3V 20% 0402-1 CERM-X5R OMIT_TABLE 6.3V 10UF 20% CERM-X5R 0402-1 OMIT_TABLE CERM-X5R 0402-1 6.3V 10UF 20% OMIT_TABLE 20% 6.3V 0402-1 OMIT_TABLE 10UF CERM-X5R 6.3V 20% CERM-X5R 0402-1 10UF OMIT_TABLE 0402-1 CERM-X5R 20% 6.3V 10UF OMIT_TABLE 0402-1 6.3V 20% 10UF CERM-X5R OMIT_TABLE 6.3V 0402-1 20% CERM-X5R 10UF OMIT_TABLE NO_XNET_CONNECTION=TRUE 0201 10KOHM-1%-0.31MA I382 10KOHM-1%-0.31MA NO_XNET_CONNECTION=TRUE 0201 I390 NO_XNET_CONNECTION=TRUE 0201 10KOHM-1%-0.31MA I394 MF 3.92K 0.1% 1/20W 0201 16V 5% NP0-C0G 01005 100PF 16V 01005 NP0-C0G 5% 100PF BGA CSD68803W15 15UF 4V X5R 20% 0402 0402 15UF 4V X5R 20% 0201-1 20% 10V X5R-CERM 1.0UF CSD58874W1015 BGA BGA CSD58874W1015 CERM-X5R 0402-1 10UF 6.3V 20% 0402 X5R 15UF 4V 20% X5R-CERM1 4.7UF 402 6.3V 20% SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM NO_XNET_CONNECTIO=TRUE SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM 01005 0.01UF 10% 6.3V X5R NOSTUFF 01005 0.01UF 10% 6.3V NOSTUFF X5R NOSTUFF 6.3V X5R 10% 0.01UF 01005 TFA201610G-SM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM 1.5UH-20%-2A-0.142OHM TFA201610G-SM TFA201610G-SM 1.5UH-20%-2A-0.142OHM TFA201610G-SM 1.5UH-20%-2A-0.142OHM 1.5UH-20%-2A-0.142OHM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM 20% 15UF 0402 4V X5R 15UF 0402 4V 20% X5RX5R 15UF 0402 4V 20% 10UF 6.3V 20% CERM-X5R 0402-10402-1 10UF 20% 6.3V CERM-X5R 10UF 0402-1 CERM-X5R 6.3V 20% 0402-1 6.3V CERM-X5R 20% 10UF 0402-1 10UF 6.3V 20% CERM-X5R 0402-1 CERM-X5R 6.3V 20% 10UF MF 1/32W 01005 68.1K 1% NOSTUFF 201 10% X5R 6.3V 0.1UF 201 NOSTUFF 0.1UF X5R 10% 6.3V 0402 15UF 4V X5R 20% 15UF X5R 0402 4V 20% 0402 15UF 4V X5R 20% 0402 15UF 4V X5R 20% X5R 20% 15UF 4V 0402 15UF 0402 4V X5R 20% 0402-1 CERM-X5R 6.3V 20% 10UF OMIT_TABLE 20% 6.3V 0402-1 CERM-X5R 10UF OMIT_TABLE 20% X5R 4V 0402 15UF 15UF 0402 4V X5R 20% SM SOD523 PMEG3010EB/S500 100PF NO_XNET_CONNECTION=TRUE 5% 16V NP0-C0G 01005 NO_XNET_CONNECTION=TRUE NP0-C0G 5% 100PF 16V 01005 NO_XNET_CONNECTION=TRUE 5% 100PF 16V NP0-C0G 01005 CSP TPS22924X SHORT-10L-0.1MM-SM 5% 100PF NO_XNET_CONNECTION=TRUE 16V NP0-C0G 01005 NO_XNET_CONNECTION=TRUE 0201 10KOHM-1%-0.31MA I649 10UF 20% 6.3V 0402-1 CERM-X5R 0201 56PF 25V 5% NP0-C0G-CERM 10.2 MF 1/32W 1% 01005 15UF 0402 4V X5R 20% 20% X5R 4V 0402 15UF 20% X5R 4V 0402 15UF 20% X5R 4V 0402 15UF CERM 0402 6.3V 20% 10UF OMIT_TABLE 0402 6.3V CERM 20% 10UF OMIT_TABLE 6.3V CERM 20% 10UF 0402 OMIT_TABLE 0402 6.3V CERM 20% 10UF OMIT_TABLE 10UF 20% 6.3V CERM 0402 OMIT_TABLE 0402 20% 6.3V CERM 10UF OMIT_TABLE 10UF 6.3V 0402 20% CERM OMIT_TABLE 10UF 20% 6.3V CERM 0402 OMIT_TABLE 10UF 20% 6.3V CERM 0402 OMIT_TABLE 0402 10UF 20% CERM 6.3V OMIT_TABLE 6.3V 20% 10UF CERM 0402 OMIT_TABLE 01005 NP0-C0G 56PF 6.3V 5% 01005 NP0-C0G 16V 5% 100PF 5% 16V 01005 NP0-C0G 100PF56PF 01005 5% 6.3V NP0-C0G 20% 6.3V X5R 1.0UF 0201-1 D2013B28HGAHVCC2 BGA 6.3V 10UF 20% 0402-1 CERM-X5R AGATHA PMU(1/2) SYNC_DATE=N/ASYNC_MASTER=N/A VCENTER PP5V0_USB_PROT ACT_DIO BATTERY_TO_PMU_SENSE PP_BATT_VCC BUCK0A_LXL PP_VCC_MAIN USB_VBUS_DETECT PP1V7_VA_L20 PP2V5_CAM0_AF PP3V0_ACC BUCK4_FB PP3V0_ALWAYS PP3V0_VIBE PP1V2_SDRAM PP1V0 PP3V0_PROX_IRLED BATTERY_TO_PMU_NTC CPU0_SW_S BUCK0C_FB NTC_H5P_P CPU0_SWITCH BUCK2_LXM BUCK0A_LXM BUCK0B_LXM CPU1_SWITCH BUCK0A_FB BUCK3_FB VSW_CHG BUCK3_LX CPU1_SW_CONTROL TCAL CPU0_SW_CONTROL VPUMP NTC_H5P_P OSC32O OSC32I NTC_CAM_P PP1V8_SDRAM PP3V0_IMU PP1V8_ALWAYS PP3V3_USB PP3V0_PROX_ALS PP3V0_NAND NTC_FOREHEAD_P NTC_PA_P PP2V8_CAM_AVDD PP1V0_SRAM PP1V8_GRAPE PP1V2 BUCK4_LXM BUCK4_LXL PP1V8 BUCK2_FB BUCK2_LXR BUCK2_LXL BUCK0C_LX BUCK0B_FB BUCK0B_LXL CPU1_SW_S VCENTER PP1V1_CPU0_FET PGND_CAM0_AF_RET NTC_PA_P NTC_FOREHEAD_N NTC_CAM_N NTC_CAM_P PP1V8_SDRAM PP1V8 RESET_1V8_L NTC_PA_N PP1V1_CPU0 PP1V1_CPU1 NTC_H5P_N NTC_FOREHEAD_P PP1V1_CPU1_FET PP2V5_CAM0_AF_COMP PP1V1_CPUB PP1V1_SOC PP_VCC_MAIN PP1V8_SDRAM PP1V2_SDRAM PP_VCC_MAIN C260 1 2 C16 1 2 C251 1 2 Y2 1 2 C2631 2 C248 1 2 C2771 2 C2711 2 C2951 2 C2671 2 C2581 2 C2451 2 C2171 2 C1901 2 C2041 2 C2391 2 C2461 2 C2431 2 C2051 2 C1951 2 C2471 2 R57 1 2 R110 1 2R108 1 2 R541 2 C207 1 2 C2551 2 Q5 A2 B1 B2 C1 A1 A3 B3 C2 C3 C2761 2 C3021 2 C2611 2 Q3 A1 B1 C1 A2 B2 C2 Q4 A1 B1 C1 A2 B2 C2 C3191 2 C2881 2 C171 2 XW10 12 XW16 12 XW15 12 XW17 12 XW20 1 2 XW6 1 2 XW8 1 2 XW9 1 2 C289 1 2 C269 1 2 C2831 2 L26 1 2 L24 12 L25 12 L11 1 2 L12 12 L13 12 L18 12 L23 12 L14 12 L15 12 L16 12 L17 12 C2921 2 C2901 2 C2851 2 C3081 2 C3031 2 C3101 2 C2961 2 C3171 2 C3161 2 R55 1 2 C2721 2 C2701 2 C2781 2 C2811 2 C3051 2 C3121 2 C2821 2 C3181 2 C1891 2 C2031 2 C2731 2 C3011 2 XW14 1 2 D4 A K C159 1 2 C167 1 2 C168 1 2 U11 C1 C2 A2 B2 A1 B1 XW11 1 2 C322 1 2 R90 1 2 C291 1 2 C4441 2 R56 1 2 C3911 2 C3891 2 C3851 2 C3791 2 C741 2 C921 2 C2501 2 C2651 2 C2931 2 C2941 2 C2571 2 C2991 2 C2621 2 C2641 2 C3781 2 C6861 2 C687 1 2 C689 1 2 C6881 2 C9871 2 U7 C2 D21 A14 A12 C22 A18 A16 C21 A20 D2 A6 A4 A2 E22 H22 D1 A10 A8 H1 H2 M22 L22 B19 L19 N21 A22 J19 K19 E1 E2 P17 M4 L4 Q1 P2 Q2 M2 C1 K22 M21 L1 L2 F1 F2 K1 J1 J2 A13 A17 A21 A5 A1 G22 A9 P8 P7 P6 Q12 Q3 P4 Q19 Q10 N22 P5 Q17 Q18 P20 P3 Q9 Q8 Q7 Q13 Q5 P18 P9 P22 Q4 P10 P19 Q6 L21 K21 P1 N1 051-9584 2.0.0 12 OF 23 12 OF 46 12 17 22 8152223 1012131423 2 15 21 16 8 16 8 412 2 7 11 1722 5 12 2 2 12 12 34101213141623 20 3 2 11 6 12 12 11 21 5 18 2 4 2 3 4 5 6 7 10 11 12 14 18 19 20 21 5 5 12 21 1212 34101213141623 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2131416192223 5 5 12 21 5 5 1012131423 3 4 10 12 13 14 16 23 4 12 1012131423
NC (3 OF 3) VSS_BUCK0AB VSS VSS_BUCK2 VSS_BUCK3 VSS_BUCK24 VSS_BUCK40 VSSA_BUCK2 VSSA_BUCK3 VSSA_BUCK40 VSS_WLED VSS_LCM VSS_BUCK0BC VSS VSS_SW_CHG VSS_REF (2 OF 3) VREF DPHP AMUX_A3 AMUX_A2 AMUX_A1 AMUX_A0 AMUX_B7 AMUX_BY GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 BUTTON1 BUTTON2 BUTTON3 GPIO10 GPIO11 GPIO12 LCM2_EN ACC_DET VDD_REF AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B2 AMUX_B3 AMUX_B0 AMUX_B1 SHDN ADC_REF VDD_RTC SCL KEEPACT AMUX_AY AMUX_A7 AMUX_A6 SDA AMUX_A5 AMUX_A4 ADC_IN7 BRICK_ID DWI_DO DWI_DI DWI_CK FW_DPHP_DET VLCM3 VBOOST_LCM VLCM1 WLED1 IREF VLCM2 WLED2 LCM_LX WLED_LX ACC_ID VOUT_LED IRQ* RESET* RESET_IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT EMC REVIEW REQUESTS THIS GO TO 1K ACTIVE HIGH GPIO11 I2C ADDRESS: 1110100X ACCESS POINTS VCC_MAIN OUPUT ’0’ PP1V8_SDRAM OUPUT ’0’ INPUT, W/O PD PP1V8_SDRAM OUPUT ’0’ PP1V8_SDRAM OUPUT ’0’ INPUT, W/ PU IN BATTERY PCM INPUT, W/ PD IN PMU INPUT, W/ PD IN PMU OPEN DRAIN OUTPUT ACTIVE HIGH INPUT W/ INTERNAL 200K PD OPEN DRAIN OUTPUT INPUT, W/ PU TO PP1V8_SDRAM GPIO3 GPIO5 GPIO6 GPIO7 GPIO2 GPIO4 GPIO1 GPIO12 GPIO10 GPIO9 GPIO8 PP1V8_SDRAM OUPUT ’0’ PP1V8_SDRAM OUTPUT ’0’ RESET* IRQ* PP1V8_SDRAM OUTPUT ’0’ RESET_IN FROM H5P 1.8V ---> BASEBAND ---> 1.8V ---> 1.8V ---> BASEBAND ---> FROM TRISTAR AMUX VOLTAGE LIMIT IS APPROX. = VDD_REF = PP_VCC_MAIN 1.8V ---> 1.8V ---> 1.8V ---> 1.8V ---> 3.33V ---> DRIVEN TO VCC_MAIN ------------> 01005 1.00K 5% MF 1/32W 5% 010051/32W MF 10K 1/32W 10K 5% MF 01005 1/20W 1% MF 200K 201 6.3V X5R10% 201 0.1UF 0201-16.3V 20% 1.0UF X5R 0.1UF X5R10% 2016.3V 0.01UF 01005 X5R 6.3V 10% 01005 1/32W MF 5% 220K SM SM SM 74LVC1G32 SOT891 MF 1/32W 01005 100K 5% 5% 01005 1.00M MF 1/32W 0% 0.00 1/32W MF 01005 1%MF 1/32W 6.34K 01005 0.01UF 6.3V 01005 X5R 10% D2013B28HGAHVCC2 BGA D2013B28HGAHVCC2 BGA NP0-C0G 10V 5% 100PF 01005 0.00 NOSTUFF 0% 1/32W MF 01005 SYNC_MASTER=N/A SYNC_DATE=N/A AGATHA PMU(2/2) E75_TO_PMU_ACC_DETECT PMU_RESET_IN 45_AP_TO_PMU_DWI_DI PMU_DWI_CLK AP_BI_I2C0_SDA PMU_TO_BT_REG_ON PMU_TO_BB_RST_L TRISTAR_TO_PMU_USB_BRICKID WDOG PMU_TO_WLAN_REG_ON 45_AP_TO_PMU_DWI_CLK 45_AP_TO_PMU_DWI_DO RESET_1V8_L PMU_TO_AP_IRQ_L IREF PMU_DWI_DI BUTTON_TO_AP_VOL_DOWN_L TRISTAR_TO_PMU_USB_BRICKID_R AP_TO_I2C0_SCL RADIO_TO_PMU_ADC_SMPS1_MSMC_1V05 TRISTAR_TO_PMU_MIKEYBUS_TEST_NEG 45_PMU_TO_WLAN_CLK32K PMU_TO_BB_VBUS_DET WIFI_REG_ON_R BT_TO_PMU_HOST_WAKE BUTTON_TO_AP_MENU_KEY_BUFF_L BT_REG_ON_R CODEC_TO_PMU_MIKEY_INT_L WLAN_TO_PMU_HOST_WAKE AP_BI_BATTERY_SWI TRISTAR_TO_AP_INT BUTTON_TO_AP_MENU_KEY_BUFF_L BUTTON_TO_AP_RINGER_A PP_VCC_MAIN RADIO_TO_PMU_ADC_SMPS3_MSME_1V8 TRISTAR_TO_PMU_HOST_RESET PP1V8_SDRAM BUTTON_TO_AP_VOL_UP_L BB_RST_PMU_R_L LCD_PWR_EN VREF VDD_REF CHESTNUT_TO_PMU_ADCIN7 E75_TO_PMU_ACC_DETECT_R BUTTON_TO_AP_RINGER_A KEEPACT VDD_RTC TRISTAR_TO_PMU_USB_BRICKID_R BUTTON_TO_AP_HOLD_KEY_BUFF_L 45_PMU_TO_WLAN_CLK32K CHESTNUT_TO_PMU_ADCIN7 BUTTON_TO_AP_HOLD_KEY_BUFF_L AP_TO_PMU_TEST_CLKOUT PMU_AMUX_AY RADIO_TO_PMU_ADC_LVS1 PMU_AMUX_BY TRISTAR_TO_PMU_MIKEYBUS_TEST_POS RADIO_TO_PMU_ADC_LDO6_RUIM_1V8 BB_TO_PMU_HOST_WAKE PMU_AP_TO_LCM_RESET_L PMU_DWI_DO R60 1 2 R63 1 2 R64 1 2 R65 1 2 C323 1 2 C325 1 2 C326 1 2 C327 1 2 R681 2 XW261 2 XW271 2 XW281 2 U14 2 1 3 6 4 R591 2 R661 2 R487 1 2 R921 1 2 C3431 2 U7 D7 D8 D17 L17 L18 M5 M6 M7 M8 M9 M10 M11 M12 D18 M13 M14 M15 M16 E6 E7 E8 E9 E10 E11 E12 E13 D9 E14 E15 E16 E17 E18 F6 F7 F8 F9 F10 D10 F11 F12 F13 F14 F15 F16 F17 F18 G5 G6 D11 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 D12 G17 G18 H7 H8 H9 H10 H11 H12 H13 H14 D13 H15 H16 H17 H18 J7 J8 J9 J10 J11 J12 D14 J13 J14 J15 J16 J17 J18 K7 K8 K9 K10 D15 K11 K12 K13 K14 K15 K16 K17 K18 L5 L6 D16 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 A15 A19 A3 A7 J22 A11 P15 D22 G1 G2 P16 G4 E19 E21 U7 B21 Q20 K2 F21 K6 K5 K4 J6 J5 J4 H6 H5 H4 F4 F5 E4 E5 D4 D5 D6 B1 B2 M1 B12 B13 B14 B18 M19 M18 M17 N2 B3 B15 B16 B17 B4 B5 B6 B7 B8 B9 B10 B11 P21 H21 G21 B20 Q15 D19 J21 G19 H19 F19 P12 B22 F22 P13 Q11 P11 Q22 Q21 P14 Q14 Q16 C991 2 R4881 2 051-9584 2.0.0 13 OF 23 13 OF 46 5 16 17 3 314151620 23 23 16 2 23 314 314 21214161922 23 3 38 13 314151620 23 16 1323 23 23 3 13 10 23 322 316 313 3813 10 12 14 23 23 16 341012141623 38 1419 13 14 3 8 13 3 13 3 13 1323 1314 313 2 22 23 22 16 23 23 19
SW SDA IN SCL VIO_SPI HWEN GND OVP ILED1 SCK ILED2 SDI NR IN EN GND OUT CP CN NRST VPOS VPOS VNEG PGND AGND SDA SCL SYNC EN AMUX VIN LXP VO3 VO2 VO1 VSUB Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT D404 DISPLAY PMU (INTERSIL CHESTNUT, 338S1168) (TI CHESTNUT, 338S1172) ACTIVE DISCHARGE 2MS TO RAIL DOWN 2 MS NOMIAL START UP DELAY FOR LCM POWER SEQUENCING NOTE: STACKED TO MEET VOLTAGE REQ, LOOK INTO 18+V CAPS CHESTNUT, BACKLIGHT DRIVER 0 MS DELAY AT SHUTDOWN SAGE NEG BOOST TIMING INFO: I2C0: 1100011X D404 BACKLIGHT DRIVER OPTION TO ZERO OUT U10 AND POWER IT DOWN I2C0: 0100111X TO DO: ADD 1NF CAP HERE ON ADCIN7 TO POTENTIALLY IMPLEMENT LCD PANIC FUNCTION REFER TO RADAR 12410499. THIS IS PART OF BUILD MATRIX X5R-CERM 0603 22UF 10V 20% 22UH-20%-0.38A-0.876OHM VLF302510T-SM X5R-CERM 20% 10UF 10V 0402-1 OMIT_TABLE TFA201610G-SM 2.2UH-20%-1.7A-200MOHM BGA LM3534TMX-A1 01005 10% X5R 6.3V 0.01UF NOSTUFF WCSP TPS799L57 NOSTUFF 6.3V X5R 20% 0402 4.7UF NOSTUFF 0402 X5R 6.3V 20% 4.7UF NOSTUFF 0.00 0% 01005 1/32W MF 0402-1 X5R-CERM 25V 20% 2.2UF 0402-1 2.2UF 20% 25V X5R-CERM 0402-1 2.2UF 20% 25V X5R-CERM 56PF 01005 5% 16V NP0-C0G 56PF 01005 5% 16V NP0-C0G NP0-C0G 16V 01005 56PF 5% OMIT_TABLE ISL97751IIA0PZ WLCSP 20% X5R 6.3V 0201 1UF 1/32W 01005 0% NOSTUFF 0.00 MF 0% MF 01005 1/32W 0.00 SOD-923-HF NSR0620P2XXG 56PF 01005 5% 16V NP0-C0G 01005 NP0-C0G 5% 16V 56PF OMIT_TABLE 0402-1 6.3V 20% 10UF CERM-X5RCERM-X5R 6.3V OMIT_TABLE 10UF 20% 0402-1 10UF 10V 20% 0402-1 X5R-CERM 402 X5R-CERM1 6.3V 20% 4.7UF 10UF X5R-CERM 0402-1 20% 10V OMIT_TABLE 10UF 20% 10V 0402-1 X5R-CERM CHESTNUT + BACKLIGHT DRIVER SYNC_DATE=N/ASYNC_MASTER=N/A PP_VCC_MAIN CHESTNUT_NRESET PP5V1_GRAPE_VDDH PP5V7_SAGE_AVDDH PP5V7_TO_LCD_AVDDH_CHESTNUT PP_CHESTNUT_CP PP_CHESTNUT_CN PP6V0_LCM_BOOST PN5V7_SAGE_AVDDN AP_BI_I2C0_SDA LCD_PWR_EN PP5V7_TO_LCD_AVDDH PP5V7_TO_LCD_AVDDH U10_BYPASS 45_AP_TO_PMU_DWI_DO 45_AP_TO_PMU_DWI_CLK LCD_PWR_EN PP_WLED_LX AP_BI_I2C0_SDA LCM_DESENSE PP6V0_LCM_BOOST PP_LCM_BL_ANODE AP_TO_I2C0_SCL PP1V8 PP_VCC_MAIN PP_LCM_BL_CAT1 PP_LCM_BL_CAT2 PP1V8_SDRAM PP5V7_TO_LCD_AVDDH_CHESTNUT RESET_1V8_L PP_CHESTNUT_LXP LCM_TO_AP_HIFA_BSYNC_BUFF AP_TO_I2C0_SCL CHESTNUT_TO_PMU_ADCIN7 PP1V8 D1 KA C2131 2 C2141 2 C2971 2 C252 1 2 C691 2 C47 1 2 C521 2 C541 2 C3291 2 L3 1 2 C3301 2 L19 1 2 U23 B3 B1 D3 D2 C3 D1 B2 A2 A1 C2 A3 C1 C122 1 2 U10 A1 B2 C3 A3 C1 C1211 2 C5921 2 R512 1 2 C271 2 C971 2 C981 2 C5621 2 C6621 2 C7621 2 U3 C1 E1 E4 C4 C3 B2 C2 B1 D4 D3 D2 A2 D1 E3 A4 A3 A1 B3 B4 E2 C4411 2 R49 1 2 R61 1 2 051-9584 2.0.0 14 OF 23 14 OF 46 1012131423 18 18 14 14 1819 31314151620 131419 14 19 14 19 3 13 3 13 131419 31314151620 14 19 31314151620 234567101112141819 2021 1012131423 19 19 341012131623 14 2121316192223 18 31314151620 13 234567101112141819 2021
SDOUT SDIN LRCK/FSYNC SCLK MCLK ALIVE RESET* INT* GNDP LDO_FILT VSENSE- VSENSE+ ISENSE- ISENSE+ OUT- OUT+ IREF+ GNDA SW VP ADO VA SDA VP SCL FILT+ VBST_A VBST_A VBST_A VBST_B VER1 SCL SDA TX TORCH STROBE ENABLE IN TEMP SW0 SW1 OUT0 OUT1 LED0 LED1 GND0 GND1 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT V = 1.0V C= 1UF MIN PCB: PLACE AT C335.1 LED DRIVER V= VA PIN I2C ADDRESS: 1100011X (LEFT CONFIG) C= 2.2UF MIN PCB: PLACE C332, C333 AT L4.1 I2C ADDRESS: 1000000X PCB: PLACE C335,337 AT VP INPUT SPEAKER AMP, LED DRIVER SPEAKER AMP (REPLACED WITH L20) TO DO: CHANGE NETNAMES WITH ’L19’ TO ’L20’ WHEN WE UPDATE TO NEW SILICON ~700MA RMS @ 4.1W INTO 8OHM 10% 6.3V 0.1UF X5R 201 X5R-CERM 0.1UF 0201 16V 10% TFA252010-SM 1.0UH-20%-3.2A-0.065OHM WLCSP CS35L20 0201-1 1.0UF 20% X5R 6.3V 01005 10K 1/32W MF1% 1/32W 1% MF 10K 01005 220PF 01005 10% 10V X7R-CERM X5R-CERM 20% 6.3V 01005 0.1UF 01005 10V X5R 1000PF 10% 01005 10V X5R 1000PF 10% 10% 1000PF X5R 10V 01005 1000PF 10% X5R 10V 01005 MF 1/32W 5% 510K 01005 44.2K 1% 1/32W MF 01005 5% 01005 NP0-C0G 16V 100PF 01005 100PF 16V NP0-C0G 5% 10UF 6.3V CERM-X5R 0402-2 20%20% 6.3V CERM-X5R 0402-2 10UF 0.47UH-20%-3.2A-0.046OHM TFA201610G-SM OMIT_TABLE 6.3V 10UF CERM 0402 20% OMIT_TABLE 20% 6.3V CERM 0402 10UF BGA LM3563A3TMX 01005 1/32W MF 5% 220K 0402 120OHM-25%-1.8A-0.06DCR 120OHM-25%-1.8A-0.06DCR 0402 NOSTUFF 10% 1000PF X5R 10V 01005 NOSTUFF 1000PF 10% X5R 10V 01005 6.3V 20% 402 X5R-CERM1 4.7UF X5R-CERM 22UF 20% 0603 10V OMIT_TABLE 0402-1 10UF 6.3V 20% CERM-X5R X5R 6.3V 20% 0201-1 1.0UF OMIT_TABLE 10UF 0402-1 20% 6.3V CERM-X5R OMIT_TABLE 20% 6.3V 10UF 0402-1 CERM-X5R 20% 6.3V 0201-1 X5R 1.0UF SYNC_DATE=N/ASYNC_MASTER=N/A SPKR AMP + LED DRIVER SPKAMP_TO_SPEAKER_OUT_N PP_SPKAMP_FILT PP_SPKAMP_LDO_FILT SPKAMP_TO_SPEAKER_OUT_P SPEAKER_TO_SPKAMP_ISENSE_P SPKAMP_IREF AP_TO_LEDDRV_EN AP_BI_CAM_RF_SDA CAM_RF_TO_STROBE_NTC SPEAKER_TO_SPKAMP_VSENSE_N LED_DRV_LX BB_TO_LEDDRV_GSM_BLANK CAM0_TO_LEDDRV_STROBE_EN CAM0_TORCH LED_BOOST_OUT PP_STRB_DRIVER_TO_LED PP_BATT_VCC AP_TO_CAM_RF_SCL AP_TO_I2C0_SCL AP_BI_I2C0_SDA SPKAMP_TO_AP_INT_L AP_TO_SPKAMP_RESET_L AP_TO_SPKAMP_BEE_GEES 45_AP_TO_SPKAMP_I2S2_MCLK 45_AP_TO_CODEC_XSP_I2S2_BCLK AP_TO_CODEC_XSP_I2S2_LRCLK AP_TO_CODEC_XSP_I2S2_DOUT CODEC_TO_AP_XSP_I2S2_DIN PP1V7_VA_L20 PP_BATT_VCC PP_L20_VBOOST PP_SPKAMP_SW SPKAMP_TO_SPEAKER_OUT_CONN_P SPKAMP_TO_SPEAKER_OUT_CONN_N SPEAKER_TO_SPKAMP_VSENSE_P L20_SPKAMP_VSENSE_P L20_SPKAMP_VSENSE_N SPEAKER_TO_SPKAMP_ISENSE_N C3401 2 C3411 2 C291 2 C3391 2 C3421 2 C3481 2 C3351 2 C333 1 2 C332 1 2 L4 1 2 U22 C7 D7 F2 B5 B6 C6 E4 F3 F4 A3 B3 B4 C3 C4 D3 D4 A7 B7 F1 E1 C5 F6 E7 C2 D2 A6 D6 E6 D5 F7 E5 A2 B2 F5 B1 C1 D1 A1 A4 A5 E3 E2 C3371 2 R126 1 2 R127 1 2 C3671 2 C3091 2 C5011 2 C500 1 2 C363 1 2 C360 1 2 R1291 2 R351 2 C4881 2 C73 1 2 C3961 2 C3941 2 L5 1 2 C387 1 2 C386 1 2 U17 D4 A4 B4 C4 A1 B1 A2 B2 D3 D2 C3 A3 B3 C1 C2 D1 R4631 2 FL6 1 2 FL9 1 2 C5461 2 C545 1 2 051-9584 2.0.0 15 OF 23 15 OF 46 3 721 8 17 23 21 7 8 812152223 721 313141620 313141620 3 3 3 3 310 310 310 310 12 812152223 17 22 17 22 17
PP BYPASS SCL INT SDA SWITCH_EN HOST_RESET OVP_SW_EN* CON_DET_L DN2 DP2 DN1 DP1 ACC2 ACC1 P_IN VDD_1V8 VDD_3V0 ACC_PWR JTAG_DIO UART2_RX JTAG_CLK UART1_RX UART2_TX UART0_RX UART1_TX USB0_DN UART0_TX BRICK_ID USB0_DP USB1_DN USB1_DP DIG_DN DVSS DVSS DVSS DIG_DP Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT ACCESSORY UART DEBUG UART TO DO: ADD PPS TO SOC-SIDE USB HOST_RESET ACTIVE HIGH PLACEHOLDERS FOR INDUCTORS ACC_PWR 12C ADDRESS: 0011010X TRISTAR BRICK_ID BB DEBUG USB SOC USB PIN FOR HANDSHAKE AMBER HAS 200K INT PD X5R 10% 0402 25V 1UF 5% MF 1/32W 01005 100K NO_XNET_CONNECTION=TRUE 0201-1 X5R 6.3V 1.0UF 20% X5R 4V 20% 0.1UF 01005 SM P4MM WCSP CBTL1608A1 OMIT_TABLE NO_XNET_CONNECTION=TRUE 100K 5% 1/32W MF 01005 100PF 5% NP0-C0G 10V 01005 MF 01005 5% NO_XNET_CONNECTION=TRUE 100K 1/32W 201 MF 1/20W 0 5% 1/20W 201 5% MF 0 X5R 10% 0.01UF 6.3V 01005 0201-1 6.3V X5R 20% 1.0UF TRISTAR SYNC_DATE=N/ASYNC_MASTER=N/A PP3V0_ALWAYS TRISTAR_BYPASS PP_E75_TO_TRISTAR_ACC2 PP_E75_TO_TRISTAR_ACC1 90_TRISTAR_BI_E75_PAIR1_P 90_CODEC_BI_TRISTAR_MIKEYBUS_N TRISTAR_TO_PMU_MIKEYBUS_TEST_NEG 90_TRISTAR_BI_E75_PAIR1_N PP3V0_ACC 90_CODEC_BI_TRISTAR_MIKEYBUS_P TRISTAR_TO_PMU_MIKEYBUS_TEST_POS 90_TRISTAR_BI_BB_USB_P 90_TRISTAR_BI_BB_USB_N AP_TO_TRISTAR_ACC_UART2_TXD TRISTAR_TO_AP_ACC_UART2_RXD TRISTAR_TO_AP_DEBUG_UART6_RXD 90_AP_BI_TRISTAR_USB0_N 90_AP_BI_TRISTAR_USB0_P TRISTAR_TO_PMU_USB_BRICKID 90_CODEC_BI_TRISTAR_MIKEYBUS_DIG_P 90_TRISTAR_BI_E75_PAIR2_N 90_TRISTAR_BI_E75_PAIR2_P PP5V0_USB_RPROT PP1V8_SDRAM 90_CODEC_BI_TRISTAR_MIKEYBUS_DIG_N AP_TO_TRISTAR_DEBUG_UART6_TXD TRISTAR_TO_PMU_OVP_SW_EN_L RESET_1V8_L TRISTAR_TO_AP_INT AP_BI_I2C0_SDA TRISTAR_TO_PMU_HOST_RESET TRISTAR_BI_AP_JTAG_SWDIO AP_TO_BB_UART1_TXD BB_TO_AP_UART1_RXD E75_TO_PMU_ACC_DETECT AP_TO_I2C0_SCL TRISTAR_TO_AP_JTAG_SWCLK C304 1 2 C391 2 C3381 2 R831 2 C381 2 R841 2 R43 1 2 R44 1 2 C2541 2 PP221 U2 C5 E5 D5 C2 E6 E3 C4 C3 B2 B4 A2 A4 A6 C1 F5 B6 C6 A5 B5 D6 F6 D4 D3 E4 E1 E2 F1 F2 D1 D2 B3 A3 B1 A1 F3 F4 R84011 2 C110 1 2 051-9584 2.0.0 16 OF 23 16 OF 46 812 17 17 17 22 9 13 17 22 12 9 13 23 23 3 3 3 2 2 13 17 22 17 22 17 341012131423 3 17 2 12 13 14 19 22 23 3 13 3 13 14 15 20 13 2 323 323 13 17 3 13 14 15 20 2
SYM_VER-2 SYM_VER-2 D2 (1 OF 2) G2 SSD1 G1 (2 OF 2) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT TO DO: REMOVE L20, L22 TO OPEN USB EYE? (SEE EUGENE) PRIMARY MIC MIC1 MIC1 (VOICE MIC), ACC DET/ID/PWR, E75 DIFFPAIRS) (USB VBUS, MENU BTN, SPEAKER, HP, HP EXTMIC, NAVAJO, ANTENNA PAC/LAT SW CTRL, HS3/HS4 CTRL, LAT SW CTRL DOCKFLEX B2B HPHONE: ANTENNA: ACCESSORY: SPEAKER: PAC VDD (2.65V) HS3/HS4 MENU BUTTON E75 DIFFPAIRS EXTMIC HS3/HS4 REF ANTENNA: HPHONE AUDIO DETECT, 50NA @ 2.5V BATTERY NTC SPEAKER LEADS VSENSE, ID, PWR TO TRISTAR FROM TRISTAR VBUS HPHONE: PCB: PLACE NEAR J7 516S1032 PLUG PCB: PUT XW AT J7.17 HPDET PER STAN, REPLACING L7 AND L6 WITH 01005 PARTS NOTE: RSVD ANTENNA PCB: PLACE THESE XW 516S1031 RCPT (USED ON FLEX) THIS ONE ON MLB ---> LINKS AT DOCK CONNECTOR (DESENSE CAPS) TCM0605-1 90-OHM-50MA NOSTUFF TCM0605-1 90-OHM-50MANOSTUFF 16V 27PF 01005 NP0-C0G 5% 01005-1 10-OHM-750MA 10-OHM-750MA 01005-1 NOSTUFF 01005-1 12V-33PF NO_XBET_CONNECTION=TRUE 0.00 MF 0% 01005 1/32W NO_XBET_CONNECTION=TRUE 0.00 01005 1/32W MF 0% 120-OHM-210MA 01005 01005 120-OHM-210MA 1/32W 1% 01005 MF 100K 1/32W 1% 100K 01005 MF SM SM 01005 120-OHM-210MA 01005 16V 5% 100PF NP0-C0G 5% 16V 100PF NP0-C0G 01005 120-OHM-210MA 01005 120-OHM-210MA 01005 01005 120-OHM-210MA 120-OHM-210MA 01005 MF 3.3K 5% 1/32W 01005 01005 5% 56PF 6.3V NP0-C0G 01005 NP0-C0G 5% 6.3V 56PF 01005 120-OHM-210MA NO_XNET_CONNECTION=TRUE 0201-1 20% 6.3V X5R 1.0UF X7R-CERM 220PF 10V 10% 01005 NOSTUFF 01005 6.8V-100PF 01005 6.8V-100PF 6.8V-100PF 01005 6.8V-100PF 01005 01005 6.8V-100PF 01005 6.8V-100PF SHORT-10L-0.1MM-SM 01005 150OHM-25%-200MA-0.7DCR 01005 150OHM-25%-200MA-0.7DCR 01005 1/32W MF5% 1.00K 120-OHM-210MA 01005 56PF 01005 5% NP0-C0G 16V M-ST-SM 105847038102829 01005 6.3V 5% 56PF NP0-C0G 16V 5% NP0-C0G 100PF 01005 5% 16V NP0-C0G 01005 100PFX5R-CERM 0201 25V 10% 0.01UF CSP CSD75202W15 MF 5% 201 1/20W 5.1K 1.0UF 20% 10V X5R-CERM 0201-1 100K 1/20W MF 201 1% CSD75202W15 CSP 15.00K 01005 1% MF 1/32W 10% 25V X5R-CERM 0.01UF 0201 MF 02011% 0.00 1/20W 1% 0201 0.00 1/20W MF 0.00 MF 1% 1/20W 0201 MF 0201 1/20W 1% 0.00 01005 5% 6.3V NP0-C0G 56PF NP0-C0G 5% 56PF 6.3V 01005 01005 150OHM-25%-200MA-0.7DCR 01005 NP0-C0G 5% 6.3V 56PF 5% 6.3V 56PF NP0-C0G 01005 01005 56PF 5% 16V NP0-C0GNP0-C0G 56PF 16V 01005 5% 5% 16V NP0-C0G 01005 100PF NOSTUFF NP0-C0G 6.3V 5% 56PF 01005 01005 16V 5% NP0-C0G 100PF NOSTUFF 56PF 01005 5% 6.3V NP0-C0G SYNC_DATE=N/ASYNC_MASTER=N/A DOCKFLEX B2B SPEAKER_TO_SPKAMP_VSENSE_P SPEAKER_TO_SPKAMP_VSENSE_N AP_TO_HEADSET_HS4_CTRL_CONN CODEC_TO_HPHONE_L CODEC_TO_HPHONE_R HPHONE_TO_CODEC_HPHONE_TEST PP_E75_TO_TRISTAR_ACC2_CONN PP_LDO14_2P65 AP_TO_HEADSET_HS3_CTRL PP5V0_USB_CONN CODEC_TO_HPHONE_HS3_REF_CONN EXTMIC_TO_CODEC_P 90_TRISTAR_BI_E75_PAIR1_N 90_TRISTAR_BI_E75_PAIR2_N 90_TRISTAR_BI_E75_PAIR2_P CODEC_TO_HPHONE_HS4_REFCODEC_TO_HPHONE_HS4_REF_CONN AP_TO_HEADSET_HS4_CTRL BATTERY_TO_PMU_NTC PP_E75_TO_TRISTAR_ACC1 HPHONE_TO_CODEC_DET PP_E75_TO_TRISTAR_ACC2 E75_TO_PMU_ACC_DETECT PP5V0_USB_RPROT OVP_GATE PP5V0_USB_PROT USB_CONN_SNUBREVERSE_GATE CODEC_TO_HPHONE_HS3_REF 90_TRISTAR_BI_E75_PAIR1_P PP_E75_TO_TRISTAR_ACC1_CONN CODEC_TO_HPHONE_HS3_CONN CODEC_TO_HPHONE_HS3 CODEC_TO_HPHONE_HS4 PP5V0_USB_CONN PP_CODEC_TO_MIC1_BIAS AP_TO_HEADSET_HS4_CTRL_CONN CODEC_TO_HPHONE_HS4_REF_CONN CODEC_TO_HPHONE_HS3_CONN BB_TO_LAT_SW1_CTL TRISTAR_TO_PMU_OVP_SW_EN_L CODEC_TO_HPHONE_HS3_REF_CONN EXTMIC_TO_CODEC_N BUTTON_TO_AP_MENU_KEY_L CODEC_TO_HPHONE_L_CONN BUTTON_TO_AP_MENU_KEY_CONN_L CODEC_TO_HPHONE_HS4_CONN PP_CODEC_TO_MIC1_BIAS_CONN HPHONE_TO_CODEC_DET_CONN AP_TO_HEADSET_HS3_CTRL_CONN MIC1_TO_CODEC_N PP_LDO14_2P65_CONN MIC1_TO_CODEC_P SPKAMP_TO_SPEAKER_OUT_CONN_P SPKAMP_TO_SPEAKER_OUT_CONN_N E75_TO_PMU_ACC_DETECT_CONN 90_TRISTAR_BI_E75_PAIR2_CONN_P 90_TRISTAR_BI_E75_PAIR2_CONN_N 90_TRISTAR_BI_E75_PAIR1_CONN_N 90_TRISTAR_BI_E75_PAIR1_CONN_P BATTERY_NTC_CONN CODEC_TO_HPHONE_R_CONN BB_TO_LAT_SW2_CTL L20 1 2 3 4 L22 1 2 3 4 C240 1 2 FL60 12 FL53 12 DZ15 1 2 FL5 12 C1761 2 C71 1 2 C70 1 2 R501 2 R151 2 L7 12 L6 12 R101 2 R231 2 XW22 12 XW21 12 C81 2 C5 1 2 FL1 1 2 FL10 1 2 FL16 1 2 FL17 1 2 R107 1 2 C3551 2 C3591 2 FL49 12 C215 1 2 C4 1 2 DZ6 1 2 DZ5 1 2 DZ9 1 2 DZ101 2 DZ11 1 2 DZ121 2 XW45 1 2 FL68 1 2 FL69 1 2 R1301 2 FL2302 1 2 C23071 2 J7 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 35 36 37 38 39 4 40 41 42 5 6 7 8 9 C12 1 2 C13 1 2 C3681 2 Q2 B2 C2 C3 C1 B1 R741 2 C1531 2 R73 12 Q2 A2 A3 B3 A1 B1 R58 12 C1191 2 R617 1 2 R618 1 2 R619 1 2 R620 1 2 C2061 2 C1881 2 FL495 1 2 C8551 2 C2421 2 C8781 2 C879 1 2 C913 1 2 C9141 2 051-9584 2.0.0 17 OF 23 17 OF 46 15 15 17 9 9 9 22 23 3 1722 17 22 9 16 22 16 22 16 22 9 17 22 3 12 22 16 9 16 13 16 16 12 9 16 22 22 17 9 9 17 22 10 17 17 22 17 23 16 17 22 9 3 9 922 1522 1522 22 23
VSTM_9 VSTM_8 VSTM_7 VSTM_6 VSTM_5 VSTM_4 VSTM_3 VSTM_2 VSTM_16 VSTM_15 VSTM_13 VSTM_12 VSTM_11 VSTM_10 VSTM_1 VSTM_0 VDDIO VDDH VDDCORE VDDANA RSTOVR* IN9_0 IN8_0 IN7_0 IN6_0 IN5_0 IN4_0 IN3_0 IN2_0 IN14_1 IN14_0 IN13_0 IN12_0 IN11_0 IN10_0 IN1_0 H_SDO H_SDI H_SCLK H_INT* GPIO_4 GPIO_3 GPIO_2/SD GPIO_1/CK GND VSTM_18 VSTM_19 TM_OVR VSTM_17 IN0_0 H_CS* VSTM_14 VDDLDO JTAG_TMS JTAG_TDO JTAG_TDI JTAG_TCK CLKIN/RESET* BCFG_RTCK TM_ACS* AGND6 AVDDL1 VBST_OUTL VBST_OUTH VCPL_REF/EN VCPH_REF/EN L_X L_Y VBIAS DRV_IN19 DRV_IN17 DRV_IN18 DRV_IN16 DRV_IN10 DRV_IN11 DRV_IN12 DRV_IN15 DRV_IN14 DRV_IN5 DRV_IN6 DRV_IN7 DRV_IN8 DRV_IN9 DRV_IN0 DRV_IN1 DRV_IN2 DRV_IN4 DRV_IN3 SNS_IN10 SNS_IN11 SNS_IN12 SNS_IN13 SNS_IN14 SNS_IN6 SNS_IN8 SNS_IN1 AGND1 AGND2 AGND3 AGND5 AGND4 GO DRV_OUT17 DRV_OUT19 DRV_OUT18 DRV_OUT15 DRV_OUT16 DRV_OUT13 DRV_OUT12 DRV_OUT11 DRV_OUT10 DRV_OUT8 DRV_OUT9 DRV_OUT7 DRV_OUT6 DRV_OUT5 DRV_OUT4 DRV_OUT2 DRV_OUT0 DRV_OUT1 SNS_OUT14 SNS_OUT13 SNS_OUT10 SNS_OUT11 SNS_OUT9 SNS_OUT8 SNS_OUT7 SNS_OUT6 SNS_OUT5 SNS_OUT3 SNS_OUT4 SNS_OUT2 SNS_OUT1 SNS_OUT0 SNS_OUT12 VCPH VCPL VCPL_F VDDIO DRV_IN13 SNS_IN9 SNS_IN7 I2C_SCL GCM_TEST I2C_SDA SNS_IN5 SNS_IN4 SNS_IN3 SNS_IN2 SNS_IN0 AVDDH4 AVDDH3 AVDDH2 DRV_OUT3 AVDDH1 VCM_IN BOOST_EN DRV_OUT14 BSYNC PP PP PP G S D PP PP VCC 1A 2A2Y GND 1Y PP Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CUMULUS C0 TOUCH B2B VGL_REF R16 R14 R13 R12 516S1060 RCPT (ON FLEX) 516S1061 PLUG VGL R10 R1 R5 R4 R3 R2 R0_LEFT NEGATIVE RAIL D404 (B2B,DRIVER ICS) C7 (ALSO A RESET IF CLOCK STOPS) THESE ARE ROUTED TOGETHER GS0 C1 C4 R18 C3 GS1 R6 R8 SPECIAL - CANNOT SWAP SPECIAL - CANNOT SWAP 5.45-5.98V GS4 GS3 VCOM GS2 R17 C8 C9 R11 R19 C2 C5 R9 R7 VGH ON MLB ---> 343S0574 13.5V VGH_REF C0 C6 R15 R0_RIGHT NOTE: LCM_TO_AP_HIFA_BSYNC_BUFF CUMULUS_IN IS SENSITIVE (TURN OFF SAME TIME AS PP1V8_GRAPE) (TURN ON LATER THAN PP1V8_GRAPE) TO CLAMP THE KEEP THESE NETS FROM XTALK CUMULUS_IN IS SENSITIVE SAGE_PANEL_IN IS SENSITIVE KEEP THESE NETS FROM XTALK 3.5V -12V SAGE2 C0343S0628: B0 APN FOR PROTO1 343S0645: C0 APN FOR EVT1 WLBGA CUMULUS-C0 01005 20% 0.1UF 4V X5R 10% 201 X5R 6.3V 0.1UF SM-201 DSF01S30SC NOSTUFF 0201 10% 25V X7R-CERM 1000PF X7R-CERM 25V 10% 1000PF 0201 X7R-CERM 25V 10% 1000PF 0201 X7R-CERM 25V 10% 1000PF 0201 0402 0.33UF 20% TANT 20V X5R-CERM 16V 10% 0201 0.1UF MF 1/32W 5% 1.00M 01005 504459-4210 M-ST-SM 0.1UF 0201 X5R-CERM 16V 10% PSB12101T-SM 10UH-0.32A-1.56OHM SM NO_XNET_CONNECTION=TRUE SM NO_XNET_CONNECTION=TRUE SM NO_XNET_CONNECTION=TRUE SM NO_XNET_CONNECTION=TRUE SM NO_XNET_CONNECTION=TRUE SM 10UF 10V X5R-CERM 0402-1 20% CSP SAGE2-C06 GDZT2R6.2B GDZ-0201 01005 0.01UF 10% 6.3V X5R 6.3V 0.01UF X5R 01005 10% X5R 201 6.3V 10% 0.1UF 5% 220K MF 01005 1/32W SM P4MM P4MM SM 100K 1/32W MF 01005 5% 100K 1/32W 5% 01005 MF P4MM SM 20% 4.7UF 6.3V X5R-CERM1 402 X5R-CERM1 402 20% 6.3V 4.7UF 100K 1/32W 01005 MF 5% 20% TANT 25V 1UF 0603-LLP NP0-C0G 27PF 5% 01005 16V 10% X5R-CERM 16V 0201 0.1UF 1.0UF 6.3V X5R 20% 0201-1 SM 0.1UF 16V 10% 0201 X5R-CERM SM SM RV1C002UN 10% 6.3V X5R-CERM 1000PF 01005 0.1UF X5R-CERM 10% 0201 16V X6S-CERM 0402 1UF 16V 10% X6S-CERM 1UF 16V 10% 0402 16V 1UF 10% 0402 X6S-CERM 10.2 1%MF 1/32W01005 01005 MF1% 1/32W 22.1K P4MM SM P4MM SM SOT1115 74AUP2G3404GN 0402-1 10UF 20% X5R-CERM 10V OMIT_TABLE 10UF 20% 10V 0402-1 X5R-CERM SM P4MM D404 (TOUCH B2B, DRIVER ICS) SYNC_MASTER=N/A SYNC_DATE=N/A TOUCH_TO_SAGE_SENSE_IN<12> SAGE_TO_TOUCH_VSTM_OUT<12> SAGE_TO_TOUCH_VSTM_OUT<11> SAGE_TO_TOUCH_VSTM_OUT<0> SAGE_TO_TOUCH_VSTM_OUT<14> SAGE_TO_TOUCH_VSTM_OUT<15> TOUCH_TO_SAGE_SENSE_IN<10> TOUCH_TO_SAGE_SENSE_IN<1> TOUCH_TO_SAGE_SENSE_IN<2> TOUCH_TO_SAGE_SENSE_IN<3> TOUCH_TO_SAGE_SENSE_IN<0> TOUCH_TO_SAGE_SENSE_IN<4> TOUCH_TO_SAGE_SENSE_IN<5> CUMULUS_TO_SAGE_VSTM_OUT<16> 45_PROX_TO_CUMULUS_RX_IN SAGE_TO_CUMULUS_IN<12> TOUCH_TO_AP_INT_L TOUCH_TO_AP_SPI1_MISO_R AP_TO_TOUCH_SPI1_CLK PP_CUMULUS_VDDCORE SAGE_TO_CUMULUS_IN<1> SAGE_TO_CUMULUS_IN<2> SAGE_TO_CUMULUS_IN<6> SAGE_TO_CUMULUS_IN<4> SAGE_TO_CUMULUS_IN<3> SAGE_TO_CUMULUS_IN<5> PP1V8_CUMULUS_VDDLDO SAGE_TO_CUMULUS_IN<0> SAGE_TO_CUMULUS_IN<14> SAGE_TO_CUMULUS_IN<10> SAGE_TO_CUMULUS_IN<7> SAGE_TO_CUMULUS_IN<8> TOUCH_TO_SAGE_SENSE_IN<7> 45_AP_TO_TOUCH_CLK32K_RESET_L CUMULUS_TO_SAGE_VSTM_OUT<2> 45_PROX_TO_CUMULUS_RX SAGE_DUMP_GATE TOUCH_TO_SAGE_SENSE_IN<8> TOUCH_TO_SAGE_SENSE_IN<14> SAGE_TO_TOUCH_VSTM_OUT<17> TOUCH_TO_SAGE_SENSE_IN<13> SAGE_TO_TOUCH_VSTM_OUT<18> SAGE_TO_TOUCH_VSTM_OUT<13> SAGE_TO_TOUCH_VSTM_OUT<16> TOUCH_TO_SAGE_SENSE_IN<6> SAGE_TO_TOUCH_VSTM_OUT<0> SAGE_TO_TOUCH_VSTM_OUT<2> SAGE_TO_TOUCH_VSTM_OUT<3> SAGE_TO_TOUCH_VSTM_OUT<4> SAGE_TO_TOUCH_VSTM_OUT<9> SAGE_TO_TOUCH_VSTM_OUT<8> SAGE_TO_TOUCH_VSTM_OUT<6> SAGE_TO_TOUCH_VSTM_OUT<5> SAGE_TO_TOUCH_VSTM_OUT<1> SAGE_TO_TOUCH_VSTM_OUT<7> SAGE_TO_TOUCH_VSTM_OUT<10> PP_SAGE_TO_TOUCH_VCPH_CONN TOUCH_TO_SAGE_SENSE_IN<11> TOUCH_TO_SAGE_SENSE_IN<9> PP_SAGE_TO_TOUCH_VCPL_CONN TOUCH_TO_SAGE_VCM_IN_CONN SAGE_TO_TOUCH_VCPL_REF_CONN SAGE_TO_TOUCH_VCPH_REF_CONN SAGE_VBIAS_DRAIN CUMULUS_TO_SAGE_BOOST_EN SAGE_TO_CUMULUS_IN<13> CUMULUS_TO_SAGE_GCM_SEL CUMULUS_TO_PROX_RX_EN_1V8 AP_TO_TOUCH_SPI1_MOSI CUMULUS_TO_PROX_TX_EN_1V8_LCUMULUS_TO_PROX_TX_EN_BUFF LCM_TO_AP_HIFA_BSYNC TOUCH_TO_AP_SPI1_MISO CUMULUS_TO_PROX_TX_EN_1V8_L SAGE_TO_CUMULUS_IN<9> AP_TO_TOUCH_GRAPE_RESET_L PP1V8_CUMULUS_VDDLDO PP1V8_GRAPE CUMULUS_TO_SAGE_VSTM_OUT<6> CUMULUS_TO_SAGE_VSTM_OUT<19> CUMULUS_TO_SAGE_VSTM_OUT<13> CUMULUS_TO_SAGE_VSTM_OUT<11> CUMULUS_TO_SAGE_VSTM_OUT<17> CUMULUS_TO_SAGE_VSTM_OUT<18> CUMULUS_TO_SAGE_VSTM_OUT<7> CUMULUS_TO_SAGE_VSTM_OUT<3> CUMULUS_TO_SAGE_VSTM_OUT<15> SAGE_TO_CUMULUS_IN<11> PP_SAGE_VCPL_F 45_PROX_TO_CUMULUS_RX_FILT CUMULUS_TO_SAGE_VSTM_OUT<4> CUMULUS_TO_SAGE_VSTM_OUT<1> CUMULUS_TO_SAGE_VSTM_OUT<8> LCM_TO_AP_HIFA_BSYNC_BUFF CUMULUS_TO_SAGE_VSTM_OUT<5> PP5V7_SAGE_AVDDH SAGE_TO_TOUCH_VSTM_OUT<19> SAGE_TO_TOUCH_VCPH_REF_CONN SAGE_TO_TOUCH_VCPH_REF SAGE_TO_TOUCH_VCPL_REF_CONN SAGE_TO_TOUCH_VCPL_REF TOUCH_TO_SAGE_VCM_IN_CONN TOUCH_TO_SAGE_VCM_IN PP_SAGE_TO_TOUCH_VCPH_CONN PP_SAGE_TO_TOUCH_VCPH PP_SAGE_TO_TOUCH_VCPLPP_SAGE_TO_TOUCH_VCPL_CONN U12_GPIO_3 PP_CUMULUS_VDDANA PP1V8_GRAPE CUMULUS_TO_SAGE_VSTM_OUT<0> CUMULUS_TO_SAGE_VSTM_OUT<12> CUMULUS_TO_SAGE_VSTM_OUT<14> AP_TO_TOUCH_SPI1_CS_L PP5V1_GRAPE_VDDH PN5V7_SAGE_AVDDN PP1V8_GRAPE LCM_TO_AP_HIFA_BSYNC SAGE_TO_TOUCH_VSTM_OUT<16> CUMULUS_TO_SAGE_BOOST_EN TOUCH_TO_SAGE_VCM_IN PP5V7_SAGE_AVDDH TOUCH_TO_SAGE_SENSE_IN<4> TOUCH_TO_SAGE_SENSE_IN<5> TOUCH_TO_SAGE_SENSE_IN<0> TOUCH_TO_SAGE_SENSE_IN<7> CUMULUS_TO_SAGE_GCM_SEL TOUCH_TO_SAGE_SENSE_IN<2> CUMULUS_TO_SAGE_VSTM_OUT<13> PP1V8 PP_SAGE_VCPL_F PP_SAGE_TO_TOUCH_VCPH SAGE_TO_CUMULUS_IN<8> SAGE_TO_CUMULUS_IN<4> SAGE_TO_CUMULUS_IN<5> SAGE_TO_CUMULUS_IN<7> SAGE_TO_CUMULUS_IN<10> SAGE_TO_CUMULUS_IN<1> SAGE_TO_CUMULUS_IN<11> SAGE_TO_CUMULUS_IN<2> SAGE_TO_CUMULUS_IN<14> SAGE_TO_CUMULUS_IN<13> SAGE_TO_CUMULUS_IN<9> SAGE_TO_CUMULUS_IN<6> SAGE_TO_TOUCH_VSTM_OUT<6> SAGE_TO_TOUCH_VSTM_OUT<12> SAGE_TO_TOUCH_VSTM_OUT<7> SAGE_TO_TOUCH_VSTM_OUT<15> SAGE_TO_TOUCH_VSTM_OUT<14> SAGE_TO_TOUCH_VSTM_OUT<18> SAGE_TO_TOUCH_VSTM_OUT<9> SAGE_TO_TOUCH_VSTM_OUT<5> SAGE_TO_TOUCH_VSTM_OUT<10> SAGE_TO_TOUCH_VSTM_OUT<4> SAGE_TO_TOUCH_VSTM_OUT<19> SAGE_TO_TOUCH_VSTM_OUT<13> SAGE_TO_TOUCH_VSTM_OUT<2> SAGE_TO_TOUCH_VSTM_OUT<3> SAGE_TO_TOUCH_VSTM_OUT<11> SAGE_TO_TOUCH_VSTM_OUT<17> SAGE_TO_TOUCH_VSTM_OUT<0> TOUCH_TO_SAGE_SENSE_IN<3> TOUCH_TO_SAGE_SENSE_IN<11> TOUCH_TO_SAGE_SENSE_IN<10> TOUCH_TO_SAGE_SENSE_IN<6> TOUCH_TO_SAGE_SENSE_IN<9> TOUCH_TO_SAGE_SENSE_IN<8> TOUCH_TO_SAGE_SENSE_IN<14> TOUCH_TO_SAGE_SENSE_IN<13> CUMULUS_TO_SAGE_VSTM_OUT<1> CUMULUS_TO_SAGE_VSTM_OUT<7> CUMULUS_TO_SAGE_VSTM_OUT<12> CUMULUS_TO_SAGE_VSTM_OUT<6> CUMULUS_TO_SAGE_VSTM_OUT<8> CUMULUS_TO_SAGE_VSTM_OUT<9> CUMULUS_TO_SAGE_VSTM_OUT<5> CUMULUS_TO_SAGE_VSTM_OUT<18> CUMULUS_TO_SAGE_VSTM_OUT<14> CUMULUS_TO_SAGE_VSTM_OUT<15> CUMULUS_TO_SAGE_VSTM_OUT<16> CUMULUS_TO_SAGE_VSTM_OUT<3> CUMULUS_TO_SAGE_VSTM_OUT<19> CUMULUS_TO_SAGE_VSTM_OUT<4> CUMULUS_TO_SAGE_VSTM_OUT<10> CUMULUS_TO_SAGE_VSTM_OUT<2> CUMULUS_TO_SAGE_VSTM_OUT<11> CUMULUS_TO_SAGE_VSTM_OUT<0> CUMULUS_TO_SAGE_VSTM_OUT<17> SAGE_VBIAS PP_SAGE_LY PP_SAGE_LX SAGE_TO_TOUCH_VCPH_REF SAGE_TO_TOUCH_VCPL_REF PP_SAGE_VBST_OUTH PP_SAGE_VBST_OUTL SAGE_TO_CUMULUS_IN<0> SAGE_TO_CUMULUS_IN<12> SAGE_TO_CUMULUS_IN<3> PN5V7_SAGE_AVDDN_FILT SAGE_TO_TOUCH_VSTM_OUT<1> SAGE_TO_TOUCH_VSTM_OUT<8> TOUCH_TO_SAGE_SENSE_IN<1> TOUCH_TO_SAGE_SENSE_IN<12> PP_SAGE_TO_TOUCH_VCPL U12 E3 D1 C7 C9 G2 G1 D4 F2 F3 E4 F1 D3 D2 E1 B9 A6 A3 A5 A4 B2 A2 B8 A9 B7 B6 A8 B5 B4 A7 B3 C4 C3 E2 C6 D9 C2 G3 B1 C1 C8 C5 F4 A1 E9 E5 F9 D5 F6 F5 G4 E8 G8 G7 G6 G5 F7 E6 E7 F8 G9 D6 D7 D8 PP11 1 PP18 1 C1651 2 C163 1 2 DZ4 A K C150 1 2 C147 1 2 C137 1 2 R86 1 2 PP9 1 R21 2 R361 2 C3711 2 C3701 2 R791 2 C130 1 2 R1361 2 R26 1 2 PP7 1 PP8 1 U5 16 34 25 C1491 2 C156 1 2 PP12 1 C320 1 2 C3061 2 C3721 2 XW36 1 2 C365 1 2 XW37 1 2 Q6 3 2 1C79 1 2 C3811 2 C3311 2 C3241 2 C3151 2 D2 A K C349 1 2 C328 1 2 C364 1 2 C346 1 2 C321 1 2 C170 1 2 R1211 2 J4 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 35 36 37 38 39 4 40 41 42 43 44 5 6 7 8 9 C366 12 L21 1 2 XW7 1 2 XW13 1 2 XW18 1 2 XW19 1 2 XW23 1 2 XW79 1 2 C3691 2 U15 C2 B3 F4 F8 E3 L5 D2 A3 F3 F6 H5 B2 K5 G1 H1 L3 K3 J3 H3 G3 L4 K4 J4 H4 G4 J1 K1 L1 G2 H2 J2 K2 L2 G6 H6 L8 K8 J8 H8 G8 L9 K9 J9 H9 G9 J6 K6 L6 G7 H7 J7 K7 L7 F9 F7 F5 G5 C1 D1 E4 D4 E8 D8 C8 B8 A8 C4 B4 A4 A6 B6 C6 D6 E6 E5 D5 E9 D9 C9 B9 A9 C5 B5 A5 A7 B7 C7 D7 E7 D3 B1 E1 J5 A1 A2 F1 E2 F2 C3 051-9584 2.0.0 18 OF 23 18 OF 46 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 3 3 18 18 18 18 18 18 18 18 18 18 18 18 18 3 18 11 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 1819 18 18 18 18 18 18 11 3 1811 3 18 19 3 18 18 3 18 12 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 14 18 1418 18 18 18 18 18 18 18 18 18 18 191819 12 18 18 18 18 3 14 1419 12 18 3 18 19 18 18 18 1418 18 18 18 18 18 18 18 2 3 4 5 6 7 10 11 12 14 19 20 21 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 1819
SYM_VER-2 SYM_VER-2 SYM_VER-2 SYM_VER-2 SYM_VER-2 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT LCM CONNECTOR 516S1066 PLUG SPECIAL Z = 0.33 MM LCM B2B 516S1065 RCPT (FLEX) THIS ONE ON MLB ---> REFER TO RADAR 12410499. THIS IS PART OF BUILD MATRIX TO POTENTIALLY IMPLEMENT LCD PANIC FUNCTION 80-OHM-0.2A-0.4-OHM 0201-1 01005 NP0-C0G 16V 5% 56PF MF 01005 100K 1/32W 1% 01005 MF 5% 100K 1/32W 5% 6.3V NP0-C0G 56PF 01005 NOSTUFF 150OHM-25%-200MA-0.7DCR 01005 120-OHM-210MA 01005 2.2UF 0402 X5R-CERM 6.3V 20% X5R-CERM 0402 6.3V 20% 2.2UF X5R-CERM 0402 6.3V 20% 2.2UF 20% 6.3V X5R-CERM 0402 2.2UF NOSTUFF5% 1.00K 1/32W MF 01005 TCM0605-1 90-OHM-50MA 01005 16V 5% 56PF NP0-C0G AA22LB-P M-ST-SMMF 010050% 0.00 1/32W NP0-C0G 56PF 5% 16V 01005 0201-1 240-OHM-0.2A-0.8-OHM 240-OHM-0.2A-0.8-OHM 0201-1 56PF 01005 NP0-C0G 6.3V 5% 240-OHM-0.2A-0.8-OHM 0201-1 01005 56PF 16V NP0-C0G 5%5% NP0-C0G 01005 16V 56PF 56PF NP0-C0G 5% 16V 01005 1% BOMOPTION=NOSTUFF 100K 01005 MF 1/32W 01005 0.00 NOSTUFF 0% MF 1/32W 1% 1/32W 01005 100K MF NOSTUFF X5R 6.3V 201 0.1UF 10% TCM0605-1 90-OHM-50MA TCM0605-1 90-OHM-50MA TCM0605-1 90-OHM-50MA 90-OHM-50MA TCM0605-1 01005 120-OHM-210MA 120-OHM-210MA 01005 5% 56PF NP0-C0G 6.3V 01005 01005 120-OHM-210MA 56PF 5% 6.3V 01005 NP0-C0G 5% 01005 6.3V NP0-C0G 56PF NO_XNET_CONNECTIO=TRUE 80-OHM-0.2A-0.4-OHM 0201-1 SYNC_DATE=N/ASYNC_MASTER=N/A LCM CONNECTOR PP1V8 90_LCM_MIPI_DATA1_CONN_N PP_LCM_BL_CAT1 90_LCM_MIPI_DATA2_CONN_P LCD_PWR_EN_CONN 90_LCM_MIPI_CLK_CONN_P 90_LCM_MIPI_CLK_CONN_N 90_LCM_MIPI_DATA2_CONN_N 90_LCM_MIPI_DATA1_CONN_P LCD_PWR_EN PP5V7_LCD_AVDDH_CONN PN5V7_LCM_AVDDN_CONN PP1V8_LCM_CONN 90_LCM_MIPI_DATA0_CONN_P LCM_TO_AP_PIFA 90_AP_TO_LCM_MIPI_DATA3_N 90_AP_TO_LCM_MIPI_DATA1_P PP_SAGE_TO_TOUCH_VCPL 90_AP_TO_LCM_MIPI_DATA0_P 90_AP_TO_LCM_MIPI_DATA2_P 90_AP_TO_LCM_MIPI_DATA1_N 90_AP_TO_LCM_MIPI_DATA2_N 90_AP_TO_LCM_MIPI_DATA0_N 90_AP_TO_LCM_MIPI_CLK_N 90_AP_TO_LCM_MIPI_CLK_P 90_AP_TO_LCM_MIPI_DATA3_P PP_SAGE_TO_TOUCH_VCPL_CONN 90_LCM_MIPI_DATA0_CONN_N PP1V8 PN5V7_SAGE_AVDDN PP5V7_TO_LCD_AVDDH PP_LCM_BL_ANODE LCD_DESENSE_CONN LCD_RESET_L_CONN 90_LCM_MIPI_DATA3_CONN_P PP_LCM_BL_CAT2 PP1V8 LCM_TO_AP_HIFA_BSYNC RESET_1V8_L LCD_PANIC_L_CONN LCD_PIFA AP_TO_LCM_RESET_L LCD_HIFA_BSYNC_CONN LCD_BL_CC1_CONN PMU_AP_TO_LCM_RESET_L LCD_BL_CA_CONN 90_LCM_MIPI_DATA3_CONN_N LCD_BL_CC2_CONN C421 2 C461 2 L2 1 2 3 4 L9 1 2 3 4 L8 1 2 3 4 L10 1 2 3 4 FL27 1 2 FL61 1 2 C401 2 FL34 1 2 C411 2 C191 2 FL18 1 2 FL26 1 2 C301 2 R311 2 R32 1 2 C241 2 FL37 1 2 FL25 12 C43 1 2 C48 1 2 C49 1 2 C59 1 2 R4 1 2 L1 1 2 3 4 C6101 2 J5 1 10 1112 1314 1516 1718 19 2 20 2122 2324 2526 2728 29 3 30 3132 4 56 78 9 R932 1 2 C181 2 FL35 1 2 FL24 1 2 FL36 1 2 C151 2 C101 2 C141 2 R9711 2 R75 1 2 R621 2 051-9584 2.0.0 19 OF 23 19 OF 46 2 3 4 5 6 7 10 11 12 14 18 19 20 21 14 13 14 3 7 7 18 7 7 7 7 7 7 7 7 18 2 3 4 5 6 7 10 11 12 14 18 19 20 21 14 18 14 14 14 2 3 4 5 6 7 10 11 12 14 18 19 20 21 3 18 2 12 13 14 16 22 23 3 22 13 22 22
DRDY SCL/SK SDA/SI VDD RSV SO VSS TST1 TRG VID CAD0 CAD1 RST* CSB* DEN INT1 GND CS SDO/SA0 SDA/SDI/SDO SCL/SPC VDD_IO DRDY/ RES2 RES1 RES0 VDD RES/VDD CAP GND INT2 INT2 INT1 RES RES RES CS RES RES SDO/SA0 SCL/SPC SDA/SDI/SDO VDD VDD_IO GND Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT AP3GDL20H, APN 338S1158 NO CAMERA VSYNC PIN NEED TO CHECK CONNECTION ACCELEROMETER THIS PART OUTSIDE OF SHIELD SENSORS ADD ALTERNATE AICHI 11V CHARGE PUMP NEED TO CHECK CONNECTION THESE PARTS INSIDE OF SHIELD COMPASS DEVICE: 338S1014 COMPASS COMPASS INTERPOSER: 998-5120 COMPASS (APN 338S1133) TO DO: TO DO: VERIFY CONNECTIONS ON ACCEL (CS, SDO PINS) GYRO AP2DHAA, APN 338S1114 0201-1 20% X5R 1.0UF 6.3V4V X5R 01005 0.1UF 20% 01005 4V X5R 0.1UF 20% 0.01UF 0201 25V 10% X5R-CERM CSP AK8963C OMIT_TABLE 120-OHM-210MA 01005 120-OHM-210MA 01005 01005 120-OHM-210MA LGA AP3GDL20HAA18 OMIT_TABLE LGA AP2DHAA24 20% X5R 4V 01005 0.1UF 150OHM-25%-200MA-0.7DCR 01005 150OHM-25%-200MA-0.7DCR 01005 4V 01005 0.1UF 20% X5R 01005 0.01UF 10% X5R 6.3V 0201-1 20% 6.3V 1.0UF X5R 0201-1 6.3V 20% X5R 1.0UF OSCAR + SENSORS SYNC_DATE=N/ASYNC_MASTER=N/A PWRTERM2GND PP1V8PP3V0_IMU PP1V8 AP_TO_I2C1_SCL AP_BI_I2C1_SDA PP1V8_COMP PP1V8PP1V8_COMP COMP_INT2 GYRO_TO_AP_INT2 PP1V8 GYRO_CP ACCEL_TO_AP_INT1 I2C_SDA_COMP COMPASS_TO_AP_INT_2 I2C_SCL_COMP AP_BI_I2C1_SDA AP_TO_I2C1_SCL PP3V0_IMU GYRO_TO_AP_INT1 AP_BI_I2C0_SDA AP_TO_I2C0_SCL ACCEL_TO_AP_INT2 PP3V0_COMP PP3V0_IMU FL39 12 FL38 1 2 C3001 2 C336 1 2 C334 1 2 C298 1 2 C3471 2 C3451 2 C344 1 2 C111 2 U16 D1 D2 A2 A1 D4 B3 A3 A4 B4 C3 C2 B1 C4 C1 FL751 1 2 FL753 1 2 FL752 1 2 U8 14 5 8 6 13 12 7 9 10 11 15 2 3 4 16 1 U18 4 9 6 5 10 11 12 13 14 1 2 3 8 7 C997 1 2 051-9584 2.0.0 20 OF 23 20 OF 46 2 3 4 5 6 7 10 11 12 14 18 19 20 21 1220 2 3 4 5 6 7 10 11 12 14 18 19 20 21 3 20 3 20 20 2 3 4 5 6 7 10 11 12 14 18 19 20 21 20 3 234567101112141819 2021 3 3 3 20 3 20 1220 3 3 13 14 15 16 3 13 14 15 16 3 1220
VIN GND VOUT VEN SYM_VER-2 SYM_VER-2 SYM_VER-2 SYM_VER-2 SYM_VER-2 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 0.07 OHMS THIS ONE ON MLB ---> ROUTING CRITICAL, FOLLOW N41 516S0939 RCPT (USED ON FLEX) CAM0: MAIN CAMERA CONNECTOR 516S0940 PLUG 4-LANE MIPI CAM0: THIS XW LINK AT CONNECTOR PIN 0201-1 1.0UF 6.3V 20% X5R NP0-C0G 56PF 6.3V 5% 01005 0201-1 20% X5R 1.0UF 6.3V 5% 6.3V NP0-C0G 56PF 01005 100K 01005 1/32W 5% MF 56PF NP0-C0G 5% 01005 6.3V 120-OHM-210MA 01005 56PF 5% 01005 NP0-C0G 6.3V 01005 120-OHM-210MA 120-OHM-210MA 01005 120-OHM-210MA 01005 0201-1 6.3V X5R 20% 1.0UF FERR-22-OHM-1A-0.065-OHM 0201 0201 FERR-22-OHM-1A-0.065-OHM NO_XNET_CONNECTIO=TRUE 56PF 6.3V 5% NP0-C0G 01005 NP0-C0G 6.3V 01005 5% 56PF 120-OHM-210MA 01005 M-ST-SM BB35-PA SM LP5908AP-1.28V USMD 90-OHM-50MA TCM0605-1 TCM0605-1 90-OHM-50MA 90-OHM-50MA TCM0605-1 TCM0605-1 90-OHM-50MA TCM0605-1 90-OHM-50MA 56PF 5% NP0-C0G 6.3V 010050201-1 1.0UF 20% X5R 6.3V 10-OHM-750MA 01005-1 0201-1 1.0UF 20% X5R 6.3V NP0-C0G 5% 01005 56PF 6.3V FERR-22-OHM-1A-0.065-OHM 0201 NO_XNET_CONNECTIO=TRUE 0201-1 1.0UF 20% X5R 6.3V 56PF 5% 6.3V NP0-C0G 01005 SYNC_DATE=N/ASYNC_MASTER=N/A CAM0 CONNECTOR PP2V8_CAM_AVDD PP2V8_CAM0_CONN PP2V5_CAM0_AF_CONN PP1V8_CAM0_REG PP1V2_CAM0_CONN AP_BI_CAM_RF_SDA_CONN AP_TO_CAM_RF_SHUTDOWN_CONN 90_CAM0_MIPI_DATA0_CONN_N PP1V8 45_AP_TO_CAM_RF_CLK CAM0_TO_LEDDRV_STROBE_EN_CONN PP1V8_CAM0_CONN PP1V8 AP_BI_CAM_RF_SCL_CONN 45_AP_TO_CAM_RF_CLK_CONN AP_TO_CAM_RF_SHUTDOWN PP2V5_CAM0_AF 90_CAM0_MIPI_DATA3_CONN_P 90_CAM0_MIPI_DATA2_CONN_N 90_CAM0_MIPI_CLK_CONN_N AP_TO_CAM_RF_VDDCORE_EN PP2V5_CAM0_AF_COMP 90_CAM0_TO_AP_MIPI_DATA3_P 90_CAM0_TO_AP_MIPI_DATA3_N 90_CAM0_TO_AP_MIPI_DATA2_P 90_CAM0_TO_AP_MIPI_DATA2_N 90_CAM0_TO_AP_MIPI_CLK_P 90_CAM0_TO_AP_MIPI_CLK_N 90_CAM0_TO_AP_MIPI_DATA1_P 90_CAM0_TO_AP_MIPI_DATA1_N 90_CAM0_TO_AP_MIPI_DATA0_P 90_CAM0_TO_AP_MIPI_DATA0_N 90_CAM0_MIPI_DATA0_CONN_P 90_CAM0_MIPI_DATA1_CONN_N 90_CAM0_MIPI_DATA1_CONN_P 90_CAM0_MIPI_CLK_CONN_P 90_CAM0_MIPI_DATA2_CONN_P 90_CAM0_MIPI_DATA3_CONN_N CAM0_TO_LEDDRV_STROBE_EN AP_TO_CAM_RF_SCL PGND_CAM0_AF_RET AP_BI_CAM_RF_SDA C350 1 2 C3731 2 C357 1 2 C3581 2 C249 1 2 C3761 2 R721 2 C311 2 FL22 1 2 C841 2 FL31 1 2 FL30 1 2 FL28 1 2 C286 1 2 L27 1 2 L29 1 2 C361 1 2 C353 1 2 FL29 1 2 J3 33 34 35 36 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 4 5 6 7 8 9 XW29 1 2 U13 B2 B1 A1 A2 L34 1 2 3 4 L33 1 2 3 4 L37 1 2 3 4 L38 1 2 3 4 L36 1 2 3 4 C3521 2 C287 1 2 FL43 1 2 C82 1 2 C3511 2 L28 1 2 051-9584 2.0.0 21 OF 23 21 OF 46 1112 234567101112141819 2021 7 2345671011121418 192021 7 12 3 12 7 7 7 7 7 7 7 7 7 7 15 715 12 715
A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BATT CONN, TPS, STANDOFFS/SHIELDS/FIDUCIALS TESTPOINTS E75 - USB/UART/ID/POWER POWER GROUND SPKAMP OUTPUT TP VBUS POWER GROUND VBATT POWER TP SUPER TP PCB: PLACE XW12 AT BATT CONN, PIN 7 HEADPHONE MIC VBATT VBATT GROUND 806-4228 DFU FORCE DFU RESET H6P & BB RESET ANALOG MUX B OUTPUT (ON NORTH END OF SINGLE_BRD, TO MITIGATE COMPASS RETURN CURRENTS) BATTERY CONN 516S1022 RCPT 860-1511 860-1511 THIS ONE ON MLB ---> 516S1023 PLUG (USED ON BATTERY PCM) LCD BACKLIGHT SOURCE POWER GROUND LCD BACKLIGHT SINK1 HEADPHONE MIC POS LCD BACKLIGHT SINK2 MIC3 POSITIVE MIC2 POSITIVE MIC1 POSITIVE DRIVE MIC WRT NEAREST GROUND TEST POINT FOR DIAGS LCM BACKLIGHT MIC AUDIO HEADPHONE MIC NEG SHIELDS POWER GROUND SCREW HOLES STANDOFFS ACCESSORY ID AND POWER ANALOG MUX A OUTPUT AC COUPLED SCREW HOLES + STANDOFFS BATTERY NTC 806-4832 FIDUCIALS 806-4834 806-4230 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 FID 0P5SM1P0SQ-NSP FID 0P5SM1P0SQ-NSP FID 0P5SM1P0SQ-NSP 0P5SM1P0SQ-NSP FID 0P5SM1P0SQ-NSP FID 0P5SM1P0SQ-NSP FID SHORT-10L-0.25MM-SM NP0-C0G 5% 16V 56PF 01005 X7R-CERM 10V 10% 01005 220PF56PF 01005 5% NP0-C0G 16V 01005 NP0-C0G 16V 5% 56PF NP0-C0G 16V 5% 56PF 01005 01005 56PF 5% 16V NP0-C0G 120-OHM-210MA 01005 F-ST-SM RCPT-BATT-N41 STDOFF-2.7OD1.4ID-1.04H-SM-1 STDOFF-2.7OD1.4ID-1.04H-SM-1 SM SHLD-X145-EMI-LOWER-FRONT 01005 27PF 5% 16V NP0-C0GNP0-C0G 16V 5% 56PF 0100501005 NP0-C0G 16V 5% 100PF NP0-C0G 16V 5% 27PF 0100501005 56PF 5% 16V NP0-C0G 100PF 5% 16V NP0-C0G 01005 16V 01005 NP0-C0G 5% 27PF56PF 01005 5% 16V NP0-C0G 16V 5% 100PF 01005 NP0-C0G TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P55 TP-P90 TP-P80 SHLD-EMI-UPPER-BACK SM SM SHLD-EMI-UPPER-FRONT SHLD-X145-EMI-LOWER-BACK SM TP-P6 TP-P6 TP-P6 TP-P6 BATT B2B, TPS, PD FEATURES SYNC_DATE=N/ASYNC_MASTER=N/A SPKAMP_TO_SPEAKER_OUT_CONN_P SPKAMP_TO_SPEAKER_OUT_CONN_N 90_TRISTAR_BI_E75_PAIR1_P 90_TRISTAR_BI_E75_PAIR1_N PP_BATT_VCC PP5V0_USB_CONN PP_BATT_VCC PP_BATT_VCC BATTERY_TO_PMU_NTC PMU_AMUX_BY BATTERY_TO_PMU_SENSE PMU_AMUX_AY PP_E75_TO_TRISTAR_ACC2_CONN PP_E75_TO_TRISTAR_ACC1_CONN 90_TRISTAR_BI_E75_PAIR2_N FORCE_DFU RESET_1V8_L CODEC_TO_HPHONE_HS4_REF_CONN AP_BI_BATTERY_SWI_CONN PGND_STANDOFF2 PGND_STANDOFF1 AP_BI_BATTERY_SWI LCD_BL_CA_CONN LCD_BL_CC1_CONN MIC3_TO_CODEC_P MIC2_TO_CODEC_P MIC1_TO_CODEC_P E75_TO_PMU_ACC_DETECT_CONN CODEC_TO_HPHONE_HS3_REF_CONN LCD_BL_CC2_CONN PGND_SCREW_HOLE1 AP_BI_BATTERY_SWI_CONN 90_TRISTAR_BI_E75_PAIR2_P PP_BATT_VCC TP181 TP191 TP201 TP261 TP271 TP251 TP321 TP101 TP11 TP21 TP151 TP161 TP171 TP281 TP291 TP51 TP61 TP71 TP81 TP91 FD1 1 FD5 1 FD4 1 FD3 1 FD2 1 FD6 1 XW12 1 2 C279 1 2 C2751 2 C91 2 C25 1 2 C23 1 2 C221 2 FL11 1 2 J6 1 10 11 12 2 34 56 78 9 BS1 1 BS2 1 SH2 1 C4381 2 C4361 2 C4341 2 C4371 2 C4351 2 C4331 2 C4321 2 C4301 2 C4271 2 TP111 TP211 TP241 TP231 TP221 TP41 TP341 TP31 SH3 1 SH1 1 SH4 1 TP911 TP921 051-9584 2.0.0 22 OF 23 22 OF 46 1517 1517 1617 1617 812152223 17 812152223 8121522 23 1217 13 12 13 17 17 1617 3 2121314161923 17 22 3 13 19 19 911 89 917 17 17 19 22 1617 8 12 15 22 23
IN IN OUT IN OUT OUT IN BI BI IN OUT OUT IN IN IN IN OUT IN IN BI OUT IN IN OUT IN IN OUT OUT BI BI BI BI BI BI BI BI IN OUT OUT IN OUT OUT OUT OUT IN OUT OUT OUT OUT OUT OUT IN OUT BI BI BI BI BI IN BI OUT OUT BI IN IN RESET_PMU_L BB_SPI_TO_PAC_CS BB_SPI_TO_PAC_CLK AP_HSIC3_RDY BB_SPI_TO_PAC_DATA_MOSI OSCAR_CONTEXT_A OSCAR_CONTEXT_B 50_HSIC_BB_DATA PBL_RUN_BB_HSIC1_RDY BB_HSIC1_REMOTE_WAKE AP_WAKE_MODEM AP_HSIC1_RDY WLAN_HSIC3_RESUME WLAN_HSIC3_DEVICE_RDY CLK32K_AP BB_RST_L RF_RESET_L RESET_DET_L RADIO_ON_L PP_LDO14_2V65 TX_GTR_THRESH BB_UART_RXD BB_UART_RTS_L BB_UART_TXD PP_SYNC HOST_WAKE_BB BB_I2S_RXD BB_I2S_TXD BB_I2S_WS BT_REG_ON BT_UART_TXD BT_WAKE 50_HSIC_BB_STROBE BB_I2S_CLK BT_UART_RTS_L HOST_WAKE_BT BB_UART_CTS_L 90_BB_USB_D_N 90_BB_USB_D_P BB_USB_VBUS ADC_SMPS1_MSMC_1V05 ADC_LVS1 WLAN_UART_TXD BT_UART_CTS_L 50_HSIC_WLAN_STROBE BB_JTAG_TCK BB_JTAG_TMS ADC_LDO6_RUIM_1V8 ADC_SMPS3_MSME_1V8 BT_UART_RXD LAT_SW2_CTL LAT_SW1_CTL 50_HSIC_WLAN_DATA BB_JTAG_TDO BB_JTAG_TRST_L BB_JTAG_TDI PP_WL_BT_VDDIO_AP PP_VCC_MAIN_WLAN PP_BATT_VCC_CONN WLAN_REG_ON WLAN_UART_RXD HOST_WAKE_WLAN BT_PCM_SYNC BT_PCM_OUT BT_PCM_CLK BT_PCM_IN BB_I2S_MCLK BB_I2S2_CLK BB_I2S2_WS BB_I2S2_RXD BB_IPC_GPIO PAC_TO_BB_SPI_DATA_MISO RADIO_MLB OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT RADIO_MLB HIERARCHICAL SYMBOL AP/RADIO INTERFACE <OUT> BB_TO_LAT_SW3_CTL 1012131446 325 325 1325 1325 1529 1325 1625 1625 325 325 31625 31625 325 325 325 325 34101213141646 1325 329 1346 325 1325 1346 346 325 346 325 346 346 346 346 225 225 225 225 325 325 325 346 346 1325 RADIO_TO_PMU_ADC_SMPS1_MSMC_1V05 1325 1325 1325 1325 325 329 BB_TO_AP_PP_SYNC 1726 1729 212131416192225 325 1725 3 25 3 25 3 25 3 25 325 329 3 25 829 829 329 812152225 29 I612 RF 829 SYNC_MASTER=N/A SYNC_DATE=N/A RADIO_MLB HIERARCH. SYMBOL MAKE_BASE=TRUEANTENNA_PAC_TO_BB_SPI_MISO MAKE_BASE=TRUEBB_TO_AP_IPC_GPIO AP_TO_BT_I2S3_DOUT MAKE_BASE=TRUE 45_AP_TO_BT_I2S3_BCLK MAKE_BASE=TRUE BT_TO_AP_I2S3_DIN MAKE_BASE=TRUE AP_TO_BT_I2S3_LRCLK MAKE_BASE=TRUE WLAN_TO_PMU_HOST_WAKE MAKE_BASE=TRUE AP_TO_WLAN_UART4_TXD MAKE_BASE=TRUE PMU_TO_WLAN_REG_ON MAKE_BASE=TRUE MAKE_BASE=TRUEPP_BATT_VCC MAKE_BASE=TRUEPP_VCC_MAIN MAKE_BASE=TRUEPP1V8_SDRAM MAKE_BASE=TRUE AP_TO_BB_JTAG_TDI AP_TO_BB_JTAG_TRST_LMAKE_BASE=TRUE BB_TO_AP_JTAG_TDOMAKE_BASE=TRUE 50_AP_BI_WLAN_HSIC3_DATA MAKE_BASE=TRUE MAKE_BASE=TRUEBB_TO_LAT_SW1_CTL MAKE_BASE=TRUEBB_TO_LAT_SW2_CTL MAKE_BASE=TRUEAP_TO_BT_UART3_TXD RADIO_TO_PMU_ADC_SMPS3_MSME_1V8 MAKE_BASE=TRUE RADIO_TO_PMU_ADC_LDO6_RUIM_1V8 MAKE_BASE=TRUE AP_TO_BB_JTAG_TMSMAKE_BASE=TRUE MAKE_BASE=TRUE AP_TO_BB_JTAG_TCK MAKE_BASE=TRUE50_AP_BI_WLAN_HSIC3_STB MAKE_BASE=TRUEAP_TO_BT_UART3_RTS_L WLAN_TO_AP_UART4_RXD MAKE_BASE=TRUE RADIO_TO_PMU_ADC_LVS1 MAKE_BASE=TRUE MAKE_BASE=TRUE PMU_TO_BB_VBUS_DET MAKE_BASE=TRUE 90_TRISTAR_BI_BB_USB_P MAKE_BASE=TRUE 90_TRISTAR_BI_BB_USB_N MAKE_BASE=TRUE AP_TO_BB_UART1_RTS_L MAKE_BASE=TRUE BT_TO_PMU_HOST_WAKE MAKE_BASE=TRUE MAKE_BASE=TRUEBT_TO_AP_UART3_CTS_L 45_AP_TO_BB_I2S1_BCLK MAKE_BASE=TRUE MAKE_BASE=TRUE50_AP_BI_BB_HSIC1_STB AP_TO_BT_WAKE MAKE_BASE=TRUE MAKE_BASE=TRUEBT_TO_AP_UART3_RXD MAKE_BASE=TRUEPMU_TO_BT_REG_ON AP_TO_BB_I2S1_LRCLK MAKE_BASE=TRUE BB_TO_AP_I2S1_DIN MAKE_BASE=TRUE AP_TO_BB_I2S1_DOUT MAKE_BASE=TRUE BB_TO_PMU_HOST_WAKE MAKE_BASE=TRUE MAKE_BASE=TRUE BB_TO_AP_UART1_RXD MAKE_BASE=TRUE BB_TO_AP_UART1_CTS_L MAKE_BASE=TRUE AP_TO_BB_UART1_TXD MAKE_BASE=TRUE BB_TO_LEDDRV_GSM_BLANK MAKE_BASE=TRUE MAKE_BASE=TRUEPP_LDO14_2P65 AP_TO_RADIO_ON_L MAKE_BASE=TRUE BB_TO_AP_RESET_DET_L MAKE_BASE=TRUE RESET_1V8_L MAKE_BASE=TRUE AP_TO_BB_RST_L MAKE_BASE=TRUE 45_PMU_TO_WLAN_CLK32K MAKE_BASE=TRUE WLAN_TO_AP_HSIC2_RDY MAKE_BASE=TRUE MAKE_BASE=TRUEWLAN_TO_AP_HSIC2_REMOTE_WAKE AP_TO_BB_HSIC1_RDY MAKE_BASE=TRUE MAKE_BASE=TRUEAP_TO_BB_WAKE_MODEM BB_TO_AP_HSIC1_REMOTE_WAKE MAKE_BASE=TRUE BB_TO_AP_HSIC1_RDY MAKE_BASE=TRUE MAKE_BASE=TRUE50_AP_BI_BB_HSIC1_DATA MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_MOSI AP_TO_WLAN_HSIC2_RDY MAKE_BASE=TRUE MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_SCLK MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_CS_L PMU_TO_BB_RST_L MAKE_BASE=TRUE 051-9584 2.0.0 23 OF 23 23 OF 46
TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PROPRIETARY PROPERTY OF APPLE INC. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DESCRIPTION OF REVISION CK APPD 2 1 1245678 B D 6 5 4 3 C A NOTICE OF PROPRIETARY PROPERTY: PAGE THE INFORMATION CONTAINED HEREIN IS THE C A D DATE R SHEET Apple Inc. THE POSESSOR AGREES TO THE FOLLOWING: DRAWING TITLE D SIZE REVISION DRAWING NUMBER BRANCH REV ECN 7 B 3 II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE IV ALL RIGHTS RESERVED III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 8 BOARD :920-2148 BOM :939-0308 SCH :951-2446 BOARD_ID BOM OPTIONS X155 RADIO_MLB SUBDESIGN - PROTO1 10/3/2012 24 OF 46 2012-10-14ENGINEERING RELEASED 1 OF 23 2.0.0 051-9584 2 0001669557 4 CELLULAR PMU: (2 OF 2) R25_RF Y N48_CFG_A255K 1% 010051118S0659 X155 RADIO_MLB SCHEMATIC R25_RF1 Y N51_CFG_B470K 5% 01005117S0159 R25_RF1.00M 1% 010051 Y N51_CFG_A118S0621 R26_RF N51_CFG_A1 Y118S0732 50K 1% 01005 R26_RF N48_CFG_B1 Y100K 1% 01005118S0626 R26_RF1 Y N49_CFG_B118S0621 1.00M 1% 01005 CELLULAR FRONT END: TX AND RX MATCHING9 CELLULAR FRONT END: BAND 5/8 PAD14 5 CELLULAR BASEBAND: (1 OF 2) CELLULAR RF TRANSCEIVER: (2 OF 2)8 CELLULAR FRONT END: BAND 1/4 PAT11 CELLULAR FRONT END: BAND 2/3 PAD12 22 FRONT END LOGIC TABLE (2 OF 2) FRONT END LOGIC TABLE (1 OF 2)21 20 CELLULAR FRONT END: ANTENNA FEEDS 17 CELLULAR FRONT END: 2G FEM 16 CELLULAR FRONT END: PA DCDC CONVERTER CELLULAR FRONT END: BAND 13/17 PAD15 1 EEE FOR 939-0308 EEEE_????825-2029 Y NA 951-2446 SCH Y1 X145_RADIO_MLB CELLULAR FRONT END: GPS LNA19 CELLULAR RF TRANSCEIVER: (1 OF 2)7 R25_RF1 Y N49_CFG_B118S0732 50K 1% 01005 R25_RF N49_CFG_A1 Y100K 1% 01005118S0626 R26_RF N49_CFG_A1 Y118S0650 499K 1% 01005 R25_RF1 Y N48_CFG_B118S0689 147K 1% 01005 3 CELLULAR PMU: (1 OF 2) R26_RF1 Y N48_CFG_A118S0626 100K 1% 01005 2 AP INTERFACE & DEBUG CONNECTORS CONTENTSPDF PAGE R26_RF1 Y118S0623 267K 1% 01005 N53_CFG_B 6 CELLULAR BASEBAND: (2 OF 2) WIFI/BT: MODULE AND FRONT END23 CELLULAR FRONT END: RX DIVERSITY18 13 CELLULAR FRONT END: BAND 20 PAD CELLULAR FRONT END: SAW BANKS10 1 Y N53_CFG_B118S0626 R25_RF100K 1% 01005 R26_RF1 Y N53_CFG_A118S0726 162K 1% 01005 R25_RF1 Y N53_CFG_A118S0626 100K 1% 01005 118S0626 R26_RF1 Y N51_CFG_B100K 1% 01005
OUT OUT OUT OUT OUT IN OUT OUT BI IN BI OUT OUT IN IN IN IN IN OUT OUT OUT OUT OUT IN BI IN OUT IN IN IN OUT OUT IN IN OUT OUT OUT BI OUT IN IN PP PP PP PP PP PP PP PP PP OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IO IO IO IO IO IO IO IO IO IO OUT OUT OUT IN OUT PP PP OUT PP PP PP PP PP PP IN IN IN OUT OUT OUT PP PP PP GND PP PP PP PP CLK RST VCC SWP GND DETECT I/O IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST SIM CARD CONNECTOR SIM CARD ESD PROTECTION AP INTERFACE & DEBUG CONNECTORS IN = FROM AP AP CONNECTIONS OUT = TO AP PROBE POINTS GPIO51/BOOT_CONFIG_3 GPIO53/BOOT_CONFIG_1 GPIO48/BOOT_CONFIG_6 GPIO54/BOOT_CONFIG_0 NC SW REGISTER 0X00 0X01 0X08 0X03 47 BOOT_CONFIG ENABLE SAHARA PROTOCOL X BOOT_NAND_OPTION BOOT_HSIC_OPTION BOOT_USB_OPTION BOOT_DEFAULT_OPTION BOOT OPTIONS 0X02 VALUE X X X X 6 GPIO/BOOT_CONFIG CONFIGURATION 48 0 1 1 1 1 0 0 1 0 X X X 0 0 0 0 000 0 0 5 49 0 34 0 50 0 51 1 0 100 1 10 0 0 52 2 53 0 54 0 1 0 X X X X 55 NC DEBUG CONNECTOR NC NC NOSTUFF AXE654124 M-ST-SM 12V-33PF 01005-1 15.00K MF 1/32W 1% 01005 SM P4MM P4MM SM P4MM SM P4MM SM P4MM SM P4MM SM P4MM SM MM4829-2702 F-ST-SM NOSTUFF F-ST-SM MM4829-2702 NOSTUFF SM P4MM P4MM SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM P4MM SM SM P4MM P4MM SM P4MM SM SM P4MM P4MM SM SM P4MM P4MM SM P4MM-NSM SM SM P4MM-NSM P4MM-NSM SM SON4 TPD4E101DPWR 01005 6.3V CERM 100PF 5% P4MM SM SM P4MM P4MM SM SM P4MM AP INTERFACE & DEBUG CONNECTORS BB_I2S_CLK BB_I2S_TXD BB_I2S_RXD BB_I2S_WS 50_HSIC_WLAN_STROBE 50_HSIC_WLAN_DATA BT_UART_TXD BT_UART_RXD 50_HSIC_BB_STROBE WLAN_HSIC3_DEVICE_RDY SIM_TRAY_DETECT BB_I2S2_CLK BB_I2S2_WS BB_I2S_MCLK OSCAR_CONTEXT_A SIM_TRAY_DETECT SIMCRD_CLK_CONNSIMCRD_RST_CONN SIMCRD_IO_CONN BB_I2S2_RXD BB_I2S_RXD BB_I2S_CLK WLAN_UART_RXD 50_HSIC_WLAN_DATA BT_UART_TXD BT_UART_RXD BT_UART_RTS_L BT_UART_CTS_L BB_SPI_TO_PAC_CS BB_SPI_TO_PAC_CLK BB_JTAG_TMS BB_JTAG_TRST_L ADC_SMPS1_MSMC_1V05 BB_JTAG_TCK BT_PCM_IN BB_UART_TXD AP_WAKE_MODEM HOST_WAKE_BB 50_HSIC_WLAN_STROBE HOST_WAKE_BT AP_HSIC3_RDY CLK32K_AP PP_LDO6_RUIM_1V8 PP_BATT_VCC_CONN LTE_COEX_TXD WTR_RF_ON WTR_RX_ON AP_HSIC3_RDY RESET_PMU_L RESET_DET_L BB_RST_L WLAN_HSIC3_RESUME PBL_RUN_BB_HSIC1_RDY RF_RESET_L ADC_LVS1 BB_IPC_GPIO ADC_LDO6_RUIM_1V8 ADC_SMPS3_MSME_1V8 BB_JTAG_TDO PAC_TO_BB_SPI_DATA_MISO BB_SPI_TO_PAC_DATA_MOSI BT_PCM_OUT BT_PCM_SYNC BT_REG_ON BT_PCM_CLK BT_WAKE WLAN_HSIC3_DEVICE_RDY HOST_WAKE_WLAN WLAN_REG_ON PP_WL_BT_VDDIO_AP PP_SYNC 90_BB_USB_D_N 90_BB_USB_D_P BB_USB_VBUS BB_UART_CTS_L BB_UART_RTS_L BB_UART_RXD BB_HSIC1_REMOTE_WAKE 50_HSIC_BB_STROBE AP_HSIC1_RDY RADIO_ON_L TX_GTR_THRESH WLAN_HSIC3_RESUME PP_SMPS3_MSME_1V8 SIM_TRAY_DETECT BB_JTAG_TRST_L BB_JTAG_RTCLK AP_HSIC1_RDY PMIC_RESOUT_L BB_JTAG_TMS GPIO_51 GPIO_DEBUG_LED BB_UART_CTS_L BB_UART_TXD PS_HOLD_PMIC BB_UART_RXD LAT_SW1_CTL 2G_FEM_S1 2G_FEM_S4 PBL_RUN_BB_HSIC1_RDY BB_JTAG_TDI BB_UART_RTS_L SIMCRD_IO_CONN RF_RESET_L BB_JTAG_TCK RESET_PMU_L RESET_DET_L SIMCRD_CLK_CONN BB_RST_L SIMCRD_RST_CONN 90_BB_USB_D_P BT_WAKE WLAN_REG_ON PP_LDO6_RUIM_1V8 90_BB_USB_D_N BT_REG_ON PP_LDO6_RUIM_1V8 50_HSIC_BB_STROBE 50_HSIC_BB_DATA ADC_SMPS1_MSMC_1V05PP_SMPS1_MSMC_1V05 ADC_SMPS3_MSME_1V8PP_SMPS3_MSME_1V8 ADC_LDO6_RUIM_1V8PP_LDO6_RUIM_1V8 ADC_LVS1PP_LVS1 SIMCRD_IO_CONN BB_JTAG_TDO BB_USB_VBUS RADIO_ON_L DEBUG_RST_L BB_ERROR_FLAG HOST_WAKE_BB 50_HSIC_BB_DATA 50_HSIC_BB_DATA WLAN_UART_TXD PP_BATT_VCC_CONN BB_JTAG_TDI OSCAR_CONTEXT_B PP_LDO14_2V65 LAT_SW1_CTL LAT_SW2_CTL PMIC_SSBI SLEEP_CLK_32K 19P2M_MDM CLK32K_AP WTR_SSBI_TX_GPS WTR_SSBI_PRX_DRX BB_I2S_TXD BB_I2S_WS PP_VCC_MAIN_WLAN WLAN_COEX_TXD F-ST-SM SIMCRD_CLK_CONN SIMCRD_RST_CONN SIM-CARD-N48 051-9584 2.0.0 2 OF 23 25 OF 46 28 27 2325 28 2325 28 2325 28 2325 28 2325 28 2325 28 2325 28 2325 29 28 2325 28 27 292325 462325 292325 292325 292325 29 294041 292325 25 23 27 2325 50 42 44 46 48 32 34 36 38 40 26 22 24 28 30 16 14 12 18 20 2 10 8 6 4 49 47 45 43 41 33 31 29 27 25 23 21 35 37 39 7 5 3 1 19 17 15 9 11 13 52 54 51 53 55 58 57 56 J1_RF 2728 2529 2529 2529 2526282931 252628 2529 2940 1 2 C1_RF 272325 1 2 R3_RF 29 2325 29 2325 29 2325 29 2325 462325 2529 2529 2529 2529 1 PP3_RF 1 PP2_RF 1 PP1_RF 1 PP18_RF 1 PP15_RF 1 PP14_RF 1 PP11_RF 4 2 3 1 J3_RF 4 2 3 1 J2_RF 1 PP21_RF 1 PP22_RF 462325 21 XW12_RF 21 XW13_RF 21 XW14_RF 21 XW15_RF 1 PP40_RF 1 PP41_RF 1 PP42_RF 1 PP43_RF 1 PP44_RF 1 PP45_RF 1 PP46_RF 1 PP47_RF 1 PP10_RF 1 PP19_RF 1 PP20_RF 3 41 2 5 U5_RF 2 1 C177_RF 1 PP4_RF 1 PP5_RF 1 PP6_RF 1 PP7_RF 3 2 1 6 8 9 10 11 13 5 12 7 J11_RF 40232526 34 35 36 37 38 39 2 6 2 6 2 6 2 6 2 23 2 23 2 23 2 23 2 5 2 23 6 6 6 623 2 6 2 626 26 6 26 26 23 223 223 223 23 23 620 620 25 25 2 25 23 26 6 26 23 223 23 223 223 235 6 23 23 6 7 6 7 2 23 24 26 24 223 26 2 2 6 2 2 25 620 620 23 23 223 23 223 223 23 223 23 6 25 25 25 26 26 26 6 25 26 24 6 2 23 2 3 5 2 5 2 5 235 223568 2235 235 6 25 2 5 23 2311121314151617 25 623 310171820 26 6 4 5 4 5 4 5 2 23 6 7 6 7 26 26
OUT OUT OUT OUT IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT IN VDD_S4 VSW_S5 VSW_S3 VSW_S2 VREG_XO VREG_S5 VREG_S4 VREG_RFCLK VREG_L9 VREG_L8 VREG_L7 VREG_L6 VREG_L5 VREG_L4 VREG_L3 VREG_L2 VREG_L14 VREG_L13 VREG_L12 VREG_L11 VREG_L10 VOUT_LVS1 VDD_XO VDD_S5 VDD_S2 VDD_S1 VDD_L9 VDD_L8 VDD_L7 VDD_L5_L6_L13_L14 VDD_L4 VDD_L2_L3 VDD_L12 VDD_L10_L11 REF_GND REF_BYP VSW_S5_2 VREG_S3 VSW_S4 VDD_S3 VSW_S1 VREG_S1 VREG_S2 VREG (SYM 5 OF 5) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT INTERNAL USE ONLY INTERNAL USE ONLY PMU (1 OF 2) 20% X5R 01005 0.1UF 4V 20% 6.3V X5R-CERM 0603-3 22UF 20% 6.3V 0603-3 X5R-CERM 22UF 20% 6.3V X5R-CERM-1 22UF 603 20% 6.3V 22UF X5R-CERM-1 603 0201-1 20% 6.3V X5R 1.0UF 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V 1.0UF X5R 0402 20% 10UF 6.3V CERM 0402 20% 10UF 6.3V CERM 0402 20% 10UF 6.3V CERM 0402 20% 10UF 6.3V CERM 0402 20% 10UF 6.3V CERM 0201-1 1.0UF 20% 6.3V X5R 2.2UH-20%-1.2A-0.15OHM 0806 2.2UH-20%-1.2A-0.15OHM 0806 2.2UH-20%-1.2A-0.15OHM 0806 0806 2.2UH-20%-1.2A-0.15OHM 20% 6.3V 22UF X5R-CERM-1 603 0201-1 20% 6.3V 1.0UF X5R 20% 4.7UF X5R-CERM 10V 0402 20% 4.7UF 10V 0402 X5R-CERM 20% X5R-CERM 0402 10V 4.7UF 20% 0402 10V 4.7UF X5R-CERM 20% 4.7UF 10V X5R-CERM 0402 20% 0.1UF NOSTUFF 01005 X5R 4V 20% 10UF 6.3V 0402 CERM 20% 10UF 6.3V 0402 CERM 16V NP0-C0G 56PF 5% 01005 20% 10UF 6.3V 0402 CERM 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V X5R 1.0UF SHORT-10L-0.1MM-SM NOSTUFF PM8018-0 BGA TFA252010-SM 2.2UH-20%-2.3A-0.115OHM CELLULAR PMU: (1 OF 2) PP_VSW_S4 PP_SMPS5_DSP_1V05 PP_VSW_S5 PP_SMPS3_MSME_1V8 PP_SMPS4_RF2_2V05 PP_VSW_S1PP_BATT_VCC_CONN PP_SMPS4_RF2_2V05 PP_SMPS5_DSP_1V05 PP_VSW_S3 PP_VSW_S2 PP_LDO9_PLL_1V05 PP_LDO8_VDDPX_1V2 PP_LDO11_MDSP_FW_1V05 PP_LDO10_ADSP_1V05 PP_SMPS3_MSME_1V8 REF_GND REF_BYP S4_GND S1_GND S2_GND S2_GND S5_GND S1_GND S4_GNDS3_GND S5_GND PP_LVS1 PP_SMPS1_MSMC_1V05 S3_GND PP_SMPS2_RF1_1V3 PP_LDO4_VDDA_3V3 PP_LDO2_XO_HS_1V8 PP_LDO6_RUIM_1V8 PP_LDO14_2V65 PP_LDO7_DAC_1V8 PP_VREG PP_LDO1 PP_LDO3_AMUX_1V8 PP_LDO5_GPS_LNA_2V5 PP_LDO12_MDSP_SW_1V05 PP_LDO13_VDDPX_2V95 051-9584 2.0.0 3 OF 23 26 OF 46 2831 2526282931 2631 26 2631 2526282931 2 1 C50_RF 2 1 C57_RF 2 1 C58_RF 2 1 C56_RF 2 1 C55_RF 28 28 432325 33 40 41 28 2528 42 2728 28 28 28 28 28 28 26 2 1 C3_RF 2 1 C2_RF 2 1 C4_RF 2 1 C5_RF 2 1 C6_RF 2 1 C7_RF 2 1 C8_RF 2 1 C9_RF 2 1 C10_RF 2 1 C11_RF 2 1 C13_RF 2528 2528 2 1 C12_RF 21 L1_RF 21 L4_RF 21 L2_RF 21 L3_RF 2 1 C59_RF 2 1 C52_RF 2 1 C46_RF 2 1 C47_RF 2 1 C48_RF 2 1 C49_RF 2 1 C51_RF 2 1 C60_RF 2 1 C44_RF 2 1 C42_RF 40 2325343536373839 2 1 C45_RF 2 1 C43_RF 2 1 C53_RF 2 1 C54_RF 21 XW17_RF 98 24 88 82 87 48 42 90 20 76 105 13 77 54 63 17 11 84 32 31 29 23 43 55 65 53 8 101 89 95 104 70 58 75 5 78 44 64 59 34 28 100 12 81 18 6 92 97 79 83 102 U2_RF 21 L5_RF 3 4 3 4 3 4 34 3 4 34 3434 34 3 4
OUT IN IN IN OUT OUT IN OUT OPT_1 PM_RESIN_N KPD_PWR* BAT_ID LED_DRV_N OPT_2 PM_MDM_INT_N PM_USR_INT_N PON_RESET* PON_TRIG SSBI PS_HOLD (SYM 1 OF 5) CONTROL GND0 XTAL_32K_OUT XTAL_32K_IN XTAL_19M_OUT XTAL_19M_IN XOADC_GND XO_THERM XO_OUT_D0_EN XO_OUT_D0 XO_OUT_A1 XO_OUT_A0 SLEEP_CLK RSVD GND1 (SYM 2 OF 5) CLOCKS GND_S3 GND_S2 GND_S1 GND_S4 GND_S5 GND VCOIN (SYM 3 OF 5) INPUT PWR MPP_06 MPP_05 MPP_04 MPP_03 MPP_02 MPP_01 GPIO_06 GPIO_05 GPIO_04 GPIO_03 GPIO_02 GPIO_01 (SYM 4 OF 5) MPP MISC OUT IN IN BI IN OUT OUT IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST REVISIONBOARD_ID 0.7V NC NC GND NEEDS TO BE CLEARED UNDER THIS CRYSTAL TO MINIMIZE THERMAL DRIFT NC NC PA_ID < 1.00V FOR MAV8 PA_ID > 1.00V FOR MAV7 NC NEEDS ITS OWN THERMISTOR PLACED NEAR THE PA’S. PA THERMISTOR REMOVED TO MATCH N41, AP SECTION EVT2 EVT1 DVT PVT1.7V 1.5V 1.3V PROTO20.9V PROTO1 NC NC NC NC NCNC NC PMU (2 OF 2) NC NC 1.1V X5R-CERM 01005 10% 6.3V 1000PF NOSTUFF 15.8K MF 1/32W 1% 01005 NOSTUFF 102K 01005 1/32W 1% MF 20.0K 5% 01005 MF 1/32W MF 01005 5% 1.00K 1/32W SHORT-10L-0.1MM-SM 100K MF 1/32W 1% 01005 SHORT-10L-0.25MM-SM NOSTUFF NOSTUFF SHORT-10L-0.25MM-SM SHORT-10L-0.25MM-SM NOSTUFF NOSTUFF SHORT-10L-0.25MM-SM SHORT-10L-0.25MM-SM NOSTUFF PM8018-0 BGA BGA PM8018-0 BGA PM8018-0 BGA PM8018-0 19.200MHZ 2.0X1.6-SM 100K 01005 1% 1/32W MF 01005 61.9K 1% 1/32W MF CELLULAR PMU: (2 OF 2) BOARD_ID VREF_DAC_BIAS VDDPX_BIAS PA_ID S3_GND S2_GND S1_GND S4_GND S5_GND 19P2M_CLK_EN 19P2M_WTR SLEEP_CLK_32K RESET_PMU_L RADIO_ON_L PM_USR_IRQ_L PMIC_RESOUT_L PMIC_SSBI PS_HOLD_PMIC PP_LDO3_AMUX_1V8 BB_RST_L PS_HOLD 19P2M_MDM PM_MDM_IRQ_L 19P2M_XTAL_IN XO_GND XO_THERM_Y1 19P2M_XTAL_OUT PP_LDO3_AMUX_1V8 051-9584 2.0.0 4 OF 23 27 OF 46 2 1 C127_RF 29 29 1 2 R26_RF 1 2 R25_RF 1 2 R20_RF 29 25 23 28 30 1 2 R21_RF 2 1 XW10_RF 1 2 R22_RF 262728 21 XW2_RF 21 XW3_RF 21 XW1_RF 2528 21 XW4_RF 21 XW16_RF 62 16 69 35 86 74 14 21 4 41 68 47 U2_RF 27 15 3 2 1 22 10 9 25 37 19 26 7 45 U2_RF 56 30 96 103 91 36 93 99 94 39 51 61 46 52 40 57 U2_RF 80 73 72 66 67 85 49 71 60 50 38 33 U2_RF 3 24 1 Y1_RF 1 2 R23_RF 1 2 R24_RF 2528 28 262728 2528 25 23 2528 29 25 23 3 3 3 3 3 2
IN IN IN IN ININ IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN BI BI IN OUT OUT OUT IN IN IN IN IN IN IN BI BI IN BI IN IN IN IN IN IN IN IN VDD_MDSP_SW GND VDD_A1 VDD_A1 GND GND VDD_A2 VDD_A2 VDD_ADSP VDD_CORE VDD_DDR VDD_MDSP_FW VDD_MEM VDD_P1 VDD_P3 VDD_PLL1 VDD_P7 VDD_P4 VDD_P5 VDD_P6 VDD_QFUSE_PRG VDD_USB_3P3 VDD_USB_1P8 VDD_HVPAD_BIAS VDD_P2 VDD_PLL2 PWR (5 OF 6) GND GND GND_ANA GND (6 OF 6) EBI2_AD_0 EBI2_AD_1 EBI2_AD_6 EBI2_AD_5 EBI2_AD_7 EBI1_CAL EBI2_CLE* EBI2_ALE* EBI2_AD_2 EBI2_AD_3 EBI2_AD_4 EBI2_NAND_CS* EBI2_BUSY* EBI2_OE* EBI2_WE* (2 OF 6) EBI1_EBI2 TCK RTCK MODE_1 MODE_0 CXO CXO_EN SDC1_DATA3 SDC1_DATA2 SDC1_CLK SDC1_DATA1 SDC1_DATA0 SDC1_CMD USB_HS_DM USB_HS_ID USB_HS_VBUS USB_HS_SYSCLK TDI HSIC_CAL USB_HS_REXT DNC TMS USB_HS_DP DNC TDO RESIN* TRST* RESOUT* HSIC_DATA HSIC_STB SRST* SLEEP_CLK SSBI_PMIC DIGITAL (1 OF 6) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT NC NC NC NC NC NC NC NC NCNC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC ID IS NC NC NC NC BASEBAND (1 OF 2) 20% 1.0UF X5R 6.3V 0201-1 6.3V X5R 1.0UF 20% 0201-1 20% 6.3V X5R 1.0UF 0201-1 X5R 20% 6.3V 1.0UF 0201-1 20% X5R 6.3V 1.0UF 0201-1 6.3V 20% 1.0UF X5R 0201-1 6.3V X5R 20% 1.0UF 0201-1 X5R 20% 6.3V 1.0UF 0201-1 20% X5R 6.3V 1.0UF 0201-1 1.0UF 6.3V X5R 20% 0201-1 X5R 6.3V 1.0UF 20% 0201-1 X5R 1.0UF 6.3V 20% 0201-1 1.0UF X5R 20% 6.3V 0201-1 X5R 20% 6.3V 1.0UF 0201-1 X5R 6.3V 1.0UF 20% 0201-1 20% X5R 6.3V 1.0UF 0201-1 6.3V X5R 20% 1.0UF 0201-1 6.3V 20% X5R 1.0UF 0201-1 1.0UF 20% 6.3V X5R 0201-1 20% 1.0UF X5R 6.3V 0201-1 1.0UF 20% X5R 6.3V 0201-1 1.0UF 20% 6.3V X5R 0201-1 1.0UF X5R 20% 6.3V 0201-1 20% 6.3V X5R 1.0UF 0201-1 20% 6.3V X5R 1.0UF 0201-1 0.1UF 01005 NOSTUFF X5R 4V 20% MF 1/32W 1% 240 01005 240 1% 01005 1/32W MF 6.3V 1.0UF 20% X5R 0201-1 470K 5% 1/32W MF 01005 200 1% 1/32W MF 01005 MDM9615M BGA MDM9615M BGA BGA MDM9615M MDM9615M BGA CELLULAR BASEBAND: (1 OF 2) BB_JTAG_TCK BB_JTAG_RTCLK 19P2M_MDM 90_BB_USB_D_N BB_USB_VBUS BB_JTAG_TDI 50_HSIC_CAL RREFEXT 90_BB_USB_D_P BB_JTAG_TDO PMIC_RESOUT_L BB_JTAG_TRST_L 50_HSIC_BB_DATA 50_HSIC_BB_STROBE DEBUG_RST_L SLEEP_CLK_32K PMIC_SSBI EBI1_CAL PP_LDO11_MDSP_FW_1V05 PP_LDO3_AMUX_1V8 PP_LDO13_VDDPX_2V95 VDDPX_BIAS PP_LDO4_VDDA_3V3 PP_LVS1 PP_LDO8_VDDPX_1V2 PP_SMPS3_MSME_1V8 PP_LDO6_RUIM_1V8 PP_SMPS3_MSME_1V8 PP_LDO9_PLL_1V05 PP_SMPS3_MSME_1V8 PP_LDO9_PLL_1V05 PP_LDO12_MDSP_SW_1V05 PP_SMPS3_MSME_1V8PP_SMPS1_MSMC_1V05 PP_LDO10_ADSP_1V05 PP_LDO7_DAC_1V8 19P2M_CLK_EN BB_JTAG_TMS PP_LDO2_XO_HS_1V8 PP_SMPS1_MSMC_1V05 PP_LDO10_ADSP_1V05 PP_SMPS3_MSME_1V8 PP_SMPS3_MSME_1V8 PP_SMPS1_MSMC_1V05 PP_SMPS3_MSME_1V8 PP_SMPS2_RF1_1V3 PP_LDO12_MDSP_SW_1V05 PP_LDO11_MDSP_FW_1V05PP_LDO9_PLL_1V05 051-9584 2.0.0 5 OF 23 28 OF 46 2628 2526282931 2526282931 2628 26282628 2526282931 2628 252628 2526282931 2628 2628 26 27 2527 25 23 25 23 25 23 25 23 2527 25 25 23 25 23 25 23 27 25 2523 2628 2627 2628 26 2526 26 2526282931 2523 2523 2527 2527 2 1 C15_RF 2 1 C18_RF 2 1 C20_RF 2 1 C23_RF 2 1 C26_RF 2 1 C16_RF 2 1 C24_RF 2 1 C19_RF 2 1 C21_RF 2 1 C27_RF 2 1 C30_RF 2 1 C34_RF 2 1 C35_RF 2 1 C14_RF 2 1 C17_RF 2 1 C22_RF 2 1 C25_RF 2 1 C28_RF 2 1 C29_RF 2 1 C68_RF 2 1 C70_RF 2 1 C69_RF 252628 26 2 1 C33_RF 2 1 C32_RF 2 1 C36_RF 2526 26 2526282931 2631 2 1 C31_RF 1 2 R9_RF 1 2 R10_RF 2526282931 252628 2 1 C71_RF 1 2 R6_RF 1 2 R7_RF F20 N17 N16 N15 T19 F13 J8 AA15 AA7 W9 AA11 AA18 U6 U7 C5 C6 E6 E7 F5 F12 F14 F8 F9 G12 G9 H12 H9 J12 J13 J9 K12 K13 K8 K9 L12 L13 L8 L9 M12 M13 M8 M9 N12 N13 N8 N9 P12 P9 R12 R9 T8 T9 AA20 B19 M20 T15 T16 T17 U14 U15 U16 U17 U19 N19 P15 P16 P17 P19 C17 C18 E17 F17 G13 G14 G7 G8 H13 H14 H7 H8 P13 P14 P7 P8 R13 R14 R7 R8 A14 A19 F21 M1 M21 A15 G1 G21 L1 U1 W19 K17 L17 A11 A2 A3 A7 B13 E10 E12 E16 K21 W12 U1_RF T11 T7 L16 K16 U2 V19 A21 AA1 L15 M15 M16 R16 R15 N14 P6 P11 F7 F6 U13 AA21 B11 B14 B15 B2 B7 C19 F10 F15 F16 F19 G10 G11 G15 G16 G17 G2 G20 G6 H10 H11 H15 H16 H6 J10 J11 J14 J15 J6 J7 K10 K11 K14 K15 K20 K6 K7 L10 L11 L14 L2 L6 L7 M10 M11 M14 M17 M19 M6 M7 N10 N11 N6 N7 P10 R10 R11 R17 R19 R6 T10 T12 T13 T14 F11 J16 T6 U12 U9 W14 W7 Y11 Y15 Y18 Y7 W13 U1_RF J20 J19 H21 H19 E21 C21 C20 E20 G19 H20 J21 D21 D19 E19 D20 U1_RF Y3 Y2 Y19 W20 V20 U21 N21 N20 L21 L20 L19 K19 E11 C12 C10 B12 AA2 A8 A12 E9 C9 B9 B10 A10 E8 C8 W4 C11 A9 AA3 Y20 AA4 U20 C7 B8 Y4 AA19 Y21 U1_RF
IN IN OUT IN IN OUT OUT OUT OUT IN IN OUT OUT OUT OUT OUT OUT OUT BI OUT BI IN BI OUT OUT BI OUT OUT OUT OUT OUT OUT IN OUT IN IN IN OUT OUT OUT IN OUT OUT OUT OUT OUT OUT IN OUT OUT OUT OUT OUT IN OUT IN OUT ALIAS ALIAS IN IN OUT OUT GND VCC SI/SIO0 WP*/SIO2 SCLK CS* NC/SIO3 NC SO/SIO1 IN OUT BI IN OUT OUT OUT IN IN BBRX_QP_CH1 BBRX_QP_CH0 TX_DAC0_QP BBRX_IP_CH1 BBRX_IM_CH0 TX_DAC0_IREF DAC0_VREF GNSS_BB_QP GNSS_BB_IP BBRX_IP_CH0 GNSS_BB_QM GNSS_BB_IM BBRX_QM_CH1 BBRX_QM_CH0 TX_DAC0_IMBBRX_IM_CH1 TX_DAC1_IP TX_DAC1_IM DNC BBRX_QP_CH2 BBRX_QM_CH2 BBRX_IM_CH2 TX_DAC0_QM TX_DAC0_IP TX_DAC1_QM TX_DAC1_QP BBRX_IP_CH2 ANALOG (4 OF 6) (3 OF 6) GPIO GPIO_9 GPIO_8 GPIO_20 GPIO_15 GPIO_23 GPIO_7 GPIO_2 GPIO_1 GPIO_85 GPIO_17 GPIO_24 GPIO_18 GPIO_22 GPIO_21 GPIO_5 GPIO_6 GPIO_3 GPIO_0 GPIO_84 GPIO_13 GPIO_12 GPIO_16 GPIO_19 GPIO_86 GPIO_87 GPIO_4 GPIO_80 GPIO_82 GPIO_83 GPIO_81 GPIO_11 GPIO_10 GPIO_14 GPIO_78 GPIO_79 GPIO_70 GPIO_77 GPIO_69 GPIO_71 GPIO_66 GPIO_67 GPIO_68 GPIO_64 GPIO_65 GPIO_62 GPIO_60 GPIO_63 GPIO_61 GPIO_56 GPIO_59 GPIO_58 GPIO_57 GPIO_53 GPIO_55 GPIO_49 GPIO_52 GPIO_54 GPIO_50 GPIO_51 GPIO_47 GPIO_46 GPIO_43 GPIO_48 GPIO_27 GPIO_25 GPIO_44 GPIO_42 GPIO_45 GPIO_41 GPIO_28 GPIO_26 GPIO_39 GPIO_38 GPIO_36 GPIO_40 GPIO_29 GPIO_30 GPIO_35 GPIO_37 GPIO_34 GPIO_31 GPIO_33 GPIO_32 GPIO_72 GPIO_75 GPIO_74 GPIO_73 GPIO_76 IN IN IN IN IN IN IN OUT IN OUT OUT BI OUT OUT OUT OUT OUT OUT OUT BI OUT OUT OUT OUT OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST BASEBAND (2 OF 2) GSM_PA_HB_EN NC NC GRFC_27,SW GRFC_1,PA_ON GRFC_0,PA_ON NC, WTR_GP_DATA2 NC LAT_SW3_CTL NC, SECOND TRANSCEIVER RF_ON CONTROL GRFC_24,SW NC BOOT_CONFIG_0 NC GRFC_33 NC BOOT_CONFIG_2 BOOT_CONFIG_3 GRFC_25,SW BOOT_CONFIG_1 GRFC_14 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC GRFC_21 GRFC_10 NC NC GRFC_13 GRFC_26,SW GRFC_7,PA_ON GRFC_9,SW GRFC_4,PA_ON NC GRFC_39 GRFC_38 GRFC_37 GRFC_36 GRFC_35,SW BOOT_CONFIG_6 GRFC_28,SW GRFC_29,SW GRFC_30,SW GRFC_31 GRFC_3,PA_ON GRFC_15 GRFC_11 GRFC_8,PA_ON PA_R0 GRFC_5,PA_ON GRFC_6,PA_ON GRFC_2,PA_ON NC GRFC_22 GRFC_23 GRFC_34 GRFC_32 NC BOOT_CONFIG_4 BOOT_CONFIG_5 NC, ELNA CONTROL NC, APT_BYPASS GRFC_18,SW GRFC_19,SW GRFC_20 GSM_PA_LB_EN NC I2C_SDA I2C_SCL 0.1UF 4V X5R 20% 01005 X5R 20% 0.1UF 4V 01005 SERIAL-SPI-2MX8-1.8V WLCSP MX25U1635EBAI-10G 70-OHM-300MA 01005-1 MDM9615M BGA MDM9615M BGA01005 100K 1% 1/32W MF CELLULAR BASEBAND: (2 OF 2) OSCAR_CONTEXT_A AP_WAKE_MODEM PP_SMPS3_MSME_1V8 SIM_TRAY_DETECT PRX_BB_I_P PRX_BB_Q_P PRX_BB_Q_N PRX_BB_I_N WTR_GP_DATA0 GPH GPHWTR_GP_DATA1 PA_ON_B2_B3 PA_ON_B1_B4 WTR_RX_ON SPI_CS_L SPI_CLK BB_I2S_CLK BB_UART_TXD BB_I2S_TXD BB_SPI_TO_PAC_DATA_MOSI SIMCRD_CLK_CONN SIMCRD_RST_CONN PP_SYNC BB_I2S_MCLK BB_I2S_RXD BB_I2S_WS BB_SPI_TO_PAC_CS PAC_TO_BB_SPI_DATA_MISO SIMCRD_IO_CONN BB_UART_CTS_L BB_UART_RTS_L GPIO_DEBUG_LED HOST_WAKE_BB PM_USR_IRQ_L BB_SPI_TO_PAC_CLK AP_HSIC1_RDY RESET_DET_L PS_HOLD PM_MDM_IRQ_L SPI_DATA_MOSI SPI_DATA_MISO BB_UART_RXD OSCAR_CONTEXT_B PBL_RUN_BB_HSIC1_RDY WTR_SSBI_PRX_DRX WLAN_TX_BLANK BB_IPC_GPIO WTR_SSBI_TX_GPS LTE_COEX_TXD LTE_ACTIVE BB_HSIC1_REMOTE_WAKE BB_PDM LTE_COEX_RXD DCDC_EN DCDC_MODE LAT_SW2_CTL 2G_FEM_S3 2G_FEM_S2 2G_FEM_S4 2G_FEM_S0 TX_GTR_THRESH 2G_FEM_S5 2G_FEM_S1 GPIO_51 2G_FEM_S6 LAT_SW1_CTL BB_I2S2_RXD BB_I2S2_CLK PA_R1 WTR_RF_ON BB_I2S2_WS PA_BS PA_ON_B13_B17 PA_ON_B5_B8 PA_ON_B20 BB_ERROR_FLAG WTR_BB_TX_DAC_IREF VREF_DAC_BIAS PP_SPI_NOR_1V8PP_SMPS3_MSME_1V8 SPI_CLK SPI_CS_L SPI_DATA_MISO LTE_COEX_RXD LTE_COEX_TXDLTE_FRAME_SYNC LTE_WLAN_PRIORITY SPI_DATA_MOSI DRX_BB_I_P DRX_BB_I_N DRX_BB_Q_P TX_BB_I_P TX_BB_I_N TX_BB_Q_P TX_BB_Q_NDRX_BB_Q_N GPS_BB_I_P GPS_BB_I_N GPS_BB_Q_P GPS_BB_Q_N 051-9584 2.0.0 6 OF 23 29 OF 46 29 2 1 C61_RF 2523 25 23 25 23 25 23 25 23 29 2523 39 29 2 1 C62_RF 25 2530 27 27 39 2523 34 35 36 37 38 25 23 25 23 25 23 25 23 29 2530 2523 2523 2530 43 2325 43 2325 43 2325 27 30 2523 25 2523 46 30 2946 252946 46 39 30 2523 33 40 41 33 40 41 40 38 34 30 2530 36 34353738 37 35 30 2523 25 23 25 2946 30 252946 25 E3B2 E2 D3 D2 A4 B3 C2 F1 F4 C3 U6_RF 2526282931 43 2325 2523 2546 25 25 25 30 25 21 FL4_RF Y9 Y8 Y5 Y10 W8 W6 W5 W11 W10 U8 U11 U10 AA9 AA8 AA6AA10 Y14 AA14 Y17 V21 H17 AA17 AA16 AA12 W15 W16 W18 AA5 Y6 AA13 Y13 W21 Y12 Y16 J17 W17 U1_RF A13 A16 A17 A18 A20 A4 A5 A6 B1 B16 B17 B18 B20 B21 B3 B4 B5 B6 C1 C13 C14 C15 C16 C2 C3 C4 D1 D2 D3 E1 E13 E14 E15 E2 E3 F1 F2 F3 G3 G5 H1 H2 H3 H5 J1 J2 J3 J5 K1 K2 K3 K5 L3 L5 M2 M3 M5 N1 N2 N3 N5 P1 P2 P20 P21 P3 P5 R1 R2 R20 R21 R3 R5 T1 T2 T20 T21 T3 T5 U3 U5 V1 V2 V3 W1 W2 W3 Y1 U1_RF 1 2 R4_RF 2546 30 30 30 30 30 30 29 29 29 29 25 25 25 30 30 30 30 30 30 2540 2540 41 40 41 27 33 40 23568
IN IN IN IN PRX_LB1_INP PRX_LB1_INM PRX_LB2_INM PRX_LB3_INP PRX_LB3_INM PRX_MB1_INP PRX_BB_IP PRX_BB_QP PRX_BB_IM DNC PRX_BB_QM PRX_HB_INM PRX_MB3_INM PRX_HB_INP PRX_MB3_INP PRX_MB2_INM PRX_MB2_INP PRX_MB1_INM PRX_LB2_INP SYM 3 OF 5 PRX IN IN IN IN IN IN IN IN IN OUT OUT OUT OUT IN OUT OUT OUT OUT GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 5 OF 5 GND IN BI BI IN GP_DATA0 GP_DATA1 GP_DATA2 DNC DNC XO_IN SSBI_TX_GNSS SSBI_PRX_DRX RF_ON RX_ON RBIAS VTUNE_PRX PDET_IN DNC TX_HB TX_MB4 TX_MB3 TX_MB2 TX_MB1 TX_BB_IM TX_BB_IP TX_LB4 TX_LB2 TX_LB3 TX_LB1 GND DNC DAC_REF TX_BB_QM TX_BB_QP SYM 2 OF 5 TX OUT OUT IN OUT OUT IN IN IN IN IN IN IN IN IN DRX_LB1_INM DRX_LB1_INP GNSS_INM GNSS_INP DRX_HB_INM DRX_HB_INP DRX_MB_INM DRX_MB_INP DRX_LB2_INM DRX_LB2_INP DRX_BB_IM DRX_BB_IP DRX_BB_QM DRX_BB_QP GNSS_BB_QP GND GNSS_BB_QM GNSS_BB_IP GNSS_BB_IM DRX_GPS SYM 1 OF 5 OUT OUT OUT OUT OUT OUT OUT IN IN OUT IN IN IN IN IN IN IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST 7 DB ATTENUATOR FOR SELF CAL TRANSCEIVER PHASE CONTROL, TX RF & IQ PORTS NC TRANSCEIVER GROUND CONNECTIONS NC NC NC WTR_VTUNE PRX TRANSCEIVER RF AND IQ PORTS RF TRANSCEIVER (1 OF 4) DC-BLOCK NEEDED NC DRX TRANSCEIVER RF AND IQ PORTS NC WTR_GP_DATA2, NC 01005 NP0-C0G 5% 16V 100PF 5% 16V CERM NOSTUFF 10PF 01005 1/32W MF 01005 130 1% 5% NP0-C0G 16V 56PF 01005 SM WTR1605 SM WTR1605 SM WTR1605 WTR1605 SM 1/32W MF 1% 4.75K 01005 MF 1/32W 01005 130 1% MF 1/32W 01005 47 5% CELLULAR RF TRANSCEIVER: (1 OF 2) 50_XCVR_B1_TX 100_XCVR_B3_PRX_N 50_XCVR_B5_B18_TX PRX_BB_I_N100_XCVR_B13_B17_B20_PRX_N DRX_BB_I_P DRX_BB_Q_N PRX_BB_I_P DRX_BB_I_N DRX_BB_Q_P 100_XCVR_B8_B20_DRX_P GPS_BB_Q_N GPS_BB_Q_P GPS_BB_I_N GPS_BB_I_P PRX_BB_Q_P 100_XCVR_B8_B20_DRX_N 19P2M_WTR_IN19P2M_WTR 50_PDET_PAD_OUT 50_PDET_PAD_IN 100_XCVR_B2_B25_B3_DRX_P 100_XCVR_GPS_RX_P 100_XCVR_B1_B4_DRX_N 100_XCVR_B1_B4_DRX_P 100_XCVR_B2_B25_B3_DRX_N 100_XCVR_B5_B18_B13_B17_DRX_N 100_XCVR_B5_B18_B13_B17_DRX_P 100_XCVR_GPS_RX_N 100_XCVR_B8_PRX_N 100_XCVR_B8_PRX_P WTR_RF_ON WTR_SSBI_TX_GPS WTR_SSBI_PRX_DRX WTR_RBIAS 100_XCVR_B1_B4_PRX_P 100_XCVR_B2_B25_PRX_P 100_XCVR_B2_B25_PRX_N 100_XCVR_B3_PRX_P 100_XCVR_DCS_PCS_PRX_N 100_XCVR_DCS_PCS_PRX_P 100_XCVR_B5_B18_PRX_P 50_XCVR_2G_HB_TX 50_XCVR_B2_B25_TX 50_XCVR_B13_B17_B20_TX 50_XCVR_B8_TX 50_XCVR_2G_LB_TX WTR_RX_ON 50_XCVR_B3_B4_TX 50_PDET_IN 100_XCVR_B13_B17_B20_PRX_P 100_XCVR_B5_B18_PRX_N 100_XCVR_B1_B4_PRX_N PRX_BB_Q_N WTR_BB_TX_DAC_IREF TX_BB_I_N TX_BB_Q_P TX_BB_Q_N TX_BB_I_P GPHWTR_GP_DATA1 GPHWTR_GP_DATA0 051-9584 2.0.0 7 OF 23 30 OF 46 41 33 33 27 1 2 C128_RF 2 1 C182_RF 1 2 R30_RF 1 2 C248_RF 78 69 54 48 43 36 84 91 92 86 82 15 16 7 8 17 23 30 61 U3_RF 32 32 32 41 32 32 32 32 32 29 29 29 29 41 29 29 29 29 21 20 33 75 9 49 32 19 113 128 104 107 135 106 137 122 94 115 102 129 99 110 123 125 124 52 39 68 47 77 46 142 35 81 64 34 73 59 74 58 41 38 6 27 29 22 U3_RF 41 2529 2529 2529 105 121 88 114 96 120 89 80 100 45 60 79 101 93 103 95 112 119 126 138 130 133 132 141 140 134 90 109 139 131 U3_RF 29 29 41 29 29 2529 29 41 29 29 29 29 29 29 14 5 18 10 11 2 12 3 13 4 72 63 57 50 70 1 71 56 62 U3_RF 32 32 40 32 33 40 33 33 33 33 1 2 R27_RF 1 2 R28_RF 1 2 R29_RF 40 41 41 41 41 32 32
ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS VDD_RF1_P_FELO VDD_RF1_P_FELO VDD_RF1_D_LBLO VDD_RF1_D_FE VDD_RF2_P_BB VDD_DIO VDD_RF1_T_SYN VDD_RF2_T_VCO VDD_RF2_XO VDD_RF1_T_LO VDD_RF2_T_BB VDD_RF1_T_DA VDD_RF1_T_UPC VDD_RF2_T_DA VDD_RF2_D_BB VDD_RF1_S_PLL VDD_RF1_S_VCO VDD_RF1_P_VCO VDD_RF1_P_PLL VDD_RF2_S_VCO VDD_RF2_P_VCO VDD_RF1_G_BB VDD_RF1_G_PLL VDD_RF1_G_VCO VDD_RF1_G_LNA VDD_RF2_T_PLL VDD_RF1_D_MBLO VDD_RF1_JDET SRM 4 OF 5 PWR Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST PLACE NEAR U3.65 RF2_2V05STAR ROUTING PLACE NEAR U3.76 PLACE NEAR U3.66 RF1_1V8 STAR ROUTING PLACE NEAR U3.87 STAR ROUTING PLACE NEAR U3.37 AND U3.55 PLACE NEAR U3.25 AND U3.28 STAR ROUTING PLACE NEAR U3.53 AND U3.26 PLACE NEAR U3.42 STAR ROUTING PLACE NEAR U3.98 PLACE NEAR U3.118 TRANSCEIVER POWER CONNECTIONS PLACE NEAR U3.111 PLACE NEAR U3.67 PLACE NEAR U3.51 STAR ROUTING STAR ROUTING PLACE NEAR U3.127 PLACE NEAR U3.136 STAR ROUTING STAR ROUTING STAR ROUTINGSTAR ROUTING RF1_1V3 STAR ROUTING PLACE NEAR U3.117 PLACE NEAR U3.116 RF TRANSCEIVER (2 OF 2) PLACE NEAR U3.40 PLACE NEAR U3.24 AND U3.31 RF1_1V3 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM NOSTUFF 01005 0.1UF 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 0.1UF 01005 16V 5% 01005 NP0-C0G 100PF 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 01005 0.1UF 20% 10UF 6.3V 0402 CERM 20% 1.0UF 0201-1 6.3V X5R 20% 10UF 6.3V 0402 CERM 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 0.1UF 01005 100PF 16V 5% 01005 NP0-C0G MF 1/20W 201 5% 0 5% 0 201 1/20W MF SM WTR1605 CELLULAR RF TRANSCEIVER: (2 OF 2) PP_RF1_1V8_DIGPP_SMPS3_MSME_1V8 PP_SMPS4_RF2_2V05PP_SMPS2_RF1_1V3 PP_RF2_2V05_TX_PLL PP_RF1_1V3_GPS_LNA PP_RF1_1V3_GPS_VCO PP_RF1_1V3_GPS_PLL PP_RF1_1V3_GPS_DIG PP_RF2_2V05_PRX_VCO PP_RF2_2V05_SHDR_VCO PP_RF1_1V3_PRX_PLL PP_RF1_1V3_PRX_VCO PP_RF1_1V3_SHDR_VCO PP_RF1_1V3_SHDR_PLL PP_RF2_2V05_DRX_BB PP_RF2_2V05_TX_DA PP_RF1_1V3_TX_UPCONVERTER PP_RF1_1V3_TX_DA PP_RF2_2V05_TX_BB PP_RF1_1V3_TX_LO PP_RF2_2V05_XO_FILT PP_RF2_2V05_TX_VCO PP_RF1_1V3_TX_SYNTH PP_RF1_1V8_DIG PP_RF1_1V3_PRX_FELO1 PP_RF1_1V3_PRX_FELO2 PP_RF1_1V3_DRX_FE PP_RF1_1V3_JAM_DET PP_RF2_2V05_PRX_BB PP_RF1_1V3_DRX_LBLO PP_RF1_1V3_DRX_MBLO PP_RF2_2V05_XO_FILT PP_RF2_2V05_TX_PLL PP_RF2_2V05_TX_VCO PP_RF2_2V05_SHDR_VCO PP_RF2_2V05_PRX_VCO PP_RF2_2V05_TX_BB PP_RF2_2V05_PRX_BB PP_RF2_2V05_TX_DA PP_RF2_2V05_DRX_BBPP_SMPS4_RF2_2V05_FILTPP_RF1_1V3_GPS_LNA PP_RF1_1V3_GPS_DIG PP_RF1_1V3_GPS_PLL PP_SMPS2_RF1_1V3_FILTPP_RF1_1V3_PRX_PLL PP_RF1_1V3_SHDR_PLL PP_RF1_1V3_PRX_VCO PP_RF1_1V3_SHDR_VCO PP_RF1_1V3_TX_DA PP_RF1_1V3_TX_LO PP_RF1_1V3_TX_UPCONVERTER PP_RF1_1V3_PRX_FELO1 PP_RF1_1V3_DRX_FE PP_RF1_1V3_PRX_FELO2 PP_RF1_1V3_DRX_LBLO PP_RF1_1V3_DRX_MBLO PP_RF1_1V3_JAM_DET PP_SMPS2_RF1_1V3_FILT PP_RF1_1V3_TX_SYNTH PP_RF1_1V3_GPS_VCO 051-9584 2.0.0 8 OF 23 31 OF 46 2 1 C73_RF 2 1 C74_RF 2 1 C75_RF 2 1 C76_RF 2 1 C77_RF 2 1 C78_RF 2 1 C79_RF 2 1 C80_RF 2 1 C81_RF 2 1 C82_RF 2 1 C83_RF 2 1 C85_RF 2 1 C86_RF 2 1 C88_RF 2 1 C87_RF 2 1 C72_RF 2 1 C89_RF 2 1 C90_RF 2 1 C91_RF 2 1 C92_RF 2 1 C244_RF 1 2 R53_RF 1 2 R19_RF 53 42 28 26 83 87 98 136 127 116 108 118 117 111 44 65 40 76 66 51 67 31 55 37 24 97 25 85 U3_RF 8 2356 335 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 88 8 8 88 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
OUT OUT OUT IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUTIN OUTIN OUTIN OUT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT RX MATCHING NETWORKS TRANSCEIVER TX AND RX MATCHING TX MATCHING NETWORKS 8.2NH-5%-0.34A-0.27OHM 0201DS 01005 5% 16V NP0-C0G 27PF 0201DS 6.7NH-5%-0.46A-0.15OHM 0.6PF 01005 NP0-C0G +/-0.1PF 16V 1.2PF NP0-C0G 16V +/-0.1PF 01005 01005 27PF 5% 16V NP0-C0G 0201 18NH+/-3%-0.2A-0.8OHM 0201 22NH-150MA 10NH-3%-250MA 0201 0201 10NH-3%-250MA 0201 3.1NH+/-0.1NH-0.45A-025OHM 0.6NH+/-0.1NH-0.85A 0201 0.7PF NP0-C0G 16V 01005 +/-0.1PF 0.00 01005 0% MF 1/32W 0.00 0% 1/32W MF 01005 MF 1/32W 0% 0.00 01005 0.6NH+/-0.1NH-0.85A 0201 0201 10NH-3%-250MA 0201 10NH-3%-250MA 0201 5.1NH-3%-0.35A 1.1PF +/-0.1PF 01005 NP0-C0G 16V 5.1NH-3%-0.35A 0201 CELLULAR FRONT END: TX AND RX MATCHING 50_B2_RX_BALUN 50_B2_DUPLX_RX 100_XCVR_B2_B25_PRX_P 100_B8_DUPLX_RX_N 100_XCVR_B8_PRX_N 100_B8_DUPLX_RX_P 100_XCVR_B8_PRX_P 100_B5_B18_DUPLX_RX_P 100_XCVR_B5_B18_PRX_P 100_XCVR_B5_B18_PRX_N 100_XCVR_B1_B4_PRX_P 100_XCVR_B1_B4_PRX_N 50_B1_TX_SAW_IN 50_B2_B25_TX_SAW_IN 50_B3_B4_TX_SAW_IN50_XCVR_B3_B4_TX 50_XCVR_B1_TX 50_XCVR_B2_B25_TX 100_XCVR_B2_B25_PRX_N 50_B3_RX_BALUN 50_B3_DUPLX_RX 100_XCVR_B3_PRX_N 100_XCVR_B3_PRX_P 100_B1_B4_DUPLX_RX_P 100_B1_B4_DUPLX_RX_N 100_B5_B18_DUPLX_RX_N 051-9584 2.0.0 9 OF 23 32 OF 46 1 2 L36_RF 1 2 C186_RF 1 2 L38_RF 1 2 C185_RF 2 1 C184_RF 1 2 C188_RF 30 30 30 37 1 2 L46_RF 35 37 37 37 34 34 1 2 L45_RF L51_RF 35 L49_RF 1 2 L44_RF L47_RF 30 30 30 30 30 30 1 2 C187_RF 331 2 R46_RF 30 331 2 R47_RF 30 331 2 R48_RF 30 30 21 L48_RF 21 L50_RF 21 L52_RF 2 1 L37_RF 2 1 C183_RF 2 1 L39_RF
IN IN IN B13_17_20_RXOUT1 B13_17_20_RXOUT0 B17_RXIN V1 BAND4TXOUT B3TXOUT B25TXOUT BAND1TXOUT V3 THRM B1TXIN B3/4_TXIN B13_RXIN B13_RXIN B20_RXIN B20_RXIN B17_RXIN GND VDD V2 B25_TXIN PAD IN IN IN B13/17/20_TX_IN GND B13_TX_OUT B5/18/BC10_TX_OUT B8_TX_IN B20_TX_OUT B17_TX_OUT B8_TX_OUT B5/18/BC10_TX_IN IN IN OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN OUT OUT OUT OUT OUT IN UNBAL_PORT_1960MHZ UNBAL_PORT_1842.5MHZ BAL_PORT_1842.5MHZ/1960MHZ BAL_PORT_1842.5MHZ/1960MHZ GND IN OUT OUT IN IN CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT B13/B17/B20 DP6T SWITCH AND MATCHING BAND S6 S3 S2 B17 RX X HIGH LOW B3 TX HIGH X X B4 TX LOW X X HB TX SAW BANK + B13 RX X HIGH HIGH SAW BANKS B20 RX X LOW HIGH LB TX SAW BANK DCS/PCS 2-IN-1 RX FILTER HFQSMXXFA LGA 2.5NH+/-0.1NH-500MA 0201 1.3PF C0G-CERM 25V +/-0.05PF 0201 2.5NH+/-0.1NH-500MA 0201 1.4PF 0201 +/-0.05PF 25V C0G-CERM LMTPFJGA-E50 LGA 4.3NH-3%-0.35A 0201 1.1NH+/-0.1NH 0201 1.1NH+/-0.1NH 0201 FILTER SAWFD1G84BU0F57 LGA-1 CELLULAR FRONT END: SAW BANKS 100_XCVR_DCS_PCS_PRX_P 50_PCS_RX 50_DCS_RX_MATCH 100_B17_DUPLX_RX_P 2G_FEM_S2 2G_FEM_S6 50_B1_TX_SAW_IN 50_B3_B4_TX_SAW_IN 100_B13_DUPLX_RX_N 100_B13_DUPLX_RX_P 100_B20_DUPLX_RX_N 100_B20_DUPLX_RX_P 100_B17_DUPLX_RX_N PP_LDO14_2V65 2G_FEM_S3 50_B2_B25_TX_SAW_IN 50_B4_TX_SAW_OUT 50_B1_TX_SAW_OUT 100_XCVR_B13_B17_B20_PRX_P 100_XCVR_B13_B17_B20_PRX_N 50_B3_TX_SAW_OUT 50_B2_TX_SAW_OUT 50_XCVR_B5_B18_TX 50_B8_TX_SAW_OUT 50_B17_TX_SAW_OUT 50_B20_TX_SAW_OUT 50_XCVR_B8_TX 50_B5_TX_SAW_OUT 50_B13_TX_SAW_OUT50_XCVR_B13_B17_B20_TX 50_DCS_RX 100_DCS_PCS_RX_FILTER_N 100_XCVR_DCS_PCS_PRX_N 100_DCS_PCS_RX_FILTER_P 50_PCS_RX_MATCH 051-9584 2.0.0 10 OF 23 33 OF 46 38 38 38 2 1 17 7 13 12 11 14 9 22 21 3 4 15 16 20 19 18 10 6 8 23 5 U9_RF 40 40 38 21 L64_RF 2 1 C245_RF 21 L65_RF 2 1 C246_RF 3 13 12 6 4 5 9 11 2 7 8 10 1 FL2_RF 1 2 L53_RF 21 L54_RF 21 L55_RF 36 36 34 35 35 34 30 30 43 2325264041 2940 294041 30 30 30 37 37 38 38 36 294041 1 4 6 9 10 8 7 5 3 2 FL6_RF 32 30 30 32 32
IN OUT OUT IN IN IN IN BI IN IN ANT_B1_B4 CPL_OUT THRM_PADGND RX_N_B1_B4 RX_P_B1_B4 RFIN_B4 RFIN_B1 VBATT VCC VEN_B1_B4 CPL_IN BS VMODE Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST BAND 1/4 PAT STANDBY X X 0 X B1 LPM 1 1 1 B1 HPM 1 1 0 B4 LPM 0 1 1 B4 HPM 0 1 0 POWER DOWN X 0 0 0 ============================================================ BAND PA POWER MODE PA_BS PA_ON_B1_B4 PA_R1 NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G NP0-C0G 25V 5% 27PF 201 NOSTUFF 16V 5% 56PF 01005 NP0-C0G 01005 5% 16V NP0-C0G 56PF 01005 20% 0.1UF 6.3V X5R-CERM 01005 10% X5R-CERM 6.3V 1000PF 20% 6.3V 1.0UF X5R 0201-1 5% 25V 201 NP0-C0G 27PF NOSTUFF LGA TRIPLEXER-BAND1-4 5% 01005 16V NP0-C0G 56PF 01005 56PF 5% 16V NP0-C0G 56PF 5% 16V 01005 NP0-C0G 25V +/-0.05PF 0201 COG-CERM 0.5PF 0201 1.2NH+/-0.1NH-0.75A NOSTUFF 01005 1.2PF 16V NP0-C0G +/-0.1PF NOSTUFF 01005 16V NP0-C0G +/-0.1PF 1.2PF CELLULAR FRONT END: BAND 1/4 PAT 50_B1_B4_DPLX_ANT 50_B1_TX_SAW_OUT 50_B1_TX_PAD_IN 50_B1_B4_ANT 100_B1_B4_DUPLX_RX_N 50_B4_TX_SAW_OUT 50_B4_TX_PAD_IN PA_BS PP_BATT_VCC_CONN PA_R1 100_B1_B4_DUPLX_RX_P PA_ON_B1_B4 PP_PA 051-9584 2.0.0 11 OF 23 34 OF 46 33 32 32 33 2935 36 37 38 29 2935 37 38 2 1 C163_RF 40 2 1 C167_RF1 2 C192_RF 1 2 C191_RF 40 2325263536373839 353637383940 2 1 C164_RF 2 1 C208_RF 2 1 C165_RF 2 1 C209_RF 16 20 33 32 31 35 34 36 38 37 41 39 40 42 19 18 1 2 6 5 3 10 7 11 12 13 14 15 17 23 8 21 9 26 28 29 22 24 27 4 25 30 U14_RF 2 1 C236_RF 2 1 C237_RF 2 1 C238_RF 2 1 C249_RF 21 L70_RF 2 1 C258_RF 2 1 C162_RF
BI BI IN IN IN IN IN IN IN OUT OUT VEN_B2_B3 CPL_OUT THRM_PADGNDGND RX_B2 GND RX_B3 RFIN_B2 RFIN_B3 VBATT VCC CPL_IN BS ANT_B2 ANT_B3 VMODE CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BAND 2/3 PAD STANDBY X X 0 X POWER DOWN X 0 0 0 ============================================================ B3 HPM 0 1 0 B3 LPM 0 1 1 B2 HPM 1 1 0 B2 LPM 1 1 1 BAND PA POWER MODE PA_BS PA_ON_B2_B3 PA_R1 NC NC X5R 6.3V 1.0UF 20% 0201-1 6.3V 0.1UF X5R-CERM 20% 01005 1.2PF 01005 NOSTUFF NP0-C0G 16V +/-0.1PF NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G NP0-C0G 25V 5% 27PF 0201 NOSTUFF NOSTUFF 27PF 5% 25V NP0-C0G 201 NP0-C0G 16V 5% 01005 56PF 01005 5% 16V NP0-C0G 56PF 201 NP0-C0G 25V 5% 27PF NOSTUFF 01005 10% 1000PF X5R-CERM 6.3V DUPLEXER-BAND2-3 LGA 0201 1.1PF +/-0.1PF 25V CERM C0G-CERM +/-0.05PF 0.9PF 0201 25V 1.3NH+/-0.1NH-600MA 0201 NOSTUFF 01005 +/-0.1PF 16V NP0-C0G 1.2PF 2.4NH+/-0.1NH-0.50A 0201 CELLULAR FRONT END: BAND 2/3 PAD PA_ON_B2_B3 50_B2_DUPLX_RX 50_B3_DUPLX_RX PA_BS PA_R1 50_B2_ANT 50_B2_TX_SAW_OUT 50_B2_TX_PAD_IN 50_B3_TX_PAD_IN 50_B3_TX_SAW_OUT PP_BATT_VCC_CONN 50_B3_DPLX_ANT 50_B3_ANT 50_B2_DPLX_ANT PP_PA 051-9584 2.0.0 12 OF 23 35 OF 46 40 40 2934 36 37 38 2934 37 38 29 2 1 C149_RF 343637383940 2 1 C148_RF 40 2325263436373839 2 1 C146_RF 2 1 C147_RF 33 33 32 32 2 1 C152_RF 2 1 C153_RF 1 2 C194_RF 1 2 C193_RF 2 1 C211_RF 2 1 C210_RF 30 20 33 32 31 35 34 36 38 37 41 39 40 42 27 23 1 3 7 6 5 12 9 15 17 18 19 21 22 10 11 14 13 28 26 25 2 4 29 8 16 24 U23_RF 2 1 C250_RF 2 1 C251_RF 21 L72_RF 2 1 C259_RF 21 L71_RF
IN IN OUT IN IN IN BI OUT CPL_OUT CPL_IN THRM_PADGND VBATT VCC VMODE GND RFIN_B20 RFIN_B7 RX_P_B20 RX_N_B20 RX_B7 BS ANT_B7 VEN_B20_B7 ANT_B20 CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BAND 20 PAD STANDBY X 0 X BAND PA POWER MODE PA_ON_B20 PA_R1 PP_PA BULK BYPASSING SHARED WITH B1/4 PAT NC NC POWER DOWN LPM 0 0 B20 HPM 1 0 B20 LPM 1 1 ===================================================== 20% 6.3V 01005 X5R-CERM 0.1UF NOSTUFF C0G-CERM 0201 +/-0.05PF 3.6PF 25V 5% 01005 NP0-C0G 56PF 16V LGA DUPLEXER-BAND7-20 5% 27PF 201 25V NP0-C0G NOSTUFF 16V +/-0.1PF 1.2PF 01005 NOSTUFF NP0-C0G 01005 6.3V X5R-CERM 1000PF 10% 01005 56PF NP0-C0G 16V 5% 01005 56PF 5% NP0-C0G 16V 6.2NH-0.30A 0201 NP0-C0G 25V 201 +/-0.1PF 2.4PF 01005 NOSTUFF NP0-C0G 16V +/-0.1PF 1.2PF CELLULAR FRONT END: BAND 20 PAD 50_B20_DPLX_ANT 50_B20_ANT PA_ON_B20 PP_BATT_VCC_CONN PP_PA 100_B20_DUPLX_RX_P 100_B20_DUPLX_RX_N PA_R1 50_B20_TX_SAW_OUT 50_B20_TX_PAD_IN 051-9584 2.0.0 13 OF 23 36 OF 46 40 2325263435373839 343537383940 2 1 C156_RF 33 33 2934 35 37 38 29 40 33 2 1 C160_RF 1 2 C195_RF 20 4 33 32 31 35 34 36 38 37 41 39 40 42 27 23 1 3 7 6 5 14 9 15 17 18 19 21 22 25 2 24 10 26 28 12 13 11 29 8 30 16 U207_RF 2 1 C234_RF 2 1 C154_RF 2 1 C233_RF 2 1 C239_RF 2 1 C240_RF 21 L73_RF 2 1 C39_RF 2 1 C84_RF
IN OUT OUT OUT OUT IN IN IN IN BI BI IN IN ANT_B5 RFIN_B8 BS VEN_B5_B8 CPL_OUT CPL_IN THRM_PADGND VBATT VCC VMODE ANT_B8 RX_P_B5 RX_N_B5 RX_P_B8 RX_N_B8 RFIN_B5 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST NC NC STANDBY X X 0 X POWER DOWN X 0 0 0 ============================================================ B5 HPM 0 1 0 B5 LPM 0 1 1 B8 HPM 1 1 0 B8 LPM 1 1 1 BAND PA POWER MODE PA_BS PA_ON_B5_B8 PA_R1 BAND 5/8 PAD NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G NOSTUFF 0201 27PF 5% 25V NP0-C0G 201 27PF 5% 25V NOSTUFF NP0-C0G 6.3V 0.1UF X5R-CERM 20% 01005 1.2PF NOSTUFF 01005 +/-0.1PF 16V NP0-C0G 01005 10% 1000PF X5R-CERM 6.3V 1.0UF 20% 6.3V X5R 0201-1 201 NP0-C0G 25V 5% 27PF NOSTUFF NP0-C0G 16V 5% 01005 56PF 01005 5% 16V NP0-C0G 56PF 56PF 01005 5% 16V NP0-C0G DUPLEXER-BAND5-8 LGA 25V 0201 C0G-CERM 4.8PF +/-0.05PF 6.2NH-0.30A 0201 0201 25V C0G-CERM 1.9PF +/-0.05PF 01005 +/-0.1PF 16V NP0-C0G 0.7PF 01005 +/-0.1PF NP0-C0G 16V 0.7PF 01005 2.7NH+/-0.1NH-200MA 2.2NH+/-0.1NH-200MA 01005 4.3NH-3%-0.35A 0201 CELLULAR FRONT END: BAND 5/8 PAD 100_B5_B18_DUPLX_RX_P PP_BATT_VCC_CONN 50_B5_TX_PAD_IN 50_B8_TX_SAW_OUT 50_B8_TX_PAD_IN 50_B5_TX_SAW_OUT 50_B5_DPLX_ANT PA_ON_B5_B8 PA_R1 100_B5_B18_DUPLX_RX_N 100_B8_DUPLX_RX_P 100_B8_DUPLX_RX_N 50_B5_ANT PA_BS 50_B8_DPLX_ANT 50_B8_ANT PP_PA 051-9584 2.0.0 14 OF 23 37 OF 46 33 32 32 32 32 33 2934 35 36 38 2934 35 38 29 40 40 2 1 C117_RF 2 1 C123_RF 2 1 C122_RF 40 2325263435363839 343536383940 2 1 C118_RF 2 1 C116_RF 2 1 C212_RF 2 1 C119_RF 2 1 C213_RF 2 1 C214_RF 2 1 C215_RF 2 1 C216_RF 16 28 25 24 20 4 33 32 31 35 34 36 38 37 41 39 40 42 27 23 1 3 7 6 5 12 9 15 17 18 19 21 22 29 2 30 8 13 14 11 10 26 U58_RF 2 1 C252_RF 21 L74_RF 2 1 C253_RF 2 1 C256_RF 2 1 C257_RF 21 L7_RF 21 L10_RF 21 L75_RF
IN IN IN OUT OUT OUT IN IN IN BI BI OUT VEN_B13_B17 BS RX_P_B17 RX_P_B13 RX_N_B17 RX_N_B13 VMODE VCC VBATT RFIN_B13 RFIN_B17 GND THRM_PAD CPL_IN CPL_OUT ANT_B17 ANT_B13 IN INPUT OUTPUT GND Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST BAND 13/17 PAD ============================================================ POWER DOWN X 0 0 0 STANDBY X X 0 X B17 HPM 0 1 0 B17 LPM 0 1 1 B13 HPM 1 1 0 B13 LPM 1 1 1 BAND PA POWER MODE PA_BS PA_ON_B13_B17 PA_R1 01005 6.3V 20% X5R-CERM 0.1UF 20% 1.0UF X5R 6.3V 0201-1 NOSTUFF NP0-C0G 25V 5% 27PF 0201 NP0-C0G 16V 5% 56PF 01005 01005 56PF 5% 16V NP0-C0G 6.3V X5R-CERM 1000PF 10% 01005 LGA DUPLEXER-BAND13-17 NOSTUFF 201 27PF 5% 25V NP0-C0G NP0-C0G 16V 5% 56PF 01005 NOSTUFF NOSTUFF 0201 C0G-CERM 25V +/-0.05PF 2.2PF 2.2PF 01005-1 NP0-C0G 16V +/-0.1PF 6.8NH-3%-140MA 01005 NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G BAND13-50OHMLFL0Q766MTM1D497 0201 18PF C0H-CERM 25V 2% CELLULAR FRONT END: BAND 13/17 PAD 50_B13_LPF_IN50_B13_DPLX_ANT 50_B13_ANT 50_B17_TX_SAW_OUT 50_B17_TX_PAD_IN 50_B13_TX_SAW_OUT 50_B13_TX_PAD_IN 100_B17_DUPLX_RX_P 100_B13_DUPLX_RX_P 100_B17_DUPLX_RX_N 100_B13_DUPLX_RX_N PP_BATT_VCC_CONN PA_ON_B13_B17 PA_BS PA_R1 50_B17_DPLX_ANT 50_B17_ANT PP_PA 051-9584 2.0.0 15 OF 23 38 OF 46 33 40 2325263435363739 343536373940 2 1 C110_RF 33 33 33 2 1 C111_RF 2934 35 36 37 2934 35 37 29 40 40 33 2 1 C114_RF 1 2 C198_RF 1 2 C199_RF 2 1 C217_RF 30 29 11 13 10 14 24 22 25 26 28 21 19 18 17 15 12 7 9 3 5 6 2 1 23 27 42 40 39 41 37 38 36 34 35 31 32 33 4 20 8 16 U1317_RF 2 1 C235_RF 2 1 C115_RF 2 1 C113_RF 2 1 C254_RF 21 L77_RF 2 1 C108_RF 2 1 C109_RF 33 2 1 3 4 FL3_RF 1 2 L76_RF
IN PGND AGND EN IN2 IN1 OUT LX REFIN MODE IN IN OUT IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST PLACE C41 CLOSE TO L21 PA DC/DC CONVERTER PLACE NEAR U11.A2PLACE NEAR U1.H3 MAX77100 WLP SHORT-10L-0.25MM-SM NOSTUFF 0.01UF X5R 10% 01005 6.3V CERM 0402 6.3V 10UF 20% 1.0UF X5R 6.3V 20% 0201-1 402 X5R 4.7UF 6.3V 20% 10% 4700PF 01005 X5R 6.3V 1.00K 01005 MF 1/32W 1% 1.00K 01005 MF 1/32W 1% 01005 6800PF 10% X5R 6.3V 1000PF 01005 10% X5R-CERM 6.3V X5R 01005 0.01UF 10% 6.3V16V 56PF NP0-C0G 5% 01005 NOSTUFF SHORT-10L-0.25MM-SM SHORT-10L-0.25MM-SM 2.2UH-20%-1.5A-0.160OHM MAKK2016-SM CELLULAR FRONT END: PA DCDC CONVERTER DCDC_PGND PP_PADCDC_OUT PP_BATT_VCC_CONN DCDC_EN DCDC_PGND DCDC_ADJ DCDC_PGND DCDC_MODE BB_PDM BB_PDM_FILT PP_BATT_VCC_PA_DCDC DCDC_PGND 051-9584 2.0.0 16 OF 23 39 OF 46 29 A3 A1 B1 C2 B2 C3 B3 A2 C1 U11_RF 21 XW6_RF 29 40 2325263435363738 2 1 C1214_RF 2 1 C1201_RF 2 1 C1215_RF 2 1 C41_RF 34 35 36 37 38 40 2 1 C145_RF 1 2 R34_RF 1 2 R33_RF 2 1 C144_RF 29 2 1 C168_RF 2 1 C169_RF 2 1 C189_RF 21 XW8_RF 21 XW47_RF 21 L21_RF 16 16 16 16
IN MAIN OUT TERMINATECOUPLE OUT GND OUT IN MAIN OUT TERMINATECOUPLE OUT GND IN OUT IN IN IN IN IN IN IN IN IN BI BI BI BI BI BI BI BI OUT BI BI BI BI IN IN HBRF_IN LBRF_IN ANT2 ANT1 T2 T1 THRM_PADGND TRX10 TRX9 TRX8 TRX7 TRX6 TRX5 TRX4 TRX3 TRX2 TRX1 VDD_SWITCH VCC VBATT S0 S1 S2 S4 S3 S6 S5 IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST SEE PGS. 21-22 FOR 2G FEM LOGIC TABLE 2G FEM . 6.3V X5R 10% 0.01UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 10UF 6.3V 0402 CERM 6.3V 01005 0.01UF 10% X5R MF 1/32W 0% 01005 0.00 01005 0.00 0% 1/32W MF 0201 15NH-250MA NOSTUFF 0201 15NH-250MA NOSTUFF 01005 MF 1/32W 1% 49.9 0805-6SM FIL-COUPLER+LPF-BROADBAND LDJ21832M22HB042 LDJ21832M22HC033 0805-6SM FIL-COUPLER+LPF-BROADBAND 0201 2.4NH+/-0.1NH-0.50A 20% 6.3V X5R-CERM 01005 0.1UF NP0-C0G 16V 01005 5% 56PF 01005-1 70-OHM-300MA +/-0.1PF 1.5PF 16V NP0-C0G 01005 NOSTUFF NOSTUFF NP0-C0G 16V +/-0.1PF 1.5PF 01005 20% 6.3V X5R-CERM 01005 0.1UF 56PF NP0-C0G 01005 5% 16V 01005 56PF 16V 5% NP0-C0G 5% 16V NP0-C0G 01005 56PF 0.4PF C0G +/-0.05PF 25V 201 FEM-2G-TX LGA 16V 5% 01005 NP0-C0G 56PF 56PF NP0-C0G 01005 5% 16V 56PF NP0-C0G 01005 5% 16V 01005 5% 56PF NP0-C0G 16V NP0-C0G 5% 16V 56PF 01005 NP0-C0G 01005 5% 16V 56PF 56PF 5% 01005 16V NP0-C0G CELLULAR FRONT END: 2G FEM PP_LDO14_2V65 PP_PA PP_BATT_VCC_2G_FEM 50_2G_HB_PA_IN 50_B2_ANT 50_DCS_RX 50_PCS_RX 50_2G_LB_PA_IN 50_XCVR_2G_LB_TX_MATCH PP_BATT_VCC_CONN 2G_FEM_S1 2G_FEM_S0 50_LAT_TEST 50_UAT_TEST 50_UAT_ASM 50_LAT_ASM 50_PDET_PAD_IN 50_B3_ANT 50_LAT_COUPLER_IN 2G_FEM_S6 2G_FEM_S4 2G_FEM_S3 2G_FEM_S2 2G_FEM_S5 50_B20_ANT 50_B17_ANT 50_DRX_ANT 50_B13_ANT 50_XCVR_2G_HB_TX_MATCH50_XCVR_2G_HB_TX 50_XCVR_2G_LB_TX 50_B1_B4_ANT 50_B8_ANT 50_COUPLER_TERM 50_LAT_COUPLER_IN 50_UAT_LPF 50_B5_ANT 051-9584 2.0.0 17 OF 23 40 OF 46 2 1 C243_RF 2 1 C190_RF 2 1 C66_RF 2 1 C242_RF 1 2 R55_RF 1 2 R54_RF 1 2 L56_RF 1 2 L57_RF 1 2 R35_RF 1 3 46 5 2 FL9_RF 40 3 6 14 5 2 FL10_RF 40 30 21 L78_RF 2941 2 1 C65_RF 2 1 C202_RF 21 FL1_RF 252941 2933 41 2933 2529 29 2933 41 2 1 C63_RF 2 1 C64_RF 30 30 34 37 37 35 33 38 38 35 41 36 43 2 1 C67_RF 43 33 39 232526 3435 3637 38 2 1 C203_RF 1 2 C200_RF 1 2 C201_RF 3435 3637 3839 2 1 C207_RF 36 32 17 15 19 13 50 49 48 47 46 45 44 43 42 41 40 39 37 35 33 31 30 28 26 20 18 16 14 127 8 9 10 11 21 22 23 24 25 27 34 29 38 1 2 4 3 6 5 U2000_RF 2 1 C226_RF 2 1 C227_RF 43 232526 3341 2 1 C228_RF 2 1 C229_RF 2 1 C230_RF 2 1 C231_RF 2 1 C232_RF
IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT GPS/GNSS_OUT_P GPS/GNSSIN GND THRM GPS/GNSS_OUT_N BAND1/4_OUT_P B25/3_OUT_N B25/3_OUT_P B8/20_OUT_N B8/20_OUT_P B5/18/13/17_OUT_N ANT V1 VDD V2 V3 V4 BAND1/4_OUT_N B5/18/13/17_OUT_P PAD IN IN IN IN IN IN CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT B1/B4 LOW LOW LOW LOW BAND S6 S5 S4 S3 100PF BYPASS INCLUDED IN MODULE RX DIVERSITY SWITCH IS TERMINATED IN ALL OTHER POSSIBLE STATES B5/6/18 LOW LOW HIGH LOW B3 HIGH LOW LOW LOW B2/25 LOW HIGH LOW LOW B20 LOW HIGH HIGH LOW B13/17 LOW HIGH HIGH HIGH B8 LOW LOW LOW HIGH OFF LOW LOW HIGH HIGH LGA HFQSWXXUA 3.3NH+/-0.2NH-0.45A 0201 C0G 25V 201 +/-0.1PF 1.0PF CELLULAR FRONT END: RX DIVERSITY 2G_FEM_S3 50_GPS_LNA_OUT PP_LDO14_2V65 2G_FEM_S4 2G_FEM_S5 2G_FEM_S6 100_XCVR_GPS_RX_P 100_XCVR_B1_B4_DRX_P 100_XCVR_B1_B4_DRX_N 100_XCVR_B5_B18_B13_B17_DRX_P 100_XCVR_B5_B18_B13_B17_DRX_N 100_XCVR_B8_B20_DRX_P 100_XCVR_B8_B20_DRX_N 100_XCVR_B2_B25_B3_DRX_P 100_XCVR_B2_B25_B3_DRX_N 100_XCVR_GPS_RX_N50_DRX_ANT 50_DIVERSITY_SWITCH_MATCH 051-9584 2.0.0 18 OF 23 41 OF 46 42 30 30 30 30 30 30 30 30 30 30 12 10 2 3 9 11 14 23 24 25 26 27 13 15 18 17 22 21 20 1 5 4 6 7 8 16 19 28 U16_RF 21 L79_RF 2 1 C255_RF 43 2325263340 40 252940 2940 2933 40 2933 40
OUT GND R C RFIN GND THRM_PAD RFOUT VDD IN CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BYPASSING INCLUDED IN MODULE GPS NOTE: ADD SP2 BACK FOR EVT GPS FEED 0201 +/-0.05PF 25V C0G-CERM 3.9PF F-RT-SM MM8830-2600B SKY65716-11 LGA 0201 9.1NH-5%-250MA NOSTUFF 10NH-3%-250MA 0201 CELLULAR FRONT END: GPS LNA 50_GPS_ANT_CONN 50_GPS_ANT_FEED PP_LDO5_GPS_LNA_2V5 50_GPS_LNA_OUT50_UPPER_ANT_FEED 051-9584 2.0.0 19 OF 23 42 OF 46 41 1 2 C221_RF 3 2 1 J12_RF 5 2 1 6 4 3 10 8 11 12 13 9 7 U20_RF 26 21 L62_RF 1 2 L11_RF 20
NC IN OUT CR GND BI BI A IN IN IN IN IN GND MISO RF2RF1 MOSI SCLK VDD NC CS Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST UAT1 FEED NC NC LAT UAT1 COAX NC NC NC ANTENNA FEEDS 50_UPPER_ANT_FEED BB_SPI_TO_PAC_CS PAC_TO_BB_SPI_DATA_MISO PP_LDO14_PAC_2V65 50_UAT_COAX_DOWN PAC_TO_BB_SPI_DATA_MISO_FILT BB_SPI_TO_PAC_DATA_MOSI_FILT BB_SPI_TO_PAC_CLK_FILT BB_SPI_TO_PAC_CS_FILT 50_LAT_COAX 50_LAT_MATCH 50_LAT_TEST PP_LDO14_2V65 50_UAT_TEST BB_SPI_TO_PAC_CLK BB_SPI_TO_PAC_DATA_MOSI 50_NTCH_FILT_OUT 50_UPPER_MCH_150_UPPER_MCH_2 CELLULAR FRONT END: ANTENNA FEEDS NOSTUFF 1.0PF NP0-C0G +/-0.1PF 25V 201 0.8PF +/-0.1PF 201-HF 25V NP0-C0G 1% MF 1/20W 0201 0.00 RF1112 WLCSP01005 5.6NH-3%-140MA NP0-C0G 56PF 5% 16V 01005 56PF 16V 5% NP0-C0G 01005 56PF NP0-C0G 01005 5% 16V 5.6NH-3%-140MA 01005 5.6NH-3%-140MA 01005 5.6NH-3%-140MA 01005 NP0-C0G 56PF 5% 16V 01005 01005 5.6NH-3%-140MA 56PF 5% 16V 01005 NP0-C0G 01005 10% X5R 6.3V 0.01UF 03015 6.8NH-+/-0.2NH-440MA TP-P6 F-ST-SM MM5829-2700 MM5829-2700 F-ST-SM SM-NSP 1.6X1.21MM MM8930-2600B F-RT-SM MM5829-2700 F-ST-SM 03015 4.7NH+/-0.2NH-0.44AFLTR-GPS-0603 LFE18832MHC1D449 MF 5% 0 201 1/20W 1.0PF +/-0.1PF NP0-C0G 25V 201 NOSTUFF 051-9584 2.0.0 20 OF 23 43 OF 46 2 1 C94_RF 1 2 R11_RF 2 1 3 FL1701_RF 21 L1732_RF 4 2 3 1 J4_RF 1 5 6 2 3 4 J9_RF 40 1 SP1_RF 40 4 2 3 1 J5_RF 4 2 3 1 J6_RF1TP1_RF 1 2 L8_RF 2 1 C99_RF 2 1 C247_RF 41232526 33 40 21 L69_RF 2 1 C98_RF 21 L66_RF 21 L67_RF 21 L68_RF 2 1 C97_RF 2 1 C96_RF 29 2325 29 2325 29 2325 2 1 C38_RF 21 L6_RF 29 2325 8 103 4 2 11 5 6 9 1 12 14 13 7 U7_RF 1 2 R1_RF 2 1 C1726_RF 2 1 C95_RF 19
Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST GSM1900 RX, UAT LOW HIGH LOW HIGH HIGH LOW HIGH UAT LAT GSM1800 RX, UAT HIGH LOW LOW HIGH HIGH LOW HIGH UAT LAT TERMINATED, UAT HIGH LOW HIGH LOW HIGH HIGH HIGH UAT LAT UAT = UPPER ANTENNA LAT = LOWER ANTENNA GSM900 RX, LAT HIGH LOW HIGH HIGH HIGH HIGH HIGH LAT UAT GSM850 RX, UAT HIGH LOW HIGH HIGH LOW LOW HIGH UAT LAT GSM850 RX, LAT HIGH LOW HIGH HIGH LOW HIGH HIGH LAT UAT HB TX, HIGH Z, UAT, LPM HIGH HIGH LOW HIGH HIGH LOW LOW UAT LAT HB TX, HIGH Z, LAT, LPM HIGH HIGH LOW HIGH HIGH HIGH LOW LAT UAT GSM1900 RX, LAT LOW HIGH LOW HIGH HIGH HIGH HIGH LAT UAT TERMINATED, LAT HIGH LOW HIGH LOW HIGH LOW HIGH LAT UAT FRONT END LOGIC TABLE (1 OF 2) HB TX, UAT, LPM HIGH HIGH HIGH HIGH HIGH LOW LOW UAT LAT BAND S6 S5 S4 S3 S2 S1 S0 TX/PRX PATH DRX PATH GSM900 RX, UAT HIGH LOW HIGH HIGH HIGH LOW HIGH UAT LAT HB TX, IDLE, LAT HIGH HIGH HIGH HIGH LOW HIGH HIGH LAT UAT HB TX, HIGH Z, LAT, HPM HIGH HIGH LOW HIGH HIGH HIGH HIGH LAT UAT HB TX, LAT, LPM HIGH HIGH HIGH HIGH HIGH HIGH LOW LAT UAT HB TX, UAT, HPM HIGH HIGH HIGH HIGH HIGH LOW HIGH UAT LAT HB TX, LAT, HPM HIGH HIGH HIGH HIGH HIGH HIGH HIGH LAT UAT HB TX, IDLE, UAT HIGH HIGH HIGH HIGH LOW LOW HIGH UAT LAT LB TX, HIGH Z, UAT, LPM HIGH HIGH LOW LOW HIGH LOW LOW UAT LAT LB TX, HIGH Z, LAT, LPM HIGH HIGH LOW LOW HIGH HIGH LOW LAT UAT LB TX, HIGH Z, UAT, HPM HIGH HIGH LOW LOW HIGH LOW HIGH UAT LAT LB TX, HIGH Z, LAT, HPM HIGH HIGH LOW LOW HIGH HIGH HIGH LAT UAT LB TX, UAT, LPM HIGH HIGH HIGH LOW HIGH LOW LOW UAT LAT LB TX, LAT, LPM HIGH HIGH HIGH LOW HIGH HIGH LOW LAT UAT LB TX, LAT, HPM HIGH HIGH HIGH LOW HIGH HIGH HIGH LAT UAT LB TX, IDLE, UAT HIGH HIGH HIGH LOW LOW LOW HIGH UAT LAT LB TX, IDLE, LAT HIGH HIGH HIGH LOW LOW HIGH HIGH LAT UAT HB TX, HIGH Z, UAT, HPM HIGH HIGH LOW HIGH HIGH LOW HIGH UAT LAT GSM1800 RX, LAT HIGH LOW LOW HIGH HIGH HIGH HIGH LAT UAT LB TX, UAT, HPM HIGH HIGH HIGH LOW HIGH LOW HIGH UAT LAT FRONT END LOGIC TABLE (1 OF 2) 051-9584 2.0.0 21 OF 23 44 OF 46
Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST FRONT END LOGIC TABLE - DEV2 (2 OF 2)BAND S6 S5 S4 S3 S2 S1 S0 TX/PRX PATH DRX PATH LAT = LOWER ANTENNA UAT = UPPER ANTENNA STANDBY = ADDED TO SUPPORT EXISTING SW ARCHITECTURE. NOT TO BE USED AS A LOW POWER STATE. OFF = LOWEST POWER STATE WITHOUT REMOVING LDO14_2V65 POWER OFF LOW LOW HIGH HIGH X X X X X STANDBY LOW LOW LOW LOW LOW LOW LOW X X B1/BC6, LAT LOW LOW LOW LOW HIGH HIGH HIGH LAT UAT B1/BC6, UAT LOW LOW LOW LOW HIGH LOW HIGH UAT LAT B2/B25/BC1, LAT LOW HIGH LOW LOW HIGH HIGH HIGH LAT UAT B2/B25/BC1, UAT LOW HIGH LOW LOW HIGH LOW HIGH UAT LAT B20, UAT LOW HIGH HIGH LOW HIGH LOW HIGH UAT LAT B17, LAT LOW HIGH HIGH HIGH LOW HIGH HIGH LAT UAT B13, UAT LOW HIGH HIGH HIGH HIGH LOW HIGH UAT LAT B13, LAT LOW HIGH HIGH HIGH HIGH HIGH HIGH LAT UAT B8, UAT LOW LOW LOW HIGH HIGH LOW HIGH UAT LAT B8, LAT LOW LOW LOW HIGH HIGH HIGH HIGH LAT UAT B5/B6/B18/BC0/BC10, LAT LOW LOW HIGH LOW HIGH HIGH HIGH LAT UAT B3, LAT HIGH LOW LOW LOW HIGH HIGH HIGH LAT UAT B5/B6/B18/BC0/BC10, UAT LOW LOW HIGH LOW HIGH LOW HIGH UAT LAT B17, UAT LOW HIGH HIGH HIGH LOW LOW HIGH UAT LAT B4/BC15, LAT LOW LOW LOW LOW HIGH HIGH HIGH LAT UAT B4/BC15, UAT LOW LOW LOW LOW HIGH LOW HIGH UAT LAT B3, UAT HIGH LOW LOW LOW HIGH LOW HIGH UAT LAT B20, LAT LOW HIGH HIGH LOW HIGH HIGH HIGH LAT UAT FRONT END LOGIC TABLE (2 OF 2) 051-9584 2.0.0 22 OF 23 45 OF 46
IN IN IN OUT IN BI BI OUT IN OUT IN IN IN OUT OUT IN OUT OUT OUT IN BI BI BI BI IN SDIO_DATA3 SDIO_DATA2 RF_SW_CTRL_3 RF_SW_CTRL_7 RF_SW_CTRL_8 RF_SW_CTRL_9 SDIO_DATA1 WLAN_HSIC_STROBE JTAG_SEL SDIO_CMD SDIO_DATA0 BT_REG_ON VIN_1P2LDO CLK32K_AP WL_REG_ON GPIO_6 VOUT_3P3 GPIO_9 GPIO_10 GPIO_11 GPIO_15 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_12 GPIO_1 GPIO_0 BT_UART_RTS* BT_UART_TXD BT_UART_CTS* BT_PCM_CLK BT_PCM_SYNC BT_PCM_OUT BT_PCM_IN BT_WAKE 2G_ANT 5G_ANT HOST_WAKE_BT BT_UART_RXD VDDIO_1P8V VBATT_RF_VCC VBATT_RF_VCC BATT_VCC BATT_VCC SDIO_CLK WLAN_HSIC_DATA SR_VLX THRML_PADGND OUT IN IN IN BI BI HI LO COM GND CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT WLAN/BT 32K INTERFACE TO AP NC NC NC PULL-UP ON GPIO6, SDIO_DATA_2 & PULL-DOWN ON SDIO_DATA_1 REQUIRED FOR HSIC BOOTSTRAPPING NC WIFI_SW_CTRL NC NC UAT2 50_WLAN_G 50_WLAN_A SM DPX205850DT-9038A1SJ 8.2PF 50_WLAN_ANT_MATCH_T PP_VCC_MAIN_WLAN WLAN_BUCK_OUT CLK32K_AP BT_UART_RTS_L BT_UART_CTS_L BT_PCM_CLK BT_PCM_SYNC BT_PCM_OUT BT_WAKE BT_UART_TXD BT_UART_RXD WLAN_UART_RXD WLAN_HSIC3_DEVICE_RDY GPIO_6 LTE_AGG_PA_ON SDIO_DATA_2 SDIO_DATA_1 JTAG_SEL PP_WLAN_VDDIO_1V8 WLAN_COEX_RXD WLAN_COEX_TXD WLAN_COEX_TXD LTE_COEX_TXD LTE_COEX_RXD PP_WL_BT_VDDIO_AP 50_WLAN_ANT_MATCH 50_HSIC_WLAN_DATA WLAN_SR_VLX1 JTAG_SEL BT_REG_ON WLAN_CLK32K WLAN_REG_ON HOST_WAKE_WLAN AP_HSIC3_RDY WLAN_UART_TXD HOST_WAKE_BT BT_PCM_IN WLAN_HSIC3_RESUME WLAN_TX_BLANK OSCAR_CONTEXT_A SDIO_DATA_2 SDIO_DATA_1 50_HSIC_WLAN_STROBE WLAN_COEX_RXD LTE_ACTIVE OSCAR_CONTEXT_B 50_WLAN_G 50_WLAN_G_ANT 50_WLAN_A 50_WLAN_A_ANT PP_BATT_VCC_WLAN PP_WLAN_VDDIO_1V8 50_WLAN_ANT_FD WIFI/BT: MODULE AND FRONT END +/-0.1PF 25V CER 0201 +/-0.05PF 25V C0G-CERM 4.7PF 0201 18PF C0H-CERM 25V 2% 0201 SHORT-L9-SM SHORT-L9-SM NOSTUFF 0201 0.2PF +/-0.05PF 25V COG-CERM COG-CERM 25V +/-0.05PF 0.2PF 0201 NOSTUFF 5% 201 MF 1/20W 0 NOSTUFF 201 COG-CERM 25V +/-0.1PF 0.2PF MM5829-2700 F-ST-SM MF 1/32W 0% 0.00 01005 MF 0.00 0% 1/32W 01005 MF 1/32W 5% 10K 01005 NOSTUFF 10K 1/32W MF 5% 01005 5% MF 1/32W 10K 01005 5% 10K 1/32W MF 01005 100K 5% 1/32W MF 01005 LGA MOD-WIFI-BT-IMPERIAL 0201 0.2PF +/-0.05PF 25V COG-CERM NOSTUFF 2.5UH-30%-0.7A-0.24OHM 0603 1/32W 0.00 MF 0% 01005 NP0-C0G 16V 5% 27PF 01005 0.01UF 10% X5R 6.3V 01005 MF 1/32W 5% 100K 01005 NP0-C0G 27PF 16V 5% 01005 10UF CERM-X5R 6.3V 20% 0402-1 MF 1/32W 10K 5% 01005 4.7UF 402 20% 6.3V X5R-CERM1 SHORT-01005 051-9584 2.0.0 23 OF 23 46 OF 46 1 2 XW11_RF 2 1 C102_RF 25 23 25 23 1 2 R16_RF 25 23 2 1 C103_RF 2 1 C104_RF 1 2 R18_RF 2523 2523 2523 2523 2523 2523 2523 2523 2523 2523 2523 2523 2 1 C105_RF 2 1 C37_RF 1 2 R17_RF 2523 2523 2523 2523 25 23 21 L9_RF 25 23 25 23 46 46 2 1 C170_RF 2523 22 21 45 14 15 48 19 25 52 18 20 50 31 36 51 3 29 8 6 7 9 11 2 4 12 13 5 10 37 40 38 32 35 33 34 49 43 54 41 39 16 47 46 27 28 1 23 26 42 44 53 60 58 59 57 56 55 17 24 30 U8_RF 29 2529 29 2529 1 2 R45_RF 1 2 R43_RF 1 2 R44_RF 1 2 R14_RF 1 2 R15_RF 1 2 R51_RF 1 2 R52_RF 4 2 3 1 J10_RF 46 46 2 1 C101_RF 1 2 R13_RF 2 1 C281_RF 2 1 C280_RF 1 2 XW9_RF 1 2 XW20_RF 1 2 C106_RF 1 2 C107_RF 1 2 L33_RF 1 3 5 2 4 6 U12_RF 23 23 23 23 23 23 2 232 6 2 6 23 23 23 23 23 本图纸出自恒熙维修助手　ｗｗｗ．ｈｗｋ１６８．ｃｏｍ

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iPhone 5c schematic (searchable)

  • 1.
    C1_RF C10_RF C102_RF C103_RF C104_RF C106_RF C107 C107_RF C108_RF C109 C109_RF C11 C11_RF C110_RF C111_RF C114 C115 C118_RF C119_RF C12_RF C120_RF C1201_RF C1214_RF C1215_RF C126_RF C127_RF C13_RF C130 C133 C135 C137 C138 C143 C145_RF C147 C148_RF C149 C149_RF C150 C151C152 C153 C153_RF C154 C156C156_RF C16 C162 C163 C163_RF C164_RF C165 C165_RF C166 C167_RF C168_RF C169 C169_RF C17 C170 C170_RF C171 C1726_RF C173 C174 C185 C187 C189 C189_RF C190 C190_RF C195 C195_RF C2_RF C200_RF C201_RF C202_RF C203 C203_RF C204 C205 C207 C208_RF C209 C210_RF C212_RF C213 C214 C214_RF C215_RF C216_RF C217 C217_RF C218 C219 C220 C221 C222 C223 C224 C225 C226 C226_RF C227 C227_RF C228 C228_RF C229 C229_RF C230 C230_RF C231 C231_RF C232 C232_RF C233 C233_RF C234 C234_RF C235 C236 C236_RF C237 C237_RF C238 C238_RF C239 C239_RF C240_RF C242_RF C243 C243_RF C245 C246 C247 C247_RF C248 C248_RF C249_RF C250 C250_RF C251 C251_RF C252 C252_RF C253_RF C254 C254_RF C255 C256_RF C257 C257_RF C258 C26 C260 C261 C262 C263 C264 C265 C267 C27 C271 C273 C276 C277 C278 C281 C281_RF C282 C283_RF C285 C288 C29 C290 C291 C292 C293 C294 C295 C297 C299 C3 C3_RF C301 C302 C304 C305 C306 C307 C310 C312 C315 C317 C318 C319 C320C321 C322 C323 C325 C326 C328 C329 C330 C332 C333 C334 C335 C336 C337 C338 C339 C34 C340 C341 C342 C344 C345 C346 C347 C348 C349 C360 C363 C364 C365 C368 C369 C370 C371 C372 C378 C379 C38 C38_RF C385 C386 C387 C389 C39 C39_RF C391 C392 C394 C396 C4 C4_RF C40_RF C41_RF C412 C413 C414 C416 C42_RF C420 C421 C422 C424 C425 C429 C43_RF C44_RF C444 C45_RF C46_RF C47 C47_RF C48_RF C488 C49_RF C5_RF C50 C50_RF C500 C501 C51_RF C52 C52_RF C53_RF C54 C54_RF C55 C55_RFC56_RF C562 C57_RF C58_RF C59 C59_RF C6 C6_RF C605 C61 C627 C63_RF C64 C65 C65_RF C66_RF C662 C67_RF C68 C686 C687 C688 C689 C69 C7 C7_RF C73 C74 C746 C762 C77 C79 C8_RF C9_RF C918 C92 C93_RF C935 C942 C95 C96_RF C961 C962 C97 C97_RF C98 C98_RF C987 C99 C99_RF C997 D1 D2 D4 D5 DZ4 FL1_RF FL10_RF FL1701_RF FL6 FL9 FL96 J10_RF J5_RF J6_RF L1_RF L10_RF L11 L11_RF L12_RF L13_RF L16_RF L17 L17_RF L1732_RF L18_RF L19 L19_RF L2_RF L21 L21_RF L3L3_RF L33_RF L4 L4_RF L44_RF L5 L5_RF L6_RF L66_RF L67_RFL68_RF L69_RF L7_RF L70_RF L71_RF L72_RF L73_RF L74_RF L75_RF L77_RF L8_RF L9_RF Q2 Q3 Q4 Q5 R10 R100 R102 R103 R129 R13_RF R136 R145 R15 R17 R20_RF R21_RF R22_RF R23_RF R24_RF R25_RF R26 R26_RF R27_RF R28_RF R29_RF R3_RF R30_RF R34_RF R35 R463 R488 R5_RF R50 R54 R55 R55_RFR56 R58 R59 R592 R593 R594 R60 R65 R66 R73 R74 R83 R84 R8401 R857 R86 R90 SH3 SP1_RF U11U11_RF U12 U12_RF U1317_RF U14 U14_RF U15 U17 U18 U2 U2_RF U2000_RF U207_RF U21U22 U23 U23_RF U3 U4 U5_RF U58_RF U7 U7_RF U8 U8_RF Y1_RF Y2 ＩＰＨＯＮＥ　５Ｃ　 Ａ
  • 2.
    BS1BS2 BS3 C1 C10 C100 C101 C102 C103 C104 C105 C105_RF C106 C108 C111 C112 C113 C117 C118 C119 C12 C1201 C121_RF C123 C125_RF C127C128 C128_RF C13 C132 C134 C136 C139 C14 C14_RF C140 C141 C142 C144 C144_RF C145 C146 C147_RF C148 C15 C15_RF C155 C157 C158 C159 C16_RF C161C164 C167 C168 C17_RF C172 C175 C176 C177 C177_RF C178 C179 C18 C18_RF C181 C182 C183 C183_RF C184_RF C185_RF C186_RF C187_RF C188 C188_RF C19 C19_RF C191 C192 C193 C193_RF C194 C196 C197 C198 C199 C2 C20 C20_RF C200 C201 C202 C206 C208 C21 C21_RF C210 C211 C212 C215 C216 C22 C22_RF C23 C23_RF C2307 C24 C24_RF C240 C241 C242 C244 C245_RF C246_RF C249 C25 C25_RF C253 C255_RF C256 C259 C26_RF C266 C268 C27_RF C274 C275C279 C28 C28_RF C282_RF C284 C286 C287 C29_RFC296 C298 C30 C30_RF C300 C303 C308 C31 C311 C313 C314 C316 C32 C32_RF C324 C327 C33_RF C331 C34_RF C343 C35 C35_RF C350 C351 C352C353 C355 C357 C358 C359 C36 C36_RF C361 C37 C37_RF C373 C376 C380 C381 C388 C390 C397 C398 C399 C40 C402 C407 C41 C410 C42 C427 C43 C430 C432 C433 C434 C435 C436 C437 C438 C44 C441 C45 C46 C48 C49 C5 C53 C56 C57 C58 C60 C61_RF C610 C62 C62_RF C63 C66 C67 C68_RF C69_RF C70 C70_RF C71 C71_RFC72 C72_RF C73_RF C74_RF C745 C75 C75_RF C76 C76_RF C78 C78_RF C79_RF C8 C80 C80_RF C81 C81_RF C82 C82_RF C83 C83_RF C84 C85 C85_RF C855 C86 C86_RF C87 C87_RF C878 C879 C88 C88_RF C883 C89 C89_RF C9 C90 C90_RF C91 C91_RF C913 C914 C92_RF C93 C94 C953 C96 CL1 D3 DZ1 DZ10 DZ11 DZ12 DZ16 DZ17 DZ2 DZ23 DZ24 DZ3 DZ5 DZ6 DZ7 DZ75 DZ76 DZ9 FL1 FL10 FL11 FL12 FL13 FL14 FL15 FL16 FL17 FL18 FL2 FL2_RF FL20 FL21 FL22 FL23 FL2302 FL24 FL25 FL26 FL27 FL28 FL29 FL3 FL30 FL31 FL34 FL35 FL36 FL38 FL39 FL4 FL4_RF FL40 FL43 FL44 FL45 FL46 FL47 FL48 FL49 FL495 FL5 FL51 FL52 FL53 FL57 FL58 FL6_RF FL60 FL61 FL68 FL69 FL7 FL751FL752 FL753 FL8 FL9_RF J1 J11_RF J2 J3 J4 J4_RF J5 J6J7 L1 L10 L14_RF L15_RF L2 L20_RF L22_RF L25_RF L27 L28 L29 L33 L34 L35 L36 L36_RF L37 L37_RF L38 L38_RF L39 L39_RF L45_RF L46_RF L49_RF L50_RF L51_RF L52_RF L53_RF L54_RF L55_RF L6 L64_RFL65_RF L7 L78_RF L79_RF L8 L9 Q1 Q7 R1 R10_RF R107 R108 R11 R110 R12 R12_RF R13 R130 R137 R14 R143 R15_RF R16 R16_RF R17_RF R18 R18_RF R19 R19_RF R2 R20 R21 R22 R24 R25 R27 R28 R29 R 3 R31 R32 R33 R33_RF R34 R35_RF R36 R37 R38 R39 R4_RF R40 R41 R42 R43_RF R44_RF R45 R46 R46_RF R47 R47_RF R48_RF R5 R51_RF R52 R52_RF R53 R53_RF R57 R6 R6_RF R67 R7 R7_RF R71 R72 R78 R79 R8 R82 R85 R9_RF R91 R92 R921 R9401 R953 SH1 SH2 SP3_RF U1 U1_RF U13 U16 U16_RF U20_RF U25 U3_RF U5 U6_RF U9_RF Y1 ＩＰＨＯＮＥ　５Ｃ　Ｂ
  • 3.
    TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 2. ALL CAPACITANCEVALUES ARE IN MICROFARADS. PROPRIETARY PROPERTY OF APPLE INC. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DESCRIPTION OF REVISION CK APPD 2 1 1245678 B D 6 5 4 3 C A NOTICE OF PROPRIETARY PROPERTY: PAGE THE INFORMATION CONTAINED HEREIN IS THE C A D DATE R SHEET Apple Inc. THE POSESSOR AGREES TO THE FOLLOWING: DRAWING TITLE D SIZE REVISION DRAWING NUMBER BRANCH REV ECN 7 B 3 II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE IV ALL RIGHTS RESERVED III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 8 TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM PART NUMBER ALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_ALT_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEMTABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) BOARD_ID RADIO BOM OPTIONS COMPASS BOM OPTIONS NAND BOM OPTIONS TO DO: CLEANUP ALTERNATES FOR X155 ALTERNATES X155 BOM CALLOUTS HORIZONTAL CAP BOM OPTIONS SCH 051-9584 BRD 820-3329 BOM 639-3796 X155 TRISTAR BOM OPTIONS X155 PROTO1 SINGLE_BRD GYRO BOM OPTIONS CHESTNUT BOM OPTIONS 1 OF 46 Mon Oct 8 11:06:07 2012 2012-10-14ENGINEERING RELEASED 1 OF 23 2.0.0 051-9584 2 0001669557 138S0801 5 HRZN CAPS_1:10UF,0402,6.3V HRZN_CAP_GRP6C386,C387,C333,C332,C335 Y Y2 C52,C156 HRZN_CAP_GRP11HRZN CAPS_1:10UF,0402,10V138S0794 4.7UF 0.55MM HEIGHT LOW_Z_CAPC193138S0582 1 Y 138S0801 HRZN_CAP_GRP2C293,C294,C257,C299,C262HRZN CAPS_1:10UF,0402,6.3V5 Y 138S0801 HRZN CAPS_1:10UF,0402,6.3V C205,C243,C247,C252,C297 HRZN_CAP_GRP55 Y HRZN CAPS_1:10UF,0402,6.3V138S0801 HRZN_CAP_GRP73 C42_RF,C43_RF,C44_RF Y 12 12 N/AN/AAGATHA PMU(1/2) 11 11 N/AN/ACG FLEX B2B L67 AUDIO CODEC (2/2)10 10 N/AN/A H5P SOC/CPU/SRAM PWR N/A5 5 N/A SCH,SINGLE_BRD,X155 HRZN CAPS_1:10UF,0402,6.3V138S0801 C182,C307,C209,C1874 HRZN_CAP_GRP10Y HRZN CAPS_1:10UF,0402,6.3V5138S0801 HRZN_CAP_GRP3C264,C378,C189,C203,C245 Y C190,C204,C239,C246,C195138S0801 HRZN CAPS_1:10UF,0402,6.3V HRZN_CAP_GRP4Y5 COMPASS_POPU16639-4024 1 YST GYRO - COMPASS POP H5P IO POWER4 4 N/AN/A DATECSA PAGE SYNC MASTERCONTENTSPDF PAGE 2 N/AN/AH5P JTAG, USB ,PLL2 339S0176339S0177 H5P ALTERNATEALTERNATE ? ?339S0178 339S0176 ALTERNATE H5P ALTERNATE BUTTON FLEX B2B N/AN/A88 HRZN CAPS_1:10UF,0402,6.3V138S0801 HRZN_CAP_GRP8C1201_RF1 Y H5P W/ NAND N/A6 6 N/A 118S0626 100K 1% 01005 Y1 R25_RF N53_CFG_B 499K 1% 01005118S0650 Y1 N49_CFG_AR26_RF 267K 1% 01005118S0623 Y1 R26_RF N53_CFG_B 162K 1% 01005118S0726 N53_CFG_AY1 R26_RF 118S0621 Y1.00M 1% 01005 R25_RF N51_CFG_A1 R26_RF50K 1% 01005118S0732 Y1 N51_CFG_A 118S0626 100K 1% 01005 Y1 N49_CFG_AR25_RF 338S1158 U8 Y GYRO_ST1 ST GYRO 138S0652138S0648 4.7UF CERM 0402 6.3VALTERNATE ? LABEL FOR X155 639-3796 EEEE_16G825-6838 Y1 EEEE_F284 N/AH5P GPIO & CONTROL3 N/A3 14 14 CHESTNUT + BACKLIGHT DRIVER N/A N/A 18 18 N/AN/AD404 (TOUCH B2B, DRIVER ICS) 1717 N/ADOCKFLEX B2B N/A 15 15 N/AN/ASPKR AMP + LED DRIVER N/A13 13 N/AAGATHA PMU(2/2) L67 AUDIO CODEC (1/2) N/A9 9 N/A N/A19 19 N/ALCM CONNECTOR 21 21 N/ACAM0 CONNECTOR N/A 20 20 N/ASENSORS N/A ?YSCH051-9584 1 SCH, SINGLE_BRD, X155 1 ?YPCB820-3329 PCB, SINGLE_BRD, X155 N/A22 22 N/ABATT B2B, TPS, PD FEATURES 50K 1% 01005118S0732 N49_CFG_BY1 R25_RF 1.00M 1% 01005118S0621 N49_CFG_BY1 R26_RF 118S0626 100K 1% 01005 Y1 N48_CFG_BR26_RF N48_CFG_BR25_RF147K 1% 01005 Y1118S0689 R25_RF Y N48_CFG_A255K 1% 010051118S0659 118S0626 1 Y100K 1% 01005 R26_RF N48_CFG_A 470K 5% 01005 R25_RF117S0159 Y1 N51_CFG_B 7 7 N/AH5P VIDEO N/A R26_RF100K 1% 01005 Y1 N51_CFG_B118S0626 N53_CFG_A118S0626 1 100K 1% 01005 YR25_RF 335S0878 Y1 U4 NAND_16GNAND,19NM,16GX8,MLC,PPN1.5 N/A23 23 RADIO_MLB HIERARCH. SYMBOL N/A Y1 TI CHESTNUT U3 CHESTNUT_TI338S1172 152S1649 1 YL19 CHESTNUT_TITI CHESTNUT - 1.5 UH IND 152S1611 1 INTERSIL CHESTNUT -2.2 UH IND L19 Y CHESTNUT_INTERSIL5 C422,C74,C92,C250,C265 HRZN_CAP_GRP1HRZN CAPS_1:10UF,0402,6.3V138S0801 Y 338S1168 U3 Y CHESTNUT_INTERSIL1 INTERSIL CHESTNUT 16 16 N/ATRISTAR N/A 1 GYRO_STC11 Y132S0391 ST GYRO - CP CAP U2 TRISTAR1 CBTL1608A1UK,WCSP,TRISTAR343S0614 Y CBTL1610A0UK,WCSP,TRISTAR21 TRISTAR2U2343S0639 Y 118S0671 2 RES 15OHM 01005 5% R102,R103 TRISTARY 2 RES 200HM 01005 5%117S0202 R102,R103 TRISTAR2Y ＩＰＨＯＮＥ　５Ｃ　原理图　
  • 4.
    FAST_SCAN_CLK HOLD_RESET USB_ASW_VSS18 USB_ID USB_ANALOGTEST USB_DM USB_DP USB11_DM USB11_DP USB_BRICKID TST_STPCLK JTAG_TRST* HSIC3_DATA XI0 WDOG VDD_ANA_PLLUSB VDD_ANA_PLL7 VDD_ANA_PLL6 VDD_ANA_PLL5 VDD_ANA_PLL4 VDD_ANA_PLL3 VDD_ANA_PLL2 VDD_ANA_PLL1 USB_VDD330 USB_DVDD USB_ASW_VDD18 TST_CLKOUT TESTMODE JTAG_TRTCK JTAG_TDO JTAG_SEL HSIC1_DVDD101 HSIC_VDD123 HSIC_VDD122 HSIC_VDD121 HSIC2_DVDD102 HSIC3_DVDD103 VDD_ANA_PLL0 HSIC3_STB HSIC2_STB CPU0_SWITCH XO0 USB_VBUS HSIC1_STB HSIC1_DATA HSIC_VSS121 HSIC_VSS122 DDR1_CKEIN DDR0_CKEIN CFSB FUSE1_FSRC USB_REXT RESET* JTAG_TCK JTAG_TMS JTAG_TDI CPU1_SWITCH USB_BRICKID_DM_MON USB_VSSA0 USB_VSSA0 USB_VSSA0 HSIC2_DVSS HSIC1_DVSS HSIC_VSS123 HSIC3_DVSS HSIC2_DATA SYM 1 OF12 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT FINAL XTAL PASSIVES 11/30/2011 (22MA) (28MA) (1MA) (1MA) (1MA) (2X1MA) (3X2.7MA) (5.4MA) (3X11.9MA) (2X1MA) NO_CONNECT OKAY (1MA) USBHS ON/OFF TOLERANCE 5V/1.98V SERIAL MODE NAMES WLAN (TOP) BASEBAND (1MA) 1.8V TOLERANT PLACE R49 AND C1 CLOSE TO EACH OTHER AND U1 PER EMC 01005 1% MF 1/32W 1.00M 1/32W 5% 1.00K 01005 MF X5R 6.3V 20% 0.22UF 0201 0.22UF 0201 X5R 20% 6.3V 01005 MF 1% 43.2 1/32W 10% X5R-CERM 1000PF 6.3V 01005 0.01UF 01005 10% X5R 6.3V X5R 01005 6.3V 10% 0.01UF 12PF CERM 16V 5% 01005 12PF 5% 01005 CERM 16V 20% X5R 6.3V 0.22UF 0201 10% NOSTUFF 01005 X5R 6.3V 0.01UF X5R 0201 6.3V 20% 0.22UF 1.60X1.20MM-SM 24.000MHZ-30PPM-9.5PF-60OHM SHORT-10L-0.1MM-SM SM NO_XNET_CONNECTION=TRUE 100PF 5% 01005 NP0-C0G 10V 0.00 0% 010051/32W MF 01005 0.00 0% MF 1/32W FCMSP H5P-SC58950C03 6.3V 01005 NP0-C0G 5% 56PF CERM-X5R 20% 6.3V 10UF 0402-1 0201 X5R 6.3V 20% 0.22UF MF 1/32W 5% 47.0K 01005 0.01UF 6.3V 10% X5R 01005 10% 0.01UF X5R 6.3V 01005 SYNC_MASTER=N/A SYNC_DATE=N/A H5P JTAG, USB ,PLL XTAL_GND 90_AP_BI_TRISTAR_USB0_P 90_USBHS_H5P_N 90_AP_BI_TRISTAR_USB0_N 45_XTAL_24M_I XTAL_24M_O_R WDOG CPU0_SWITCH 45_XTAL_24M_O USB_VBUS_DETECT CPU1_SWITCH 50_AP_BI_BB_HSIC1_DATA 50_AP_BI_BB_HSIC1_STB 50_AP_BI_WLAN_HSIC3_DATA 50_AP_BI_WLAN_HSIC3_STB TRISTAR_TO_AP_JTAG_SWCLK TRISTAR_BI_AP_JTAG_SWDIO USB_REXT 90_USBHS_H5P_P PP1V8 PP1V8 PP1V0 PP3V3_USB AP_TO_PMU_TEST_CLKOUT PP1V2 PP1V8_PLL PP1V0 RESET_1V8_L PP1V8 C341 2 C321 2 R7 12 R71 1 2 C2 1 2 C93 1 2 R61 2 C11 2 C211 2 C201 2 C36 1 2 C37 1 2 C3921 2 C331 2 C281 2 Y1 24 13 XW44 1 2 XW51 2 C141 1 2 R1 1 2 R30 1 2 U1 AV13 AR9 AU10 K16 N8 A19 R28 AP14 F34 M29 M28 F33 E34 K29 K28 E33 AV15 AK16 AL16 AU15 L29 J29 AK17 L28 J28 AL17 AN15 AM14 AM16 AP15 AN16 AN13 AM15 AV11 AT15 AR16 AV10 D34 C34 E27 G28 H28 F28 G27 A31 A32 G29 E29 A30 F29 J26 H27 H26 H29 G19 J19 G18 J18 J21 G20 J20 G21 J22 AT13 A12 A13 C351 2 C1281 2 C1571 2 R671 2 051-9584 2.0.0 2 OF 23 2 OF 46 16 16 13 12 12 12 23 23 23 23 16 16 234567101112141819 2021 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 7 12 12 13 412 2712 12131416192223 234567101112141819 2021
  • 5.
    PP PP 1Y GND 2Y2A 1A VCC PP SYM 2 OF12 GPIO7 GPIO9 UART6_TXD UART6_RXD UART6_RTSN UART6_CTSN UART5_TXD UART5_RXD UART3_TXD UART3_RTSN UART3_CTSN UART2_RXD UART1_RXD UART1_CTSN UART0_TXD UART0_RXD TMR32_PWM2 TMR32_PWM1 TMR32_PWM0 GPIO_VSEL25_SPI3 GPIO_VSEL25_I2C2 GPIO_SVSEL18_FMI GPIO_3V1 GPIO_3V0 GPIO8 GPIO6 GPIO5 GPIO4 GPIO39 GPIO38 GPIO37 GPIO36 GPIO35 GPIO34 GPIO33 GPIO32 GPIO31 GPIO30 GPIO3 GPIO29 GPIO28 GPIO27 GPIO26 GPIO25 GPIO24 GPIO23 GPIO22 GPIO21 GPIO20 GPIO2 GPIO19 GPIO18 GPIO17 GPIO16 GPIO1 GPIO0 EHCI_PORT_PWR3 EHCI_PORT_PWR2 EHCI_PORT_PWR1 EHCI_PORT_PWR0 UART3_RXD GPIO_SVSEL25_FMI GPIO12/SDIO_D1 GPIO13/SDIO_D0 GPIO14/SDIO_CMD GPIO15/SDIO_CLK UART4_CTSN/SPI4_SSIN UART4_RTSN/SPI4_SCLK UART4_RXD/SPI4_MISO UART4_TXD/SPI_MOSI UART1_RTSN UART2_TXD UART2_RTSN UART2_CTSN UART1_TXD GPIO11/SDIO_D2 GPIO10/SDIO_D3 SYM 3 OF 12 SPI3_SSIN SPI3_MOSI SPI3_MISO SPI3_SCLK I2S4_MCK I2S4_LRCK I2S4_DIN I2S4_BCLK I2S4_DOUT SPDIF SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN SPI1_MISO SPI1_SCLK SPI1_MOSI SPI1_SSIN SPI2_MISO SPI2_SCLK SPI2_MOSI SPI2_SSIN I2S1_BCLK I2S1_MCK I2S0_DOUT I2S0_DIN I2S3_DIN I2S3_DOUT SWI_DATA I2S3_MCK I2S3_LRCK I2S3_BCLK I2S2_MCK I2S2_LRCK I2S2_DIN I2S2_BCLK I2S1_LRCK I2S1_DOUT I2S1_DIN I2S0_MCK I2S0_BCLK I2C2_SDA DWI_DO DWI_DI DWI_CLK I2S2_DOUT I2C2_SCL I2C1_SDA I2C1_SCL I2C0_SDA I2C0_SCL I2S0_LRCK Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BOOT_CONFIG0 (OPEN DRAIN@PMU) NEW ---> R12 MUST WIN OVER 6X INTERNAL PULL-DOWNS THAT ARE ~100K COMMON PULL UP FOR BOARD_REV, BOARD_ID AND BOOT_CONFIG PINS 0101 FMI0 4CS CODEC ASP GRAPE BOARD_REV1 BOARD_REV0 BOARD_ID0 BB_JTAG_TCK L19A KEEP (STAYING) ALIVE --> NOSTUFF FOR TRISTAR2 MENU & POWER / HOLD KEY 1010 FMI1 4CS W/TEST 1001 FMI1 4 CS 1101 FMI0/1 4/4 CS I2C2 I2C0 BASEBAND BB RESERVED FOR NON-TRISTAR DESIGN ---> DEV_HSIC1_RDY BOOT_CONFIG2 RESERVED 0100 FMI0 2CS CODEC VSP <50MHZ BT CODEC FMI, 00=1.8V | 01=3.0V | 10=3.3V AK8963C COMPASS: 0101001XCT814 ALS: 1110100X 0011010X 0011101X 1101010X <50MHZ I2C1 AGATHA PMU: DEBUG UART: TOLERANCE 1.98V I2C2, 0=1.8V | 1=3.0V SPI3, 0=1.8V | 1=3.0V 0011 SPI3 W/TEST BOOT_CONFIG1 0110 FMI0 4CS W/TEST 1000 FMI1 2 CS FLOAT=LOW, PULLUP=HIGH 0010 SPI0 W/TEST 0111 RESERVED BOARD_REV3 BOOT_CONFIG3 DFU STATUS BOARD_REV[3:0]={EHCI_PORT3,EHCI_PORT_PWR2,EHCI_PORT_PWR1,EHCI_PORT_PWR0} GAS GAUGE BOARD_ID2 BLUETOOTH WIFI UART FLOAT=LOW, PULLUP=HIGH 1010 X155 MLB BB_JTAG_TDO BB_JTAG_TMS BB_JTAG_TDI BOARD_ID3 BOARD_ID1 <--- SELECTED1100 FMI0/1 2/2 CS BOARD_REV2 STUFF FOR TRISTAR 1111 X155 INITIAL 1110 FMI0/1 4/4 CS W/TEST AP3DSH ACCEL: AP3GDL20-BC GYRO: ???????? 0001100X CS35L20 AMP: LM3534: TRISTAR: CHESTNUT: 1100011X 0100111X FLOAT=LOW, PULLUP=HIGH 0000 SPI0 0001 SPI3 1100 - PROTO1 TRISTAR 2 1101 - PROTO1 TRISTAR <---PROTO1 SELECTED BOARD_ID[3:0]={GPIO16,SPIO0_MISO,SPI0_MOSI,SPI0_SCLK} <--- SELECTED BOOT_CONFIG[3:0]={GPIO29_CONFIG3,GPIO28_CONFIG2,GPIO25_CONFIG1,GPIO18_CONFIG0} CODEC XSP & SPKR AMP 1111 RESERVED 01005 MF 33.2 1/32W 1% 1.00K01005 2.2K 01005 MF 5% 1/32W 1/32W MF 5% 01005 2.2K 01005 MF 5% 2.2K 1/32W 01005 MF 5% 1/32W 2.2K 01005 MF 33.2 1% 1/32W 220K MF 5% 1/32W 01005 01005 1/32W MF 392K 1% MF 1/32W 01005 392K 1% SM P4MM SM P4MM 74AUP2G34GN SOT1115 P2MM SM 1/32W MF1% 01005 33.2 FCMSP H5P-SC58950C03 FCMSP H5P-SC58950C03 2.2K 5% 1/32W MF 01005 MF 5% 2.2K 1/32W 01005 1.00K 01005 H5P GPIO & CONTROL SYNC_DATE=N/ASYNC_MASTER=N/A BOARD_INFO AP_TO_BB_HSIC1_RDY WLAN_TO_AP_HSIC2_REMOTE_WAKE BUTTON_TO_AP_HOLD_KEY_BUFF_L PP1V8 PP1V8 PP1V8 BOARD_REV0 PP1V8 BUTTON_TO_AP_VOL_UP_L GYRO_TO_AP_INT2 45_AP_TO_PMU_DWI_DO ACCEL_TO_AP_INT2 ALS_TO_AP_INT_L AP_TO_HEADSET_HS3_CTRL AP_TO_HEADSET_HS4_CTRL VIB_PWM AP_TO_CODEC_SPI3_CS_L BUTTON_TO_AP_VOL_DOWN_L AP_BI_I2C2_SDA 45_AP_TO_PMU_DWI_CLK 45_AP_TO_PMU_DWI_DI 45_AP_TO_PMU_DWI_CLK_H5P AP_TO_I2C1_SCL AP_TO_I2C2_SCL PP1V8 AP_TO_I2C0_SCL AP_BI_I2C0_SDA AP_TO_BB_I2S1_DOUT CODEC_TO_AP_SPI3_MISO VIB_LDO_EN BB_TO_AP_PP_SYNC AP_TO_SPKAMP_RESET_L AP_TO_TOUCH_GRAPE_RESET_L PP1V8 AP_TO_BB_WAKE_MODEM COMPASS_TO_AP_INT_2 PP1V8 CODEC_TO_AP_INT_L SPKAMP_TO_AP_INT_L FCAM_TO_AP_ALS_INT_L BB_TO_AP_IPC_GPIO AP_TO_BB_JTAG_TDI BB_TO_AP_UART1_CTS_L ACCEL_TO_AP_INT1 AP_TO_BB_UART1_TXD AP_TO_LEDDRV_EN BUTTON_TO_AP_MENU_KEY_BUFF_L 45_AP_TO_SPKAMP_I2S2_MCLK BUTTON_TO_AP_HOLD_KEY_L 45_AP_TO_CODEC_I2S_MCLK BUTTON_TO_AP_MENU_KEY_L BB_TO_AP_HSIC1_REMOTE_WAKE AP_TO_BB_UART1_RTS_LAP_TO_BB_JTAG_TMS BT_TO_AP_UART3_RXD KEEPACT TOUCH_TO_AP_INT_L AP_TO_LCM_RESET_L LCM_TO_AP_HIFA_BSYNC FORCE_DFU 45_AP_TO_TOUCH_CLK32K_RESET_L AP_TO_SPKAMP_BEE_GEES AP_TO_CODEC_ASP_I2S0_LRCLK AP_TO_CODEC_XSP_I2S2_DOUT 45_I2S0_MCK_R BB_TO_AP_I2S1_DIN 45_AP_TO_CODEC_XSP_I2S2_BCLK CODEC_TO_AP_XSP_I2S2_DIN AP_TO_CODEC_XSP_I2S2_LRCLK 45_I2S2_MCK_R 45_AP_TO_BT_I2S3_BCLK AP_TO_BT_I2S3_LRCLK AP_TO_BT_I2S3_DOUT BT_TO_AP_I2S3_DIN CODEC_TO_AP_ASP_I2S0_DIN AP_TO_CODEC_ASP_I2S0_DOUT 45_AP_TO_BB_I2S1_BCLK WLAN_TO_AP_HSIC2_RDY AP_TO_WLAN_HSIC2_RDY AP_TO_TOUCH_SPI1_CS_L AP_TO_TOUCH_SPI1_MOSI AP_TO_TOUCH_SPI1_CLK AP_TO_CODEC_VSP_I2S4_LRCLK AP_TO_CODEC_SPI3_MOSI AP_TO_CODEC_SPI3_CLK BB_TO_AP_UART1_RXD AP_TO_TRISTAR_ACC_UART2_TXD TRISTAR_TO_AP_ACC_UART2_RXD TRISTAR_TO_AP_DEBUG_UART6_RXD AP_BI_BATTERY_SWI AP_TO_CAM_RF_VDDCORE_EN BB_TO_AP_RESET_DET_L AP_TO_WLAN_UART4_TXD WLAN_TO_AP_UART4_RXD AP_TO_BB_JTAG_TRST_L AP_TO_BT_UART3_TXD AP_TO_BT_UART3_RTS_L BT_TO_AP_UART3_CTS_L AP_TO_BB_I2S1_LRCLK 45_AP_TO_CODEC_VSP_I2S4_BCLK CODEC_TO_AP_VSP_I2S4_DIN AP_TO_CODEC_VSP_I2S4_DOUT BB_TO_AP_HSIC1_RDY AP_TO_RADIO_ON_L GYRO_TO_AP_INT1 TRISTAR_TO_AP_INT PP1V8_SDRAM AP_TO_TRISTAR_DEBUG_UART6_TXD BUTTON_TO_AP_HOLD_KEY_BUFF_L PP1V8_ALWAYS 45_AP_TO_CODEC_ASP_I2S0_BCLK BUTTON_TO_AP_MENU_KEY_BUFF_L BOARD_INFO AP_TO_BT_WAKE BUTTON_TO_AP_RINGER_A BOARD_INFO TOUCH_TO_AP_SPI1_MISO LCM_TO_AP_PIFA AP_TO_BB_JTAG_TCK AP_TO_BB_RST_L BB_TO_AP_JTAG_TDO PMU_TO_AP_IRQ_L AP_BI_I2C1_SDA R16 1 2 R121 2 R171 2 R181 2 R191 2 R211 2 R5 1 2 R521 2 R201 2 R221 2 PP15 1 PP13 1 U25 1 6 3 4 25 PP5 1 R47 1 2 U1 AE4 AD3 AD4 AE3 W3 N2 W1 M2 R3 N3 M1 AC3 T3 V1 AC2 V4 M4 R31 P34 P33 P32 N32 L33 P30 P31 L34 M32 V3 K32 L32 C22 D22 C21 D21 C20 D20 C19 D19 T4 W2 P3 M3 U3 P4 AT11 AP12 AU13 AR14 AR13 AT12 AT6 AP8 AP1 AR15 AU12 AA3 AB2 AB3 AF5 AG3 AA1 AE2 AF3 AH3 AB1 AF4 AG4 AJ4 AE1 AJ2 AH4 AK4 AJ3 AH2 AL1 AK3 AD1 U1 AT7 AV7 AM8 AR7 AT4 AV6 AT3 AT9 AR8 AM30 AH30 AJ30 AH31 AP30 AL31 AH29 AH32 AN31 AK29 AM28 AM33 AN30 AJ31 AM29 AK31 AL30 AP31 AL28 AM31 AM32 AK32 AR32 AP32 AK30 AR31 AM4 AR5 AM2 AP3 AN3 AL3 AK1 AR4 AN4 AM3 AN6 AN1 AP9 AM9 AM13 AN12 AP5 R911 2 R921 2 R511 2 051-9584 2.0.0 3 OF 23 3 OF 46 3 23 23 313 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2 3 4 5 6 7 10 11 12 14 18 19 20 21 813 20 13 14 20 11 17 17 8 10 813 11 13 14 13 20 11 2 3 4 5 6 7 10 11 12 14 18 19 20 21 13 14 15 16 20 13 14 15 16 20 23 10 8 23 15 18 23 456710111214181920 21 23 20 23 456710111214181920 21 10 15 11 23 23 23 20 16 23 15 3 13 15 8 10 17 23 2323 23 13 18 19 1819 22 18 15 10 10 15 23 1015 1015 1015 23 23 23 23 10 10 23 23 23 18 18 18 10 10 10 16 23 16 16 16 13 22 21 23 23 23 23 23 23 23 23 10 10 10 23 23 20 13 16 4101213141623 16 3 13 12 10 313 3 23 813 3 18 19 23 23 23 13 20
  • 6.
    SYM 7 OF12 DDR1_RREF VDDCA DDR1_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ VDD2 DDR0_VDD_CKE DDR1_VDD_CKE DDR0_ZQ DDR1_ZQ DDR0_VREF_CA VSS VDD1 VDDQ DDR0_RREF SYM 9 OF 12 PVDDP_I2C2_SDA VDDIO18_GPIO22 VSS VDDIO18_I2S0_MCK VDDIO18_GRP2 VDDIO18_GRP1 VDDIOD Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT (666MA) POR CAPS 9/1/11 (80MA) BUCK4 1P2 (20MA) (<1MA) (45MA) (7MA) POR CAPS NOV/1/2010 (INCLUDED IN VDDQ) (8MA) (<1MA) CAPS FOR VDDIOD ARE SHARED WITH VDDQ (340MA) (18MA) (DDR IMPEDANCE CONTROL) 1/32W 1% 243 MF 01005 1/32W 01005 MF 243 1% 1% 1/32W MF 10K 01005 1/32W 1% MF 10K 01005 1/32W MF 1% 10K 01005 1/32W 1% MF 10K 01005 MF 1/32W 4.7K 1% 01005 MF 1/32W 1% 4.7K 01005 4.7K 1% 1/32W MF 01005 4.7K 1% 1/32W MF 01005 20% 4V 0.47UF X7S 02040204 1UF X6S 4V 20% 6.3V CERM-X5R 0402-1 20% 10UF 0610 X5R-CERM 4.3UF 4V 20% 0204 X7S 20% 0.47UF 4V X5R-CERM 4.3UF 0610 4V 20% 6.3V CERM-X5R 0402-1 10UF 20% 1UF 0204 X6S 20% 4V4V 20% 0610 4.3UF X5R-CERM 20% 0.1UF 6.3V X5R-CERM 01005 0.01UF 6.3V 10% X5R 01005 6.3V 0.01UF 10% X5R 01005 0.01UF 6.3V 10% X5R 01005 6.3V 0.01UF 10% X5R 01005 10% 0.01UF 6.3V X5R 01005 10% 0.01UF 6.3V X5R 01005 10% 0.01UF 6.3V X5R 01005 10% 0.01UF 6.3V X5R 01005 2.2UF 0201 X5R-CERM 4V 20% 20% 4V 0.47UF X7S 0204 NP0-C0G 56PF 5% 6.3V 01005 NP0-C0G 01005 6.3V 5% 56PF 0201 1KOHM-25%-0.2A FCMSP H5P-SC58950C03 FCMSP H5P-SC58950C03 NOSTUFF X5R-CERM 20% 6.3V 01005 0.1UF 01005 15PF 5% 16V NP0-C0G-CERM SYNC_DATE=N/ASYNC_MASTER=N/A H5P IO POWER PP1V2 PP1V2_SDRAM PP1V8 PP1V2PP1V2_SDRAM DDR0_VREF_CA DDR1_VREF_DQ DDR0_VREF_DQDDR1_VREF_CA DDR0_ZQ PP1V8_SDRAM DDR0_VREF_CA DDR1_ZQ DDR0_ZQ PP1V2_SDRAM DDR1_VREF_DQ DDR0_VREF_DQ DDR1_VREF_CA DDR1_ZQ PP1V2 PP1V8_XTAL R34 1 2 R33 1 2 R131 2 R111 2 R141 2 R241 2 R251 2 R271 2 R281 2 R291 2 C881 2 C751 2 C681 2 C871 2 C891 2 C851 2 C761 2 C771 2 C721 2 C811 2 C601 2 C661 2 C781 2 C801 2 C901 2 C911 2 C941 2 C961 2 C123 1 2 C8831 2 C3901 2 C3881 2 FL40 1 2 U1 AV4 L16 AV8 B31 AV3 AN34 N9 AK34 R2 AP34 A10 A11 AB33 AF2 AT33 AU3 AV16 B32 M33 T2 AA34 AF1 M34 P1 R1 AL33 AR33 AT1 AU16 AU7 B10 B11 B29 AD33 AJ33 AN33 AU14 AU5 AU9 A3 AA2 B20 B22 B25 B27 B30 B5 B7 B9 C33 D2 AD2 F2 G33 J2 K33 L2 N33 P2 T33 U2 W33 AG2 AK2 AN2 AR2 B12 B14 B17 A1 A2 AT30 AV9 B15 C1 C12 C27 D18 D7 E1 E12 E23 F16 F5 G3 G32 H15 J1 K3 K30 L19 M16 N15 P10 R32 R9 T20 U6 V2 V29 W21 W23 W25 Y1 Y12 Y14 Y16 Y18 Y2 Y20 Y22 Y24 Y10 Y29 Y3 Y32 Y4 Y5 Y8 U1 AT10 R29 AA7 AB7 AK11 AK12 AK13 AK14 AK15 AK7 AK8 AK9 AC7 AD7 AE7 AF7 AG7 AH7 AJ7 AK10 K20 K21 AJ28 AK28 G11 G13 H16 H6 H8 J10 J11 J12 J13 J14 J15 J16 G15 J17 J5 J7 J8 J9 K6 K7 L5 L7 M6 G17 M7 N5 N7 P6 P7 R5 R7 T6 T7 U5 G5 U7 V6 V7 W5 W7 Y6 Y7 G7 G9 H10 H12 H14 AE13 AE15 AE17 AE19 AE21 AE23 AE25 AE27 K26 AF10 AF12 AF14 AF16 AF18 AF20 AF22 AF24 AF26 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF6 AF8 AG1 AG11 AG13 AG15 AG17 AG19 AG21 AG23 AG25 AG27 AG28 AG29 AG30 AG31 AG32 AG33 AG34 AG5 AG6 AG9 AH10 AH12 AH14 AH16 AH18 AH20 AH22 AH24 AH26 AH28 AH33 AH5 AH6 AH8 AJ1 AJ11 AJ13 AJ15 AJ17 AJ19 AJ21 AJ23 AJ25 AJ27 AJ29 AJ32 AJ5 AJ6 AJ9 AK33 AK5 AK6 AR25 D33 C816 1 2 C9531 2 051-9584 2.0.0 4 OF 23 4 OF 46 2412 412 23567101112141819 2021 2412412 4 4 44 4 3101213141623 4 4 4 412 4 4 4 4 2412
  • 7.
    SYM 8 OF12 VDD_ANA_TMPSADC0 VDD_ANA_TMPSADC1 VDD_ANA0 VDD_ANA1 PVDDP_FAST_SCAN_CLK VSS VDDIOD1 VDDIOD0 VDDIO30_GPIO_3V0 VDDIO30_USB11_DM VDDIO30_FAST_SCAN_CLK VDD_SRAM VDD_CPU1 VDD_CPU0 VDD_CPUB VDDIOD3 VDDIOD2 SYM 10 OF 12 VDD VDD Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT C104 MOVED TO CPU0 FROM PP1V8 PER SEG SIMS C86 MOVED TO PP1V1_SOC FROM PP1V2, PER SEG SIMS C83 MOVED TO CPUB FROM 1V2_SDRAM PER SEG SIM RESULTS POR CAPS 5/6/2011 (1500MA) (1500MA) POR CAPS 12/14/2011 (2MA SPI3) (2MA I2C2) (5MA) (5MA) (5MA) (45MA NAND 1CH) (7MA) (2MA) (40MA) THERE WERE 10X 0.01UF HERE (400MA) POR CAPS 9/1/2011 (716MA) (45MA NAND 1CH) NAND POWER GROUP BUT THEY WERE NOT NEEDED PER P.CODD 1/6/11 (VDD_SOC 3700MA) PER SEG - ZHENGGANG - 09/01/12 PRE-PROTO1 C181,C177,C174 CHANGED FROM 0.47UF TO 1UF 4V 20% 0204 0.47UF X7S 4.3UF 0610 4V 20% X5R-CERM 0204 4V 0.47UF 20% X7S 0.47UF X7S 4V 20% 0204 CERM-X5R 20% 10UF 0402-1 6.3V 4V 0.47UF 20% X7S 0204 20% X5R 0201 0.22UF 6.3V 4V X5R-CERM 0610 4.3UF 20% 0204 4V 1UF 20% X6S 0610 X5R-CERM 4V 20% 4.3UF CERM-X5R 20% 6.3V 0402-1 10UF 20% X5R-CERM 0.1UF 01005 6.3V CERM-X5R 10UF 0402-1 6.3V 20% 01005 20% X5R-CERM 0.1UF 6.3V 4V X5R-CERM 0610 4.3UF 20% X5R-CERM 20% 4.3UF 0610 4V 20% X6S 1UF 4V 02040204 20% 1UF 4V X6S 10UF 0402-1 CERM-X5R 6.3V 20% 10UF 0402-1 CERM-X5R 6.3V 20% 10UF 6.3V 20% CERM-X5R 0402-10402-1 CERM-X5R 10UF 6.3V 20% SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM 4V X5R-CERM 0610 4.3UF 20% 0.00 1/32W 01005 MF 0% 1/32W 0% MF 01005 0.00 4.3UF 20% 4V X5R-CERM 0610 20% 4V X5R-CERM 0610 4.3UF 6.3V 0.47UF CERM 0402 20% 0402 CERM 1UF 20% 4V CERM 4V 20% 1UF 0402 20% CERM 0.47UF 6.3V 0402 1UF 20% 0402 4V CERM 6.3V CERM 20% 0402 0.47UF 1UF 0402 20% 4V CERM CERM 4V 1UF 20% 0402 20% 0402 0.47UF 6.3V CERM 4V 20% 0204 X6S 1UF 20% 1UF 4V X6S 0204 FCMSP H5P-SC58950C03 FCMSP H5P-SC58950C03 1UF X6S 20% 4V 0204 0.47UF 20% 0204 X7S 4V 4.3UF 0610 X5R-CERM 4V 20% 4.3UF 0610 X5R-CERM 4V 20% 0.00 MF 0% 1/32W 01005 5% NP0-C0G 01005 6.3V 56PF 0204 20% 1UF X6S 4V X6S 20% 0204 4V 1UF 1UF 20% X6S 0204 4V X6S 4V 1UF 20% 0204 X6S 4V 1UF 20% 0204 0402 20% 4V CERM 1UF H5P SOC/CPU/SRAM PWR SYNC_DATE=N/ASYNC_MASTER=N/A PP1V1_CPU0 PP1V1_CPUB PP1V8 CPU0_SENSE CPU1_SW_S BUCK2_FB CPU0_SW_S CPU1_SENSE PP1V1_CPU1 PP1V8 PP3V0_NAND_XW PP1V0_SRAM PP3V0_IO PP1V1_SOC C1581 2 C1171 2 C1401 2 C1421 2 C1001 2 C1541 2 C1391 2 C1271 2 C1451 2 C1121 2 C1711 2 C1831 2 C1621 2 C1781 2 C1721 2 C1641 2 C1791 2 C1751 2 C1611 2 C1551 2 C1341 2 C1111 2 XW1 1 2 XW3 1 2 XW4 1 2 C1151 2 R46 1 2 R53 1 2 C1461 2 C1521 2 C135 1 2 3 4 C151 1 2 3 4 C113 1 2 3 4 C132 1 2 3 4 C114 1 2 3 4 C133 1 2 3 4 C166 1 2 3 4 C173 1 2 3 4 C169 1 2 3 4 C1031 2 C1011 2 U1 F19 AJ18 AJ22 Y17 K18 AE16 AE18 AJ20 AE20 AF19 AG16 AG18 AG20 AH17 AH19 AJ16 AE22 AE24 AF21 AF23 AG22 AG24 AH21 AH23 AH25 AJ24 AA16 AA18 AA20 AA22 AA24 AC16 AC18 AC20 AC22 AC24 AB17 AB19 AF17 AF25 AB21 AB23 AB25 AD17 AD19 AD21 AD23 AD25 F20 AR10 G30 AN10 AP11 AB27 AC27 AD27 V27 W27 Y26 A14 A15 A16 A17 A18 A20 A23 A26 A29 A33 A34 A4 A5 A6 A7 A8 A9 AA11 AA13 AA15 AA17 AA19 AA21 AA23 AA25 AA33 AA4 AA5 AA6 AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AB24 AB26 AB29 AB32 AB4 AB5 AB6 AB8 AC1 AC11 AC13 AC15 AC17 AC19 AC21 AC23 AC25 AC34 AC4 AC5 AC6 AC9 AD10 AD12 AD14 AD16 AD18 AD20 AD22 AD24 AD26 AD29 AD32 AD5 AD6 AD8 AE11 AE5 AE6 AE9 AK27 AL13 AM22 AN21 AP16 AP33 AR26 AT19 U1 AA10 AA12 AC12 T13 T15 T17 T19 T21 T23 T25 T27 T9 U10 AC14 U12 U14 U16 U18 U20 U22 U24 U26 U8 V11 AC26 V13 V15 V17 V19 V21 V23 V25 V9 W10 W12 AC8 W14 W16 W18 W20 W22 W24 W26 W8 Y11 Y13 AD11 Y15 Y9 Y19 Y21 Y23 Y25 AD13 AD15 AD9 AE10 AE12 AA14 AE14 AE26 AE8 AF11 AF13 AF15 AF27 AF9 AG10 AG12 AA26 AG14 AG26 AG8 AH11 AH13 AH15 AH27 AH9 AJ10 AJ12 AA8 AJ14 AJ26 AJ8 K11 K13 K15 K17 K23 K25 K27 AB11 K9 L10 L12 L14 L18 L20 L22 L24 L26 L8 AB13 M11 M13 M15 M17 M19 M21 M23 M25 M27 M9 AB15 N10 N12 N14 N16 N18 N20 N22 N24 N26 P11 AB9 P13 P15 P17 P19 P21 P23 P25 P27 P9 R10 AC10 R12 R14 R16 R18 R20 R22 R24 R26 R8 T11 C7451 2 C7461 2 C1061 2 C1081 2 R953 1 2 C1481 2 C831 2 C1041 2 C861 2 C1811 2 C1771 2 C174 1 2 3 4 051-9584 2.0.0 5 OF 23 5 OF 46 12 12 234567101112141819 2021 12 12 12 12 234567101112141819 2021 6 12 12
  • 8.
    IO0-1 IO7-1 IO6-1 IO3-1 IO4-1 IO5-1 IO1-1 IO2-1 IO7-0 IO5-0 IO6-0 IO4-0 IO2-0 IO3-0 IO1-0 IO0-0 VCC CLE1 CE1* CLE0 CE0* WE0* ALE0 RE0 RE0* DQS0* R/B0* DQS0 ALE1 WE1* RE1 RE1* DQS1 DQS1* R/B1* ZQ VREF VSSQVSS VCCQ VDDI TMSC TCKC PP PP PP PP PP SYM 4 OF12 FMI1_VREFFMI0_VREF FMI0_REN FMI1_WEN FMI1_DQS FMI1_REN FMI0_CLE FMI0_WEN FMI0_IO2 FMI0_IO3 FMI0_IO5 FMI1_DQSN FMI0_ALE FMI0_CEN0 FMI0_CEN1 FMI0_CEN2 FMI0_CEN3 FMI0_CEN4 FMI0_CEN5 FMI0_CEN6 FMI0_CEN7 FMI0_DQS FMI0_DQSN FMI0_DQVREF FMI0_IO0 FMI0_IO1 FMI0_IO4 FMI0_IO6 FMI0_IO7 FMI1_ALE FMI1_CEN0 FMI1_CEN1 FMI1_CEN2 FMI1_CEN3 FMI1_CEN4 FMI1_CEN5 FMI1_CEN6 FMI1_CEN7 FMI1_CLE FMI1_DQVREF FMI1_IO0 FMI1_IO1 FMI1_IO2 FMI1_IO3 FMI1_IO4 FMI1_IO5 FMI1_IO6 FMI1_IO7 PVDDP_FMI0 PVDDP_FMI1 FMI0_WENN/RE_P FMI1_WENN/RE_P Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT POR CAPS 1/7/11 500MA NOTE: NAND PADS SHOULD BE SHIELDED FROM TRACES WITH A GROUND PLANE 1000MA FOR NAND CURRENT MEASUREMENT NAND SM OMIT_TABLE CERM-X5R 20% 0402-1 6.3V 10UF 0204 X6S 4V 20% 1UF10UF 0402-1 20% 6.3V CERM-X5R 01005 1/32W MF 243 1% 01005 NOSTUFF MF 5% 1/32W 100K XXNM-XGBX8-MLC-PPN1.5-ODP LGA-12X17 OMIT 5% 01005 MF 100K 1/32W 5% 100K MF 1/32W 01005 10% X5R 6.3V 0.01UF 01005 01005 0.01UF X5R 6.3V 10% OMIT_TABLE 20% 10UF 6.3V 0402-1 CERM-X5R SM P4MM P4MM SM SM P4MM 1% 1/32W MF 50K 01005 50K 1% 1/32W 01005 MF OMIT_TABLE 0402-1 20% 6.3V CERM-X5R 10UF OMIT_TABLE CERM-X5R 0402-1 6.3V 10UF 20% P2MM SM SM P2MM X5R 4V 20% 0402 15UF 4V 2.2UF 20% 0201 X5R-CERM 0204 X6S 4V 20% 1UF X7S 0.47UF 20% 4V 0204 20% 4.3UF 4V 0610 X5R-CERM 20% 4V X7S 0204 0.47UF NOSTUFF 100K 01005 MF 1/32W 5% NOSTUFF 0201 X5R-CERM 20% 2.2UF 4V H5P-SC58950C03 FCMSP 4V 20% X6S 1UF 0204 SYNC_MASTER=N/A SYNC_DATE=N/A H5P W/ NAND FMI1_IO<5> FMI0_IO<0> FMI0_IO<1> FMI0_IO<2> FMI0_IO<3> FMI0_IO<4> FMI1_IO<0> FMI1_IO<1> FMI0_DQVREFFMI0_DQVREF 45_FMI0_RE_L FMI1_WE_L 45_FMI1_DQS 45_FMI1_RE_L FMI0_CLE FMI0_WE_L FMI0_IO<5> FMI0_ALE FMI0_CEN0 45_FMI0_DQS FMI0_DQVREF FMI0_IO<6> FMI0_IO<7> FMI1_ALE FMI1_CEN0 FMI1_CLE FMI0_DQVREF FMI1_IO<2> FMI1_IO<3> FMI1_IO<4> FMI1_IO<6> FMI1_IO<7> PP1V8 PP1V8 NAND_TMSC 45_FMI0_RE_L FMI0_DQVREF 45_FMI0_DQS PPN_ZQ 45_FMI0_DQS PP3V0_NAND NAND_TCKC FMI0_IO<3> FMI0_IO<2> FMI0_IO<0> FMI0_IO<4> 45_FMI0_RE_L FMI0_IO<1> FMI0_IO<5> FMI0_CEN0 FMI1_ALE FMI1_CEN0 FMI1_WE_L FMI1_CLE FMI0_IO<0> FMI0_IO<6> FMI0_ALE FMI0_DQVREF PP1V2_NAND_VDDI NAND_RDYBSY1_L FMI0_WE_L FMI0_CLE PP1V8 45_FMI1_DQS 45_FMI1_RE_L NAND_RDYBSY0_L FMI0_IO<7> PP3V0_NAND_XW PP1V8 C31 2 XW2 1 2 C1821 2 C1071 2 C951 2 R8 1 2 R1601 2 U4 C1 D2 A5 C5 A3 C3 H4 F4 M4 K4 G3 G1 H2 J1 J3 L1 K2 N3 L5 N5 K6 L7 J5 J7 H6 G7 E5 E7 B4 C7 D4 D6 OA0 OB0 B6 F2 M6 N1 N7 OC8 OD8 OE0 OF8 G0 OA8 OB8 G5 B2 F6 L3 A7 M2 OC0 OD0 OE8 OF0 G8 E3 E1 A1 R821 2 R781 2 C1361 2 C1441 2 C3071 2 PP3 1 PP2 1 PP14 1 R1371 2 R1431 2 C2091 2 C1871 2 PP17 1 PP19 1 C1091 2 C501 2 C1851 2 C1051 2 C6271 2 C6051 2 R481 2 C261 2 U1 AC31 AE29 AE30 AE32 AE34 AA29 AB30 AA30 AB28 AD30 AC33 AC32 AD28 AA28 AA31 AB34 AB31 AD31 AE31 AD34 AE33 AC30 AE28 AC29 AC28 W29 W28 Y34 AA32 Y33 T34 V31 U34 U31 Y28 V34 V33 V30 U33 U29 V32 W32 W34 W31 Y30 Y31 W30 Y27 V28 U28 AA27 U27 051-9584 2.0.0 6 OF 23 6 OF 46 6 6 6 6 6 66 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 234567101112141819 2021 2 3 4 5 6 7 10 11 12 14 18 19 20 21 6 6 6 6 12 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 234567101112141819 2021 6 6 6 5 2 3 4 5 6 7 10 11 12 14 18 19 20 21
  • 9.
    SYM 11 OF12 VSS VSS SYM 12 OF 12 VSSVSS SYM 5 OF 12 MIPI0D_VDD18 MIPI1D_VDD18 MIPI0D_VDD10_PLL MIPI1D_VDD10_PLL MIPI0C_DPDATA1 SENSOR1_RST MIPI1D_DPCLK MIPI1D_VREG_0P4V MIPI0D_VREG_0P4V MIPI_VDD10 MIPI_VSS MIPI_VSYNC MIPI0C_DNCLK MIPI0C_DNDATA0 MIPI0C_DNDATA1 MIPI0C_DNDATA2 MIPI0C_DNDATA3 MIPI0C_DPCLK MIPI0C_DPDATA0 MIPI0C_DPDATA2 MIPI0C_DPDATA3 MIPI0D_DNCLK MIPI0D_DNDATA0 MIPI0D_DNDATA1 MIPI0D_DNDATA2 MIPI0D_DNDATA3 MIPI0D_DPCLK MIPI0D_DPDATA0 MIPI0D_DPDATA1 MIPI0D_DPDATA2 MIPI0D_DPDATA3 MIPI1C_DPDATA1 SENSOR0_CLK SENSOR0_RST SENSOR1_CLK MIPI1C_DNDATA1 MIPI1C_DPDATA0 ISP1_SDA MIPI1C_DNDATA0 MIPI1D_DNCLK MIPI1D_DPDATA1 MIPI1D_DNDATA1 MIPI1D_DPDATA0 MIPI1D_DNDATA0 ISP1_FLASH ISP1_SCL ISP0_PRE_FLASH ISP0_SCL ISP0_SDA ISP1_PRE_FLASH ISP0_FLASH MIPI1C_DPCLK MIPI1C_DNCLK LPDP_PAD_TX0P LPDP_PAD_TX0N LPDP_PAD_TX1P LPDP_PAD_TX1N LPDP_PAD_R_BIAS DAC_COMP DP_PAD_DC_TP DP_PAD_R_BIAS LPDP_HPD LPDP_PAD_AUXP LPDP_PAD_AUXN DAC_IREF DAC_VREF DAC_AVSS18D DP_PAD_AVSS_AUX DP_PAD_AVSS0 DP_PAD_AVSS1 DP_PAD_AVSSP0 DP_PAD_AVSSX DP_PAD_DVSS LPDP_PAD_AVSS0 LPDP_PAD_AVSS1 LPDP_PAD_AVSS2 DAC_AVSS18A2 DP_PAD_TX1N DP_PAD_TX1P DP_PAD_TX0N DP_PAD_TX0P DP_PAD_AUXN DP_HPD DAC_OUT1 DP_PAD_AUXP DAC_OUT2 DAC_OUT3 LPDP_PAD_LN1_AVDD LPDP_PAD_CMN_AVDD LPDP_PAD_CMN_AVDDH LPDP_PAD_LN0_AVDD DP_PAD_AVDDX DP_PAD_DVDD LPDP_PAD_AUX_AVDD DP_PAD_AVDD0 DP_PAD_AVDD1 DP_PAD_AVDDP0 DP_PAD_AVDD_AUX DAC_AVDD18D DAC_AVDD18A SYM 6 OF 12 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT LPDP NOT USED, NO CAP NEEDED ON THIS PIN (0MA LPDP) (2X65MA) (8MA) (2MA) (2MA) FF CAMERA RESET CAM1 SHUTDOWN IS ALSO MAIN CAMERA (12MA) (12MA) (11MA) (15MA) (28MA) (1MA) 01005 2200PF 6.3V 10% X5R-CERM 01005 X5R-CERM 10% 6.3V 2200PF 20% 0.1UF X5R-CERM 6.3V 01005 33.2 1/32W 01005MF 1% MF 1% 1/32W 33.2 01005 20% X5R-CERM 6.3V 0.1UF 01005 X5R-CERM 20% 0.1UF 01005 6.3V 1.00K 01005 5% MF 1/32W 01005 MF 5% 1/32W 1.00K 01005 MF 5% 1.00K 1/32W 01005 1.00K 5% 1/32W MF 6.3V 20% 0.1UF 01005 X5R-CERM 20% 0.1UF 01005 X5R-CERM 6.3V 01005 6.3V NP0-C0G 5% 56PF NP0-C0G 6.3V 01005 56PF 5% 01005 6.3V 56PF 5% NP0-C0G 5% 56PF NP0-C0G 6.3V 01005 20% 4V 4.3UF X5R-CERM 0610 H5P-SC58950C03 FCMSP FCMSP H5P-SC58950C03 H5P-SC58950C03 FCMSP FCMSP H5P-SC58950C03 SYNC_DATE=N/ASYNC_MASTER=N/A H5P VIDEO PP1V0 PP1V8 90_AP_TO_LCM_MIPI_DATA2_P AP_TO_CAM_FF_SCL PP1V8 90_CAM0_TO_AP_MIPI_CLK_P 90_CAM0_TO_AP_MIPI_CLK_N 90_AP_TO_LCM_MIPI_DATA1_N 90_AP_TO_LCM_MIPI_DATA2_N 90_CAM0_TO_AP_MIPI_DATA3_P 90_CAM0_TO_AP_MIPI_DATA2_N PP1V8 PP1V0 90_CAM0_TO_AP_MIPI_DATA1_P MIPI1D_VREG MIPI0D_VREG 90_CAM0_TO_AP_MIPI_DATA0_N 90_CAM0_TO_AP_MIPI_DATA1_N 90_CAM0_TO_AP_MIPI_DATA2_P 90_AP_TO_LCM_MIPI_CLK_N 90_AP_TO_LCM_MIPI_DATA0_N 90_AP_TO_LCM_MIPI_DATA3_N 90_AP_TO_LCM_MIPI_CLK_P 90_AP_TO_LCM_MIPI_DATA0_P 90_AP_TO_LCM_MIPI_DATA1_P AP_BI_CAM_FF_SDA CAM0_TORCH AP_TO_CAM_RF_SCL AP_BI_CAM_RF_SDA 45_AP_TO_CAM_FF_CLK 45_AP_TO_CAM_RF_CLK AP_TO_CAM_RF_SHUTDOWN 45_AP_TO_CAM_RF_CLK_R AP_TO_CAM_FF_SHUTDOWN 45_AP_TO_CAM_FF_CLK_R 90_CAM1_TO_AP_MIPI_DATA0_N 90_CAM1_TO_AP_MIPI_DATA0_P 90_CAM1_TO_AP_MIPI_CLK_N 90_CAM1_TO_AP_MIPI_CLK_P 90_CAM0_TO_AP_MIPI_DATA3_N 90_CAM0_TO_AP_MIPI_DATA0_P 90_AP_TO_LCM_MIPI_DATA3_P C6 1 2 C71 2 C1911 2 R381 2 R401 2 C531 2 C571 2 R371 2 R391 2 R411 2 R421 2 C2681 2 C58 1 2 C2591 2 C2741 2 C2801 2 C2841 2 C2661 2 U1 AL10 AL11 AL7 B24 B26 B28 B3 B33 B34 B4 B6 B8 C10 AL8 C11 C13 C14 C15 C16 C17 C18 C2 C23 C24 AL9 C25 C26 C28 C29 C3 C30 C31 C32 C4 C5 AM1 C6 C7 C8 C9 D1 D10 D11 D12 D13 D14 AM17 D15 D16 D17 D23 D24 D25 D26 D27 D28 D29 AM18 D3 D30 D31 D32 D4 D5 D6 D8 D9 E10 AM26 E11 E13 E14 E15 E16 E17 E18 E19 E2 E20 AM5 E21 E22 E24 E25 E26 E28 E3 E30 E4 E5 AM6 E6 E7 E8 E9 AM7 AL12 AN11 AN14 AN17 AN18 AN19 AN20 AN22 AN23 AN24 AN25 AL14 AN26 AN32 AN5 AN7 AN8 AP10 AP13 AP17 AP18 AP19 AL15 AP20 AP21 AP22 AP23 AP24 AP25 AP26 AP4 AP7 AR1 AL29 AR11 AR17 AR18 AR19 AR20 AR21 AR22 AR23 AR24 AR27 AL32 AR28 AR29 AT14 AT16 AT17 AT18 AT2 AT20 AT21 AT22 AL4 AT23 AT24 AT25 AT26 AT27 AT28 AT29 AT31 AT32 AT5 AL5 AT8 AU1 AU2 AU33 AU34 AU4 AV1 AV14 AV2 AV33 AL6 AV34 AV5 B1 B13 B16 B18 B19 B2 B21 B23 U1 E31 E32 F1 F10 F11 F12 F13 F14 F15 F17 F18 F21 F22 F27 F3 F30 F31 F32 F4 F6 F7 F8 F9 G1 G10 G12 G14 G16 G2 G22 M31 G31 G34 G4 G6 G8 H1 H11 H13 H17 H18 H19 H2 H20 H21 H22 H3 H30 H31 H32 H33 H4 H5 H7 H9 J27 J3 J30 J31 J32 J33 J4 J6 K1 K10 K12 K14 U30 K19 K2 K22 K24 K31 K4 K5 K8 L1 L11 L13 L15 L17 L21 L23 L25 L27 L3 L31 L4 L6 L9 M10 M12 M14 M18 M20 M22 M24 M26 M5 M8 N1 N11 N13 N17 N19 N21 N23 N25 N27 N31 N34 N4 N6 P12 P14 P16 P18 P20 P22 P24 P26 P5 P8 R11 R13 R15 R17 R19 R21 R23 R25 R27 R30 R33 R34 R4 R6 T1 T10 T12 T14 T16 T18 T22 T24 T26 T28 T29 T30 T31 T32 T5 T8 U1 U11 U13 U15 U17 U19 U21 U23 U25 U32 U4 U9 V10 V12 V14 V16 V18 V20 V22 V24 V26 V5 V8 W11 W13 W15 W17 W19 W4 W6 W9 U1 AR12 AM11 AR6 AH1 AU11 AM12 AL2 AU6 AV19 AV21 AV20 AV18 AV17 AU19 AU21 AU20 AU18 AU17 AV24 AV26 AV25 AV23 AV22 AU24 AU26 AU25 AU23 AU22 AM21 AM19 AM20 AV31 AV30 AV32 AU31 AU30 AU32 AV28 AV27 AV29 AU28 AU27 AU29 AM23 AM25 AM24 AK18 AK19 AK20 AK21 AK22 AK23 AK24 AK25 AK26 AL18 AL19 AL20 AL21 AL22 AL23 AL24 AL25 AL26 AR3 AN9 AP6 AP2 AM10 U1 N29 L30 N28 M30 P28 P29 K34 J34 H34N30 AU8 A27 A28 J23 G23 J24 G24 G25 H23 F23 H24 F24 F25 G26 J25 H25 F26 A24 A25 A21 A22 AV12 AP27 AR34 AT34 AN27 AN28 AN29 AM27 AL27 AP28 AP29 AR30 AL34 AM34 AH34 AJ34 051-9584 2.0.0 7 OF 23 7 OF 46 2712 2 3 4 5 6 7 10 11 12 14 18 19 20 21 19 11 2 3 4 5 6 7 10 11 12 14 18 19 20 21 21 21 19 19 21 21 2 3 4 5 6 7 10 11 12 14 18 19 20 212712 21 21 21 21 19 19 19 19 19 19 11 15 15 21 15 21 11 21 21 11 11 11 11 11 21 21 19
  • 10.
    VEN VOUT GND VIN G SYM_VER_1 D S Apple Inc. THEINFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT VDD (3.0V) 516S1040 PLUG WIFI FLEX PAC: R970 TO VIB NET MINIMIZE DCR ON MLB ----> MIC2/3 BIAS, STROBE NTC STROBE: STROBE: VIBE DRIVE PAC SPI BUS WIFI FLEX PAC: VIBE RETURN BUTTON FLEX MIC2_P,_N BUTTONS: RINGER, HOLD, VOL_UP/DOWN 516S1041 RCPT (FLEX) MIC2 (ANC REF MIC): LED COOL (VIBE DRIVER, BUTTONS, ANC REF MIC, STROBE, STROBE_NTC) 12V-33PF 01005-1 120-OHM-210MA 01005 100PF 5% 10V NP0-C0G 01005 120-OHM-210MA 01005 120-OHM-210MA 01005 120-OHM-210MA 01005 01005 NP0-C0G 10V 100PF 5% 01005 NP0-C0G 10V 100PF 5% 5% NP0-C0G 10V 01005 100PF 01005-1 12V-33PF 01005-1 12V-33PF 12V-33PF 01005-1 27PF NP0-C0G 16V 01005 5% 100PF NP0-C0G 16V 5% 01005 M-ST-SM 105847-018 01005 5% 6.3V 56PF NP0-C0G 01005 120-OHM-210MA 120-OHM-210MA 01005 NP0-C0G 01005 56PF 6.3V 5% 0201-1 1.0UF X5R 20% 6.3V NO_XNET_CONNECTION=TRUE NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM 01005 120-OHM-210MA 56PF 6.3V 01005 5% 120-OHM-210MA 01005 01005 6.3V 56PF 5% 120-OHM-210MA 01005 6.3V 01005 5% 56PF 16V NP0-C0G 5% 100PF 01005 BAS40LP LLP-DFN1006-2 01005 1/32W MF 0% 0.00 NOSTUFF LP5907UVX-3.3V USMD NOSTUFF MF 01005 1/32W 100K NOSTUFF 5% 100PF 5% 01005 NP0-C0G 16V 1% 10K 1/32W MF 01005 DFN1006H4-3 DMN3730UFB4 56PF 6.3V 01005 NP0-C0G 5% SM 20% 6.3V 4.7UF X5R 0402 1/32W 01005 MF 0% 0.00 5% NP0-C0G 6.3V 56PF 01005 1/32W MF 0% 0.00 01005 SYNC_DATE=N/ASYNC_MASTER=N/A BUTTON FLEX B2B BUTTON_TO_AP_VOL_UP_CONN_L BB_TO_ANT_PAC_SPI_CS_BUTTON_CONN_L BB_TO_ANT_PAC_SPI_MOSI_BUTTON_CONN BB_TO_ANT_PAC_SPI_SCLK_BUTTON_CONN MIC2_TO_CODEC_P MIC2_TO_CODEC_N BUTTON_TO_AP_HOLD_KEY_CONN_L CODEC_TO_MIC2_BIAS_CONN BUTTON_TO_AP_RINGER_A_CONN BUTTON_TO_AP_VOL_DOWN_CONN_L PP_VIBE PP3V0_ALWAYS_CONN PP3V0_ALWAYS_CONN PP3V0_ALWAYS PP_STRB_DRIVER_TO_LED PGND_VIBE_RETURN PP_VIBE CODEC_TO_MIC2_BIAS_CONN CAM_RF_TO_STROBE_NTC_CONN MIC2_TO_CODEC_N MIC2_TO_CODEC_P PP_CODEC_TO_MIC2_3_BIAS PGND_VIBE_RETURN CAM_RF_TO_STROBE_NTC BUTTON_TO_AP_VOL_DOWN_L BB_TO_ANTENNA_PAC_SPI_CS_L BB_TO_ANTENNA_PAC_SPI_MOSI BB_TO_ANTENNA_PAC_SPI_SCLK BUTTON_TO_AP_VOL_UP_L BUTTON_TO_AP_RINGER_A BUTTON_TO_AP_HOLD_KEY_L PP_BATT_VCC VIB_LDO_EN VIB_PWM VIBE_PWM_G PP3V3_VIB PP3V0_VIBE DZ11 2 FL3 1 2 C314 1 2 FL7 1 2 FL8 1 2 FL46 1 2 C311 1 2 C197 1 2 C313 1 2 DZ21 2 DZ31 2 DZ71 2 C2081 2 C2411 2 J2 19 20 21 22 1 10 11 12 13 14 15 16 17 18 2 3 4 5 6 7 8 9 C244 1 2 FL47 1 2 FL21 12 C451 2 C2161 2 XW41 1 2 FL70 1 2 C384 1 2 FL71 1 2 C3831 2 FL72 1 2 C382 1 2 C120 1 2 D3 A K R70 1 2 U70 B2 B1 A1 A2 R691 2 C1201 1 2 R94011 2 Q7 3 1 2 C3971 2 XW80 1 2 C1181 2 R970 1 2 C6971 2 R977 1 2 051-9584 2.0.0 8 OF 23 8 OF 46 8922 89 8 8 8 8 1216 15 8 8 8 8 9 8 9 22 10 11 8 15 313 23 23 23 313 313 3 12152223 3 3 12
  • 11.
    AIN1- AIN2+ AIN2- AIN6+ AIN6- DMIC2_SCLK DMIC2_SD DMIC1_SD DMIC1_SCLK AIN8+ AIN7- AIN7+ AIN5- AIN4+ AIN1+ LINEOUT_REF AOUT2- AOUT2+ AOUT1- AOUT1+ AIN8- AIN5+ AIN4- AIN3- AIN3+ LINEOUTB LINEOUTA HPOUTA HPOUTB HS3 HS4 HS3_REF HS4_REF HPDETECT DN DP MBUS_REF SYM 1 OF3 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 15OHM FOR TRISTAR, 20OHM FOR TRISTAR2 R102, R103 VALUE CONTROLLED VIA BOMOPTION MIKEY TO TRISTAR MIC IN ANALOG N/C,INTERNAL WEAK BIAS TO VCM HEADPHONE ANC N/C,INTERNAL WEAK BIAS TO VCM REF MIC1 N/C,INTERNAL WEAK BIAS TO VCM 50PF LIMIT ON AOUTX PINS WHICH INPUT FOR WHICH MIC, ETC. (ANALOG MIC IN, DIG MIC IN, HPOUT, LINEOUT, RECEIVER OUT, MIKEYBUS) AUDIO I/O LINEIN LINEIN ANC REF MIC2 ANC ANALOG ERROR MIC PRIMARY ANALOG MIC HEADPHONES ANC ERROR MIC ANC REF MIC HEADPHONE MIC VOICE MIC L67 AUDIO CODEC TO DO: REVIEW AUDIO MIC PATHS, WHICH BIAS OUTPUT USED FOR WHICH MIC, (VOICE) MIC NP0-C0G 56PF 01005 6.3V 5% 20% X5R 4V 01005 0.1UF 01005 56PF NP0-C0G 6.3V 5% 01005 X5R 4V 20% 0.1UF 20% 0.1UF 01005 X5R 4V 6.3V 5% NP0-C0G 01005 56PF 6.3V 5% 01005 NP0-C0G 56PF 4V 0.1UF 20% X5R 01005 01005 0.1UF 20% 4V X5R NP0-C0G 01005 6.3V 5% 56PF56PF 6.3V 01005 NP0-C0G 5% X5R 01005 0.1UF 20% 4V 10% 01005 X5R 6.3V 0.01UF 01005 0.01UF 10% 6.3V X5R 6.3V 01005 5% NP0-C0G 56PF 20% 01005 0.1UF 4V X5R 01005 NP0-C0G 6.3V 5% 56PF 20% X5R 4V 0.1UF 01005 01005 6.3V 5% 56PF NP0-C0GNP0-C0G 01005 5% 56PF 6.3V 5% NP0-C0G 01005 10V 100PF 100PF 10V 01005 NP0-C0G 5% NOSTUFF 01005 MF5% 15.0 1/32W OMIT_TABLE 1/32W 5% MF 01005 15.0 OMIT_TABLE 01005 10V NP0-C0G 5% 100PF 01005 0.01UF 10% 6.3V X5R WLCSP CS42L67-CWZR-A0 SYNC_DATE=N/ASYNC_MASTER=N/A L67 AUDIO CODEC (1/2) CODEC_TO_HPHONE_HS4 90_CODEC_BI_TRISTAR_MIKEYBUS_P RCVR_TO_CODEC_RCVR_TEST_L67 HPHONE_TO_CODEC_DET CODEC_TO_HPHONE_HS3 EXTMIC_TO_CODEC_L67_N CODEC_TO_HPHONE_HS4_REF CODEC_TO_HPHONE_HS3_REF 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_N 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_P 90_CODEC_BI_TRISTAR_MIKEYBUS_N HAC_TO_CODEC_TEST_L67 EXTMIC_TO_CODEC_L67_P MIC3_TO_CODEC_L67_P MIC3_TO_CODEC_L67_N HPHONE_TO_CODEC_HPHONE_TEST_L67 MIC2_TO_CODEC_L67_P MIC2_TO_CODEC_L67_N MIC1_TO_CODEC_P HAC_TO_CODEC_TEST HPHONE_TO_CODEC_HPHONE_TEST RCVR_TO_CODEC_RCVR_TEST MIC1_TO_CODEC_N MIC2_TO_CODEC_N EXTMIC_TO_CODEC_N EXTMIC_TO_CODEC_P MIC3_TO_CODEC_N CODEC_TO_HPHONE_R CODEC_TO_RCVR_P CODEC_TO_HAC_P CODEC_TO_HAC_N MIC1_TO_CODEC_L67_N CODEC_TO_HPHONE_L CODEC_TO_RCVR_N MIC2_TO_CODEC_P MIC3_TO_CODEC_P MIC1_TO_CODEC_L67_P C2301 2 C222 1 2 C2271 2 C224 1 2 C223 1 2 C2311 2 C2281 2 C225 1 2 C55 1 2 C651 2 C641 2 C61 1 2 C354 1 2 C356 1 2 C2291 2 C220 1 2 C2261 2 C221 1 2 C236 1 2 C235 1 2 C138 1 2 C511 2 R102 1 2 R103 1 2 C143 1 2 C362 1 2 U21 G1 G2 F3 F4 F1 F2 E3 E4 E2 E1 D2 D1 D4 D3 C2 C1 L7 K7 K5 L5 B6 A6 A2 A3 G10 F10 G8 J9 K9 K1 L9 L2 L8 K8 J8 H8 F11 051-9584 2.0.0 9 OF 23 9 OF 46 17 16 17 17 17 17 16 1722 11 17 11 17 8 17 17 11 17 11 11 11 17 11 822 1122
  • 12.
    MIC3_BIAS MIC2_BIAS_FILT_IN MIC2_BIAS_FILT FLYP VD FLYC MIC1_BIAS MIC2_BIAS_IN MIC2_BIAS VCP MIC1_BIAS_FILT MIC3_BIAS_FILT MIC4_BIAS_FILT MIC4_BIAS GNDHS0 GNDHS1 GNDD VA VPROG_CP VL VP +VCP_FILT GNDCP0 GNDCP1 -VCP_FILT GNDP SPEAKER_VQ FILT+ FILT- GNDA FLYN SYM 2 OF3 XSP_LRCK/FSYNC XSP_SDIN/DAC2B_MUTE WAKE* MCLK ASP_LRCK ASP_SDIN ASP_SDOUT VSP_SCLK VSP_SDOUT VSP_LRCK/FSYNC GND INT* CDOUT CDIN CS* VSP_SDIN ASP_SCLK XSP_SCLK TSTI TSTO RESET* CCLK XSP_SDOUT SYM 3 OF 3 Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT KEEP THESE CAPS AT CODEC PINS DIGITAL SYSTEM I/OPOWER, MICBIAS L67 AUDIO CODEC KEEP THIS CAP AT CODEC PINS TSTO MUST BE NC KEEP THIS CAP AT CODEC PINS KEEP THESE CAPS AT CODEC PINS PCB: C421 AT U21.L6 KEEP THESE CAPS AT CODEC PINS X5R 20% 0.1UF 01005 4V 0.1UF 4V 20% X5R 01005 0402-1 CERM-X5R 6.3V 20% 10UF OMIT_TABLE 10% 6.3V X5R 0.1UF 201 X5R-CERM1 4.7UF 20% 6.3V 402 0.1UF 10% 6.3V X5R 201 CERM-X5R 20% 0402-1 6.3V 10UF X5R 6.3V 1.0UF 20% 0201-1 01005 1% 1/32W 2.21K MF 20% 4.7UF 6.3V 402 X5R-CERM1 5% MF 01005 1/32W 1.00K 402 4.7UF X5R-CERM1 6.3V 20% 402 20% 4.7UF 6.3V X5R-CERM1 6.3V X5R 1.0UF 20% 0201-1 CERM-X5R 0402-1 6.3V 20% 10UF 20% 6.3V 402 4.7UF X5R-CERM1 6.3V 4.7UF 402 X5R-CERM1 20% 6.3V X5R-CERM1 402 20% 4.7UF 402 4.7UF 6.3V 20% X5R-CERM1 SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM WLCSP CS42L67-CWZR-A0 WLCSP CS42L67-CWZR-A0 120-OHM-210MA 01005 SYNC_DATE=N/ASYNC_MASTER=N/A L67 AUDIO CODEC (2/2) PP_EXTMIC_BIAS_FILT_IN PP_EXTMIC_BIAS PP1V7_VA_L67 PP1V8_SDRAM PP_CODEC_VCPFILT- PP_CODEC_SPKR_VQ PP_CODEC_FILT+ PP1V8 PGND_MIC2_3_TO_CODEC_RET_FILT PP_CODEC_VHP_FLYC PP_CODEC_VCPFILT+ AP_TO_CODEC_SPI3_MOSI PP_EXTMIC_BIAS_FILT PP_CODEC_TO_MIC1_BIAS PP_CODEC_TO_MIC2_3_BIAS PP_VCC_MAIN PP_EXTMIC_BIAS_IN PP_CODEC_VHP_FLYN PP_CODEC_VHP_FLYP CODEC_TO_AP_XSP_I2S2_DIN AP_TO_CODEC_SPI3_CLK CODEC_RESET_L 45_AP_TO_CODEC_XSP_I2S2_BCLK 45_AP_TO_CODEC_ASP_I2S0_BCLK AP_TO_CODEC_VSP_I2S4_DOUT AP_TO_CODEC_SPI3_CS_L CODEC_TO_AP_SPI3_MISO CODEC_TO_AP_INT_L AP_TO_CODEC_VSP_I2S4_LRCLK CODEC_TO_AP_VSP_I2S4_DIN 45_AP_TO_CODEC_VSP_I2S4_BCLK CODEC_TO_AP_ASP_I2S0_DIN AP_TO_CODEC_ASP_I2S0_DOUT AP_TO_CODEC_ASP_I2S0_LRCLK 45_AP_TO_CODEC_I2S_MCLK CODEC_TO_PMU_MIKEY_INT_L AP_TO_CODEC_XSP_I2S2_DOUT AP_TO_CODEC_XSP_I2S2_LRCLK PGND_CODEC_GNDCP PGND_MIC1_TO_CODEC_RET_FILT PP_VCC_MAIN_CODEC PP1V8_SDRAM C4221 2 C4211 2 C4201 2 C4131 2 C4161 2 C2341 2 C4141 2 C4121 2 R1001 2 C2381 2 R1451 2 C218 12 C219 12 C2371 2 C424 1 2 C2321 2 C2331 2 C4291 2 C4251 2 XW43 1 2 XW48 1 2 U21 H2 H1 G9 H10 J10 H9 J11 J2 K10 L11 A10 L1 K2 K6 L10 J5 J6 L3 K3 K4 L4 H7 G6 H6 H5 K11 J7 J1 G11 A11 B10 B9 L6 H11 U21 B11 C10 C9 A8 B4 B3 A4 B5 A1 C5 F6 F7 F8 G7 H3 H4 J3 J4 B1 F9 D5 D7 E5 E6 E7 F5 G4 A9 G3 D8 D9 B2 C3 C4 C11 E10 E11 A5 C6 C8 D6 E8 E9 D10 D11 G5 B7 B8 C7 A7 FL96 12 051-9584 2.0.0 10 OF 23 10 OF 46 34101213141623 234567111214181920 21 3 17 811 12131423 315 3 315 3 3 3 3 3 3 3 3 3 3 3 3 13 315 315 34 1012 13 1416 23
  • 13.
    SYM_VER-2 G SYM_VER_1 D S SYM_VER-2 Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT FRONT CAM: POWER AND MIPI NOTE: J1.30 IS GND ON POR BOARDS, J1.30 IS ALS_INT FROM FF CAM FOR SPECIAL CONFIG OF PROTO2 (CONTROLLED VIA BOMOPTION) 516S0986 RCPT FCAM ANALOG GROUND NOTE: MIC3_TO_CODEC_N NOTE: MIC3_TO_CODEC_P CG FLEX B2B MIPI GROUND MIPI GROUND MIPI GROUND CLK, I2C, SHDN PCB: PLACE THESE AT J1 CONN THIS ON ONE MLB ---> 516S0987 PLUG (FF CAM, PROX, ALS, RECEIVER, ANC ERROR MIC) (ANC ERROR MIC) CAM1 ALS INT PROX: PWR, TX EN RX, RX_EN PROX: POWER, -21.4 DB SIGNAL OF HAC VPP I2C, INT 5 MA 0.25 MA ALS: POWER, HAC RECEIVER 50 MA NOTE: IRLED_A SPECIAL Z = 0.60 MM MAX IRLED = 104-128MA MIC3 PROX GROUND -21.4 DB SIGNAL OF RCVR VPP FRONT CAM: PROX_RX SIGNAL MUST BE TREATED WITH CARE 1/32W MF 01005 1% 10K 01005-1 70-OHM-300MA 120-OHM-25%-250MA-0.5DCR 01005 01005 120-OHM-25%-250MA-0.5DCR NO_XNET_CONNECTION=TRUE 01005-1 70-OHM-300MA F-ST-SM AA22L-S034VA1 X5R 6.3V 603 20% 4.7UF OMIT_TABLE 5% NP0-C0G 6.3V 01005 56PF 6.3V 56PF 5% NP0-C0G 01005 120-OHM-210MA 01005 1/20W 201 11.5 1% MF 01005 0.1UF 20% 4V X5R 01005 5% 6.3V NP0-C0G 56PF 01005 NP0-C0G 6.3V 5% 56PF 1.00M 5% 1/32W MF 01005 TCM0605-1 90-OHM-50MA DFN1006H4-3 DMN3730UFB4 56PF 6.3V 01005 NP0-C0G 5% 120-OHM-210MA 01005 12V-33PF 01005-1 56PF 5% 6.3V 01005 NP0-C0G 5% 6.3V 01005 NP0-C0G 56PF 120-OHM-25%-250MA-0.5DCR 01005 01005 120-OHM-25%-250MA-0.5DCR 120-OHM-25%-250MA-0.5DCR 01005 NP0-C0G 01005 5% 6.3V 56PF 01005 56PF 5% 6.3V NP0-C0G 56PF 6.3V 01005 NP0-C0G 5% NP0-C0G 6.3V 5% 56PF 01005 01005 6.3V NP0-C0G 5% 56PF NP0-C0G 6.3V 5% 56PF 01005 TCM0605-1 90-OHM-50MA 56PF 01005 5% 6.3V NP0-C0G 6.3V 01005 56PF 5% NP0-C0G 01005 120-OHM-25%-250MA-0.5DCR 1.0UF 6.3V 20% X5R 0201-1 1/32W 0% 0.00 01005 MF 01005 120-OHM-210MA 01005 120-OHM-210MA 120-OHM-210MA 01005 01005-1 12V-33PF 56PF 6.3V 5% 01005 NP0-C0G 0.1UF X5R 20% 01005 4V 70-OHM-300MA 01005-1 15.8K 1% MF 1/32W 01005 01005-1 70-OHM-300MA 12V-33PF 01005-1 12V-33PF 01005-1 01005-1 70-OHM-300MA 01005-1 70-OHM-300MA 01005 0.1UF X5R 4V 20% 10K 1% MF 01005 1/32W 15.8K MF 1% 1/32W 01005 0402 20% X5R 4.7UF 6.3V SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE 1UF 6.3V 20% X5R 0201 FF_ALS_INT 01005 0.00 1/32W 0% MF 0.00 MF NO_FF_ALS_INT 0% 1/32W 01005 SYNC_MASTER=N/A SYNC_DATE=N/A CG FLEX B2B 90_CAM1_TO_AP_MIPI_CLK_CONN_N 90_CAM1_TO_AP_MIPI_CLK_CONN_P 90_CAM1_TO_AP_MIPI_DATA0_CONN_N 90_CAM1_TO_AP_MIPI_DATA0_CONN_P PP2V8_CAM_AVDD PP3V0_PROX_IRLED FCAM_TO_AP_ALS_INT_L CUMULUS_TO_PROX_TX_EN_BUFF PP2V8_FCAM_CONN PP1V8_FCAM_CONN CODEC_TO_RCVR_CONN_P CODEC_TO_HAC_CONN_P CODEC_TO_HAC_CONN_N AP_TO_I2C2_SCL_ALS_CONN ALS_TO_AP_INT_CONN_L PP3V0_ALS AP_BI_I2C2_SDA_ALS_CONN CUMULUS_TO_PROX_RX_EN_1V8_CONN 45_PROX_TO_CUMULUS_RX_CONN AP_BI_CAM_FF_SDA_CONN 45_AP_TO_CAM_FF_CLK_CONN AP_TO_CAM_FF_SCL_CONN AP_BI_I2C2_SDA CODEC_TO_RCVR_CONN_N AP_TO_CAM_FF_SHUTDOWN AP_TO_CAM_FF_SHUTDOWN_CONN PP3V0_PROX_ALS PP3V0_PROX_ALS ALS_TO_AP_INT_L CUMULUS_TO_PROX_RX_EN_1V8 45_AP_TO_CAM_FF_CLK PGND_IRLED_DRAIN AP_TO_I2C2_SCL AP_BI_CAM_FF_SDA RCVR_TO_CODEC_RCVR_TEST CODEC_TO_HAC_N HAC_TO_CODEC_TEST CODEC_TO_HAC_P CODEC_TO_RCVR_P CODEC_TO_RCVR_N 90_CAM1_TO_AP_MIPI_DATA0_P AP_TO_CAM_FF_SCL 45_PROX_TO_CUMULUS_RX 90_CAM1_TO_AP_MIPI_DATA0_N PP3V0_PROX MIC3_TO_CODEC_P MIC3_TO_CODEC_N PP_CODEC_TO_MIC3_BIAS_CONN FCAM_TO_AP_ALS_INT_CONN_L PGND_IRLED_K PP_CODEC_TO_MIC2_3_BIAS 90_CAM1_TO_AP_MIPI_CLK_N 90_CAM1_TO_AP_MIPI_CLK_P PP1V8 R31 2 FL57 1 2 L35 1 2 3 4 L39 1 2 3 4 C441 2 C402 1 2 C410 1 2 R451 2 C407 1 2 C671 2 C200 1 2 R851 2 Q1 3 1 2 C2531 2 FL48 1 2 DZ161 2 C1981 2 C1921 2 FL13 1 2 FL15 1 2 FL12 1 2 C2021 2 C1961 2 C621 2 C63 1 2 C2011 2 C2111 2 C2121 2 C2101 2 FL14 1 2 C194 1 2 R125 12 FL58 12 FL2 1 2 FL20 1 2 DZ171 2 C1991 2 C561 2 FL51 12 R91 2 FL52 12 DZ181 2 DZ191 2 FL65 1 2 FL64 1 2 R941 2 R951 2 C2561 2 XW42 1 2 C3801 2 R133 1 2 R132 1 2 FL44 12 FL45 12 FL4 1 2 FL23 1 2 J1 35 36 37 38 39 40 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 4 5 6 7 8 9 C1931 2 051-9584 2.0.0 11 OF 23 11 OF 46 12 21 12 3 18 3 7 1112 1112 3 18 7 3 7 9 9 9 9 9 9 7 7 18 7 9 22 9 8 10 7 7 2 3 4 5 6 7 10 12 14 18 19 20 21
  • 14.
    S G D G S D G S D GND VOUT ON VIN CPUA_EN VDD_BUCK2R BUCK2_LXM VDD_BUCK2LM VDD_BUCK4 BUCK0A_LXM VDD_BUCK0A BUCK0A_LXL BUCK0B_LXM VDD_BUCK0B VDD_BUCK0C CPUB_EN VBAT ACT_DIO BUCK0A_FB IBAT BUCK3_FB VCC_MAIN VDD_BUCK3 CHG_LX BUCK3_LX VCENTER CPUB_SW_OUT VCC_MAIN_S VBUCK3_SW VBUS TCAL CPUA_SW_OUT VPUMP TDEV4 TBAT VBUCK4_SW XTAL2 VDD_LDO5 XTAL1 TDEV2 VLDO1 VDD_LDO2 VDD_LDO9 VDD_LDO12 VDD_LDO11 VDD_LDO10 VLDO4 VLDO7 ON_BUF VLDO3 VLDO8 VIB_PWM_EN VLDO5 TDEV1 TDEV3 VDD_LDO1_6 VLDO6 VLDO2 VLDO9 VLDO12 VLDO11 VLDO10 VDD_LDO4_7 VDD_LDO16 VLDO16 VDD_VIB VIB VDD_LDO3_8 WDIG_SW CPU1V2_SW BUCK4_FB BUCK4_LXM BUCK4_LXL CPU1V8_SW BUCK0C_FB BUCK2_FB BUCK2_LXR BUCK2_LXL BUCK0C_LX BUCK0B_FB BUCK0B_LXL CPUB_SW_S CPUA_SW_S (1 OF 3) AppleInc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT NOTE: ROUTE TRACES BETWEEN LDO AND CAP TO ALLOW 0.050 OHM ESR TBD: VALUE MUST BE TUNED H5P NTC PLACE CLOSE TO PMU NOTE: PLACE C987 UNDERNEATH C270 SAMEPOLARITY THIS XW LINK AT PMU AREA RADIO PA NTC 100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU PLACE CLOSE TO PMU SAMEPOLARITY TO SOC 19-25 MILLIOHM PLACE CLOSE TO PMUPLACE CLOSE TO PMUPLACE CLOSE TO PMU SAMEPOLARITY CAMERA NTCFOREHEAD NTC CALIBRATION L11-L13 POLARITY ALL SAME 01005 18PF 16V CERM 2% 2012-1 32.768K-20PPM-12.5PF 18PF CERM 2% 16V 01005 0.01UF 201 10% X5R 10V 1UF 25V 10% 0402 X5R 20% 6.3V X5R-CERM1 402 4.7UF 15UF 4V 20% X5R 0402 0402 15UF 4V X5R 20% 20% 0.1UF 6.3V X5R-CERM 01005 0201-1 X5R-CERM 20% 10V 1.0UF 20% 6.3V CERM-X5R 0402-1 10UF OMIT_TABLE 20% 1.0UF 6.3V X5R 0201-1 10UF 6.3V 20% 0402-1 CERM-X5R OMIT_TABLE 6.3V 10UF 20% CERM-X5R 0402-1 OMIT_TABLE CERM-X5R 0402-1 6.3V 10UF 20% OMIT_TABLE 20% 6.3V 0402-1 OMIT_TABLE 10UF CERM-X5R 6.3V 20% CERM-X5R 0402-1 10UF OMIT_TABLE 0402-1 CERM-X5R 20% 6.3V 10UF OMIT_TABLE 0402-1 6.3V 20% 10UF CERM-X5R OMIT_TABLE 6.3V 0402-1 20% CERM-X5R 10UF OMIT_TABLE NO_XNET_CONNECTION=TRUE 0201 10KOHM-1%-0.31MA I382 10KOHM-1%-0.31MA NO_XNET_CONNECTION=TRUE 0201 I390 NO_XNET_CONNECTION=TRUE 0201 10KOHM-1%-0.31MA I394 MF 3.92K 0.1% 1/20W 0201 16V 5% NP0-C0G 01005 100PF 16V 01005 NP0-C0G 5% 100PF BGA CSD68803W15 15UF 4V X5R 20% 0402 0402 15UF 4V X5R 20% 0201-1 20% 10V X5R-CERM 1.0UF CSD58874W1015 BGA BGA CSD58874W1015 CERM-X5R 0402-1 10UF 6.3V 20% 0402 X5R 15UF 4V 20% X5R-CERM1 4.7UF 402 6.3V 20% SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM NO_XNET_CONNECTION=TRUE SHORT-10L-0.1MM-SM NO_XNET_CONNECTIO=TRUE SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM 01005 0.01UF 10% 6.3V X5R NOSTUFF 01005 0.01UF 10% 6.3V NOSTUFF X5R NOSTUFF 6.3V X5R 10% 0.01UF 01005 TFA201610G-SM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM 1.5UH-20%-2A-0.142OHM TFA201610G-SM TFA201610G-SM 1.5UH-20%-2A-0.142OHM TFA201610G-SM 1.5UH-20%-2A-0.142OHM 1.5UH-20%-2A-0.142OHM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM TFA201610G-SM 2.2UH-20%-1.7A-200MOHM 20% 15UF 0402 4V X5R 15UF 0402 4V 20% X5RX5R 15UF 0402 4V 20% 10UF 6.3V 20% CERM-X5R 0402-10402-1 10UF 20% 6.3V CERM-X5R 10UF 0402-1 CERM-X5R 6.3V 20% 0402-1 6.3V CERM-X5R 20% 10UF 0402-1 10UF 6.3V 20% CERM-X5R 0402-1 CERM-X5R 6.3V 20% 10UF MF 1/32W 01005 68.1K 1% NOSTUFF 201 10% X5R 6.3V 0.1UF 201 NOSTUFF 0.1UF X5R 10% 6.3V 0402 15UF 4V X5R 20% 15UF X5R 0402 4V 20% 0402 15UF 4V X5R 20% 0402 15UF 4V X5R 20% X5R 20% 15UF 4V 0402 15UF 0402 4V X5R 20% 0402-1 CERM-X5R 6.3V 20% 10UF OMIT_TABLE 20% 6.3V 0402-1 CERM-X5R 10UF OMIT_TABLE 20% X5R 4V 0402 15UF 15UF 0402 4V X5R 20% SM SOD523 PMEG3010EB/S500 100PF NO_XNET_CONNECTION=TRUE 5% 16V NP0-C0G 01005 NO_XNET_CONNECTION=TRUE NP0-C0G 5% 100PF 16V 01005 NO_XNET_CONNECTION=TRUE 5% 100PF 16V NP0-C0G 01005 CSP TPS22924X SHORT-10L-0.1MM-SM 5% 100PF NO_XNET_CONNECTION=TRUE 16V NP0-C0G 01005 NO_XNET_CONNECTION=TRUE 0201 10KOHM-1%-0.31MA I649 10UF 20% 6.3V 0402-1 CERM-X5R 0201 56PF 25V 5% NP0-C0G-CERM 10.2 MF 1/32W 1% 01005 15UF 0402 4V X5R 20% 20% X5R 4V 0402 15UF 20% X5R 4V 0402 15UF 20% X5R 4V 0402 15UF CERM 0402 6.3V 20% 10UF OMIT_TABLE 0402 6.3V CERM 20% 10UF OMIT_TABLE 6.3V CERM 20% 10UF 0402 OMIT_TABLE 0402 6.3V CERM 20% 10UF OMIT_TABLE 10UF 20% 6.3V CERM 0402 OMIT_TABLE 0402 20% 6.3V CERM 10UF OMIT_TABLE 10UF 6.3V 0402 20% CERM OMIT_TABLE 10UF 20% 6.3V CERM 0402 OMIT_TABLE 10UF 20% 6.3V CERM 0402 OMIT_TABLE 0402 10UF 20% CERM 6.3V OMIT_TABLE 6.3V 20% 10UF CERM 0402 OMIT_TABLE 01005 NP0-C0G 56PF 6.3V 5% 01005 NP0-C0G 16V 5% 100PF 5% 16V 01005 NP0-C0G 100PF56PF 01005 5% 6.3V NP0-C0G 20% 6.3V X5R 1.0UF 0201-1 D2013B28HGAHVCC2 BGA 6.3V 10UF 20% 0402-1 CERM-X5R AGATHA PMU(1/2) SYNC_DATE=N/ASYNC_MASTER=N/A VCENTER PP5V0_USB_PROT ACT_DIO BATTERY_TO_PMU_SENSE PP_BATT_VCC BUCK0A_LXL PP_VCC_MAIN USB_VBUS_DETECT PP1V7_VA_L20 PP2V5_CAM0_AF PP3V0_ACC BUCK4_FB PP3V0_ALWAYS PP3V0_VIBE PP1V2_SDRAM PP1V0 PP3V0_PROX_IRLED BATTERY_TO_PMU_NTC CPU0_SW_S BUCK0C_FB NTC_H5P_P CPU0_SWITCH BUCK2_LXM BUCK0A_LXM BUCK0B_LXM CPU1_SWITCH BUCK0A_FB BUCK3_FB VSW_CHG BUCK3_LX CPU1_SW_CONTROL TCAL CPU0_SW_CONTROL VPUMP NTC_H5P_P OSC32O OSC32I NTC_CAM_P PP1V8_SDRAM PP3V0_IMU PP1V8_ALWAYS PP3V3_USB PP3V0_PROX_ALS PP3V0_NAND NTC_FOREHEAD_P NTC_PA_P PP2V8_CAM_AVDD PP1V0_SRAM PP1V8_GRAPE PP1V2 BUCK4_LXM BUCK4_LXL PP1V8 BUCK2_FB BUCK2_LXR BUCK2_LXL BUCK0C_LX BUCK0B_FB BUCK0B_LXL CPU1_SW_S VCENTER PP1V1_CPU0_FET PGND_CAM0_AF_RET NTC_PA_P NTC_FOREHEAD_N NTC_CAM_N NTC_CAM_P PP1V8_SDRAM PP1V8 RESET_1V8_L NTC_PA_N PP1V1_CPU0 PP1V1_CPU1 NTC_H5P_N NTC_FOREHEAD_P PP1V1_CPU1_FET PP2V5_CAM0_AF_COMP PP1V1_CPUB PP1V1_SOC PP_VCC_MAIN PP1V8_SDRAM PP1V2_SDRAM PP_VCC_MAIN C260 1 2 C16 1 2 C251 1 2 Y2 1 2 C2631 2 C248 1 2 C2771 2 C2711 2 C2951 2 C2671 2 C2581 2 C2451 2 C2171 2 C1901 2 C2041 2 C2391 2 C2461 2 C2431 2 C2051 2 C1951 2 C2471 2 R57 1 2 R110 1 2R108 1 2 R541 2 C207 1 2 C2551 2 Q5 A2 B1 B2 C1 A1 A3 B3 C2 C3 C2761 2 C3021 2 C2611 2 Q3 A1 B1 C1 A2 B2 C2 Q4 A1 B1 C1 A2 B2 C2 C3191 2 C2881 2 C171 2 XW10 12 XW16 12 XW15 12 XW17 12 XW20 1 2 XW6 1 2 XW8 1 2 XW9 1 2 C289 1 2 C269 1 2 C2831 2 L26 1 2 L24 12 L25 12 L11 1 2 L12 12 L13 12 L18 12 L23 12 L14 12 L15 12 L16 12 L17 12 C2921 2 C2901 2 C2851 2 C3081 2 C3031 2 C3101 2 C2961 2 C3171 2 C3161 2 R55 1 2 C2721 2 C2701 2 C2781 2 C2811 2 C3051 2 C3121 2 C2821 2 C3181 2 C1891 2 C2031 2 C2731 2 C3011 2 XW14 1 2 D4 A K C159 1 2 C167 1 2 C168 1 2 U11 C1 C2 A2 B2 A1 B1 XW11 1 2 C322 1 2 R90 1 2 C291 1 2 C4441 2 R56 1 2 C3911 2 C3891 2 C3851 2 C3791 2 C741 2 C921 2 C2501 2 C2651 2 C2931 2 C2941 2 C2571 2 C2991 2 C2621 2 C2641 2 C3781 2 C6861 2 C687 1 2 C689 1 2 C6881 2 C9871 2 U7 C2 D21 A14 A12 C22 A18 A16 C21 A20 D2 A6 A4 A2 E22 H22 D1 A10 A8 H1 H2 M22 L22 B19 L19 N21 A22 J19 K19 E1 E2 P17 M4 L4 Q1 P2 Q2 M2 C1 K22 M21 L1 L2 F1 F2 K1 J1 J2 A13 A17 A21 A5 A1 G22 A9 P8 P7 P6 Q12 Q3 P4 Q19 Q10 N22 P5 Q17 Q18 P20 P3 Q9 Q8 Q7 Q13 Q5 P18 P9 P22 Q4 P10 P19 Q6 L21 K21 P1 N1 051-9584 2.0.0 12 OF 23 12 OF 46 12 17 22 8152223 1012131423 2 15 21 16 8 16 8 412 2 7 11 1722 5 12 2 2 12 12 34101213141623 20 3 2 11 6 12 12 11 21 5 18 2 4 2 3 4 5 6 7 10 11 12 14 18 19 20 21 5 5 12 21 1212 34101213141623 2 3 4 5 6 7 10 11 12 14 18 19 20 21 2131416192223 5 5 12 21 5 5 1012131423 3 4 10 12 13 14 16 23 4 12 1012131423
  • 15.
    NC (3 OF 3) VSS_BUCK0AB VSS VSS_BUCK2 VSS_BUCK3 VSS_BUCK24 VSS_BUCK40 VSSA_BUCK2 VSSA_BUCK3 VSSA_BUCK40 VSS_WLED VSS_LCM VSS_BUCK0BC VSS VSS_SW_CHG VSS_REF (2OF 3) VREF DPHP AMUX_A3 AMUX_A2 AMUX_A1 AMUX_A0 AMUX_B7 AMUX_BY GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 BUTTON1 BUTTON2 BUTTON3 GPIO10 GPIO11 GPIO12 LCM2_EN ACC_DET VDD_REF AMUX_B4 AMUX_B5 AMUX_B6 AMUX_B2 AMUX_B3 AMUX_B0 AMUX_B1 SHDN ADC_REF VDD_RTC SCL KEEPACT AMUX_AY AMUX_A7 AMUX_A6 SDA AMUX_A5 AMUX_A4 ADC_IN7 BRICK_ID DWI_DO DWI_DI DWI_CK FW_DPHP_DET VLCM3 VBOOST_LCM VLCM1 WLED1 IREF VLCM2 WLED2 LCM_LX WLED_LX ACC_ID VOUT_LED IRQ* RESET* RESET_IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT EMC REVIEW REQUESTS THIS GO TO 1K ACTIVE HIGH GPIO11 I2C ADDRESS: 1110100X ACCESS POINTS VCC_MAIN OUPUT ’0’ PP1V8_SDRAM OUPUT ’0’ INPUT, W/O PD PP1V8_SDRAM OUPUT ’0’ PP1V8_SDRAM OUPUT ’0’ INPUT, W/ PU IN BATTERY PCM INPUT, W/ PD IN PMU INPUT, W/ PD IN PMU OPEN DRAIN OUTPUT ACTIVE HIGH INPUT W/ INTERNAL 200K PD OPEN DRAIN OUTPUT INPUT, W/ PU TO PP1V8_SDRAM GPIO3 GPIO5 GPIO6 GPIO7 GPIO2 GPIO4 GPIO1 GPIO12 GPIO10 GPIO9 GPIO8 PP1V8_SDRAM OUPUT ’0’ PP1V8_SDRAM OUTPUT ’0’ RESET* IRQ* PP1V8_SDRAM OUTPUT ’0’ RESET_IN FROM H5P 1.8V ---> BASEBAND ---> 1.8V ---> 1.8V ---> BASEBAND ---> FROM TRISTAR AMUX VOLTAGE LIMIT IS APPROX. = VDD_REF = PP_VCC_MAIN 1.8V ---> 1.8V ---> 1.8V ---> 1.8V ---> 3.33V ---> DRIVEN TO VCC_MAIN ------------> 01005 1.00K 5% MF 1/32W 5% 010051/32W MF 10K 1/32W 10K 5% MF 01005 1/20W 1% MF 200K 201 6.3V X5R10% 201 0.1UF 0201-16.3V 20% 1.0UF X5R 0.1UF X5R10% 2016.3V 0.01UF 01005 X5R 6.3V 10% 01005 1/32W MF 5% 220K SM SM SM 74LVC1G32 SOT891 MF 1/32W 01005 100K 5% 5% 01005 1.00M MF 1/32W 0% 0.00 1/32W MF 01005 1%MF 1/32W 6.34K 01005 0.01UF 6.3V 01005 X5R 10% D2013B28HGAHVCC2 BGA D2013B28HGAHVCC2 BGA NP0-C0G 10V 5% 100PF 01005 0.00 NOSTUFF 0% 1/32W MF 01005 SYNC_MASTER=N/A SYNC_DATE=N/A AGATHA PMU(2/2) E75_TO_PMU_ACC_DETECT PMU_RESET_IN 45_AP_TO_PMU_DWI_DI PMU_DWI_CLK AP_BI_I2C0_SDA PMU_TO_BT_REG_ON PMU_TO_BB_RST_L TRISTAR_TO_PMU_USB_BRICKID WDOG PMU_TO_WLAN_REG_ON 45_AP_TO_PMU_DWI_CLK 45_AP_TO_PMU_DWI_DO RESET_1V8_L PMU_TO_AP_IRQ_L IREF PMU_DWI_DI BUTTON_TO_AP_VOL_DOWN_L TRISTAR_TO_PMU_USB_BRICKID_R AP_TO_I2C0_SCL RADIO_TO_PMU_ADC_SMPS1_MSMC_1V05 TRISTAR_TO_PMU_MIKEYBUS_TEST_NEG 45_PMU_TO_WLAN_CLK32K PMU_TO_BB_VBUS_DET WIFI_REG_ON_R BT_TO_PMU_HOST_WAKE BUTTON_TO_AP_MENU_KEY_BUFF_L BT_REG_ON_R CODEC_TO_PMU_MIKEY_INT_L WLAN_TO_PMU_HOST_WAKE AP_BI_BATTERY_SWI TRISTAR_TO_AP_INT BUTTON_TO_AP_MENU_KEY_BUFF_L BUTTON_TO_AP_RINGER_A PP_VCC_MAIN RADIO_TO_PMU_ADC_SMPS3_MSME_1V8 TRISTAR_TO_PMU_HOST_RESET PP1V8_SDRAM BUTTON_TO_AP_VOL_UP_L BB_RST_PMU_R_L LCD_PWR_EN VREF VDD_REF CHESTNUT_TO_PMU_ADCIN7 E75_TO_PMU_ACC_DETECT_R BUTTON_TO_AP_RINGER_A KEEPACT VDD_RTC TRISTAR_TO_PMU_USB_BRICKID_R BUTTON_TO_AP_HOLD_KEY_BUFF_L 45_PMU_TO_WLAN_CLK32K CHESTNUT_TO_PMU_ADCIN7 BUTTON_TO_AP_HOLD_KEY_BUFF_L AP_TO_PMU_TEST_CLKOUT PMU_AMUX_AY RADIO_TO_PMU_ADC_LVS1 PMU_AMUX_BY TRISTAR_TO_PMU_MIKEYBUS_TEST_POS RADIO_TO_PMU_ADC_LDO6_RUIM_1V8 BB_TO_PMU_HOST_WAKE PMU_AP_TO_LCM_RESET_L PMU_DWI_DO R60 1 2 R63 1 2 R64 1 2 R65 1 2 C323 1 2 C325 1 2 C326 1 2 C327 1 2 R681 2 XW261 2 XW271 2 XW281 2 U14 2 1 3 6 4 R591 2 R661 2 R487 1 2 R921 1 2 C3431 2 U7 D7 D8 D17 L17 L18 M5 M6 M7 M8 M9 M10 M11 M12 D18 M13 M14 M15 M16 E6 E7 E8 E9 E10 E11 E12 E13 D9 E14 E15 E16 E17 E18 F6 F7 F8 F9 F10 D10 F11 F12 F13 F14 F15 F16 F17 F18 G5 G6 D11 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 D12 G17 G18 H7 H8 H9 H10 H11 H12 H13 H14 D13 H15 H16 H17 H18 J7 J8 J9 J10 J11 J12 D14 J13 J14 J15 J16 J17 J18 K7 K8 K9 K10 D15 K11 K12 K13 K14 K15 K16 K17 K18 L5 L6 D16 L7 L8 L9 L10 L11 L12 L13 L14 L15 L16 A15 A19 A3 A7 J22 A11 P15 D22 G1 G2 P16 G4 E19 E21 U7 B21 Q20 K2 F21 K6 K5 K4 J6 J5 J4 H6 H5 H4 F4 F5 E4 E5 D4 D5 D6 B1 B2 M1 B12 B13 B14 B18 M19 M18 M17 N2 B3 B15 B16 B17 B4 B5 B6 B7 B8 B9 B10 B11 P21 H21 G21 B20 Q15 D19 J21 G19 H19 F19 P12 B22 F22 P13 Q11 P11 Q22 Q21 P14 Q14 Q16 C991 2 R4881 2 051-9584 2.0.0 13 OF 23 13 OF 46 5 16 17 3 314151620 23 23 16 2 23 314 314 21214161922 23 3 38 13 314151620 23 16 1323 23 23 3 13 10 23 322 316 313 3813 10 12 14 23 23 16 341012141623 38 1419 13 14 3 8 13 3 13 3 13 1323 1314 313 2 22 23 22 16 23 23 19
  • 16.
    SW SDA IN SCL VIO_SPI HWEN GND OVP ILED1 SCK ILED2 SDI NR IN EN GND OUT CP CN NRST VPOS VPOS VNEG PGND AGND SDA SCL SYNC EN AMUX VIN LXP VO3 VO2 VO1 VSUB Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT D404 DISPLAY PMU (INTERSIL CHESTNUT, 338S1168) (TI CHESTNUT, 338S1172) ACTIVE DISCHARGE 2MS TO RAIL DOWN 2 MS NOMIAL START UP DELAY FOR LCM POWER SEQUENCING NOTE: STACKED TO MEET VOLTAGE REQ, LOOK INTO 18+V CAPS CHESTNUT, BACKLIGHT DRIVER 0 MS DELAY AT SHUTDOWN SAGE NEG BOOST TIMING INFO: I2C0: 1100011X D404 BACKLIGHT DRIVER OPTION TO ZERO OUT U10 AND POWER IT DOWN I2C0: 0100111X TO DO: ADD 1NF CAP HERE ON ADCIN7 TO POTENTIALLY IMPLEMENT LCD PANIC FUNCTION REFER TO RADAR 12410499. THIS IS PART OF BUILD MATRIX X5R-CERM 0603 22UF 10V 20% 22UH-20%-0.38A-0.876OHM VLF302510T-SM X5R-CERM 20% 10UF 10V 0402-1 OMIT_TABLE TFA201610G-SM 2.2UH-20%-1.7A-200MOHM BGA LM3534TMX-A1 01005 10% X5R 6.3V 0.01UF NOSTUFF WCSP TPS799L57 NOSTUFF 6.3V X5R 20% 0402 4.7UF NOSTUFF 0402 X5R 6.3V 20% 4.7UF NOSTUFF 0.00 0% 01005 1/32W MF 0402-1 X5R-CERM 25V 20% 2.2UF 0402-1 2.2UF 20% 25V X5R-CERM 0402-1 2.2UF 20% 25V X5R-CERM 56PF 01005 5% 16V NP0-C0G 56PF 01005 5% 16V NP0-C0G NP0-C0G 16V 01005 56PF 5% OMIT_TABLE ISL97751IIA0PZ WLCSP 20% X5R 6.3V 0201 1UF 1/32W 01005 0% NOSTUFF 0.00 MF 0% MF 01005 1/32W 0.00 SOD-923-HF NSR0620P2XXG 56PF 01005 5% 16V NP0-C0G 01005 NP0-C0G 5% 16V 56PF OMIT_TABLE 0402-1 6.3V 20% 10UF CERM-X5RCERM-X5R 6.3V OMIT_TABLE 10UF 20% 0402-1 10UF 10V 20% 0402-1 X5R-CERM 402 X5R-CERM1 6.3V 20% 4.7UF 10UF X5R-CERM 0402-1 20% 10V OMIT_TABLE 10UF 20% 10V 0402-1 X5R-CERM CHESTNUT + BACKLIGHT DRIVER SYNC_DATE=N/ASYNC_MASTER=N/A PP_VCC_MAIN CHESTNUT_NRESET PP5V1_GRAPE_VDDH PP5V7_SAGE_AVDDH PP5V7_TO_LCD_AVDDH_CHESTNUT PP_CHESTNUT_CP PP_CHESTNUT_CN PP6V0_LCM_BOOST PN5V7_SAGE_AVDDN AP_BI_I2C0_SDA LCD_PWR_EN PP5V7_TO_LCD_AVDDH PP5V7_TO_LCD_AVDDH U10_BYPASS 45_AP_TO_PMU_DWI_DO 45_AP_TO_PMU_DWI_CLK LCD_PWR_EN PP_WLED_LX AP_BI_I2C0_SDA LCM_DESENSE PP6V0_LCM_BOOST PP_LCM_BL_ANODE AP_TO_I2C0_SCL PP1V8 PP_VCC_MAIN PP_LCM_BL_CAT1 PP_LCM_BL_CAT2 PP1V8_SDRAM PP5V7_TO_LCD_AVDDH_CHESTNUT RESET_1V8_L PP_CHESTNUT_LXP LCM_TO_AP_HIFA_BSYNC_BUFF AP_TO_I2C0_SCL CHESTNUT_TO_PMU_ADCIN7 PP1V8 D1 KA C2131 2 C2141 2 C2971 2 C252 1 2 C691 2 C47 1 2 C521 2 C541 2 C3291 2 L3 1 2 C3301 2 L19 1 2 U23 B3 B1 D3 D2 C3 D1 B2 A2 A1 C2 A3 C1 C122 1 2 U10 A1 B2 C3 A3 C1 C1211 2 C5921 2 R512 1 2 C271 2 C971 2 C981 2 C5621 2 C6621 2 C7621 2 U3 C1 E1 E4 C4 C3 B2 C2 B1 D4 D3 D2 A2 D1 E3 A4 A3 A1 B3 B4 E2 C4411 2 R49 1 2 R61 1 2 051-9584 2.0.0 14 OF 23 14 OF 46 1012131423 18 18 14 14 1819 31314151620 131419 14 19 14 19 3 13 3 13 131419 31314151620 14 19 31314151620 234567101112141819 2021 1012131423 19 19 341012131623 14 2121316192223 18 31314151620 13 234567101112141819 2021
  • 17.
    SDOUT SDIN LRCK/FSYNC SCLK MCLK ALIVE RESET* INT* GNDP LDO_FILT VSENSE- VSENSE+ ISENSE- ISENSE+ OUT- OUT+ IREF+ GNDA SW VP ADO VA SDA VP SCL FILT+ VBST_A VBST_A VBST_A VBST_B VER1 SCL SDA TX TORCH STROBE ENABLE IN TEMP SW0 SW1 OUT0 OUT1 LED0 LED1 GND0 GND1 Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT V = 1.0V C= 1UF MIN PCB: PLACE AT C335.1 LED DRIVER V= VA PIN I2C ADDRESS: 1100011X (LEFT CONFIG) C= 2.2UF MIN PCB: PLACE C332, C333 AT L4.1 I2C ADDRESS: 1000000X PCB: PLACE C335,337 AT VP INPUT SPEAKER AMP, LED DRIVER SPEAKER AMP (REPLACED WITH L20) TO DO: CHANGE NETNAMES WITH ’L19’ TO ’L20’ WHEN WE UPDATE TO NEW SILICON ~700MA RMS @ 4.1W INTO 8OHM 10% 6.3V 0.1UF X5R 201 X5R-CERM 0.1UF 0201 16V 10% TFA252010-SM 1.0UH-20%-3.2A-0.065OHM WLCSP CS35L20 0201-1 1.0UF 20% X5R 6.3V 01005 10K 1/32W MF1% 1/32W 1% MF 10K 01005 220PF 01005 10% 10V X7R-CERM X5R-CERM 20% 6.3V 01005 0.1UF 01005 10V X5R 1000PF 10% 01005 10V X5R 1000PF 10% 10% 1000PF X5R 10V 01005 1000PF 10% X5R 10V 01005 MF 1/32W 5% 510K 01005 44.2K 1% 1/32W MF 01005 5% 01005 NP0-C0G 16V 100PF 01005 100PF 16V NP0-C0G 5% 10UF 6.3V CERM-X5R 0402-2 20%20% 6.3V CERM-X5R 0402-2 10UF 0.47UH-20%-3.2A-0.046OHM TFA201610G-SM OMIT_TABLE 6.3V 10UF CERM 0402 20% OMIT_TABLE 20% 6.3V CERM 0402 10UF BGA LM3563A3TMX 01005 1/32W MF 5% 220K 0402 120OHM-25%-1.8A-0.06DCR 120OHM-25%-1.8A-0.06DCR 0402 NOSTUFF 10% 1000PF X5R 10V 01005 NOSTUFF 1000PF 10% X5R 10V 01005 6.3V 20% 402 X5R-CERM1 4.7UF X5R-CERM 22UF 20% 0603 10V OMIT_TABLE 0402-1 10UF 6.3V 20% CERM-X5R X5R 6.3V 20% 0201-1 1.0UF OMIT_TABLE 10UF 0402-1 20% 6.3V CERM-X5R OMIT_TABLE 20% 6.3V 10UF 0402-1 CERM-X5R 20% 6.3V 0201-1 X5R 1.0UF SYNC_DATE=N/ASYNC_MASTER=N/A SPKR AMP + LED DRIVER SPKAMP_TO_SPEAKER_OUT_N PP_SPKAMP_FILT PP_SPKAMP_LDO_FILT SPKAMP_TO_SPEAKER_OUT_P SPEAKER_TO_SPKAMP_ISENSE_P SPKAMP_IREF AP_TO_LEDDRV_EN AP_BI_CAM_RF_SDA CAM_RF_TO_STROBE_NTC SPEAKER_TO_SPKAMP_VSENSE_N LED_DRV_LX BB_TO_LEDDRV_GSM_BLANK CAM0_TO_LEDDRV_STROBE_EN CAM0_TORCH LED_BOOST_OUT PP_STRB_DRIVER_TO_LED PP_BATT_VCC AP_TO_CAM_RF_SCL AP_TO_I2C0_SCL AP_BI_I2C0_SDA SPKAMP_TO_AP_INT_L AP_TO_SPKAMP_RESET_L AP_TO_SPKAMP_BEE_GEES 45_AP_TO_SPKAMP_I2S2_MCLK 45_AP_TO_CODEC_XSP_I2S2_BCLK AP_TO_CODEC_XSP_I2S2_LRCLK AP_TO_CODEC_XSP_I2S2_DOUT CODEC_TO_AP_XSP_I2S2_DIN PP1V7_VA_L20 PP_BATT_VCC PP_L20_VBOOST PP_SPKAMP_SW SPKAMP_TO_SPEAKER_OUT_CONN_P SPKAMP_TO_SPEAKER_OUT_CONN_N SPEAKER_TO_SPKAMP_VSENSE_P L20_SPKAMP_VSENSE_P L20_SPKAMP_VSENSE_N SPEAKER_TO_SPKAMP_ISENSE_N C3401 2 C3411 2 C291 2 C3391 2 C3421 2 C3481 2 C3351 2 C333 1 2 C332 1 2 L4 1 2 U22 C7 D7 F2 B5 B6 C6 E4 F3 F4 A3 B3 B4 C3 C4 D3 D4 A7 B7 F1 E1 C5 F6 E7 C2 D2 A6 D6 E6 D5 F7 E5 A2 B2 F5 B1 C1 D1 A1 A4 A5 E3 E2 C3371 2 R126 1 2 R127 1 2 C3671 2 C3091 2 C5011 2 C500 1 2 C363 1 2 C360 1 2 R1291 2 R351 2 C4881 2 C73 1 2 C3961 2 C3941 2 L5 1 2 C387 1 2 C386 1 2 U17 D4 A4 B4 C4 A1 B1 A2 B2 D3 D2 C3 A3 B3 C1 C2 D1 R4631 2 FL6 1 2 FL9 1 2 C5461 2 C545 1 2 051-9584 2.0.0 15 OF 23 15 OF 46 3 721 8 17 23 21 7 8 812152223 721 313141620 313141620 3 3 3 3 310 310 310 310 12 812152223 17 22 17 22 17
  • 18.
    PP BYPASS SCL INT SDA SWITCH_EN HOST_RESET OVP_SW_EN* CON_DET_L DN2 DP2 DN1 DP1 ACC2 ACC1 P_IN VDD_1V8 VDD_3V0 ACC_PWR JTAG_DIO UART2_RX JTAG_CLK UART1_RX UART2_TX UART0_RX UART1_TX USB0_DN UART0_TX BRICK_ID USB0_DP USB1_DN USB1_DP DIG_DN DVSS DVSS DVSS DIG_DP Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT ACCESSORY UART DEBUG UART TO DO: ADD PPS TO SOC-SIDE USB HOST_RESET ACTIVE HIGH PLACEHOLDERS FOR INDUCTORS ACC_PWR 12C ADDRESS: 0011010X TRISTAR BRICK_ID BB DEBUG USB SOC USB PIN FOR HANDSHAKE AMBER HAS 200K INT PD X5R 10% 0402 25V 1UF 5% MF 1/32W 01005 100K NO_XNET_CONNECTION=TRUE 0201-1 X5R 6.3V 1.0UF 20% X5R 4V 20% 0.1UF 01005 SM P4MM WCSP CBTL1608A1 OMIT_TABLE NO_XNET_CONNECTION=TRUE 100K 5% 1/32W MF 01005 100PF 5% NP0-C0G 10V 01005 MF 01005 5% NO_XNET_CONNECTION=TRUE 100K 1/32W 201 MF 1/20W 0 5% 1/20W 201 5% MF 0 X5R 10% 0.01UF 6.3V 01005 0201-1 6.3V X5R 20% 1.0UF TRISTAR SYNC_DATE=N/ASYNC_MASTER=N/A PP3V0_ALWAYS TRISTAR_BYPASS PP_E75_TO_TRISTAR_ACC2 PP_E75_TO_TRISTAR_ACC1 90_TRISTAR_BI_E75_PAIR1_P 90_CODEC_BI_TRISTAR_MIKEYBUS_N TRISTAR_TO_PMU_MIKEYBUS_TEST_NEG 90_TRISTAR_BI_E75_PAIR1_N PP3V0_ACC 90_CODEC_BI_TRISTAR_MIKEYBUS_P TRISTAR_TO_PMU_MIKEYBUS_TEST_POS 90_TRISTAR_BI_BB_USB_P 90_TRISTAR_BI_BB_USB_N AP_TO_TRISTAR_ACC_UART2_TXD TRISTAR_TO_AP_ACC_UART2_RXD TRISTAR_TO_AP_DEBUG_UART6_RXD 90_AP_BI_TRISTAR_USB0_N 90_AP_BI_TRISTAR_USB0_P TRISTAR_TO_PMU_USB_BRICKID 90_CODEC_BI_TRISTAR_MIKEYBUS_DIG_P 90_TRISTAR_BI_E75_PAIR2_N 90_TRISTAR_BI_E75_PAIR2_P PP5V0_USB_RPROT PP1V8_SDRAM 90_CODEC_BI_TRISTAR_MIKEYBUS_DIG_N AP_TO_TRISTAR_DEBUG_UART6_TXD TRISTAR_TO_PMU_OVP_SW_EN_L RESET_1V8_L TRISTAR_TO_AP_INT AP_BI_I2C0_SDA TRISTAR_TO_PMU_HOST_RESET TRISTAR_BI_AP_JTAG_SWDIO AP_TO_BB_UART1_TXD BB_TO_AP_UART1_RXD E75_TO_PMU_ACC_DETECT AP_TO_I2C0_SCL TRISTAR_TO_AP_JTAG_SWCLK C304 1 2 C391 2 C3381 2 R831 2 C381 2 R841 2 R43 1 2 R44 1 2 C2541 2 PP221 U2 C5 E5 D5 C2 E6 E3 C4 C3 B2 B4 A2 A4 A6 C1 F5 B6 C6 A5 B5 D6 F6 D4 D3 E4 E1 E2 F1 F2 D1 D2 B3 A3 B1 A1 F3 F4 R84011 2 C110 1 2 051-9584 2.0.0 16 OF 23 16 OF 46 812 17 17 17 22 9 13 17 22 12 9 13 23 23 3 3 3 2 2 13 17 22 17 22 17 341012131423 3 17 2 12 13 14 19 22 23 3 13 3 13 14 15 20 13 2 323 323 13 17 3 13 14 15 20 2
  • 19.
    SYM_VER-2 SYM_VER-2 D2 (1 OF 2) G2 SSD1 G1 (2OF 2) Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT TO DO: REMOVE L20, L22 TO OPEN USB EYE? (SEE EUGENE) PRIMARY MIC MIC1 MIC1 (VOICE MIC), ACC DET/ID/PWR, E75 DIFFPAIRS) (USB VBUS, MENU BTN, SPEAKER, HP, HP EXTMIC, NAVAJO, ANTENNA PAC/LAT SW CTRL, HS3/HS4 CTRL, LAT SW CTRL DOCKFLEX B2B HPHONE: ANTENNA: ACCESSORY: SPEAKER: PAC VDD (2.65V) HS3/HS4 MENU BUTTON E75 DIFFPAIRS EXTMIC HS3/HS4 REF ANTENNA: HPHONE AUDIO DETECT, 50NA @ 2.5V BATTERY NTC SPEAKER LEADS VSENSE, ID, PWR TO TRISTAR FROM TRISTAR VBUS HPHONE: PCB: PLACE NEAR J7 516S1032 PLUG PCB: PUT XW AT J7.17 HPDET PER STAN, REPLACING L7 AND L6 WITH 01005 PARTS NOTE: RSVD ANTENNA PCB: PLACE THESE XW 516S1031 RCPT (USED ON FLEX) THIS ONE ON MLB ---> LINKS AT DOCK CONNECTOR (DESENSE CAPS) TCM0605-1 90-OHM-50MA NOSTUFF TCM0605-1 90-OHM-50MANOSTUFF 16V 27PF 01005 NP0-C0G 5% 01005-1 10-OHM-750MA 10-OHM-750MA 01005-1 NOSTUFF 01005-1 12V-33PF NO_XBET_CONNECTION=TRUE 0.00 MF 0% 01005 1/32W NO_XBET_CONNECTION=TRUE 0.00 01005 1/32W MF 0% 120-OHM-210MA 01005 01005 120-OHM-210MA 1/32W 1% 01005 MF 100K 1/32W 1% 100K 01005 MF SM SM 01005 120-OHM-210MA 01005 16V 5% 100PF NP0-C0G 5% 16V 100PF NP0-C0G 01005 120-OHM-210MA 01005 120-OHM-210MA 01005 01005 120-OHM-210MA 120-OHM-210MA 01005 MF 3.3K 5% 1/32W 01005 01005 5% 56PF 6.3V NP0-C0G 01005 NP0-C0G 5% 6.3V 56PF 01005 120-OHM-210MA NO_XNET_CONNECTION=TRUE 0201-1 20% 6.3V X5R 1.0UF X7R-CERM 220PF 10V 10% 01005 NOSTUFF 01005 6.8V-100PF 01005 6.8V-100PF 6.8V-100PF 01005 6.8V-100PF 01005 01005 6.8V-100PF 01005 6.8V-100PF SHORT-10L-0.1MM-SM 01005 150OHM-25%-200MA-0.7DCR 01005 150OHM-25%-200MA-0.7DCR 01005 1/32W MF5% 1.00K 120-OHM-210MA 01005 56PF 01005 5% NP0-C0G 16V M-ST-SM 105847038102829 01005 6.3V 5% 56PF NP0-C0G 16V 5% NP0-C0G 100PF 01005 5% 16V NP0-C0G 01005 100PFX5R-CERM 0201 25V 10% 0.01UF CSP CSD75202W15 MF 5% 201 1/20W 5.1K 1.0UF 20% 10V X5R-CERM 0201-1 100K 1/20W MF 201 1% CSD75202W15 CSP 15.00K 01005 1% MF 1/32W 10% 25V X5R-CERM 0.01UF 0201 MF 02011% 0.00 1/20W 1% 0201 0.00 1/20W MF 0.00 MF 1% 1/20W 0201 MF 0201 1/20W 1% 0.00 01005 5% 6.3V NP0-C0G 56PF NP0-C0G 5% 56PF 6.3V 01005 01005 150OHM-25%-200MA-0.7DCR 01005 NP0-C0G 5% 6.3V 56PF 5% 6.3V 56PF NP0-C0G 01005 01005 56PF 5% 16V NP0-C0GNP0-C0G 56PF 16V 01005 5% 5% 16V NP0-C0G 01005 100PF NOSTUFF NP0-C0G 6.3V 5% 56PF 01005 01005 16V 5% NP0-C0G 100PF NOSTUFF 56PF 01005 5% 6.3V NP0-C0G SYNC_DATE=N/ASYNC_MASTER=N/A DOCKFLEX B2B SPEAKER_TO_SPKAMP_VSENSE_P SPEAKER_TO_SPKAMP_VSENSE_N AP_TO_HEADSET_HS4_CTRL_CONN CODEC_TO_HPHONE_L CODEC_TO_HPHONE_R HPHONE_TO_CODEC_HPHONE_TEST PP_E75_TO_TRISTAR_ACC2_CONN PP_LDO14_2P65 AP_TO_HEADSET_HS3_CTRL PP5V0_USB_CONN CODEC_TO_HPHONE_HS3_REF_CONN EXTMIC_TO_CODEC_P 90_TRISTAR_BI_E75_PAIR1_N 90_TRISTAR_BI_E75_PAIR2_N 90_TRISTAR_BI_E75_PAIR2_P CODEC_TO_HPHONE_HS4_REFCODEC_TO_HPHONE_HS4_REF_CONN AP_TO_HEADSET_HS4_CTRL BATTERY_TO_PMU_NTC PP_E75_TO_TRISTAR_ACC1 HPHONE_TO_CODEC_DET PP_E75_TO_TRISTAR_ACC2 E75_TO_PMU_ACC_DETECT PP5V0_USB_RPROT OVP_GATE PP5V0_USB_PROT USB_CONN_SNUBREVERSE_GATE CODEC_TO_HPHONE_HS3_REF 90_TRISTAR_BI_E75_PAIR1_P PP_E75_TO_TRISTAR_ACC1_CONN CODEC_TO_HPHONE_HS3_CONN CODEC_TO_HPHONE_HS3 CODEC_TO_HPHONE_HS4 PP5V0_USB_CONN PP_CODEC_TO_MIC1_BIAS AP_TO_HEADSET_HS4_CTRL_CONN CODEC_TO_HPHONE_HS4_REF_CONN CODEC_TO_HPHONE_HS3_CONN BB_TO_LAT_SW1_CTL TRISTAR_TO_PMU_OVP_SW_EN_L CODEC_TO_HPHONE_HS3_REF_CONN EXTMIC_TO_CODEC_N BUTTON_TO_AP_MENU_KEY_L CODEC_TO_HPHONE_L_CONN BUTTON_TO_AP_MENU_KEY_CONN_L CODEC_TO_HPHONE_HS4_CONN PP_CODEC_TO_MIC1_BIAS_CONN HPHONE_TO_CODEC_DET_CONN AP_TO_HEADSET_HS3_CTRL_CONN MIC1_TO_CODEC_N PP_LDO14_2P65_CONN MIC1_TO_CODEC_P SPKAMP_TO_SPEAKER_OUT_CONN_P SPKAMP_TO_SPEAKER_OUT_CONN_N E75_TO_PMU_ACC_DETECT_CONN 90_TRISTAR_BI_E75_PAIR2_CONN_P 90_TRISTAR_BI_E75_PAIR2_CONN_N 90_TRISTAR_BI_E75_PAIR1_CONN_N 90_TRISTAR_BI_E75_PAIR1_CONN_P BATTERY_NTC_CONN CODEC_TO_HPHONE_R_CONN BB_TO_LAT_SW2_CTL L20 1 2 3 4 L22 1 2 3 4 C240 1 2 FL60 12 FL53 12 DZ15 1 2 FL5 12 C1761 2 C71 1 2 C70 1 2 R501 2 R151 2 L7 12 L6 12 R101 2 R231 2 XW22 12 XW21 12 C81 2 C5 1 2 FL1 1 2 FL10 1 2 FL16 1 2 FL17 1 2 R107 1 2 C3551 2 C3591 2 FL49 12 C215 1 2 C4 1 2 DZ6 1 2 DZ5 1 2 DZ9 1 2 DZ101 2 DZ11 1 2 DZ121 2 XW45 1 2 FL68 1 2 FL69 1 2 R1301 2 FL2302 1 2 C23071 2 J7 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 35 36 37 38 39 4 40 41 42 5 6 7 8 9 C12 1 2 C13 1 2 C3681 2 Q2 B2 C2 C3 C1 B1 R741 2 C1531 2 R73 12 Q2 A2 A3 B3 A1 B1 R58 12 C1191 2 R617 1 2 R618 1 2 R619 1 2 R620 1 2 C2061 2 C1881 2 FL495 1 2 C8551 2 C2421 2 C8781 2 C879 1 2 C913 1 2 C9141 2 051-9584 2.0.0 17 OF 23 17 OF 46 15 15 17 9 9 9 22 23 3 1722 17 22 9 16 22 16 22 16 22 9 17 22 3 12 22 16 9 16 13 16 16 12 9 16 22 22 17 9 9 17 22 10 17 17 22 17 23 16 17 22 9 3 9 922 1522 1522 22 23
  • 20.
    VSTM_9 VSTM_8 VSTM_7 VSTM_6 VSTM_5 VSTM_4 VSTM_3 VSTM_2 VSTM_16 VSTM_15 VSTM_13 VSTM_12 VSTM_11 VSTM_10 VSTM_1 VSTM_0 VDDIO VDDH VDDCORE VDDANA RSTOVR* IN9_0 IN8_0 IN7_0 IN6_0 IN5_0 IN4_0 IN3_0 IN2_0 IN14_1 IN14_0 IN13_0 IN12_0 IN11_0 IN10_0 IN1_0 H_SDO H_SDI H_SCLK H_INT* GPIO_4 GPIO_3 GPIO_2/SD GPIO_1/CK GND VSTM_18 VSTM_19 TM_OVR VSTM_17 IN0_0 H_CS* VSTM_14 VDDLDO JTAG_TMS JTAG_TDO JTAG_TDI JTAG_TCK CLKIN/RESET* BCFG_RTCK TM_ACS* AGND6 AVDDL1 VBST_OUTL VBST_OUTH VCPL_REF/EN VCPH_REF/EN L_X L_Y VBIAS DRV_IN19 DRV_IN17 DRV_IN18 DRV_IN16 DRV_IN10 DRV_IN11 DRV_IN12 DRV_IN15 DRV_IN14 DRV_IN5 DRV_IN6 DRV_IN7 DRV_IN8 DRV_IN9 DRV_IN0 DRV_IN1 DRV_IN2 DRV_IN4 DRV_IN3 SNS_IN10 SNS_IN11 SNS_IN12 SNS_IN13 SNS_IN14 SNS_IN6 SNS_IN8 SNS_IN1 AGND1 AGND2 AGND3 AGND5 AGND4 GO DRV_OUT17 DRV_OUT19 DRV_OUT18 DRV_OUT15 DRV_OUT16 DRV_OUT13 DRV_OUT12 DRV_OUT11 DRV_OUT10 DRV_OUT8 DRV_OUT9 DRV_OUT7 DRV_OUT6 DRV_OUT5 DRV_OUT4 DRV_OUT2 DRV_OUT0 DRV_OUT1 SNS_OUT14 SNS_OUT13 SNS_OUT10 SNS_OUT11 SNS_OUT9 SNS_OUT8 SNS_OUT7 SNS_OUT6 SNS_OUT5 SNS_OUT3 SNS_OUT4 SNS_OUT2 SNS_OUT1 SNS_OUT0 SNS_OUT12 VCPH VCPL VCPL_F VDDIO DRV_IN13 SNS_IN9 SNS_IN7 I2C_SCL GCM_TEST I2C_SDA SNS_IN5 SNS_IN4 SNS_IN3 SNS_IN2 SNS_IN0 AVDDH4 AVDDH3 AVDDH2 DRV_OUT3 AVDDH1 VCM_IN BOOST_EN DRV_OUT14 BSYNC PP PP PP G S D PP PP VCC 1A 2A2Y GND 1Y PP Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CUMULUS C0 TOUCH B2B VGL_REF R16 R14 R13 R12 516S1060 RCPT (ON FLEX) 516S1061 PLUG VGL R10 R1 R5 R4 R3 R2 R0_LEFT NEGATIVE RAIL D404 (B2B,DRIVER ICS) C7 (ALSO A RESET IF CLOCK STOPS) THESE ARE ROUTED TOGETHER GS0 C1 C4 R18 C3 GS1 R6 R8 SPECIAL - CANNOT SWAP SPECIAL - CANNOT SWAP 5.45-5.98V GS4 GS3 VCOM GS2 R17 C8 C9 R11 R19 C2 C5 R9 R7 VGH ON MLB ---> 343S0574 13.5V VGH_REF C0 C6 R15 R0_RIGHT NOTE: LCM_TO_AP_HIFA_BSYNC_BUFF CUMULUS_IN IS SENSITIVE (TURN OFF SAME TIME AS PP1V8_GRAPE) (TURN ON LATER THAN PP1V8_GRAPE) TO CLAMP THE KEEP THESE NETS FROM XTALK CUMULUS_IN IS SENSITIVE SAGE_PANEL_IN IS SENSITIVE KEEP THESE NETS FROM XTALK 3.5V -12V SAGE2 C0343S0628: B0 APN FOR PROTO1 343S0645: C0 APN FOR EVT1 WLBGA CUMULUS-C0 01005 20% 0.1UF 4V X5R 10% 201 X5R 6.3V 0.1UF SM-201 DSF01S30SC NOSTUFF 0201 10% 25V X7R-CERM 1000PF X7R-CERM 25V 10% 1000PF 0201 X7R-CERM 25V 10% 1000PF 0201 X7R-CERM 25V 10% 1000PF 0201 0402 0.33UF 20% TANT 20V X5R-CERM 16V 10% 0201 0.1UF MF 1/32W 5% 1.00M 01005 504459-4210 M-ST-SM 0.1UF 0201 X5R-CERM 16V 10% PSB12101T-SM 10UH-0.32A-1.56OHM SM NO_XNET_CONNECTION=TRUE SM NO_XNET_CONNECTION=TRUE SM NO_XNET_CONNECTION=TRUE SM NO_XNET_CONNECTION=TRUE SM NO_XNET_CONNECTION=TRUE SM 10UF 10V X5R-CERM 0402-1 20% CSP SAGE2-C06 GDZT2R6.2B GDZ-0201 01005 0.01UF 10% 6.3V X5R 6.3V 0.01UF X5R 01005 10% X5R 201 6.3V 10% 0.1UF 5% 220K MF 01005 1/32W SM P4MM P4MM SM 100K 1/32W MF 01005 5% 100K 1/32W 5% 01005 MF P4MM SM 20% 4.7UF 6.3V X5R-CERM1 402 X5R-CERM1 402 20% 6.3V 4.7UF 100K 1/32W 01005 MF 5% 20% TANT 25V 1UF 0603-LLP NP0-C0G 27PF 5% 01005 16V 10% X5R-CERM 16V 0201 0.1UF 1.0UF 6.3V X5R 20% 0201-1 SM 0.1UF 16V 10% 0201 X5R-CERM SM SM RV1C002UN 10% 6.3V X5R-CERM 1000PF 01005 0.1UF X5R-CERM 10% 0201 16V X6S-CERM 0402 1UF 16V 10% X6S-CERM 1UF 16V 10% 0402 16V 1UF 10% 0402 X6S-CERM 10.2 1%MF 1/32W01005 01005 MF1% 1/32W 22.1K P4MM SM P4MM SM SOT1115 74AUP2G3404GN 0402-1 10UF 20% X5R-CERM 10V OMIT_TABLE 10UF 20% 10V 0402-1 X5R-CERM SM P4MM D404 (TOUCH B2B, DRIVER ICS) SYNC_MASTER=N/A SYNC_DATE=N/A TOUCH_TO_SAGE_SENSE_IN<12> SAGE_TO_TOUCH_VSTM_OUT<12> SAGE_TO_TOUCH_VSTM_OUT<11> SAGE_TO_TOUCH_VSTM_OUT<0> SAGE_TO_TOUCH_VSTM_OUT<14> SAGE_TO_TOUCH_VSTM_OUT<15> TOUCH_TO_SAGE_SENSE_IN<10> TOUCH_TO_SAGE_SENSE_IN<1> TOUCH_TO_SAGE_SENSE_IN<2> TOUCH_TO_SAGE_SENSE_IN<3> TOUCH_TO_SAGE_SENSE_IN<0> TOUCH_TO_SAGE_SENSE_IN<4> TOUCH_TO_SAGE_SENSE_IN<5> CUMULUS_TO_SAGE_VSTM_OUT<16> 45_PROX_TO_CUMULUS_RX_IN SAGE_TO_CUMULUS_IN<12> TOUCH_TO_AP_INT_L TOUCH_TO_AP_SPI1_MISO_R AP_TO_TOUCH_SPI1_CLK PP_CUMULUS_VDDCORE SAGE_TO_CUMULUS_IN<1> SAGE_TO_CUMULUS_IN<2> SAGE_TO_CUMULUS_IN<6> SAGE_TO_CUMULUS_IN<4> SAGE_TO_CUMULUS_IN<3> SAGE_TO_CUMULUS_IN<5> PP1V8_CUMULUS_VDDLDO SAGE_TO_CUMULUS_IN<0> SAGE_TO_CUMULUS_IN<14> SAGE_TO_CUMULUS_IN<10> SAGE_TO_CUMULUS_IN<7> SAGE_TO_CUMULUS_IN<8> TOUCH_TO_SAGE_SENSE_IN<7> 45_AP_TO_TOUCH_CLK32K_RESET_L CUMULUS_TO_SAGE_VSTM_OUT<2> 45_PROX_TO_CUMULUS_RX SAGE_DUMP_GATE TOUCH_TO_SAGE_SENSE_IN<8> TOUCH_TO_SAGE_SENSE_IN<14> SAGE_TO_TOUCH_VSTM_OUT<17> TOUCH_TO_SAGE_SENSE_IN<13> SAGE_TO_TOUCH_VSTM_OUT<18> SAGE_TO_TOUCH_VSTM_OUT<13> SAGE_TO_TOUCH_VSTM_OUT<16> TOUCH_TO_SAGE_SENSE_IN<6> SAGE_TO_TOUCH_VSTM_OUT<0> SAGE_TO_TOUCH_VSTM_OUT<2> SAGE_TO_TOUCH_VSTM_OUT<3> SAGE_TO_TOUCH_VSTM_OUT<4> SAGE_TO_TOUCH_VSTM_OUT<9> SAGE_TO_TOUCH_VSTM_OUT<8> SAGE_TO_TOUCH_VSTM_OUT<6> SAGE_TO_TOUCH_VSTM_OUT<5> SAGE_TO_TOUCH_VSTM_OUT<1> SAGE_TO_TOUCH_VSTM_OUT<7> SAGE_TO_TOUCH_VSTM_OUT<10> PP_SAGE_TO_TOUCH_VCPH_CONN TOUCH_TO_SAGE_SENSE_IN<11> TOUCH_TO_SAGE_SENSE_IN<9> PP_SAGE_TO_TOUCH_VCPL_CONN TOUCH_TO_SAGE_VCM_IN_CONN SAGE_TO_TOUCH_VCPL_REF_CONN SAGE_TO_TOUCH_VCPH_REF_CONN SAGE_VBIAS_DRAIN CUMULUS_TO_SAGE_BOOST_EN SAGE_TO_CUMULUS_IN<13> CUMULUS_TO_SAGE_GCM_SEL CUMULUS_TO_PROX_RX_EN_1V8 AP_TO_TOUCH_SPI1_MOSI CUMULUS_TO_PROX_TX_EN_1V8_LCUMULUS_TO_PROX_TX_EN_BUFF LCM_TO_AP_HIFA_BSYNC TOUCH_TO_AP_SPI1_MISO CUMULUS_TO_PROX_TX_EN_1V8_L SAGE_TO_CUMULUS_IN<9> AP_TO_TOUCH_GRAPE_RESET_L PP1V8_CUMULUS_VDDLDO PP1V8_GRAPE CUMULUS_TO_SAGE_VSTM_OUT<6> CUMULUS_TO_SAGE_VSTM_OUT<19> CUMULUS_TO_SAGE_VSTM_OUT<13> CUMULUS_TO_SAGE_VSTM_OUT<11> CUMULUS_TO_SAGE_VSTM_OUT<17> CUMULUS_TO_SAGE_VSTM_OUT<18> CUMULUS_TO_SAGE_VSTM_OUT<7> CUMULUS_TO_SAGE_VSTM_OUT<3> CUMULUS_TO_SAGE_VSTM_OUT<15> SAGE_TO_CUMULUS_IN<11> PP_SAGE_VCPL_F 45_PROX_TO_CUMULUS_RX_FILT CUMULUS_TO_SAGE_VSTM_OUT<4> CUMULUS_TO_SAGE_VSTM_OUT<1> CUMULUS_TO_SAGE_VSTM_OUT<8> LCM_TO_AP_HIFA_BSYNC_BUFF CUMULUS_TO_SAGE_VSTM_OUT<5> PP5V7_SAGE_AVDDH SAGE_TO_TOUCH_VSTM_OUT<19> SAGE_TO_TOUCH_VCPH_REF_CONN SAGE_TO_TOUCH_VCPH_REF SAGE_TO_TOUCH_VCPL_REF_CONN SAGE_TO_TOUCH_VCPL_REF TOUCH_TO_SAGE_VCM_IN_CONN TOUCH_TO_SAGE_VCM_IN PP_SAGE_TO_TOUCH_VCPH_CONN PP_SAGE_TO_TOUCH_VCPH PP_SAGE_TO_TOUCH_VCPLPP_SAGE_TO_TOUCH_VCPL_CONN U12_GPIO_3 PP_CUMULUS_VDDANA PP1V8_GRAPE CUMULUS_TO_SAGE_VSTM_OUT<0> CUMULUS_TO_SAGE_VSTM_OUT<12> CUMULUS_TO_SAGE_VSTM_OUT<14> AP_TO_TOUCH_SPI1_CS_L PP5V1_GRAPE_VDDH PN5V7_SAGE_AVDDN PP1V8_GRAPE LCM_TO_AP_HIFA_BSYNC SAGE_TO_TOUCH_VSTM_OUT<16> CUMULUS_TO_SAGE_BOOST_EN TOUCH_TO_SAGE_VCM_IN PP5V7_SAGE_AVDDH TOUCH_TO_SAGE_SENSE_IN<4> TOUCH_TO_SAGE_SENSE_IN<5> TOUCH_TO_SAGE_SENSE_IN<0> TOUCH_TO_SAGE_SENSE_IN<7> CUMULUS_TO_SAGE_GCM_SEL TOUCH_TO_SAGE_SENSE_IN<2> CUMULUS_TO_SAGE_VSTM_OUT<13> PP1V8 PP_SAGE_VCPL_F PP_SAGE_TO_TOUCH_VCPH SAGE_TO_CUMULUS_IN<8> SAGE_TO_CUMULUS_IN<4> SAGE_TO_CUMULUS_IN<5> SAGE_TO_CUMULUS_IN<7> SAGE_TO_CUMULUS_IN<10> SAGE_TO_CUMULUS_IN<1> SAGE_TO_CUMULUS_IN<11> SAGE_TO_CUMULUS_IN<2> SAGE_TO_CUMULUS_IN<14> SAGE_TO_CUMULUS_IN<13> SAGE_TO_CUMULUS_IN<9> SAGE_TO_CUMULUS_IN<6> SAGE_TO_TOUCH_VSTM_OUT<6> SAGE_TO_TOUCH_VSTM_OUT<12> SAGE_TO_TOUCH_VSTM_OUT<7> SAGE_TO_TOUCH_VSTM_OUT<15> SAGE_TO_TOUCH_VSTM_OUT<14> SAGE_TO_TOUCH_VSTM_OUT<18> SAGE_TO_TOUCH_VSTM_OUT<9> SAGE_TO_TOUCH_VSTM_OUT<5> SAGE_TO_TOUCH_VSTM_OUT<10> SAGE_TO_TOUCH_VSTM_OUT<4> SAGE_TO_TOUCH_VSTM_OUT<19> SAGE_TO_TOUCH_VSTM_OUT<13> SAGE_TO_TOUCH_VSTM_OUT<2> SAGE_TO_TOUCH_VSTM_OUT<3> SAGE_TO_TOUCH_VSTM_OUT<11> SAGE_TO_TOUCH_VSTM_OUT<17> SAGE_TO_TOUCH_VSTM_OUT<0> TOUCH_TO_SAGE_SENSE_IN<3> TOUCH_TO_SAGE_SENSE_IN<11> TOUCH_TO_SAGE_SENSE_IN<10> TOUCH_TO_SAGE_SENSE_IN<6> TOUCH_TO_SAGE_SENSE_IN<9> TOUCH_TO_SAGE_SENSE_IN<8> TOUCH_TO_SAGE_SENSE_IN<14> TOUCH_TO_SAGE_SENSE_IN<13> CUMULUS_TO_SAGE_VSTM_OUT<1> CUMULUS_TO_SAGE_VSTM_OUT<7> CUMULUS_TO_SAGE_VSTM_OUT<12> CUMULUS_TO_SAGE_VSTM_OUT<6> CUMULUS_TO_SAGE_VSTM_OUT<8> CUMULUS_TO_SAGE_VSTM_OUT<9> CUMULUS_TO_SAGE_VSTM_OUT<5> CUMULUS_TO_SAGE_VSTM_OUT<18> CUMULUS_TO_SAGE_VSTM_OUT<14> CUMULUS_TO_SAGE_VSTM_OUT<15> CUMULUS_TO_SAGE_VSTM_OUT<16> CUMULUS_TO_SAGE_VSTM_OUT<3> CUMULUS_TO_SAGE_VSTM_OUT<19> CUMULUS_TO_SAGE_VSTM_OUT<4> CUMULUS_TO_SAGE_VSTM_OUT<10> CUMULUS_TO_SAGE_VSTM_OUT<2> CUMULUS_TO_SAGE_VSTM_OUT<11> CUMULUS_TO_SAGE_VSTM_OUT<0> CUMULUS_TO_SAGE_VSTM_OUT<17> SAGE_VBIAS PP_SAGE_LY PP_SAGE_LX SAGE_TO_TOUCH_VCPH_REF SAGE_TO_TOUCH_VCPL_REF PP_SAGE_VBST_OUTH PP_SAGE_VBST_OUTL SAGE_TO_CUMULUS_IN<0> SAGE_TO_CUMULUS_IN<12> SAGE_TO_CUMULUS_IN<3> PN5V7_SAGE_AVDDN_FILT SAGE_TO_TOUCH_VSTM_OUT<1> SAGE_TO_TOUCH_VSTM_OUT<8> TOUCH_TO_SAGE_SENSE_IN<1> TOUCH_TO_SAGE_SENSE_IN<12> PP_SAGE_TO_TOUCH_VCPL U12 E3 D1 C7 C9 G2 G1 D4 F2 F3 E4 F1 D3 D2 E1 B9 A6 A3 A5 A4 B2 A2 B8 A9 B7 B6 A8 B5 B4 A7 B3 C4 C3 E2 C6 D9 C2 G3 B1 C1 C8 C5 F4 A1 E9 E5 F9 D5 F6 F5 G4 E8 G8 G7 G6 G5 F7 E6 E7 F8 G9 D6 D7 D8 PP11 1 PP18 1 C1651 2 C163 1 2 DZ4 A K C150 1 2 C147 1 2 C137 1 2 R86 1 2 PP9 1 R21 2 R361 2 C3711 2 C3701 2 R791 2 C130 1 2 R1361 2 R26 1 2 PP7 1 PP8 1 U5 16 34 25 C1491 2 C156 1 2 PP12 1 C320 1 2 C3061 2 C3721 2 XW36 1 2 C365 1 2 XW37 1 2 Q6 3 2 1C79 1 2 C3811 2 C3311 2 C3241 2 C3151 2 D2 A K C349 1 2 C328 1 2 C364 1 2 C346 1 2 C321 1 2 C170 1 2 R1211 2 J4 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 33 34 35 36 37 38 39 4 40 41 42 43 44 5 6 7 8 9 C366 12 L21 1 2 XW7 1 2 XW13 1 2 XW18 1 2 XW19 1 2 XW23 1 2 XW79 1 2 C3691 2 U15 C2 B3 F4 F8 E3 L5 D2 A3 F3 F6 H5 B2 K5 G1 H1 L3 K3 J3 H3 G3 L4 K4 J4 H4 G4 J1 K1 L1 G2 H2 J2 K2 L2 G6 H6 L8 K8 J8 H8 G8 L9 K9 J9 H9 G9 J6 K6 L6 G7 H7 J7 K7 L7 F9 F7 F5 G5 C1 D1 E4 D4 E8 D8 C8 B8 A8 C4 B4 A4 A6 B6 C6 D6 E6 E5 D5 E9 D9 C9 B9 A9 C5 B5 A5 A7 B7 C7 D7 E7 D3 B1 E1 J5 A1 A2 F1 E2 F2 C3 051-9584 2.0.0 18 OF 23 18 OF 46 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 3 3 18 18 18 18 18 18 18 18 18 18 18 18 18 3 18 11 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 1819 18 18 18 18 18 18 11 3 1811 3 18 19 3 18 18 3 18 12 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 14 18 1418 18 18 18 18 18 18 18 18 18 18 191819 12 18 18 18 18 3 14 1419 12 18 3 18 19 18 18 18 1418 18 18 18 18 18 18 18 2 3 4 5 6 7 10 11 12 14 19 20 21 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 1819
  • 21.
    SYM_VER-2 SYM_VER-2 SYM_VER-2 SYM_VER-2 SYM_VER-2 Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT LCM CONNECTOR 516S1066 PLUG SPECIAL Z = 0.33 MM LCM B2B 516S1065 RCPT (FLEX) THIS ONE ON MLB ---> REFER TO RADAR 12410499. THIS IS PART OF BUILD MATRIX TO POTENTIALLY IMPLEMENT LCD PANIC FUNCTION 80-OHM-0.2A-0.4-OHM 0201-1 01005 NP0-C0G 16V 5% 56PF MF 01005 100K 1/32W 1% 01005 MF 5% 100K 1/32W 5% 6.3V NP0-C0G 56PF 01005 NOSTUFF 150OHM-25%-200MA-0.7DCR 01005 120-OHM-210MA 01005 2.2UF 0402 X5R-CERM 6.3V 20% X5R-CERM 0402 6.3V 20% 2.2UF X5R-CERM 0402 6.3V 20% 2.2UF 20% 6.3V X5R-CERM 0402 2.2UF NOSTUFF5% 1.00K 1/32W MF 01005 TCM0605-1 90-OHM-50MA 01005 16V 5% 56PF NP0-C0G AA22LB-P M-ST-SMMF 010050% 0.00 1/32W NP0-C0G 56PF 5% 16V 01005 0201-1 240-OHM-0.2A-0.8-OHM 240-OHM-0.2A-0.8-OHM 0201-1 56PF 01005 NP0-C0G 6.3V 5% 240-OHM-0.2A-0.8-OHM 0201-1 01005 56PF 16V NP0-C0G 5%5% NP0-C0G 01005 16V 56PF 56PF NP0-C0G 5% 16V 01005 1% BOMOPTION=NOSTUFF 100K 01005 MF 1/32W 01005 0.00 NOSTUFF 0% MF 1/32W 1% 1/32W 01005 100K MF NOSTUFF X5R 6.3V 201 0.1UF 10% TCM0605-1 90-OHM-50MA TCM0605-1 90-OHM-50MA TCM0605-1 90-OHM-50MA 90-OHM-50MA TCM0605-1 01005 120-OHM-210MA 120-OHM-210MA 01005 5% 56PF NP0-C0G 6.3V 01005 01005 120-OHM-210MA 56PF 5% 6.3V 01005 NP0-C0G 5% 01005 6.3V NP0-C0G 56PF NO_XNET_CONNECTIO=TRUE 80-OHM-0.2A-0.4-OHM 0201-1 SYNC_DATE=N/ASYNC_MASTER=N/A LCM CONNECTOR PP1V8 90_LCM_MIPI_DATA1_CONN_N PP_LCM_BL_CAT1 90_LCM_MIPI_DATA2_CONN_P LCD_PWR_EN_CONN 90_LCM_MIPI_CLK_CONN_P 90_LCM_MIPI_CLK_CONN_N 90_LCM_MIPI_DATA2_CONN_N 90_LCM_MIPI_DATA1_CONN_P LCD_PWR_EN PP5V7_LCD_AVDDH_CONN PN5V7_LCM_AVDDN_CONN PP1V8_LCM_CONN 90_LCM_MIPI_DATA0_CONN_P LCM_TO_AP_PIFA 90_AP_TO_LCM_MIPI_DATA3_N 90_AP_TO_LCM_MIPI_DATA1_P PP_SAGE_TO_TOUCH_VCPL 90_AP_TO_LCM_MIPI_DATA0_P 90_AP_TO_LCM_MIPI_DATA2_P 90_AP_TO_LCM_MIPI_DATA1_N 90_AP_TO_LCM_MIPI_DATA2_N 90_AP_TO_LCM_MIPI_DATA0_N 90_AP_TO_LCM_MIPI_CLK_N 90_AP_TO_LCM_MIPI_CLK_P 90_AP_TO_LCM_MIPI_DATA3_P PP_SAGE_TO_TOUCH_VCPL_CONN 90_LCM_MIPI_DATA0_CONN_N PP1V8 PN5V7_SAGE_AVDDN PP5V7_TO_LCD_AVDDH PP_LCM_BL_ANODE LCD_DESENSE_CONN LCD_RESET_L_CONN 90_LCM_MIPI_DATA3_CONN_P PP_LCM_BL_CAT2 PP1V8 LCM_TO_AP_HIFA_BSYNC RESET_1V8_L LCD_PANIC_L_CONN LCD_PIFA AP_TO_LCM_RESET_L LCD_HIFA_BSYNC_CONN LCD_BL_CC1_CONN PMU_AP_TO_LCM_RESET_L LCD_BL_CA_CONN 90_LCM_MIPI_DATA3_CONN_N LCD_BL_CC2_CONN C421 2 C461 2 L2 1 2 3 4 L9 1 2 3 4 L8 1 2 3 4 L10 1 2 3 4 FL27 1 2 FL61 1 2 C401 2 FL34 1 2 C411 2 C191 2 FL18 1 2 FL26 1 2 C301 2 R311 2 R32 1 2 C241 2 FL37 1 2 FL25 12 C43 1 2 C48 1 2 C49 1 2 C59 1 2 R4 1 2 L1 1 2 3 4 C6101 2 J5 1 10 1112 1314 1516 1718 19 2 20 2122 2324 2526 2728 29 3 30 3132 4 56 78 9 R932 1 2 C181 2 FL35 1 2 FL24 1 2 FL36 1 2 C151 2 C101 2 C141 2 R9711 2 R75 1 2 R621 2 051-9584 2.0.0 19 OF 23 19 OF 46 2 3 4 5 6 7 10 11 12 14 18 19 20 21 14 13 14 3 7 7 18 7 7 7 7 7 7 7 7 18 2 3 4 5 6 7 10 11 12 14 18 19 20 21 14 18 14 14 14 2 3 4 5 6 7 10 11 12 14 18 19 20 21 3 18 2 12 13 14 16 22 23 3 22 13 22 22
  • 22.
    DRDY SCL/SK SDA/SI VDD RSV SO VSS TST1 TRG VID CAD0 CAD1 RST* CSB* DEN INT1 GND CS SDO/SA0 SDA/SDI/SDO SCL/SPC VDD_IO DRDY/ RES2 RES1 RES0 VDD RES/VDD CAP GND INT2 INT2 INT1 RES RES RES CS RES RES SDO/SA0 SCL/SPC SDA/SDI/SDO VDD VDD_IO GND AppleInc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT AP3GDL20H, APN 338S1158 NO CAMERA VSYNC PIN NEED TO CHECK CONNECTION ACCELEROMETER THIS PART OUTSIDE OF SHIELD SENSORS ADD ALTERNATE AICHI 11V CHARGE PUMP NEED TO CHECK CONNECTION THESE PARTS INSIDE OF SHIELD COMPASS DEVICE: 338S1014 COMPASS COMPASS INTERPOSER: 998-5120 COMPASS (APN 338S1133) TO DO: TO DO: VERIFY CONNECTIONS ON ACCEL (CS, SDO PINS) GYRO AP2DHAA, APN 338S1114 0201-1 20% X5R 1.0UF 6.3V4V X5R 01005 0.1UF 20% 01005 4V X5R 0.1UF 20% 0.01UF 0201 25V 10% X5R-CERM CSP AK8963C OMIT_TABLE 120-OHM-210MA 01005 120-OHM-210MA 01005 01005 120-OHM-210MA LGA AP3GDL20HAA18 OMIT_TABLE LGA AP2DHAA24 20% X5R 4V 01005 0.1UF 150OHM-25%-200MA-0.7DCR 01005 150OHM-25%-200MA-0.7DCR 01005 4V 01005 0.1UF 20% X5R 01005 0.01UF 10% X5R 6.3V 0201-1 20% 6.3V 1.0UF X5R 0201-1 6.3V 20% X5R 1.0UF OSCAR + SENSORS SYNC_DATE=N/ASYNC_MASTER=N/A PWRTERM2GND PP1V8PP3V0_IMU PP1V8 AP_TO_I2C1_SCL AP_BI_I2C1_SDA PP1V8_COMP PP1V8PP1V8_COMP COMP_INT2 GYRO_TO_AP_INT2 PP1V8 GYRO_CP ACCEL_TO_AP_INT1 I2C_SDA_COMP COMPASS_TO_AP_INT_2 I2C_SCL_COMP AP_BI_I2C1_SDA AP_TO_I2C1_SCL PP3V0_IMU GYRO_TO_AP_INT1 AP_BI_I2C0_SDA AP_TO_I2C0_SCL ACCEL_TO_AP_INT2 PP3V0_COMP PP3V0_IMU FL39 12 FL38 1 2 C3001 2 C336 1 2 C334 1 2 C298 1 2 C3471 2 C3451 2 C344 1 2 C111 2 U16 D1 D2 A2 A1 D4 B3 A3 A4 B4 C3 C2 B1 C4 C1 FL751 1 2 FL753 1 2 FL752 1 2 U8 14 5 8 6 13 12 7 9 10 11 15 2 3 4 16 1 U18 4 9 6 5 10 11 12 13 14 1 2 3 8 7 C997 1 2 051-9584 2.0.0 20 OF 23 20 OF 46 2 3 4 5 6 7 10 11 12 14 18 19 20 21 1220 2 3 4 5 6 7 10 11 12 14 18 19 20 21 3 20 3 20 20 2 3 4 5 6 7 10 11 12 14 18 19 20 21 20 3 234567101112141819 2021 3 3 3 20 3 20 1220 3 3 13 14 15 16 3 13 14 15 16 3 1220
  • 23.
    VIN GND VOUT VEN SYM_VER-2 SYM_VER-2 SYM_VER-2 SYM_VER-2 SYM_VER-2 Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT 0.07 OHMS THIS ONE ON MLB ---> ROUTING CRITICAL, FOLLOW N41 516S0939 RCPT (USED ON FLEX) CAM0: MAIN CAMERA CONNECTOR 516S0940 PLUG 4-LANE MIPI CAM0: THIS XW LINK AT CONNECTOR PIN 0201-1 1.0UF 6.3V 20% X5R NP0-C0G 56PF 6.3V 5% 01005 0201-1 20% X5R 1.0UF 6.3V 5% 6.3V NP0-C0G 56PF 01005 100K 01005 1/32W 5% MF 56PF NP0-C0G 5% 01005 6.3V 120-OHM-210MA 01005 56PF 5% 01005 NP0-C0G 6.3V 01005 120-OHM-210MA 120-OHM-210MA 01005 120-OHM-210MA 01005 0201-1 6.3V X5R 20% 1.0UF FERR-22-OHM-1A-0.065-OHM 0201 0201 FERR-22-OHM-1A-0.065-OHM NO_XNET_CONNECTIO=TRUE 56PF 6.3V 5% NP0-C0G 01005 NP0-C0G 6.3V 01005 5% 56PF 120-OHM-210MA 01005 M-ST-SM BB35-PA SM LP5908AP-1.28V USMD 90-OHM-50MA TCM0605-1 TCM0605-1 90-OHM-50MA 90-OHM-50MA TCM0605-1 TCM0605-1 90-OHM-50MA TCM0605-1 90-OHM-50MA 56PF 5% NP0-C0G 6.3V 010050201-1 1.0UF 20% X5R 6.3V 10-OHM-750MA 01005-1 0201-1 1.0UF 20% X5R 6.3V NP0-C0G 5% 01005 56PF 6.3V FERR-22-OHM-1A-0.065-OHM 0201 NO_XNET_CONNECTIO=TRUE 0201-1 1.0UF 20% X5R 6.3V 56PF 5% 6.3V NP0-C0G 01005 SYNC_DATE=N/ASYNC_MASTER=N/A CAM0 CONNECTOR PP2V8_CAM_AVDD PP2V8_CAM0_CONN PP2V5_CAM0_AF_CONN PP1V8_CAM0_REG PP1V2_CAM0_CONN AP_BI_CAM_RF_SDA_CONN AP_TO_CAM_RF_SHUTDOWN_CONN 90_CAM0_MIPI_DATA0_CONN_N PP1V8 45_AP_TO_CAM_RF_CLK CAM0_TO_LEDDRV_STROBE_EN_CONN PP1V8_CAM0_CONN PP1V8 AP_BI_CAM_RF_SCL_CONN 45_AP_TO_CAM_RF_CLK_CONN AP_TO_CAM_RF_SHUTDOWN PP2V5_CAM0_AF 90_CAM0_MIPI_DATA3_CONN_P 90_CAM0_MIPI_DATA2_CONN_N 90_CAM0_MIPI_CLK_CONN_N AP_TO_CAM_RF_VDDCORE_EN PP2V5_CAM0_AF_COMP 90_CAM0_TO_AP_MIPI_DATA3_P 90_CAM0_TO_AP_MIPI_DATA3_N 90_CAM0_TO_AP_MIPI_DATA2_P 90_CAM0_TO_AP_MIPI_DATA2_N 90_CAM0_TO_AP_MIPI_CLK_P 90_CAM0_TO_AP_MIPI_CLK_N 90_CAM0_TO_AP_MIPI_DATA1_P 90_CAM0_TO_AP_MIPI_DATA1_N 90_CAM0_TO_AP_MIPI_DATA0_P 90_CAM0_TO_AP_MIPI_DATA0_N 90_CAM0_MIPI_DATA0_CONN_P 90_CAM0_MIPI_DATA1_CONN_N 90_CAM0_MIPI_DATA1_CONN_P 90_CAM0_MIPI_CLK_CONN_P 90_CAM0_MIPI_DATA2_CONN_P 90_CAM0_MIPI_DATA3_CONN_N CAM0_TO_LEDDRV_STROBE_EN AP_TO_CAM_RF_SCL PGND_CAM0_AF_RET AP_BI_CAM_RF_SDA C350 1 2 C3731 2 C357 1 2 C3581 2 C249 1 2 C3761 2 R721 2 C311 2 FL22 1 2 C841 2 FL31 1 2 FL30 1 2 FL28 1 2 C286 1 2 L27 1 2 L29 1 2 C361 1 2 C353 1 2 FL29 1 2 J3 33 34 35 36 1 10 11 12 13 14 15 16 17 18 19 2 20 21 22 23 24 25 26 27 28 29 3 30 31 32 4 5 6 7 8 9 XW29 1 2 U13 B2 B1 A1 A2 L34 1 2 3 4 L33 1 2 3 4 L37 1 2 3 4 L38 1 2 3 4 L36 1 2 3 4 C3521 2 C287 1 2 FL43 1 2 C82 1 2 C3511 2 L28 1 2 051-9584 2.0.0 21 OF 23 21 OF 46 1112 234567101112141819 2021 7 2345671011121418 192021 7 12 3 12 7 7 7 7 7 7 7 7 7 7 15 715 12 715
  • 24.
    A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A Apple Inc. THEINFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BATT CONN, TPS, STANDOFFS/SHIELDS/FIDUCIALS TESTPOINTS E75 - USB/UART/ID/POWER POWER GROUND SPKAMP OUTPUT TP VBUS POWER GROUND VBATT POWER TP SUPER TP PCB: PLACE XW12 AT BATT CONN, PIN 7 HEADPHONE MIC VBATT VBATT GROUND 806-4228 DFU FORCE DFU RESET H6P & BB RESET ANALOG MUX B OUTPUT (ON NORTH END OF SINGLE_BRD, TO MITIGATE COMPASS RETURN CURRENTS) BATTERY CONN 516S1022 RCPT 860-1511 860-1511 THIS ONE ON MLB ---> 516S1023 PLUG (USED ON BATTERY PCM) LCD BACKLIGHT SOURCE POWER GROUND LCD BACKLIGHT SINK1 HEADPHONE MIC POS LCD BACKLIGHT SINK2 MIC3 POSITIVE MIC2 POSITIVE MIC1 POSITIVE DRIVE MIC WRT NEAREST GROUND TEST POINT FOR DIAGS LCM BACKLIGHT MIC AUDIO HEADPHONE MIC NEG SHIELDS POWER GROUND SCREW HOLES STANDOFFS ACCESSORY ID AND POWER ANALOG MUX A OUTPUT AC COUPLED SCREW HOLES + STANDOFFS BATTERY NTC 806-4832 FIDUCIALS 806-4834 806-4230 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 FID 0P5SM1P0SQ-NSP FID 0P5SM1P0SQ-NSP FID 0P5SM1P0SQ-NSP 0P5SM1P0SQ-NSP FID 0P5SM1P0SQ-NSP FID 0P5SM1P0SQ-NSP FID SHORT-10L-0.25MM-SM NP0-C0G 5% 16V 56PF 01005 X7R-CERM 10V 10% 01005 220PF56PF 01005 5% NP0-C0G 16V 01005 NP0-C0G 16V 5% 56PF NP0-C0G 16V 5% 56PF 01005 01005 56PF 5% 16V NP0-C0G 120-OHM-210MA 01005 F-ST-SM RCPT-BATT-N41 STDOFF-2.7OD1.4ID-1.04H-SM-1 STDOFF-2.7OD1.4ID-1.04H-SM-1 SM SHLD-X145-EMI-LOWER-FRONT 01005 27PF 5% 16V NP0-C0GNP0-C0G 16V 5% 56PF 0100501005 NP0-C0G 16V 5% 100PF NP0-C0G 16V 5% 27PF 0100501005 56PF 5% 16V NP0-C0G 100PF 5% 16V NP0-C0G 01005 16V 01005 NP0-C0G 5% 27PF56PF 01005 5% 16V NP0-C0G 16V 5% 100PF 01005 NP0-C0G TP-P6 TP-P6 TP-P6 TP-P6 TP-P6 TP-P55 TP-P90 TP-P80 SHLD-EMI-UPPER-BACK SM SM SHLD-EMI-UPPER-FRONT SHLD-X145-EMI-LOWER-BACK SM TP-P6 TP-P6 TP-P6 TP-P6 BATT B2B, TPS, PD FEATURES SYNC_DATE=N/ASYNC_MASTER=N/A SPKAMP_TO_SPEAKER_OUT_CONN_P SPKAMP_TO_SPEAKER_OUT_CONN_N 90_TRISTAR_BI_E75_PAIR1_P 90_TRISTAR_BI_E75_PAIR1_N PP_BATT_VCC PP5V0_USB_CONN PP_BATT_VCC PP_BATT_VCC BATTERY_TO_PMU_NTC PMU_AMUX_BY BATTERY_TO_PMU_SENSE PMU_AMUX_AY PP_E75_TO_TRISTAR_ACC2_CONN PP_E75_TO_TRISTAR_ACC1_CONN 90_TRISTAR_BI_E75_PAIR2_N FORCE_DFU RESET_1V8_L CODEC_TO_HPHONE_HS4_REF_CONN AP_BI_BATTERY_SWI_CONN PGND_STANDOFF2 PGND_STANDOFF1 AP_BI_BATTERY_SWI LCD_BL_CA_CONN LCD_BL_CC1_CONN MIC3_TO_CODEC_P MIC2_TO_CODEC_P MIC1_TO_CODEC_P E75_TO_PMU_ACC_DETECT_CONN CODEC_TO_HPHONE_HS3_REF_CONN LCD_BL_CC2_CONN PGND_SCREW_HOLE1 AP_BI_BATTERY_SWI_CONN 90_TRISTAR_BI_E75_PAIR2_P PP_BATT_VCC TP181 TP191 TP201 TP261 TP271 TP251 TP321 TP101 TP11 TP21 TP151 TP161 TP171 TP281 TP291 TP51 TP61 TP71 TP81 TP91 FD1 1 FD5 1 FD4 1 FD3 1 FD2 1 FD6 1 XW12 1 2 C279 1 2 C2751 2 C91 2 C25 1 2 C23 1 2 C221 2 FL11 1 2 J6 1 10 11 12 2 34 56 78 9 BS1 1 BS2 1 SH2 1 C4381 2 C4361 2 C4341 2 C4371 2 C4351 2 C4331 2 C4321 2 C4301 2 C4271 2 TP111 TP211 TP241 TP231 TP221 TP41 TP341 TP31 SH3 1 SH1 1 SH4 1 TP911 TP921 051-9584 2.0.0 22 OF 23 22 OF 46 1517 1517 1617 1617 812152223 17 812152223 8121522 23 1217 13 12 13 17 17 1617 3 2121314161923 17 22 3 13 19 19 911 89 917 17 17 19 22 1617 8 12 15 22 23
  • 25.
    IN IN OUT IN OUT OUT IN BI BI IN OUT OUT IN IN IN IN OUT IN IN BI OUT IN IN OUT IN IN OUT OUT BI BI BI BI BI BI BI BI IN OUT OUT IN OUT OUT OUT OUT IN OUT OUT OUT OUT OUT OUT IN OUT BI BI BI BI BI IN BI OUT OUT BI IN IN RESET_PMU_L BB_SPI_TO_PAC_CS BB_SPI_TO_PAC_CLK AP_HSIC3_RDY BB_SPI_TO_PAC_DATA_MOSI OSCAR_CONTEXT_A OSCAR_CONTEXT_B 50_HSIC_BB_DATA PBL_RUN_BB_HSIC1_RDY BB_HSIC1_REMOTE_WAKE AP_WAKE_MODEM AP_HSIC1_RDY WLAN_HSIC3_RESUME WLAN_HSIC3_DEVICE_RDY CLK32K_AP BB_RST_L RF_RESET_L RESET_DET_L RADIO_ON_L PP_LDO14_2V65 TX_GTR_THRESH BB_UART_RXD BB_UART_RTS_L BB_UART_TXD PP_SYNC HOST_WAKE_BB BB_I2S_RXD BB_I2S_TXD BB_I2S_WS BT_REG_ON BT_UART_TXD BT_WAKE 50_HSIC_BB_STROBE BB_I2S_CLK BT_UART_RTS_L HOST_WAKE_BT BB_UART_CTS_L 90_BB_USB_D_N 90_BB_USB_D_P BB_USB_VBUS ADC_SMPS1_MSMC_1V05 ADC_LVS1 WLAN_UART_TXD BT_UART_CTS_L 50_HSIC_WLAN_STROBE BB_JTAG_TCK BB_JTAG_TMS ADC_LDO6_RUIM_1V8 ADC_SMPS3_MSME_1V8 BT_UART_RXD LAT_SW2_CTL LAT_SW1_CTL 50_HSIC_WLAN_DATA BB_JTAG_TDO BB_JTAG_TRST_L BB_JTAG_TDI PP_WL_BT_VDDIO_AP PP_VCC_MAIN_WLAN PP_BATT_VCC_CONN WLAN_REG_ON WLAN_UART_RXD HOST_WAKE_WLAN BT_PCM_SYNC BT_PCM_OUT BT_PCM_CLK BT_PCM_IN BB_I2S_MCLK BB_I2S2_CLK BB_I2S2_WS BB_I2S2_RXD BB_IPC_GPIO PAC_TO_BB_SPI_DATA_MISO RADIO_MLB OUT Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT RADIO_MLB HIERARCHICAL SYMBOL AP/RADIO INTERFACE <OUT> BB_TO_LAT_SW3_CTL 1012131446 325 325 1325 1325 1529 1325 1625 1625 325 325 31625 31625 325 325 325 325 34101213141646 1325 329 1346 325 1325 1346 346 325 346 325 346 346 346 346 225 225 225 225 325 325 325 346 346 1325 RADIO_TO_PMU_ADC_SMPS1_MSMC_1V05 1325 1325 1325 1325 325 329 BB_TO_AP_PP_SYNC 1726 1729 212131416192225 325 1725 3 25 3 25 3 25 3 25 325 329 3 25 829 829 329 812152225 29 I612 RF 829 SYNC_MASTER=N/A SYNC_DATE=N/A RADIO_MLB HIERARCH. SYMBOL MAKE_BASE=TRUEANTENNA_PAC_TO_BB_SPI_MISO MAKE_BASE=TRUEBB_TO_AP_IPC_GPIO AP_TO_BT_I2S3_DOUT MAKE_BASE=TRUE 45_AP_TO_BT_I2S3_BCLK MAKE_BASE=TRUE BT_TO_AP_I2S3_DIN MAKE_BASE=TRUE AP_TO_BT_I2S3_LRCLK MAKE_BASE=TRUE WLAN_TO_PMU_HOST_WAKE MAKE_BASE=TRUE AP_TO_WLAN_UART4_TXD MAKE_BASE=TRUE PMU_TO_WLAN_REG_ON MAKE_BASE=TRUE MAKE_BASE=TRUEPP_BATT_VCC MAKE_BASE=TRUEPP_VCC_MAIN MAKE_BASE=TRUEPP1V8_SDRAM MAKE_BASE=TRUE AP_TO_BB_JTAG_TDI AP_TO_BB_JTAG_TRST_LMAKE_BASE=TRUE BB_TO_AP_JTAG_TDOMAKE_BASE=TRUE 50_AP_BI_WLAN_HSIC3_DATA MAKE_BASE=TRUE MAKE_BASE=TRUEBB_TO_LAT_SW1_CTL MAKE_BASE=TRUEBB_TO_LAT_SW2_CTL MAKE_BASE=TRUEAP_TO_BT_UART3_TXD RADIO_TO_PMU_ADC_SMPS3_MSME_1V8 MAKE_BASE=TRUE RADIO_TO_PMU_ADC_LDO6_RUIM_1V8 MAKE_BASE=TRUE AP_TO_BB_JTAG_TMSMAKE_BASE=TRUE MAKE_BASE=TRUE AP_TO_BB_JTAG_TCK MAKE_BASE=TRUE50_AP_BI_WLAN_HSIC3_STB MAKE_BASE=TRUEAP_TO_BT_UART3_RTS_L WLAN_TO_AP_UART4_RXD MAKE_BASE=TRUE RADIO_TO_PMU_ADC_LVS1 MAKE_BASE=TRUE MAKE_BASE=TRUE PMU_TO_BB_VBUS_DET MAKE_BASE=TRUE 90_TRISTAR_BI_BB_USB_P MAKE_BASE=TRUE 90_TRISTAR_BI_BB_USB_N MAKE_BASE=TRUE AP_TO_BB_UART1_RTS_L MAKE_BASE=TRUE BT_TO_PMU_HOST_WAKE MAKE_BASE=TRUE MAKE_BASE=TRUEBT_TO_AP_UART3_CTS_L 45_AP_TO_BB_I2S1_BCLK MAKE_BASE=TRUE MAKE_BASE=TRUE50_AP_BI_BB_HSIC1_STB AP_TO_BT_WAKE MAKE_BASE=TRUE MAKE_BASE=TRUEBT_TO_AP_UART3_RXD MAKE_BASE=TRUEPMU_TO_BT_REG_ON AP_TO_BB_I2S1_LRCLK MAKE_BASE=TRUE BB_TO_AP_I2S1_DIN MAKE_BASE=TRUE AP_TO_BB_I2S1_DOUT MAKE_BASE=TRUE BB_TO_PMU_HOST_WAKE MAKE_BASE=TRUE MAKE_BASE=TRUE BB_TO_AP_UART1_RXD MAKE_BASE=TRUE BB_TO_AP_UART1_CTS_L MAKE_BASE=TRUE AP_TO_BB_UART1_TXD MAKE_BASE=TRUE BB_TO_LEDDRV_GSM_BLANK MAKE_BASE=TRUE MAKE_BASE=TRUEPP_LDO14_2P65 AP_TO_RADIO_ON_L MAKE_BASE=TRUE BB_TO_AP_RESET_DET_L MAKE_BASE=TRUE RESET_1V8_L MAKE_BASE=TRUE AP_TO_BB_RST_L MAKE_BASE=TRUE 45_PMU_TO_WLAN_CLK32K MAKE_BASE=TRUE WLAN_TO_AP_HSIC2_RDY MAKE_BASE=TRUE MAKE_BASE=TRUEWLAN_TO_AP_HSIC2_REMOTE_WAKE AP_TO_BB_HSIC1_RDY MAKE_BASE=TRUE MAKE_BASE=TRUEAP_TO_BB_WAKE_MODEM BB_TO_AP_HSIC1_REMOTE_WAKE MAKE_BASE=TRUE BB_TO_AP_HSIC1_RDY MAKE_BASE=TRUE MAKE_BASE=TRUE50_AP_BI_BB_HSIC1_DATA MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_MOSI AP_TO_WLAN_HSIC2_RDY MAKE_BASE=TRUE MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_SCLK MAKE_BASE=TRUEBB_TO_ANTENNA_PAC_SPI_CS_L PMU_TO_BB_RST_L MAKE_BASE=TRUE 051-9584 2.0.0 23 OF 23 23 OF 46
  • 26.
    TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART#DESCRIPTIONQTY REFERENCE DESIGNATOR(S) TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM CRITICAL BOM OPTION TABLE_5_HEAD PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_HEAD TABLE_5_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM TABLE_5_ITEM 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PROPRIETARY PROPERTY OF APPLE INC. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DESCRIPTION OF REVISION CK APPD 2 1 1245678 B D 6 5 4 3 C A NOTICE OF PROPRIETARY PROPERTY: PAGE THE INFORMATION CONTAINED HEREIN IS THE C A D DATE R SHEET Apple Inc. THE POSESSOR AGREES TO THE FOLLOWING: DRAWING TITLE D SIZE REVISION DRAWING NUMBER BRANCH REV ECN 7 B 3 II NOT TO REPRODUCE OR COPY IT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE IV ALL RIGHTS RESERVED III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 8 BOARD :920-2148 BOM :939-0308 SCH :951-2446 BOARD_ID BOM OPTIONS X155 RADIO_MLB SUBDESIGN - PROTO1 10/3/2012 24 OF 46 2012-10-14ENGINEERING RELEASED 1 OF 23 2.0.0 051-9584 2 0001669557 4 CELLULAR PMU: (2 OF 2) R25_RF Y N48_CFG_A255K 1% 010051118S0659 X155 RADIO_MLB SCHEMATIC R25_RF1 Y N51_CFG_B470K 5% 01005117S0159 R25_RF1.00M 1% 010051 Y N51_CFG_A118S0621 R26_RF N51_CFG_A1 Y118S0732 50K 1% 01005 R26_RF N48_CFG_B1 Y100K 1% 01005118S0626 R26_RF1 Y N49_CFG_B118S0621 1.00M 1% 01005 CELLULAR FRONT END: TX AND RX MATCHING9 CELLULAR FRONT END: BAND 5/8 PAD14 5 CELLULAR BASEBAND: (1 OF 2) CELLULAR RF TRANSCEIVER: (2 OF 2)8 CELLULAR FRONT END: BAND 1/4 PAT11 CELLULAR FRONT END: BAND 2/3 PAD12 22 FRONT END LOGIC TABLE (2 OF 2) FRONT END LOGIC TABLE (1 OF 2)21 20 CELLULAR FRONT END: ANTENNA FEEDS 17 CELLULAR FRONT END: 2G FEM 16 CELLULAR FRONT END: PA DCDC CONVERTER CELLULAR FRONT END: BAND 13/17 PAD15 1 EEE FOR 939-0308 EEEE_????825-2029 Y NA 951-2446 SCH Y1 X145_RADIO_MLB CELLULAR FRONT END: GPS LNA19 CELLULAR RF TRANSCEIVER: (1 OF 2)7 R25_RF1 Y N49_CFG_B118S0732 50K 1% 01005 R25_RF N49_CFG_A1 Y100K 1% 01005118S0626 R26_RF N49_CFG_A1 Y118S0650 499K 1% 01005 R25_RF1 Y N48_CFG_B118S0689 147K 1% 01005 3 CELLULAR PMU: (1 OF 2) R26_RF1 Y N48_CFG_A118S0626 100K 1% 01005 2 AP INTERFACE & DEBUG CONNECTORS CONTENTSPDF PAGE R26_RF1 Y118S0623 267K 1% 01005 N53_CFG_B 6 CELLULAR BASEBAND: (2 OF 2) WIFI/BT: MODULE AND FRONT END23 CELLULAR FRONT END: RX DIVERSITY18 13 CELLULAR FRONT END: BAND 20 PAD CELLULAR FRONT END: SAW BANKS10 1 Y N53_CFG_B118S0626 R25_RF100K 1% 01005 R26_RF1 Y N53_CFG_A118S0726 162K 1% 01005 R25_RF1 Y N53_CFG_A118S0626 100K 1% 01005 118S0626 R26_RF1 Y N51_CFG_B100K 1% 01005
  • 27.
    OUT OUT OUT OUT OUT IN OUT OUT BI IN BI OUT OUT IN IN IN IN IN OUT OUT OUT OUT OUT IN BI IN OUT IN IN IN OUT OUT IN IN OUT OUT OUT BI OUT IN IN PP PP PP PP PP PP PP PP PP OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IO IO IO IO IO IO IO IO IO IO OUT OUT OUT IN OUT PP PP OUT PP PP PP PP PP PP IN IN IN OUT OUT OUT PP PP PP GND PP PP PP PP CLK RST VCC SWP GND DETECT I/O IN Apple Inc. THEINFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST SIM CARD CONNECTOR SIM CARD ESD PROTECTION AP INTERFACE & DEBUG CONNECTORS IN = FROM AP AP CONNECTIONS OUT = TO AP PROBE POINTS GPIO51/BOOT_CONFIG_3 GPIO53/BOOT_CONFIG_1 GPIO48/BOOT_CONFIG_6 GPIO54/BOOT_CONFIG_0 NC SW REGISTER 0X00 0X01 0X08 0X03 47 BOOT_CONFIG ENABLE SAHARA PROTOCOL X BOOT_NAND_OPTION BOOT_HSIC_OPTION BOOT_USB_OPTION BOOT_DEFAULT_OPTION BOOT OPTIONS 0X02 VALUE X X X X 6 GPIO/BOOT_CONFIG CONFIGURATION 48 0 1 1 1 1 0 0 1 0 X X X 0 0 0 0 000 0 0 5 49 0 34 0 50 0 51 1 0 100 1 10 0 0 52 2 53 0 54 0 1 0 X X X X 55 NC DEBUG CONNECTOR NC NC NOSTUFF AXE654124 M-ST-SM 12V-33PF 01005-1 15.00K MF 1/32W 1% 01005 SM P4MM P4MM SM P4MM SM P4MM SM P4MM SM P4MM SM P4MM SM MM4829-2702 F-ST-SM NOSTUFF F-ST-SM MM4829-2702 NOSTUFF SM P4MM P4MM SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM SHORT-10L-0.1MM-SM P4MM SM SM P4MM P4MM SM P4MM SM SM P4MM P4MM SM SM P4MM P4MM SM P4MM-NSM SM SM P4MM-NSM P4MM-NSM SM SON4 TPD4E101DPWR 01005 6.3V CERM 100PF 5% P4MM SM SM P4MM P4MM SM SM P4MM AP INTERFACE & DEBUG CONNECTORS BB_I2S_CLK BB_I2S_TXD BB_I2S_RXD BB_I2S_WS 50_HSIC_WLAN_STROBE 50_HSIC_WLAN_DATA BT_UART_TXD BT_UART_RXD 50_HSIC_BB_STROBE WLAN_HSIC3_DEVICE_RDY SIM_TRAY_DETECT BB_I2S2_CLK BB_I2S2_WS BB_I2S_MCLK OSCAR_CONTEXT_A SIM_TRAY_DETECT SIMCRD_CLK_CONNSIMCRD_RST_CONN SIMCRD_IO_CONN BB_I2S2_RXD BB_I2S_RXD BB_I2S_CLK WLAN_UART_RXD 50_HSIC_WLAN_DATA BT_UART_TXD BT_UART_RXD BT_UART_RTS_L BT_UART_CTS_L BB_SPI_TO_PAC_CS BB_SPI_TO_PAC_CLK BB_JTAG_TMS BB_JTAG_TRST_L ADC_SMPS1_MSMC_1V05 BB_JTAG_TCK BT_PCM_IN BB_UART_TXD AP_WAKE_MODEM HOST_WAKE_BB 50_HSIC_WLAN_STROBE HOST_WAKE_BT AP_HSIC3_RDY CLK32K_AP PP_LDO6_RUIM_1V8 PP_BATT_VCC_CONN LTE_COEX_TXD WTR_RF_ON WTR_RX_ON AP_HSIC3_RDY RESET_PMU_L RESET_DET_L BB_RST_L WLAN_HSIC3_RESUME PBL_RUN_BB_HSIC1_RDY RF_RESET_L ADC_LVS1 BB_IPC_GPIO ADC_LDO6_RUIM_1V8 ADC_SMPS3_MSME_1V8 BB_JTAG_TDO PAC_TO_BB_SPI_DATA_MISO BB_SPI_TO_PAC_DATA_MOSI BT_PCM_OUT BT_PCM_SYNC BT_REG_ON BT_PCM_CLK BT_WAKE WLAN_HSIC3_DEVICE_RDY HOST_WAKE_WLAN WLAN_REG_ON PP_WL_BT_VDDIO_AP PP_SYNC 90_BB_USB_D_N 90_BB_USB_D_P BB_USB_VBUS BB_UART_CTS_L BB_UART_RTS_L BB_UART_RXD BB_HSIC1_REMOTE_WAKE 50_HSIC_BB_STROBE AP_HSIC1_RDY RADIO_ON_L TX_GTR_THRESH WLAN_HSIC3_RESUME PP_SMPS3_MSME_1V8 SIM_TRAY_DETECT BB_JTAG_TRST_L BB_JTAG_RTCLK AP_HSIC1_RDY PMIC_RESOUT_L BB_JTAG_TMS GPIO_51 GPIO_DEBUG_LED BB_UART_CTS_L BB_UART_TXD PS_HOLD_PMIC BB_UART_RXD LAT_SW1_CTL 2G_FEM_S1 2G_FEM_S4 PBL_RUN_BB_HSIC1_RDY BB_JTAG_TDI BB_UART_RTS_L SIMCRD_IO_CONN RF_RESET_L BB_JTAG_TCK RESET_PMU_L RESET_DET_L SIMCRD_CLK_CONN BB_RST_L SIMCRD_RST_CONN 90_BB_USB_D_P BT_WAKE WLAN_REG_ON PP_LDO6_RUIM_1V8 90_BB_USB_D_N BT_REG_ON PP_LDO6_RUIM_1V8 50_HSIC_BB_STROBE 50_HSIC_BB_DATA ADC_SMPS1_MSMC_1V05PP_SMPS1_MSMC_1V05 ADC_SMPS3_MSME_1V8PP_SMPS3_MSME_1V8 ADC_LDO6_RUIM_1V8PP_LDO6_RUIM_1V8 ADC_LVS1PP_LVS1 SIMCRD_IO_CONN BB_JTAG_TDO BB_USB_VBUS RADIO_ON_L DEBUG_RST_L BB_ERROR_FLAG HOST_WAKE_BB 50_HSIC_BB_DATA 50_HSIC_BB_DATA WLAN_UART_TXD PP_BATT_VCC_CONN BB_JTAG_TDI OSCAR_CONTEXT_B PP_LDO14_2V65 LAT_SW1_CTL LAT_SW2_CTL PMIC_SSBI SLEEP_CLK_32K 19P2M_MDM CLK32K_AP WTR_SSBI_TX_GPS WTR_SSBI_PRX_DRX BB_I2S_TXD BB_I2S_WS PP_VCC_MAIN_WLAN WLAN_COEX_TXD F-ST-SM SIMCRD_CLK_CONN SIMCRD_RST_CONN SIM-CARD-N48 051-9584 2.0.0 2 OF 23 25 OF 46 28 27 2325 28 2325 28 2325 28 2325 28 2325 28 2325 28 2325 28 2325 29 28 2325 28 27 292325 462325 292325 292325 292325 29 294041 292325 25 23 27 2325 50 42 44 46 48 32 34 36 38 40 26 22 24 28 30 16 14 12 18 20 2 10 8 6 4 49 47 45 43 41 33 31 29 27 25 23 21 35 37 39 7 5 3 1 19 17 15 9 11 13 52 54 51 53 55 58 57 56 J1_RF 2728 2529 2529 2529 2526282931 252628 2529 2940 1 2 C1_RF 272325 1 2 R3_RF 29 2325 29 2325 29 2325 29 2325 462325 2529 2529 2529 2529 1 PP3_RF 1 PP2_RF 1 PP1_RF 1 PP18_RF 1 PP15_RF 1 PP14_RF 1 PP11_RF 4 2 3 1 J3_RF 4 2 3 1 J2_RF 1 PP21_RF 1 PP22_RF 462325 21 XW12_RF 21 XW13_RF 21 XW14_RF 21 XW15_RF 1 PP40_RF 1 PP41_RF 1 PP42_RF 1 PP43_RF 1 PP44_RF 1 PP45_RF 1 PP46_RF 1 PP47_RF 1 PP10_RF 1 PP19_RF 1 PP20_RF 3 41 2 5 U5_RF 2 1 C177_RF 1 PP4_RF 1 PP5_RF 1 PP6_RF 1 PP7_RF 3 2 1 6 8 9 10 11 13 5 12 7 J11_RF 40232526 34 35 36 37 38 39 2 6 2 6 2 6 2 6 2 23 2 23 2 23 2 23 2 5 2 23 6 6 6 623 2 6 2 626 26 6 26 26 23 223 223 223 23 23 620 620 25 25 2 25 23 26 6 26 23 223 23 223 223 235 6 23 23 6 7 6 7 2 23 24 26 24 223 26 2 2 6 2 2 25 620 620 23 23 223 23 223 223 23 223 23 6 25 25 25 26 26 26 6 25 26 24 6 2 23 2 3 5 2 5 2 5 235 223568 2235 235 6 25 2 5 23 2311121314151617 25 623 310171820 26 6 4 5 4 5 4 5 2 23 6 7 6 7 26 26
  • 28.
    OUT OUT OUT OUT IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN OUT OUT IN VDD_S4 VSW_S5 VSW_S3 VSW_S2 VREG_XO VREG_S5 VREG_S4 VREG_RFCLK VREG_L9 VREG_L8 VREG_L7 VREG_L6 VREG_L5 VREG_L4 VREG_L3 VREG_L2 VREG_L14 VREG_L13 VREG_L12 VREG_L11 VREG_L10 VOUT_LVS1 VDD_XO VDD_S5 VDD_S2 VDD_S1 VDD_L9 VDD_L8 VDD_L7 VDD_L5_L6_L13_L14 VDD_L4 VDD_L2_L3 VDD_L12 VDD_L10_L11 REF_GND REF_BYP VSW_S5_2 VREG_S3 VSW_S4 VDD_S3 VSW_S1 VREG_S1 VREG_S2 VREG (SYM 5 OF5) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT INTERNAL USE ONLY INTERNAL USE ONLY PMU (1 OF 2) 20% X5R 01005 0.1UF 4V 20% 6.3V X5R-CERM 0603-3 22UF 20% 6.3V 0603-3 X5R-CERM 22UF 20% 6.3V X5R-CERM-1 22UF 603 20% 6.3V 22UF X5R-CERM-1 603 0201-1 20% 6.3V X5R 1.0UF 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V 1.0UF X5R 0402 20% 10UF 6.3V CERM 0402 20% 10UF 6.3V CERM 0402 20% 10UF 6.3V CERM 0402 20% 10UF 6.3V CERM 0402 20% 10UF 6.3V CERM 0201-1 1.0UF 20% 6.3V X5R 2.2UH-20%-1.2A-0.15OHM 0806 2.2UH-20%-1.2A-0.15OHM 0806 2.2UH-20%-1.2A-0.15OHM 0806 0806 2.2UH-20%-1.2A-0.15OHM 20% 6.3V 22UF X5R-CERM-1 603 0201-1 20% 6.3V 1.0UF X5R 20% 4.7UF X5R-CERM 10V 0402 20% 4.7UF 10V 0402 X5R-CERM 20% X5R-CERM 0402 10V 4.7UF 20% 0402 10V 4.7UF X5R-CERM 20% 4.7UF 10V X5R-CERM 0402 20% 0.1UF NOSTUFF 01005 X5R 4V 20% 10UF 6.3V 0402 CERM 20% 10UF 6.3V 0402 CERM 16V NP0-C0G 56PF 5% 01005 20% 10UF 6.3V 0402 CERM 0201-1 20% 6.3V 1.0UF X5R 0201-1 20% 6.3V X5R 1.0UF SHORT-10L-0.1MM-SM NOSTUFF PM8018-0 BGA TFA252010-SM 2.2UH-20%-2.3A-0.115OHM CELLULAR PMU: (1 OF 2) PP_VSW_S4 PP_SMPS5_DSP_1V05 PP_VSW_S5 PP_SMPS3_MSME_1V8 PP_SMPS4_RF2_2V05 PP_VSW_S1PP_BATT_VCC_CONN PP_SMPS4_RF2_2V05 PP_SMPS5_DSP_1V05 PP_VSW_S3 PP_VSW_S2 PP_LDO9_PLL_1V05 PP_LDO8_VDDPX_1V2 PP_LDO11_MDSP_FW_1V05 PP_LDO10_ADSP_1V05 PP_SMPS3_MSME_1V8 REF_GND REF_BYP S4_GND S1_GND S2_GND S2_GND S5_GND S1_GND S4_GNDS3_GND S5_GND PP_LVS1 PP_SMPS1_MSMC_1V05 S3_GND PP_SMPS2_RF1_1V3 PP_LDO4_VDDA_3V3 PP_LDO2_XO_HS_1V8 PP_LDO6_RUIM_1V8 PP_LDO14_2V65 PP_LDO7_DAC_1V8 PP_VREG PP_LDO1 PP_LDO3_AMUX_1V8 PP_LDO5_GPS_LNA_2V5 PP_LDO12_MDSP_SW_1V05 PP_LDO13_VDDPX_2V95 051-9584 2.0.0 3 OF 23 26 OF 46 2831 2526282931 2631 26 2631 2526282931 2 1 C50_RF 2 1 C57_RF 2 1 C58_RF 2 1 C56_RF 2 1 C55_RF 28 28 432325 33 40 41 28 2528 42 2728 28 28 28 28 28 28 26 2 1 C3_RF 2 1 C2_RF 2 1 C4_RF 2 1 C5_RF 2 1 C6_RF 2 1 C7_RF 2 1 C8_RF 2 1 C9_RF 2 1 C10_RF 2 1 C11_RF 2 1 C13_RF 2528 2528 2 1 C12_RF 21 L1_RF 21 L4_RF 21 L2_RF 21 L3_RF 2 1 C59_RF 2 1 C52_RF 2 1 C46_RF 2 1 C47_RF 2 1 C48_RF 2 1 C49_RF 2 1 C51_RF 2 1 C60_RF 2 1 C44_RF 2 1 C42_RF 40 2325343536373839 2 1 C45_RF 2 1 C43_RF 2 1 C53_RF 2 1 C54_RF 21 XW17_RF 98 24 88 82 87 48 42 90 20 76 105 13 77 54 63 17 11 84 32 31 29 23 43 55 65 53 8 101 89 95 104 70 58 75 5 78 44 64 59 34 28 100 12 81 18 6 92 97 79 83 102 U2_RF 21 L5_RF 3 4 3 4 3 4 34 3 4 34 3434 34 3 4
  • 29.
    OUT IN IN IN OUT OUT IN OUT OPT_1 PM_RESIN_N KPD_PWR* BAT_ID LED_DRV_N OPT_2 PM_MDM_INT_N PM_USR_INT_N PON_RESET* PON_TRIG SSBI PS_HOLD (SYM 1 OF5) CONTROL GND0 XTAL_32K_OUT XTAL_32K_IN XTAL_19M_OUT XTAL_19M_IN XOADC_GND XO_THERM XO_OUT_D0_EN XO_OUT_D0 XO_OUT_A1 XO_OUT_A0 SLEEP_CLK RSVD GND1 (SYM 2 OF 5) CLOCKS GND_S3 GND_S2 GND_S1 GND_S4 GND_S5 GND VCOIN (SYM 3 OF 5) INPUT PWR MPP_06 MPP_05 MPP_04 MPP_03 MPP_02 MPP_01 GPIO_06 GPIO_05 GPIO_04 GPIO_03 GPIO_02 GPIO_01 (SYM 4 OF 5) MPP MISC OUT IN IN BI IN OUT OUT IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST REVISIONBOARD_ID 0.7V NC NC GND NEEDS TO BE CLEARED UNDER THIS CRYSTAL TO MINIMIZE THERMAL DRIFT NC NC PA_ID < 1.00V FOR MAV8 PA_ID > 1.00V FOR MAV7 NC NEEDS ITS OWN THERMISTOR PLACED NEAR THE PA’S. PA THERMISTOR REMOVED TO MATCH N41, AP SECTION EVT2 EVT1 DVT PVT1.7V 1.5V 1.3V PROTO20.9V PROTO1 NC NC NC NC NCNC NC PMU (2 OF 2) NC NC 1.1V X5R-CERM 01005 10% 6.3V 1000PF NOSTUFF 15.8K MF 1/32W 1% 01005 NOSTUFF 102K 01005 1/32W 1% MF 20.0K 5% 01005 MF 1/32W MF 01005 5% 1.00K 1/32W SHORT-10L-0.1MM-SM 100K MF 1/32W 1% 01005 SHORT-10L-0.25MM-SM NOSTUFF NOSTUFF SHORT-10L-0.25MM-SM SHORT-10L-0.25MM-SM NOSTUFF NOSTUFF SHORT-10L-0.25MM-SM SHORT-10L-0.25MM-SM NOSTUFF PM8018-0 BGA BGA PM8018-0 BGA PM8018-0 BGA PM8018-0 19.200MHZ 2.0X1.6-SM 100K 01005 1% 1/32W MF 01005 61.9K 1% 1/32W MF CELLULAR PMU: (2 OF 2) BOARD_ID VREF_DAC_BIAS VDDPX_BIAS PA_ID S3_GND S2_GND S1_GND S4_GND S5_GND 19P2M_CLK_EN 19P2M_WTR SLEEP_CLK_32K RESET_PMU_L RADIO_ON_L PM_USR_IRQ_L PMIC_RESOUT_L PMIC_SSBI PS_HOLD_PMIC PP_LDO3_AMUX_1V8 BB_RST_L PS_HOLD 19P2M_MDM PM_MDM_IRQ_L 19P2M_XTAL_IN XO_GND XO_THERM_Y1 19P2M_XTAL_OUT PP_LDO3_AMUX_1V8 051-9584 2.0.0 4 OF 23 27 OF 46 2 1 C127_RF 29 29 1 2 R26_RF 1 2 R25_RF 1 2 R20_RF 29 25 23 28 30 1 2 R21_RF 2 1 XW10_RF 1 2 R22_RF 262728 21 XW2_RF 21 XW3_RF 21 XW1_RF 2528 21 XW4_RF 21 XW16_RF 62 16 69 35 86 74 14 21 4 41 68 47 U2_RF 27 15 3 2 1 22 10 9 25 37 19 26 7 45 U2_RF 56 30 96 103 91 36 93 99 94 39 51 61 46 52 40 57 U2_RF 80 73 72 66 67 85 49 71 60 50 38 33 U2_RF 3 24 1 Y1_RF 1 2 R23_RF 1 2 R24_RF 2528 28 262728 2528 25 23 2528 29 25 23 3 3 3 3 3 2
  • 30.
    IN IN IN IN ININ IN IN ININ IN IN IN IN IN IN IN IN IN IN IN BI BI IN OUT OUT OUT IN IN IN IN IN IN IN BI BI IN BI IN IN IN IN IN IN IN IN VDD_MDSP_SW GND VDD_A1 VDD_A1 GND GND VDD_A2 VDD_A2 VDD_ADSP VDD_CORE VDD_DDR VDD_MDSP_FW VDD_MEM VDD_P1 VDD_P3 VDD_PLL1 VDD_P7 VDD_P4 VDD_P5 VDD_P6 VDD_QFUSE_PRG VDD_USB_3P3 VDD_USB_1P8 VDD_HVPAD_BIAS VDD_P2 VDD_PLL2 PWR (5 OF 6) GND GND GND_ANA GND (6 OF 6) EBI2_AD_0 EBI2_AD_1 EBI2_AD_6 EBI2_AD_5 EBI2_AD_7 EBI1_CAL EBI2_CLE* EBI2_ALE* EBI2_AD_2 EBI2_AD_3 EBI2_AD_4 EBI2_NAND_CS* EBI2_BUSY* EBI2_OE* EBI2_WE* (2 OF 6) EBI1_EBI2 TCK RTCK MODE_1 MODE_0 CXO CXO_EN SDC1_DATA3 SDC1_DATA2 SDC1_CLK SDC1_DATA1 SDC1_DATA0 SDC1_CMD USB_HS_DM USB_HS_ID USB_HS_VBUS USB_HS_SYSCLK TDI HSIC_CAL USB_HS_REXT DNC TMS USB_HS_DP DNC TDO RESIN* TRST* RESOUT* HSIC_DATA HSIC_STB SRST* SLEEP_CLK SSBI_PMIC DIGITAL (1 OF 6) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT NC NC NC NC NC NC NC NC NCNC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC ID IS NC NC NC NC BASEBAND (1 OF 2) 20% 1.0UF X5R 6.3V 0201-1 6.3V X5R 1.0UF 20% 0201-1 20% 6.3V X5R 1.0UF 0201-1 X5R 20% 6.3V 1.0UF 0201-1 20% X5R 6.3V 1.0UF 0201-1 6.3V 20% 1.0UF X5R 0201-1 6.3V X5R 20% 1.0UF 0201-1 X5R 20% 6.3V 1.0UF 0201-1 20% X5R 6.3V 1.0UF 0201-1 1.0UF 6.3V X5R 20% 0201-1 X5R 6.3V 1.0UF 20% 0201-1 X5R 1.0UF 6.3V 20% 0201-1 1.0UF X5R 20% 6.3V 0201-1 X5R 20% 6.3V 1.0UF 0201-1 X5R 6.3V 1.0UF 20% 0201-1 20% X5R 6.3V 1.0UF 0201-1 6.3V X5R 20% 1.0UF 0201-1 6.3V 20% X5R 1.0UF 0201-1 1.0UF 20% 6.3V X5R 0201-1 20% 1.0UF X5R 6.3V 0201-1 1.0UF 20% X5R 6.3V 0201-1 1.0UF 20% 6.3V X5R 0201-1 1.0UF X5R 20% 6.3V 0201-1 20% 6.3V X5R 1.0UF 0201-1 20% 6.3V X5R 1.0UF 0201-1 0.1UF 01005 NOSTUFF X5R 4V 20% MF 1/32W 1% 240 01005 240 1% 01005 1/32W MF 6.3V 1.0UF 20% X5R 0201-1 470K 5% 1/32W MF 01005 200 1% 1/32W MF 01005 MDM9615M BGA MDM9615M BGA BGA MDM9615M MDM9615M BGA CELLULAR BASEBAND: (1 OF 2) BB_JTAG_TCK BB_JTAG_RTCLK 19P2M_MDM 90_BB_USB_D_N BB_USB_VBUS BB_JTAG_TDI 50_HSIC_CAL RREFEXT 90_BB_USB_D_P BB_JTAG_TDO PMIC_RESOUT_L BB_JTAG_TRST_L 50_HSIC_BB_DATA 50_HSIC_BB_STROBE DEBUG_RST_L SLEEP_CLK_32K PMIC_SSBI EBI1_CAL PP_LDO11_MDSP_FW_1V05 PP_LDO3_AMUX_1V8 PP_LDO13_VDDPX_2V95 VDDPX_BIAS PP_LDO4_VDDA_3V3 PP_LVS1 PP_LDO8_VDDPX_1V2 PP_SMPS3_MSME_1V8 PP_LDO6_RUIM_1V8 PP_SMPS3_MSME_1V8 PP_LDO9_PLL_1V05 PP_SMPS3_MSME_1V8 PP_LDO9_PLL_1V05 PP_LDO12_MDSP_SW_1V05 PP_SMPS3_MSME_1V8PP_SMPS1_MSMC_1V05 PP_LDO10_ADSP_1V05 PP_LDO7_DAC_1V8 19P2M_CLK_EN BB_JTAG_TMS PP_LDO2_XO_HS_1V8 PP_SMPS1_MSMC_1V05 PP_LDO10_ADSP_1V05 PP_SMPS3_MSME_1V8 PP_SMPS3_MSME_1V8 PP_SMPS1_MSMC_1V05 PP_SMPS3_MSME_1V8 PP_SMPS2_RF1_1V3 PP_LDO12_MDSP_SW_1V05 PP_LDO11_MDSP_FW_1V05PP_LDO9_PLL_1V05 051-9584 2.0.0 5 OF 23 28 OF 46 2628 2526282931 2526282931 2628 26282628 2526282931 2628 252628 2526282931 2628 2628 26 27 2527 25 23 25 23 25 23 25 23 2527 25 25 23 25 23 25 23 27 25 2523 2628 2627 2628 26 2526 26 2526282931 2523 2523 2527 2527 2 1 C15_RF 2 1 C18_RF 2 1 C20_RF 2 1 C23_RF 2 1 C26_RF 2 1 C16_RF 2 1 C24_RF 2 1 C19_RF 2 1 C21_RF 2 1 C27_RF 2 1 C30_RF 2 1 C34_RF 2 1 C35_RF 2 1 C14_RF 2 1 C17_RF 2 1 C22_RF 2 1 C25_RF 2 1 C28_RF 2 1 C29_RF 2 1 C68_RF 2 1 C70_RF 2 1 C69_RF 252628 26 2 1 C33_RF 2 1 C32_RF 2 1 C36_RF 2526 26 2526282931 2631 2 1 C31_RF 1 2 R9_RF 1 2 R10_RF 2526282931 252628 2 1 C71_RF 1 2 R6_RF 1 2 R7_RF F20 N17 N16 N15 T19 F13 J8 AA15 AA7 W9 AA11 AA18 U6 U7 C5 C6 E6 E7 F5 F12 F14 F8 F9 G12 G9 H12 H9 J12 J13 J9 K12 K13 K8 K9 L12 L13 L8 L9 M12 M13 M8 M9 N12 N13 N8 N9 P12 P9 R12 R9 T8 T9 AA20 B19 M20 T15 T16 T17 U14 U15 U16 U17 U19 N19 P15 P16 P17 P19 C17 C18 E17 F17 G13 G14 G7 G8 H13 H14 H7 H8 P13 P14 P7 P8 R13 R14 R7 R8 A14 A19 F21 M1 M21 A15 G1 G21 L1 U1 W19 K17 L17 A11 A2 A3 A7 B13 E10 E12 E16 K21 W12 U1_RF T11 T7 L16 K16 U2 V19 A21 AA1 L15 M15 M16 R16 R15 N14 P6 P11 F7 F6 U13 AA21 B11 B14 B15 B2 B7 C19 F10 F15 F16 F19 G10 G11 G15 G16 G17 G2 G20 G6 H10 H11 H15 H16 H6 J10 J11 J14 J15 J6 J7 K10 K11 K14 K15 K20 K6 K7 L10 L11 L14 L2 L6 L7 M10 M11 M14 M17 M19 M6 M7 N10 N11 N6 N7 P10 R10 R11 R17 R19 R6 T10 T12 T13 T14 F11 J16 T6 U12 U9 W14 W7 Y11 Y15 Y18 Y7 W13 U1_RF J20 J19 H21 H19 E21 C21 C20 E20 G19 H20 J21 D21 D19 E19 D20 U1_RF Y3 Y2 Y19 W20 V20 U21 N21 N20 L21 L20 L19 K19 E11 C12 C10 B12 AA2 A8 A12 E9 C9 B9 B10 A10 E8 C8 W4 C11 A9 AA3 Y20 AA4 U20 C7 B8 Y4 AA19 Y21 U1_RF
  • 31.
    IN IN OUT IN IN OUT OUT OUT OUT IN IN OUT OUT OUT OUT OUT OUT OUT BI OUT BI IN BI OUT OUT BI OUT OUT OUT OUT OUT OUT IN OUT IN IN IN OUT OUT OUT IN OUT OUT OUT OUT OUT OUT IN OUT OUT OUT OUT OUT IN OUT IN OUT ALIAS ALIAS IN IN OUT OUT GND VCC SI/SIO0 WP*/SIO2 SCLK CS* NC/SIO3 NC SO/SIO1 IN OUT BI IN OUT OUT OUT IN IN BBRX_QP_CH1 BBRX_QP_CH0 TX_DAC0_QP BBRX_IP_CH1 BBRX_IM_CH0 TX_DAC0_IREF DAC0_VREF GNSS_BB_QP GNSS_BB_IP BBRX_IP_CH0 GNSS_BB_QM GNSS_BB_IM BBRX_QM_CH1 BBRX_QM_CH0 TX_DAC0_IMBBRX_IM_CH1 TX_DAC1_IP TX_DAC1_IM DNC BBRX_QP_CH2 BBRX_QM_CH2 BBRX_IM_CH2 TX_DAC0_QM TX_DAC0_IP TX_DAC1_QM TX_DAC1_QP BBRX_IP_CH2 ANALOG (4 OF 6) (3OF 6) GPIO GPIO_9 GPIO_8 GPIO_20 GPIO_15 GPIO_23 GPIO_7 GPIO_2 GPIO_1 GPIO_85 GPIO_17 GPIO_24 GPIO_18 GPIO_22 GPIO_21 GPIO_5 GPIO_6 GPIO_3 GPIO_0 GPIO_84 GPIO_13 GPIO_12 GPIO_16 GPIO_19 GPIO_86 GPIO_87 GPIO_4 GPIO_80 GPIO_82 GPIO_83 GPIO_81 GPIO_11 GPIO_10 GPIO_14 GPIO_78 GPIO_79 GPIO_70 GPIO_77 GPIO_69 GPIO_71 GPIO_66 GPIO_67 GPIO_68 GPIO_64 GPIO_65 GPIO_62 GPIO_60 GPIO_63 GPIO_61 GPIO_56 GPIO_59 GPIO_58 GPIO_57 GPIO_53 GPIO_55 GPIO_49 GPIO_52 GPIO_54 GPIO_50 GPIO_51 GPIO_47 GPIO_46 GPIO_43 GPIO_48 GPIO_27 GPIO_25 GPIO_44 GPIO_42 GPIO_45 GPIO_41 GPIO_28 GPIO_26 GPIO_39 GPIO_38 GPIO_36 GPIO_40 GPIO_29 GPIO_30 GPIO_35 GPIO_37 GPIO_34 GPIO_31 GPIO_33 GPIO_32 GPIO_72 GPIO_75 GPIO_74 GPIO_73 GPIO_76 IN IN IN IN IN IN IN OUT IN OUT OUT BI OUT OUT OUT OUT OUT OUT OUT BI OUT OUT OUT OUT OUT Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST BASEBAND (2 OF 2) GSM_PA_HB_EN NC NC GRFC_27,SW GRFC_1,PA_ON GRFC_0,PA_ON NC, WTR_GP_DATA2 NC LAT_SW3_CTL NC, SECOND TRANSCEIVER RF_ON CONTROL GRFC_24,SW NC BOOT_CONFIG_0 NC GRFC_33 NC BOOT_CONFIG_2 BOOT_CONFIG_3 GRFC_25,SW BOOT_CONFIG_1 GRFC_14 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC GRFC_21 GRFC_10 NC NC GRFC_13 GRFC_26,SW GRFC_7,PA_ON GRFC_9,SW GRFC_4,PA_ON NC GRFC_39 GRFC_38 GRFC_37 GRFC_36 GRFC_35,SW BOOT_CONFIG_6 GRFC_28,SW GRFC_29,SW GRFC_30,SW GRFC_31 GRFC_3,PA_ON GRFC_15 GRFC_11 GRFC_8,PA_ON PA_R0 GRFC_5,PA_ON GRFC_6,PA_ON GRFC_2,PA_ON NC GRFC_22 GRFC_23 GRFC_34 GRFC_32 NC BOOT_CONFIG_4 BOOT_CONFIG_5 NC, ELNA CONTROL NC, APT_BYPASS GRFC_18,SW GRFC_19,SW GRFC_20 GSM_PA_LB_EN NC I2C_SDA I2C_SCL 0.1UF 4V X5R 20% 01005 X5R 20% 0.1UF 4V 01005 SERIAL-SPI-2MX8-1.8V WLCSP MX25U1635EBAI-10G 70-OHM-300MA 01005-1 MDM9615M BGA MDM9615M BGA01005 100K 1% 1/32W MF CELLULAR BASEBAND: (2 OF 2) OSCAR_CONTEXT_A AP_WAKE_MODEM PP_SMPS3_MSME_1V8 SIM_TRAY_DETECT PRX_BB_I_P PRX_BB_Q_P PRX_BB_Q_N PRX_BB_I_N WTR_GP_DATA0 GPH GPHWTR_GP_DATA1 PA_ON_B2_B3 PA_ON_B1_B4 WTR_RX_ON SPI_CS_L SPI_CLK BB_I2S_CLK BB_UART_TXD BB_I2S_TXD BB_SPI_TO_PAC_DATA_MOSI SIMCRD_CLK_CONN SIMCRD_RST_CONN PP_SYNC BB_I2S_MCLK BB_I2S_RXD BB_I2S_WS BB_SPI_TO_PAC_CS PAC_TO_BB_SPI_DATA_MISO SIMCRD_IO_CONN BB_UART_CTS_L BB_UART_RTS_L GPIO_DEBUG_LED HOST_WAKE_BB PM_USR_IRQ_L BB_SPI_TO_PAC_CLK AP_HSIC1_RDY RESET_DET_L PS_HOLD PM_MDM_IRQ_L SPI_DATA_MOSI SPI_DATA_MISO BB_UART_RXD OSCAR_CONTEXT_B PBL_RUN_BB_HSIC1_RDY WTR_SSBI_PRX_DRX WLAN_TX_BLANK BB_IPC_GPIO WTR_SSBI_TX_GPS LTE_COEX_TXD LTE_ACTIVE BB_HSIC1_REMOTE_WAKE BB_PDM LTE_COEX_RXD DCDC_EN DCDC_MODE LAT_SW2_CTL 2G_FEM_S3 2G_FEM_S2 2G_FEM_S4 2G_FEM_S0 TX_GTR_THRESH 2G_FEM_S5 2G_FEM_S1 GPIO_51 2G_FEM_S6 LAT_SW1_CTL BB_I2S2_RXD BB_I2S2_CLK PA_R1 WTR_RF_ON BB_I2S2_WS PA_BS PA_ON_B13_B17 PA_ON_B5_B8 PA_ON_B20 BB_ERROR_FLAG WTR_BB_TX_DAC_IREF VREF_DAC_BIAS PP_SPI_NOR_1V8PP_SMPS3_MSME_1V8 SPI_CLK SPI_CS_L SPI_DATA_MISO LTE_COEX_RXD LTE_COEX_TXDLTE_FRAME_SYNC LTE_WLAN_PRIORITY SPI_DATA_MOSI DRX_BB_I_P DRX_BB_I_N DRX_BB_Q_P TX_BB_I_P TX_BB_I_N TX_BB_Q_P TX_BB_Q_NDRX_BB_Q_N GPS_BB_I_P GPS_BB_I_N GPS_BB_Q_P GPS_BB_Q_N 051-9584 2.0.0 6 OF 23 29 OF 46 29 2 1 C61_RF 2523 25 23 25 23 25 23 25 23 29 2523 39 29 2 1 C62_RF 25 2530 27 27 39 2523 34 35 36 37 38 25 23 25 23 25 23 25 23 29 2530 2523 2523 2530 43 2325 43 2325 43 2325 27 30 2523 25 2523 46 30 2946 252946 46 39 30 2523 33 40 41 33 40 41 40 38 34 30 2530 36 34353738 37 35 30 2523 25 23 25 2946 30 252946 25 E3B2 E2 D3 D2 A4 B3 C2 F1 F4 C3 U6_RF 2526282931 43 2325 2523 2546 25 25 25 30 25 21 FL4_RF Y9 Y8 Y5 Y10 W8 W6 W5 W11 W10 U8 U11 U10 AA9 AA8 AA6AA10 Y14 AA14 Y17 V21 H17 AA17 AA16 AA12 W15 W16 W18 AA5 Y6 AA13 Y13 W21 Y12 Y16 J17 W17 U1_RF A13 A16 A17 A18 A20 A4 A5 A6 B1 B16 B17 B18 B20 B21 B3 B4 B5 B6 C1 C13 C14 C15 C16 C2 C3 C4 D1 D2 D3 E1 E13 E14 E15 E2 E3 F1 F2 F3 G3 G5 H1 H2 H3 H5 J1 J2 J3 J5 K1 K2 K3 K5 L3 L5 M2 M3 M5 N1 N2 N3 N5 P1 P2 P20 P21 P3 P5 R1 R2 R20 R21 R3 R5 T1 T2 T20 T21 T3 T5 U3 U5 V1 V2 V3 W1 W2 W3 Y1 U1_RF 1 2 R4_RF 2546 30 30 30 30 30 30 29 29 29 29 25 25 25 30 30 30 30 30 30 2540 2540 41 40 41 27 33 40 23568
  • 32.
    IN IN IN IN PRX_LB1_INP PRX_LB1_INM PRX_LB2_INM PRX_LB3_INP PRX_LB3_INM PRX_MB1_INP PRX_BB_IP PRX_BB_QP PRX_BB_IM DNC PRX_BB_QM PRX_HB_INM PRX_MB3_INM PRX_HB_INP PRX_MB3_INP PRX_MB2_INM PRX_MB2_INP PRX_MB1_INM PRX_LB2_INP SYM 3 OF5 PRX IN IN IN IN IN IN IN IN IN OUT OUT OUT OUT IN OUT OUT OUT OUT GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND SYM 5 OF 5 GND IN BI BI IN GP_DATA0 GP_DATA1 GP_DATA2 DNC DNC XO_IN SSBI_TX_GNSS SSBI_PRX_DRX RF_ON RX_ON RBIAS VTUNE_PRX PDET_IN DNC TX_HB TX_MB4 TX_MB3 TX_MB2 TX_MB1 TX_BB_IM TX_BB_IP TX_LB4 TX_LB2 TX_LB3 TX_LB1 GND DNC DAC_REF TX_BB_QM TX_BB_QP SYM 2 OF 5 TX OUT OUT IN OUT OUT IN IN IN IN IN IN IN IN IN DRX_LB1_INM DRX_LB1_INP GNSS_INM GNSS_INP DRX_HB_INM DRX_HB_INP DRX_MB_INM DRX_MB_INP DRX_LB2_INM DRX_LB2_INP DRX_BB_IM DRX_BB_IP DRX_BB_QM DRX_BB_QP GNSS_BB_QP GND GNSS_BB_QM GNSS_BB_IP GNSS_BB_IM DRX_GPS SYM 1 OF 5 OUT OUT OUT OUT OUT OUT OUT IN IN OUT IN IN IN IN IN IN IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST 7 DB ATTENUATOR FOR SELF CAL TRANSCEIVER PHASE CONTROL, TX RF & IQ PORTS NC TRANSCEIVER GROUND CONNECTIONS NC NC NC WTR_VTUNE PRX TRANSCEIVER RF AND IQ PORTS RF TRANSCEIVER (1 OF 4) DC-BLOCK NEEDED NC DRX TRANSCEIVER RF AND IQ PORTS NC WTR_GP_DATA2, NC 01005 NP0-C0G 5% 16V 100PF 5% 16V CERM NOSTUFF 10PF 01005 1/32W MF 01005 130 1% 5% NP0-C0G 16V 56PF 01005 SM WTR1605 SM WTR1605 SM WTR1605 WTR1605 SM 1/32W MF 1% 4.75K 01005 MF 1/32W 01005 130 1% MF 1/32W 01005 47 5% CELLULAR RF TRANSCEIVER: (1 OF 2) 50_XCVR_B1_TX 100_XCVR_B3_PRX_N 50_XCVR_B5_B18_TX PRX_BB_I_N100_XCVR_B13_B17_B20_PRX_N DRX_BB_I_P DRX_BB_Q_N PRX_BB_I_P DRX_BB_I_N DRX_BB_Q_P 100_XCVR_B8_B20_DRX_P GPS_BB_Q_N GPS_BB_Q_P GPS_BB_I_N GPS_BB_I_P PRX_BB_Q_P 100_XCVR_B8_B20_DRX_N 19P2M_WTR_IN19P2M_WTR 50_PDET_PAD_OUT 50_PDET_PAD_IN 100_XCVR_B2_B25_B3_DRX_P 100_XCVR_GPS_RX_P 100_XCVR_B1_B4_DRX_N 100_XCVR_B1_B4_DRX_P 100_XCVR_B2_B25_B3_DRX_N 100_XCVR_B5_B18_B13_B17_DRX_N 100_XCVR_B5_B18_B13_B17_DRX_P 100_XCVR_GPS_RX_N 100_XCVR_B8_PRX_N 100_XCVR_B8_PRX_P WTR_RF_ON WTR_SSBI_TX_GPS WTR_SSBI_PRX_DRX WTR_RBIAS 100_XCVR_B1_B4_PRX_P 100_XCVR_B2_B25_PRX_P 100_XCVR_B2_B25_PRX_N 100_XCVR_B3_PRX_P 100_XCVR_DCS_PCS_PRX_N 100_XCVR_DCS_PCS_PRX_P 100_XCVR_B5_B18_PRX_P 50_XCVR_2G_HB_TX 50_XCVR_B2_B25_TX 50_XCVR_B13_B17_B20_TX 50_XCVR_B8_TX 50_XCVR_2G_LB_TX WTR_RX_ON 50_XCVR_B3_B4_TX 50_PDET_IN 100_XCVR_B13_B17_B20_PRX_P 100_XCVR_B5_B18_PRX_N 100_XCVR_B1_B4_PRX_N PRX_BB_Q_N WTR_BB_TX_DAC_IREF TX_BB_I_N TX_BB_Q_P TX_BB_Q_N TX_BB_I_P GPHWTR_GP_DATA1 GPHWTR_GP_DATA0 051-9584 2.0.0 7 OF 23 30 OF 46 41 33 33 27 1 2 C128_RF 2 1 C182_RF 1 2 R30_RF 1 2 C248_RF 78 69 54 48 43 36 84 91 92 86 82 15 16 7 8 17 23 30 61 U3_RF 32 32 32 41 32 32 32 32 32 29 29 29 29 41 29 29 29 29 21 20 33 75 9 49 32 19 113 128 104 107 135 106 137 122 94 115 102 129 99 110 123 125 124 52 39 68 47 77 46 142 35 81 64 34 73 59 74 58 41 38 6 27 29 22 U3_RF 41 2529 2529 2529 105 121 88 114 96 120 89 80 100 45 60 79 101 93 103 95 112 119 126 138 130 133 132 141 140 134 90 109 139 131 U3_RF 29 29 41 29 29 2529 29 41 29 29 29 29 29 29 14 5 18 10 11 2 12 3 13 4 72 63 57 50 70 1 71 56 62 U3_RF 32 32 40 32 33 40 33 33 33 33 1 2 R27_RF 1 2 R28_RF 1 2 R29_RF 40 41 41 41 41 32 32
  • 33.
    ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS VDD_RF1_P_FELO VDD_RF1_P_FELO VDD_RF1_D_LBLO VDD_RF1_D_FE VDD_RF2_P_BB VDD_DIO VDD_RF1_T_SYN VDD_RF2_T_VCO VDD_RF2_XO VDD_RF1_T_LO VDD_RF2_T_BB VDD_RF1_T_DA VDD_RF1_T_UPC VDD_RF2_T_DA VDD_RF2_D_BB VDD_RF1_S_PLL VDD_RF1_S_VCO VDD_RF1_P_VCO VDD_RF1_P_PLL VDD_RF2_S_VCO VDD_RF2_P_VCO VDD_RF1_G_BB VDD_RF1_G_PLL VDD_RF1_G_VCO VDD_RF1_G_LNA VDD_RF2_T_PLL VDD_RF1_D_MBLO VDD_RF1_JDET SRM 4 OF5 PWR Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST PLACE NEAR U3.65 RF2_2V05STAR ROUTING PLACE NEAR U3.76 PLACE NEAR U3.66 RF1_1V8 STAR ROUTING PLACE NEAR U3.87 STAR ROUTING PLACE NEAR U3.37 AND U3.55 PLACE NEAR U3.25 AND U3.28 STAR ROUTING PLACE NEAR U3.53 AND U3.26 PLACE NEAR U3.42 STAR ROUTING PLACE NEAR U3.98 PLACE NEAR U3.118 TRANSCEIVER POWER CONNECTIONS PLACE NEAR U3.111 PLACE NEAR U3.67 PLACE NEAR U3.51 STAR ROUTING STAR ROUTING PLACE NEAR U3.127 PLACE NEAR U3.136 STAR ROUTING STAR ROUTING STAR ROUTINGSTAR ROUTING RF1_1V3 STAR ROUTING PLACE NEAR U3.117 PLACE NEAR U3.116 RF TRANSCEIVER (2 OF 2) PLACE NEAR U3.40 PLACE NEAR U3.24 AND U3.31 RF1_1V3 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM NOSTUFF 01005 0.1UF 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 0.1UF 01005 16V 5% 01005 NP0-C0G 100PF 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 01005 0.1UF 20% 10UF 6.3V 0402 CERM 20% 1.0UF 0201-1 6.3V X5R 20% 10UF 6.3V 0402 CERM 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 6.3V X5R-CERM 01005 0.1UF 20% 6.3V X5R-CERM 0.1UF 01005 100PF 16V 5% 01005 NP0-C0G MF 1/20W 201 5% 0 5% 0 201 1/20W MF SM WTR1605 CELLULAR RF TRANSCEIVER: (2 OF 2) PP_RF1_1V8_DIGPP_SMPS3_MSME_1V8 PP_SMPS4_RF2_2V05PP_SMPS2_RF1_1V3 PP_RF2_2V05_TX_PLL PP_RF1_1V3_GPS_LNA PP_RF1_1V3_GPS_VCO PP_RF1_1V3_GPS_PLL PP_RF1_1V3_GPS_DIG PP_RF2_2V05_PRX_VCO PP_RF2_2V05_SHDR_VCO PP_RF1_1V3_PRX_PLL PP_RF1_1V3_PRX_VCO PP_RF1_1V3_SHDR_VCO PP_RF1_1V3_SHDR_PLL PP_RF2_2V05_DRX_BB PP_RF2_2V05_TX_DA PP_RF1_1V3_TX_UPCONVERTER PP_RF1_1V3_TX_DA PP_RF2_2V05_TX_BB PP_RF1_1V3_TX_LO PP_RF2_2V05_XO_FILT PP_RF2_2V05_TX_VCO PP_RF1_1V3_TX_SYNTH PP_RF1_1V8_DIG PP_RF1_1V3_PRX_FELO1 PP_RF1_1V3_PRX_FELO2 PP_RF1_1V3_DRX_FE PP_RF1_1V3_JAM_DET PP_RF2_2V05_PRX_BB PP_RF1_1V3_DRX_LBLO PP_RF1_1V3_DRX_MBLO PP_RF2_2V05_XO_FILT PP_RF2_2V05_TX_PLL PP_RF2_2V05_TX_VCO PP_RF2_2V05_SHDR_VCO PP_RF2_2V05_PRX_VCO PP_RF2_2V05_TX_BB PP_RF2_2V05_PRX_BB PP_RF2_2V05_TX_DA PP_RF2_2V05_DRX_BBPP_SMPS4_RF2_2V05_FILTPP_RF1_1V3_GPS_LNA PP_RF1_1V3_GPS_DIG PP_RF1_1V3_GPS_PLL PP_SMPS2_RF1_1V3_FILTPP_RF1_1V3_PRX_PLL PP_RF1_1V3_SHDR_PLL PP_RF1_1V3_PRX_VCO PP_RF1_1V3_SHDR_VCO PP_RF1_1V3_TX_DA PP_RF1_1V3_TX_LO PP_RF1_1V3_TX_UPCONVERTER PP_RF1_1V3_PRX_FELO1 PP_RF1_1V3_DRX_FE PP_RF1_1V3_PRX_FELO2 PP_RF1_1V3_DRX_LBLO PP_RF1_1V3_DRX_MBLO PP_RF1_1V3_JAM_DET PP_SMPS2_RF1_1V3_FILT PP_RF1_1V3_TX_SYNTH PP_RF1_1V3_GPS_VCO 051-9584 2.0.0 8 OF 23 31 OF 46 2 1 C73_RF 2 1 C74_RF 2 1 C75_RF 2 1 C76_RF 2 1 C77_RF 2 1 C78_RF 2 1 C79_RF 2 1 C80_RF 2 1 C81_RF 2 1 C82_RF 2 1 C83_RF 2 1 C85_RF 2 1 C86_RF 2 1 C88_RF 2 1 C87_RF 2 1 C72_RF 2 1 C89_RF 2 1 C90_RF 2 1 C91_RF 2 1 C92_RF 2 1 C244_RF 1 2 R53_RF 1 2 R19_RF 53 42 28 26 83 87 98 136 127 116 108 118 117 111 44 65 40 76 66 51 67 31 55 37 24 97 25 85 U3_RF 8 2356 335 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 88 8 8 88 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
  • 34.
    OUT OUT OUT IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUTIN OUTIN OUTIN OUT CONFIDENTIAL AND PROPRIETARYAPPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT RX MATCHING NETWORKS TRANSCEIVER TX AND RX MATCHING TX MATCHING NETWORKS 8.2NH-5%-0.34A-0.27OHM 0201DS 01005 5% 16V NP0-C0G 27PF 0201DS 6.7NH-5%-0.46A-0.15OHM 0.6PF 01005 NP0-C0G +/-0.1PF 16V 1.2PF NP0-C0G 16V +/-0.1PF 01005 01005 27PF 5% 16V NP0-C0G 0201 18NH+/-3%-0.2A-0.8OHM 0201 22NH-150MA 10NH-3%-250MA 0201 0201 10NH-3%-250MA 0201 3.1NH+/-0.1NH-0.45A-025OHM 0.6NH+/-0.1NH-0.85A 0201 0.7PF NP0-C0G 16V 01005 +/-0.1PF 0.00 01005 0% MF 1/32W 0.00 0% 1/32W MF 01005 MF 1/32W 0% 0.00 01005 0.6NH+/-0.1NH-0.85A 0201 0201 10NH-3%-250MA 0201 10NH-3%-250MA 0201 5.1NH-3%-0.35A 1.1PF +/-0.1PF 01005 NP0-C0G 16V 5.1NH-3%-0.35A 0201 CELLULAR FRONT END: TX AND RX MATCHING 50_B2_RX_BALUN 50_B2_DUPLX_RX 100_XCVR_B2_B25_PRX_P 100_B8_DUPLX_RX_N 100_XCVR_B8_PRX_N 100_B8_DUPLX_RX_P 100_XCVR_B8_PRX_P 100_B5_B18_DUPLX_RX_P 100_XCVR_B5_B18_PRX_P 100_XCVR_B5_B18_PRX_N 100_XCVR_B1_B4_PRX_P 100_XCVR_B1_B4_PRX_N 50_B1_TX_SAW_IN 50_B2_B25_TX_SAW_IN 50_B3_B4_TX_SAW_IN50_XCVR_B3_B4_TX 50_XCVR_B1_TX 50_XCVR_B2_B25_TX 100_XCVR_B2_B25_PRX_N 50_B3_RX_BALUN 50_B3_DUPLX_RX 100_XCVR_B3_PRX_N 100_XCVR_B3_PRX_P 100_B1_B4_DUPLX_RX_P 100_B1_B4_DUPLX_RX_N 100_B5_B18_DUPLX_RX_N 051-9584 2.0.0 9 OF 23 32 OF 46 1 2 L36_RF 1 2 C186_RF 1 2 L38_RF 1 2 C185_RF 2 1 C184_RF 1 2 C188_RF 30 30 30 37 1 2 L46_RF 35 37 37 37 34 34 1 2 L45_RF L51_RF 35 L49_RF 1 2 L44_RF L47_RF 30 30 30 30 30 30 1 2 C187_RF 331 2 R46_RF 30 331 2 R47_RF 30 331 2 R48_RF 30 30 21 L48_RF 21 L50_RF 21 L52_RF 2 1 L37_RF 2 1 C183_RF 2 1 L39_RF
  • 35.
    IN IN IN B13_17_20_RXOUT1 B13_17_20_RXOUT0 B17_RXIN V1 BAND4TXOUT B3TXOUT B25TXOUT BAND1TXOUT V3 THRM B1TXIN B3/4_TXIN B13_RXIN B13_RXIN B20_RXIN B20_RXIN B17_RXIN GND VDD V2 B25_TXIN PAD IN IN IN B13/17/20_TX_IN GND B13_TX_OUT B5/18/BC10_TX_OUT B8_TX_IN B20_TX_OUT B17_TX_OUT B8_TX_OUT B5/18/BC10_TX_IN IN IN OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN OUT OUT OUT OUT OUT IN UNBAL_PORT_1960MHZ UNBAL_PORT_1842.5MHZ BAL_PORT_1842.5MHZ/1960MHZ BAL_PORT_1842.5MHZ/1960MHZ GND IN OUT OUT IN IN CONFIDENTIAL ANDPROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT B13/B17/B20 DP6T SWITCH AND MATCHING BAND S6 S3 S2 B17 RX X HIGH LOW B3 TX HIGH X X B4 TX LOW X X HB TX SAW BANK + B13 RX X HIGH HIGH SAW BANKS B20 RX X LOW HIGH LB TX SAW BANK DCS/PCS 2-IN-1 RX FILTER HFQSMXXFA LGA 2.5NH+/-0.1NH-500MA 0201 1.3PF C0G-CERM 25V +/-0.05PF 0201 2.5NH+/-0.1NH-500MA 0201 1.4PF 0201 +/-0.05PF 25V C0G-CERM LMTPFJGA-E50 LGA 4.3NH-3%-0.35A 0201 1.1NH+/-0.1NH 0201 1.1NH+/-0.1NH 0201 FILTER SAWFD1G84BU0F57 LGA-1 CELLULAR FRONT END: SAW BANKS 100_XCVR_DCS_PCS_PRX_P 50_PCS_RX 50_DCS_RX_MATCH 100_B17_DUPLX_RX_P 2G_FEM_S2 2G_FEM_S6 50_B1_TX_SAW_IN 50_B3_B4_TX_SAW_IN 100_B13_DUPLX_RX_N 100_B13_DUPLX_RX_P 100_B20_DUPLX_RX_N 100_B20_DUPLX_RX_P 100_B17_DUPLX_RX_N PP_LDO14_2V65 2G_FEM_S3 50_B2_B25_TX_SAW_IN 50_B4_TX_SAW_OUT 50_B1_TX_SAW_OUT 100_XCVR_B13_B17_B20_PRX_P 100_XCVR_B13_B17_B20_PRX_N 50_B3_TX_SAW_OUT 50_B2_TX_SAW_OUT 50_XCVR_B5_B18_TX 50_B8_TX_SAW_OUT 50_B17_TX_SAW_OUT 50_B20_TX_SAW_OUT 50_XCVR_B8_TX 50_B5_TX_SAW_OUT 50_B13_TX_SAW_OUT50_XCVR_B13_B17_B20_TX 50_DCS_RX 100_DCS_PCS_RX_FILTER_N 100_XCVR_DCS_PCS_PRX_N 100_DCS_PCS_RX_FILTER_P 50_PCS_RX_MATCH 051-9584 2.0.0 10 OF 23 33 OF 46 38 38 38 2 1 17 7 13 12 11 14 9 22 21 3 4 15 16 20 19 18 10 6 8 23 5 U9_RF 40 40 38 21 L64_RF 2 1 C245_RF 21 L65_RF 2 1 C246_RF 3 13 12 6 4 5 9 11 2 7 8 10 1 FL2_RF 1 2 L53_RF 21 L54_RF 21 L55_RF 36 36 34 35 35 34 30 30 43 2325264041 2940 294041 30 30 30 37 37 38 38 36 294041 1 4 6 9 10 8 7 5 3 2 FL6_RF 32 30 30 32 32
  • 36.
    IN OUT OUT IN IN IN IN BI IN IN ANT_B1_B4 CPL_OUT THRM_PADGND RX_N_B1_B4 RX_P_B1_B4 RFIN_B4 RFIN_B1 VBATT VCC VEN_B1_B4 CPL_IN BS VMODE Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST BAND 1/4 PAT STANDBY X X 0 X B1 LPM 1 1 1 B1 HPM 1 1 0 B4 LPM 0 1 1 B4 HPM 0 1 0 POWER DOWN X 0 0 0 ============================================================ BAND PA POWER MODE PA_BS PA_ON_B1_B4 PA_R1 NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G NP0-C0G 25V 5% 27PF 201 NOSTUFF 16V 5% 56PF 01005 NP0-C0G 01005 5% 16V NP0-C0G 56PF 01005 20% 0.1UF 6.3V X5R-CERM 01005 10% X5R-CERM 6.3V 1000PF 20% 6.3V 1.0UF X5R 0201-1 5% 25V 201 NP0-C0G 27PF NOSTUFF LGA TRIPLEXER-BAND1-4 5% 01005 16V NP0-C0G 56PF 01005 56PF 5% 16V NP0-C0G 56PF 5% 16V 01005 NP0-C0G 25V +/-0.05PF 0201 COG-CERM 0.5PF 0201 1.2NH+/-0.1NH-0.75A NOSTUFF 01005 1.2PF 16V NP0-C0G +/-0.1PF NOSTUFF 01005 16V NP0-C0G +/-0.1PF 1.2PF CELLULAR FRONT END: BAND 1/4 PAT 50_B1_B4_DPLX_ANT 50_B1_TX_SAW_OUT 50_B1_TX_PAD_IN 50_B1_B4_ANT 100_B1_B4_DUPLX_RX_N 50_B4_TX_SAW_OUT 50_B4_TX_PAD_IN PA_BS PP_BATT_VCC_CONN PA_R1 100_B1_B4_DUPLX_RX_P PA_ON_B1_B4 PP_PA 051-9584 2.0.0 11 OF 23 34 OF 46 33 32 32 33 2935 36 37 38 29 2935 37 38 2 1 C163_RF 40 2 1 C167_RF1 2 C192_RF 1 2 C191_RF 40 2325263536373839 353637383940 2 1 C164_RF 2 1 C208_RF 2 1 C165_RF 2 1 C209_RF 16 20 33 32 31 35 34 36 38 37 41 39 40 42 19 18 1 2 6 5 3 10 7 11 12 13 14 15 17 23 8 21 9 26 28 29 22 24 27 4 25 30 U14_RF 2 1 C236_RF 2 1 C237_RF 2 1 C238_RF 2 1 C249_RF 21 L70_RF 2 1 C258_RF 2 1 C162_RF
  • 37.
    BI BI IN IN IN IN IN IN IN OUT OUT VEN_B2_B3 CPL_OUT THRM_PADGNDGND RX_B2 GND RX_B3 RFIN_B2 RFIN_B3 VBATT VCC CPL_IN BS ANT_B2 ANT_B3 VMODE CONFIDENTIAL AND PROPRIETARYAPPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BAND 2/3 PAD STANDBY X X 0 X POWER DOWN X 0 0 0 ============================================================ B3 HPM 0 1 0 B3 LPM 0 1 1 B2 HPM 1 1 0 B2 LPM 1 1 1 BAND PA POWER MODE PA_BS PA_ON_B2_B3 PA_R1 NC NC X5R 6.3V 1.0UF 20% 0201-1 6.3V 0.1UF X5R-CERM 20% 01005 1.2PF 01005 NOSTUFF NP0-C0G 16V +/-0.1PF NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G NP0-C0G 25V 5% 27PF 0201 NOSTUFF NOSTUFF 27PF 5% 25V NP0-C0G 201 NP0-C0G 16V 5% 01005 56PF 01005 5% 16V NP0-C0G 56PF 201 NP0-C0G 25V 5% 27PF NOSTUFF 01005 10% 1000PF X5R-CERM 6.3V DUPLEXER-BAND2-3 LGA 0201 1.1PF +/-0.1PF 25V CERM C0G-CERM +/-0.05PF 0.9PF 0201 25V 1.3NH+/-0.1NH-600MA 0201 NOSTUFF 01005 +/-0.1PF 16V NP0-C0G 1.2PF 2.4NH+/-0.1NH-0.50A 0201 CELLULAR FRONT END: BAND 2/3 PAD PA_ON_B2_B3 50_B2_DUPLX_RX 50_B3_DUPLX_RX PA_BS PA_R1 50_B2_ANT 50_B2_TX_SAW_OUT 50_B2_TX_PAD_IN 50_B3_TX_PAD_IN 50_B3_TX_SAW_OUT PP_BATT_VCC_CONN 50_B3_DPLX_ANT 50_B3_ANT 50_B2_DPLX_ANT PP_PA 051-9584 2.0.0 12 OF 23 35 OF 46 40 40 2934 36 37 38 2934 37 38 29 2 1 C149_RF 343637383940 2 1 C148_RF 40 2325263436373839 2 1 C146_RF 2 1 C147_RF 33 33 32 32 2 1 C152_RF 2 1 C153_RF 1 2 C194_RF 1 2 C193_RF 2 1 C211_RF 2 1 C210_RF 30 20 33 32 31 35 34 36 38 37 41 39 40 42 27 23 1 3 7 6 5 12 9 15 17 18 19 21 22 10 11 14 13 28 26 25 2 4 29 8 16 24 U23_RF 2 1 C250_RF 2 1 C251_RF 21 L72_RF 2 1 C259_RF 21 L71_RF
  • 38.
    IN IN OUT IN IN IN BI OUT CPL_OUT CPL_IN THRM_PADGND VBATT VCC VMODE GND RFIN_B20 RFIN_B7 RX_P_B20 RX_N_B20 RX_B7 BS ANT_B7 VEN_B20_B7 ANT_B20 CONFIDENTIAL AND PROPRIETARYAPPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BAND 20 PAD STANDBY X 0 X BAND PA POWER MODE PA_ON_B20 PA_R1 PP_PA BULK BYPASSING SHARED WITH B1/4 PAT NC NC POWER DOWN LPM 0 0 B20 HPM 1 0 B20 LPM 1 1 ===================================================== 20% 6.3V 01005 X5R-CERM 0.1UF NOSTUFF C0G-CERM 0201 +/-0.05PF 3.6PF 25V 5% 01005 NP0-C0G 56PF 16V LGA DUPLEXER-BAND7-20 5% 27PF 201 25V NP0-C0G NOSTUFF 16V +/-0.1PF 1.2PF 01005 NOSTUFF NP0-C0G 01005 6.3V X5R-CERM 1000PF 10% 01005 56PF NP0-C0G 16V 5% 01005 56PF 5% NP0-C0G 16V 6.2NH-0.30A 0201 NP0-C0G 25V 201 +/-0.1PF 2.4PF 01005 NOSTUFF NP0-C0G 16V +/-0.1PF 1.2PF CELLULAR FRONT END: BAND 20 PAD 50_B20_DPLX_ANT 50_B20_ANT PA_ON_B20 PP_BATT_VCC_CONN PP_PA 100_B20_DUPLX_RX_P 100_B20_DUPLX_RX_N PA_R1 50_B20_TX_SAW_OUT 50_B20_TX_PAD_IN 051-9584 2.0.0 13 OF 23 36 OF 46 40 2325263435373839 343537383940 2 1 C156_RF 33 33 2934 35 37 38 29 40 33 2 1 C160_RF 1 2 C195_RF 20 4 33 32 31 35 34 36 38 37 41 39 40 42 27 23 1 3 7 6 5 14 9 15 17 18 19 21 22 25 2 24 10 26 28 12 13 11 29 8 30 16 U207_RF 2 1 C234_RF 2 1 C154_RF 2 1 C233_RF 2 1 C239_RF 2 1 C240_RF 21 L73_RF 2 1 C39_RF 2 1 C84_RF
  • 39.
    IN OUT OUT OUT OUT IN IN IN IN BI BI IN IN ANT_B5 RFIN_B8 BS VEN_B5_B8 CPL_OUT CPL_IN THRM_PADGND VBATT VCC VMODE ANT_B8 RX_P_B5 RX_N_B5 RX_P_B8 RX_N_B8 RFIN_B5 Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST NC NC STANDBY X X 0 X POWER DOWN X 0 0 0 ============================================================ B5 HPM 0 1 0 B5 LPM 0 1 1 B8 HPM 1 1 0 B8 LPM 1 1 1 BAND PA POWER MODE PA_BS PA_ON_B5_B8 PA_R1 BAND 5/8 PAD NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G NOSTUFF 0201 27PF 5% 25V NP0-C0G 201 27PF 5% 25V NOSTUFF NP0-C0G 6.3V 0.1UF X5R-CERM 20% 01005 1.2PF NOSTUFF 01005 +/-0.1PF 16V NP0-C0G 01005 10% 1000PF X5R-CERM 6.3V 1.0UF 20% 6.3V X5R 0201-1 201 NP0-C0G 25V 5% 27PF NOSTUFF NP0-C0G 16V 5% 01005 56PF 01005 5% 16V NP0-C0G 56PF 56PF 01005 5% 16V NP0-C0G DUPLEXER-BAND5-8 LGA 25V 0201 C0G-CERM 4.8PF +/-0.05PF 6.2NH-0.30A 0201 0201 25V C0G-CERM 1.9PF +/-0.05PF 01005 +/-0.1PF 16V NP0-C0G 0.7PF 01005 +/-0.1PF NP0-C0G 16V 0.7PF 01005 2.7NH+/-0.1NH-200MA 2.2NH+/-0.1NH-200MA 01005 4.3NH-3%-0.35A 0201 CELLULAR FRONT END: BAND 5/8 PAD 100_B5_B18_DUPLX_RX_P PP_BATT_VCC_CONN 50_B5_TX_PAD_IN 50_B8_TX_SAW_OUT 50_B8_TX_PAD_IN 50_B5_TX_SAW_OUT 50_B5_DPLX_ANT PA_ON_B5_B8 PA_R1 100_B5_B18_DUPLX_RX_N 100_B8_DUPLX_RX_P 100_B8_DUPLX_RX_N 50_B5_ANT PA_BS 50_B8_DPLX_ANT 50_B8_ANT PP_PA 051-9584 2.0.0 14 OF 23 37 OF 46 33 32 32 32 32 33 2934 35 36 38 2934 35 38 29 40 40 2 1 C117_RF 2 1 C123_RF 2 1 C122_RF 40 2325263435363839 343536383940 2 1 C118_RF 2 1 C116_RF 2 1 C212_RF 2 1 C119_RF 2 1 C213_RF 2 1 C214_RF 2 1 C215_RF 2 1 C216_RF 16 28 25 24 20 4 33 32 31 35 34 36 38 37 41 39 40 42 27 23 1 3 7 6 5 12 9 15 17 18 19 21 22 29 2 30 8 13 14 11 10 26 U58_RF 2 1 C252_RF 21 L74_RF 2 1 C253_RF 2 1 C256_RF 2 1 C257_RF 21 L7_RF 21 L10_RF 21 L75_RF
  • 40.
    IN IN IN OUT OUT OUT IN IN IN BI BI OUT VEN_B13_B17 BS RX_P_B17 RX_P_B13 RX_N_B17 RX_N_B13 VMODE VCC VBATT RFIN_B13 RFIN_B17 GND THRM_PAD CPL_IN CPL_OUT ANT_B17 ANT_B13 IN INPUT OUTPUT GND AppleInc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST BAND 13/17 PAD ============================================================ POWER DOWN X 0 0 0 STANDBY X X 0 X B17 HPM 0 1 0 B17 LPM 0 1 1 B13 HPM 1 1 0 B13 LPM 1 1 1 BAND PA POWER MODE PA_BS PA_ON_B13_B17 PA_R1 01005 6.3V 20% X5R-CERM 0.1UF 20% 1.0UF X5R 6.3V 0201-1 NOSTUFF NP0-C0G 25V 5% 27PF 0201 NP0-C0G 16V 5% 56PF 01005 01005 56PF 5% 16V NP0-C0G 6.3V X5R-CERM 1000PF 10% 01005 LGA DUPLEXER-BAND13-17 NOSTUFF 201 27PF 5% 25V NP0-C0G NP0-C0G 16V 5% 56PF 01005 NOSTUFF NOSTUFF 0201 C0G-CERM 25V +/-0.05PF 2.2PF 2.2PF 01005-1 NP0-C0G 16V +/-0.1PF 6.8NH-3%-140MA 01005 NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G NOSTUFF 01005 1.2PF +/-0.1PF 16V NP0-C0G BAND13-50OHMLFL0Q766MTM1D497 0201 18PF C0H-CERM 25V 2% CELLULAR FRONT END: BAND 13/17 PAD 50_B13_LPF_IN50_B13_DPLX_ANT 50_B13_ANT 50_B17_TX_SAW_OUT 50_B17_TX_PAD_IN 50_B13_TX_SAW_OUT 50_B13_TX_PAD_IN 100_B17_DUPLX_RX_P 100_B13_DUPLX_RX_P 100_B17_DUPLX_RX_N 100_B13_DUPLX_RX_N PP_BATT_VCC_CONN PA_ON_B13_B17 PA_BS PA_R1 50_B17_DPLX_ANT 50_B17_ANT PP_PA 051-9584 2.0.0 15 OF 23 38 OF 46 33 40 2325263435363739 343536373940 2 1 C110_RF 33 33 33 2 1 C111_RF 2934 35 36 37 2934 35 37 29 40 40 33 2 1 C114_RF 1 2 C198_RF 1 2 C199_RF 2 1 C217_RF 30 29 11 13 10 14 24 22 25 26 28 21 19 18 17 15 12 7 9 3 5 6 2 1 23 27 42 40 39 41 37 38 36 34 35 31 32 33 4 20 8 16 U1317_RF 2 1 C235_RF 2 1 C115_RF 2 1 C113_RF 2 1 C254_RF 21 L77_RF 2 1 C108_RF 2 1 C109_RF 33 2 1 3 4 FL3_RF 1 2 L76_RF
  • 41.
    IN PGND AGND EN IN2 IN1 OUT LX REFIN MODE IN IN OUT IN Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST PLACE C41 CLOSE TO L21 PA DC/DC CONVERTER PLACE NEAR U11.A2PLACE NEAR U1.H3 MAX77100 WLP SHORT-10L-0.25MM-SM NOSTUFF 0.01UF X5R 10% 01005 6.3V CERM 0402 6.3V 10UF 20% 1.0UF X5R 6.3V 20% 0201-1 402 X5R 4.7UF 6.3V 20% 10% 4700PF 01005 X5R 6.3V 1.00K 01005 MF 1/32W 1% 1.00K 01005 MF 1/32W 1% 01005 6800PF 10% X5R 6.3V 1000PF 01005 10% X5R-CERM 6.3V X5R 01005 0.01UF 10% 6.3V16V 56PF NP0-C0G 5% 01005 NOSTUFF SHORT-10L-0.25MM-SM SHORT-10L-0.25MM-SM 2.2UH-20%-1.5A-0.160OHM MAKK2016-SM CELLULAR FRONT END: PA DCDC CONVERTER DCDC_PGND PP_PADCDC_OUT PP_BATT_VCC_CONN DCDC_EN DCDC_PGND DCDC_ADJ DCDC_PGND DCDC_MODE BB_PDM BB_PDM_FILT PP_BATT_VCC_PA_DCDC DCDC_PGND 051-9584 2.0.0 16 OF 23 39 OF 46 29 A3 A1 B1 C2 B2 C3 B3 A2 C1 U11_RF 21 XW6_RF 29 40 2325263435363738 2 1 C1214_RF 2 1 C1201_RF 2 1 C1215_RF 2 1 C41_RF 34 35 36 37 38 40 2 1 C145_RF 1 2 R34_RF 1 2 R33_RF 2 1 C144_RF 29 2 1 C168_RF 2 1 C169_RF 2 1 C189_RF 21 XW8_RF 21 XW47_RF 21 L21_RF 16 16 16 16
  • 42.
    IN MAIN OUT TERMINATECOUPLEOUT GND OUT IN MAIN OUT TERMINATECOUPLE OUT GND IN OUT IN IN IN IN IN IN IN IN IN BI BI BI BI BI BI BI BI OUT BI BI BI BI IN IN HBRF_IN LBRF_IN ANT2 ANT1 T2 T1 THRM_PADGND TRX10 TRX9 TRX8 TRX7 TRX6 TRX5 TRX4 TRX3 TRX2 TRX1 VDD_SWITCH VCC VBATT S0 S1 S2 S4 S3 S6 S5 IN Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST SEE PGS. 21-22 FOR 2G FEM LOGIC TABLE 2G FEM . 6.3V X5R 10% 0.01UF 01005 20% 6.3V X5R-CERM 0.1UF 01005 20% 10UF 6.3V 0402 CERM 6.3V 01005 0.01UF 10% X5R MF 1/32W 0% 01005 0.00 01005 0.00 0% 1/32W MF 0201 15NH-250MA NOSTUFF 0201 15NH-250MA NOSTUFF 01005 MF 1/32W 1% 49.9 0805-6SM FIL-COUPLER+LPF-BROADBAND LDJ21832M22HB042 LDJ21832M22HC033 0805-6SM FIL-COUPLER+LPF-BROADBAND 0201 2.4NH+/-0.1NH-0.50A 20% 6.3V X5R-CERM 01005 0.1UF NP0-C0G 16V 01005 5% 56PF 01005-1 70-OHM-300MA +/-0.1PF 1.5PF 16V NP0-C0G 01005 NOSTUFF NOSTUFF NP0-C0G 16V +/-0.1PF 1.5PF 01005 20% 6.3V X5R-CERM 01005 0.1UF 56PF NP0-C0G 01005 5% 16V 01005 56PF 16V 5% NP0-C0G 5% 16V NP0-C0G 01005 56PF 0.4PF C0G +/-0.05PF 25V 201 FEM-2G-TX LGA 16V 5% 01005 NP0-C0G 56PF 56PF NP0-C0G 01005 5% 16V 56PF NP0-C0G 01005 5% 16V 01005 5% 56PF NP0-C0G 16V NP0-C0G 5% 16V 56PF 01005 NP0-C0G 01005 5% 16V 56PF 56PF 5% 01005 16V NP0-C0G CELLULAR FRONT END: 2G FEM PP_LDO14_2V65 PP_PA PP_BATT_VCC_2G_FEM 50_2G_HB_PA_IN 50_B2_ANT 50_DCS_RX 50_PCS_RX 50_2G_LB_PA_IN 50_XCVR_2G_LB_TX_MATCH PP_BATT_VCC_CONN 2G_FEM_S1 2G_FEM_S0 50_LAT_TEST 50_UAT_TEST 50_UAT_ASM 50_LAT_ASM 50_PDET_PAD_IN 50_B3_ANT 50_LAT_COUPLER_IN 2G_FEM_S6 2G_FEM_S4 2G_FEM_S3 2G_FEM_S2 2G_FEM_S5 50_B20_ANT 50_B17_ANT 50_DRX_ANT 50_B13_ANT 50_XCVR_2G_HB_TX_MATCH50_XCVR_2G_HB_TX 50_XCVR_2G_LB_TX 50_B1_B4_ANT 50_B8_ANT 50_COUPLER_TERM 50_LAT_COUPLER_IN 50_UAT_LPF 50_B5_ANT 051-9584 2.0.0 17 OF 23 40 OF 46 2 1 C243_RF 2 1 C190_RF 2 1 C66_RF 2 1 C242_RF 1 2 R55_RF 1 2 R54_RF 1 2 L56_RF 1 2 L57_RF 1 2 R35_RF 1 3 46 5 2 FL9_RF 40 3 6 14 5 2 FL10_RF 40 30 21 L78_RF 2941 2 1 C65_RF 2 1 C202_RF 21 FL1_RF 252941 2933 41 2933 2529 29 2933 41 2 1 C63_RF 2 1 C64_RF 30 30 34 37 37 35 33 38 38 35 41 36 43 2 1 C67_RF 43 33 39 232526 3435 3637 38 2 1 C203_RF 1 2 C200_RF 1 2 C201_RF 3435 3637 3839 2 1 C207_RF 36 32 17 15 19 13 50 49 48 47 46 45 44 43 42 41 40 39 37 35 33 31 30 28 26 20 18 16 14 127 8 9 10 11 21 22 23 24 25 27 34 29 38 1 2 4 3 6 5 U2000_RF 2 1 C226_RF 2 1 C227_RF 43 232526 3341 2 1 C228_RF 2 1 C229_RF 2 1 C230_RF 2 1 C231_RF 2 1 C232_RF
  • 43.
    IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT GPS/GNSS_OUT_P GPS/GNSSIN GND THRM GPS/GNSS_OUT_N BAND1/4_OUT_P B25/3_OUT_N B25/3_OUT_P B8/20_OUT_N B8/20_OUT_P B5/18/13/17_OUT_N ANT V1 VDD V2 V3 V4 BAND1/4_OUT_N B5/18/13/17_OUT_P PAD IN IN IN IN IN IN CONFIDENTIAL ANDPROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT B1/B4 LOW LOW LOW LOW BAND S6 S5 S4 S3 100PF BYPASS INCLUDED IN MODULE RX DIVERSITY SWITCH IS TERMINATED IN ALL OTHER POSSIBLE STATES B5/6/18 LOW LOW HIGH LOW B3 HIGH LOW LOW LOW B2/25 LOW HIGH LOW LOW B20 LOW HIGH HIGH LOW B13/17 LOW HIGH HIGH HIGH B8 LOW LOW LOW HIGH OFF LOW LOW HIGH HIGH LGA HFQSWXXUA 3.3NH+/-0.2NH-0.45A 0201 C0G 25V 201 +/-0.1PF 1.0PF CELLULAR FRONT END: RX DIVERSITY 2G_FEM_S3 50_GPS_LNA_OUT PP_LDO14_2V65 2G_FEM_S4 2G_FEM_S5 2G_FEM_S6 100_XCVR_GPS_RX_P 100_XCVR_B1_B4_DRX_P 100_XCVR_B1_B4_DRX_N 100_XCVR_B5_B18_B13_B17_DRX_P 100_XCVR_B5_B18_B13_B17_DRX_N 100_XCVR_B8_B20_DRX_P 100_XCVR_B8_B20_DRX_N 100_XCVR_B2_B25_B3_DRX_P 100_XCVR_B2_B25_B3_DRX_N 100_XCVR_GPS_RX_N50_DRX_ANT 50_DIVERSITY_SWITCH_MATCH 051-9584 2.0.0 18 OF 23 41 OF 46 42 30 30 30 30 30 30 30 30 30 30 12 10 2 3 9 11 14 23 24 25 26 27 13 15 18 17 22 21 20 1 5 4 6 7 8 16 19 28 U16_RF 21 L79_RF 2 1 C255_RF 43 2325263340 40 252940 2940 2933 40 2933 40
  • 44.
    OUT GND R C RFIN GND THRM_PAD RFOUT VDD IN CONFIDENTIAL ANDPROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT BYPASSING INCLUDED IN MODULE GPS NOTE: ADD SP2 BACK FOR EVT GPS FEED 0201 +/-0.05PF 25V C0G-CERM 3.9PF F-RT-SM MM8830-2600B SKY65716-11 LGA 0201 9.1NH-5%-250MA NOSTUFF 10NH-3%-250MA 0201 CELLULAR FRONT END: GPS LNA 50_GPS_ANT_CONN 50_GPS_ANT_FEED PP_LDO5_GPS_LNA_2V5 50_GPS_LNA_OUT50_UPPER_ANT_FEED 051-9584 2.0.0 19 OF 23 42 OF 46 41 1 2 C221_RF 3 2 1 J12_RF 5 2 1 6 4 3 10 8 11 12 13 9 7 U20_RF 26 21 L62_RF 1 2 L11_RF 20
  • 45.
    NC IN OUT CR GND BI BI A IN IN IN IN IN GND MISO RF2RF1 MOSI SCLK VDD NC CS Apple Inc. THEINFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST UAT1 FEED NC NC LAT UAT1 COAX NC NC NC ANTENNA FEEDS 50_UPPER_ANT_FEED BB_SPI_TO_PAC_CS PAC_TO_BB_SPI_DATA_MISO PP_LDO14_PAC_2V65 50_UAT_COAX_DOWN PAC_TO_BB_SPI_DATA_MISO_FILT BB_SPI_TO_PAC_DATA_MOSI_FILT BB_SPI_TO_PAC_CLK_FILT BB_SPI_TO_PAC_CS_FILT 50_LAT_COAX 50_LAT_MATCH 50_LAT_TEST PP_LDO14_2V65 50_UAT_TEST BB_SPI_TO_PAC_CLK BB_SPI_TO_PAC_DATA_MOSI 50_NTCH_FILT_OUT 50_UPPER_MCH_150_UPPER_MCH_2 CELLULAR FRONT END: ANTENNA FEEDS NOSTUFF 1.0PF NP0-C0G +/-0.1PF 25V 201 0.8PF +/-0.1PF 201-HF 25V NP0-C0G 1% MF 1/20W 0201 0.00 RF1112 WLCSP01005 5.6NH-3%-140MA NP0-C0G 56PF 5% 16V 01005 56PF 16V 5% NP0-C0G 01005 56PF NP0-C0G 01005 5% 16V 5.6NH-3%-140MA 01005 5.6NH-3%-140MA 01005 5.6NH-3%-140MA 01005 NP0-C0G 56PF 5% 16V 01005 01005 5.6NH-3%-140MA 56PF 5% 16V 01005 NP0-C0G 01005 10% X5R 6.3V 0.01UF 03015 6.8NH-+/-0.2NH-440MA TP-P6 F-ST-SM MM5829-2700 MM5829-2700 F-ST-SM SM-NSP 1.6X1.21MM MM8930-2600B F-RT-SM MM5829-2700 F-ST-SM 03015 4.7NH+/-0.2NH-0.44AFLTR-GPS-0603 LFE18832MHC1D449 MF 5% 0 201 1/20W 1.0PF +/-0.1PF NP0-C0G 25V 201 NOSTUFF 051-9584 2.0.0 20 OF 23 43 OF 46 2 1 C94_RF 1 2 R11_RF 2 1 3 FL1701_RF 21 L1732_RF 4 2 3 1 J4_RF 1 5 6 2 3 4 J9_RF 40 1 SP1_RF 40 4 2 3 1 J5_RF 4 2 3 1 J6_RF1TP1_RF 1 2 L8_RF 2 1 C99_RF 2 1 C247_RF 41232526 33 40 21 L69_RF 2 1 C98_RF 21 L66_RF 21 L67_RF 21 L68_RF 2 1 C97_RF 2 1 C96_RF 29 2325 29 2325 29 2325 2 1 C38_RF 21 L6_RF 29 2325 8 103 4 2 11 5 6 9 1 12 14 13 7 U7_RF 1 2 R1_RF 2 1 C1726_RF 2 1 C95_RF 19
  • 46.
    Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST GSM1900 RX, UAT LOW HIGH LOW HIGH HIGH LOW HIGH UAT LAT GSM1800 RX, UAT HIGH LOW LOW HIGH HIGH LOW HIGH UAT LAT TERMINATED, UAT HIGH LOW HIGH LOW HIGH HIGH HIGH UAT LAT UAT = UPPER ANTENNA LAT = LOWER ANTENNA GSM900 RX, LAT HIGH LOW HIGH HIGH HIGH HIGH HIGH LAT UAT GSM850 RX, UAT HIGH LOW HIGH HIGH LOW LOW HIGH UAT LAT GSM850 RX, LAT HIGH LOW HIGH HIGH LOW HIGH HIGH LAT UAT HB TX, HIGH Z, UAT, LPM HIGH HIGH LOW HIGH HIGH LOW LOW UAT LAT HB TX, HIGH Z, LAT, LPM HIGH HIGH LOW HIGH HIGH HIGH LOW LAT UAT GSM1900 RX, LAT LOW HIGH LOW HIGH HIGH HIGH HIGH LAT UAT TERMINATED, LAT HIGH LOW HIGH LOW HIGH LOW HIGH LAT UAT FRONT END LOGIC TABLE (1 OF 2) HB TX, UAT, LPM HIGH HIGH HIGH HIGH HIGH LOW LOW UAT LAT BAND S6 S5 S4 S3 S2 S1 S0 TX/PRX PATH DRX PATH GSM900 RX, UAT HIGH LOW HIGH HIGH HIGH LOW HIGH UAT LAT HB TX, IDLE, LAT HIGH HIGH HIGH HIGH LOW HIGH HIGH LAT UAT HB TX, HIGH Z, LAT, HPM HIGH HIGH LOW HIGH HIGH HIGH HIGH LAT UAT HB TX, LAT, LPM HIGH HIGH HIGH HIGH HIGH HIGH LOW LAT UAT HB TX, UAT, HPM HIGH HIGH HIGH HIGH HIGH LOW HIGH UAT LAT HB TX, LAT, HPM HIGH HIGH HIGH HIGH HIGH HIGH HIGH LAT UAT HB TX, IDLE, UAT HIGH HIGH HIGH HIGH LOW LOW HIGH UAT LAT LB TX, HIGH Z, UAT, LPM HIGH HIGH LOW LOW HIGH LOW LOW UAT LAT LB TX, HIGH Z, LAT, LPM HIGH HIGH LOW LOW HIGH HIGH LOW LAT UAT LB TX, HIGH Z, UAT, HPM HIGH HIGH LOW LOW HIGH LOW HIGH UAT LAT LB TX, HIGH Z, LAT, HPM HIGH HIGH LOW LOW HIGH HIGH HIGH LAT UAT LB TX, UAT, LPM HIGH HIGH HIGH LOW HIGH LOW LOW UAT LAT LB TX, LAT, LPM HIGH HIGH HIGH LOW HIGH HIGH LOW LAT UAT LB TX, LAT, HPM HIGH HIGH HIGH LOW HIGH HIGH HIGH LAT UAT LB TX, IDLE, UAT HIGH HIGH HIGH LOW LOW LOW HIGH UAT LAT LB TX, IDLE, LAT HIGH HIGH HIGH LOW LOW HIGH HIGH LAT UAT HB TX, HIGH Z, UAT, HPM HIGH HIGH LOW HIGH HIGH LOW HIGH UAT LAT GSM1800 RX, LAT HIGH LOW LOW HIGH HIGH HIGH HIGH LAT UAT LB TX, UAT, HPM HIGH HIGH HIGH LOW HIGH LOW HIGH UAT LAT FRONT END LOGIC TABLE (1 OF 2) 051-9584 2.0.0 21 OF 23 44 OF 46
  • 47.
    Apple Inc. THE INFORMATIONCONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST FRONT END LOGIC TABLE - DEV2 (2 OF 2)BAND S6 S5 S4 S3 S2 S1 S0 TX/PRX PATH DRX PATH LAT = LOWER ANTENNA UAT = UPPER ANTENNA STANDBY = ADDED TO SUPPORT EXISTING SW ARCHITECTURE. NOT TO BE USED AS A LOW POWER STATE. OFF = LOWEST POWER STATE WITHOUT REMOVING LDO14_2V65 POWER OFF LOW LOW HIGH HIGH X X X X X STANDBY LOW LOW LOW LOW LOW LOW LOW X X B1/BC6, LAT LOW LOW LOW LOW HIGH HIGH HIGH LAT UAT B1/BC6, UAT LOW LOW LOW LOW HIGH LOW HIGH UAT LAT B2/B25/BC1, LAT LOW HIGH LOW LOW HIGH HIGH HIGH LAT UAT B2/B25/BC1, UAT LOW HIGH LOW LOW HIGH LOW HIGH UAT LAT B20, UAT LOW HIGH HIGH LOW HIGH LOW HIGH UAT LAT B17, LAT LOW HIGH HIGH HIGH LOW HIGH HIGH LAT UAT B13, UAT LOW HIGH HIGH HIGH HIGH LOW HIGH UAT LAT B13, LAT LOW HIGH HIGH HIGH HIGH HIGH HIGH LAT UAT B8, UAT LOW LOW LOW HIGH HIGH LOW HIGH UAT LAT B8, LAT LOW LOW LOW HIGH HIGH HIGH HIGH LAT UAT B5/B6/B18/BC0/BC10, LAT LOW LOW HIGH LOW HIGH HIGH HIGH LAT UAT B3, LAT HIGH LOW LOW LOW HIGH HIGH HIGH LAT UAT B5/B6/B18/BC0/BC10, UAT LOW LOW HIGH LOW HIGH LOW HIGH UAT LAT B17, UAT LOW HIGH HIGH HIGH LOW LOW HIGH UAT LAT B4/BC15, LAT LOW LOW LOW LOW HIGH HIGH HIGH LAT UAT B4/BC15, UAT LOW LOW LOW LOW HIGH LOW HIGH UAT LAT B3, UAT HIGH LOW LOW LOW HIGH LOW HIGH UAT LAT B20, LAT LOW HIGH HIGH LOW HIGH HIGH HIGH LAT UAT FRONT END LOGIC TABLE (2 OF 2) 051-9584 2.0.0 22 OF 23 45 OF 46
  • 48.
    IN IN IN OUT IN BI BI OUT IN OUT IN IN IN OUT OUT IN OUT OUT OUT IN BI BI BI BI IN SDIO_DATA3 SDIO_DATA2 RF_SW_CTRL_3 RF_SW_CTRL_7 RF_SW_CTRL_8 RF_SW_CTRL_9 SDIO_DATA1 WLAN_HSIC_STROBE JTAG_SEL SDIO_CMD SDIO_DATA0 BT_REG_ON VIN_1P2LDO CLK32K_AP WL_REG_ON GPIO_6 VOUT_3P3 GPIO_9 GPIO_10 GPIO_11 GPIO_15 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_12 GPIO_1 GPIO_0 BT_UART_RTS* BT_UART_TXD BT_UART_CTS* BT_PCM_CLK BT_PCM_SYNC BT_PCM_OUT BT_PCM_IN BT_WAKE 2G_ANT 5G_ANT HOST_WAKE_BT BT_UART_RXD VDDIO_1P8V VBATT_RF_VCC VBATT_RF_VCC BATT_VCC BATT_VCC SDIO_CLK WLAN_HSIC_DATA SR_VLX THRML_PADGND OUT IN IN IN BI BI HI LO COM GND CONFIDENTIAL ANDPROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST Apple Inc. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. 124578 B D 8 7 6 5 4 3 C B A NOTICE OF PROPRIETARY PROPERTY: PAGE 12 D A C PAGE TITLE SHEET IV ALL RIGHTS RESERVED R D SIZEDRAWING NUMBER REVISION BRANCH 6 3 THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART II NOT TO REPRODUCE OR COPY IT WLAN/BT 32K INTERFACE TO AP NC NC NC PULL-UP ON GPIO6, SDIO_DATA_2 & PULL-DOWN ON SDIO_DATA_1 REQUIRED FOR HSIC BOOTSTRAPPING NC WIFI_SW_CTRL NC NC UAT2 50_WLAN_G 50_WLAN_A SM DPX205850DT-9038A1SJ 8.2PF 50_WLAN_ANT_MATCH_T PP_VCC_MAIN_WLAN WLAN_BUCK_OUT CLK32K_AP BT_UART_RTS_L BT_UART_CTS_L BT_PCM_CLK BT_PCM_SYNC BT_PCM_OUT BT_WAKE BT_UART_TXD BT_UART_RXD WLAN_UART_RXD WLAN_HSIC3_DEVICE_RDY GPIO_6 LTE_AGG_PA_ON SDIO_DATA_2 SDIO_DATA_1 JTAG_SEL PP_WLAN_VDDIO_1V8 WLAN_COEX_RXD WLAN_COEX_TXD WLAN_COEX_TXD LTE_COEX_TXD LTE_COEX_RXD PP_WL_BT_VDDIO_AP 50_WLAN_ANT_MATCH 50_HSIC_WLAN_DATA WLAN_SR_VLX1 JTAG_SEL BT_REG_ON WLAN_CLK32K WLAN_REG_ON HOST_WAKE_WLAN AP_HSIC3_RDY WLAN_UART_TXD HOST_WAKE_BT BT_PCM_IN WLAN_HSIC3_RESUME WLAN_TX_BLANK OSCAR_CONTEXT_A SDIO_DATA_2 SDIO_DATA_1 50_HSIC_WLAN_STROBE WLAN_COEX_RXD LTE_ACTIVE OSCAR_CONTEXT_B 50_WLAN_G 50_WLAN_G_ANT 50_WLAN_A 50_WLAN_A_ANT PP_BATT_VCC_WLAN PP_WLAN_VDDIO_1V8 50_WLAN_ANT_FD WIFI/BT: MODULE AND FRONT END +/-0.1PF 25V CER 0201 +/-0.05PF 25V C0G-CERM 4.7PF 0201 18PF C0H-CERM 25V 2% 0201 SHORT-L9-SM SHORT-L9-SM NOSTUFF 0201 0.2PF +/-0.05PF 25V COG-CERM COG-CERM 25V +/-0.05PF 0.2PF 0201 NOSTUFF 5% 201 MF 1/20W 0 NOSTUFF 201 COG-CERM 25V +/-0.1PF 0.2PF MM5829-2700 F-ST-SM MF 1/32W 0% 0.00 01005 MF 0.00 0% 1/32W 01005 MF 1/32W 5% 10K 01005 NOSTUFF 10K 1/32W MF 5% 01005 5% MF 1/32W 10K 01005 5% 10K 1/32W MF 01005 100K 5% 1/32W MF 01005 LGA MOD-WIFI-BT-IMPERIAL 0201 0.2PF +/-0.05PF 25V COG-CERM NOSTUFF 2.5UH-30%-0.7A-0.24OHM 0603 1/32W 0.00 MF 0% 01005 NP0-C0G 16V 5% 27PF 01005 0.01UF 10% X5R 6.3V 01005 MF 1/32W 5% 100K 01005 NP0-C0G 27PF 16V 5% 01005 10UF CERM-X5R 6.3V 20% 0402-1 MF 1/32W 10K 5% 01005 4.7UF 402 20% 6.3V X5R-CERM1 SHORT-01005 051-9584 2.0.0 23 OF 23 46 OF 46 1 2 XW11_RF 2 1 C102_RF 25 23 25 23 1 2 R16_RF 25 23 2 1 C103_RF 2 1 C104_RF 1 2 R18_RF 2523 2523 2523 2523 2523 2523 2523 2523 2523 2523 2523 2523 2 1 C105_RF 2 1 C37_RF 1 2 R17_RF 2523 2523 2523 2523 25 23 21 L9_RF 25 23 25 23 46 46 2 1 C170_RF 2523 22 21 45 14 15 48 19 25 52 18 20 50 31 36 51 3 29 8 6 7 9 11 2 4 12 13 5 10 37 40 38 32 35 33 34 49 43 54 41 39 16 47 46 27 28 1 23 26 42 44 53 60 58 59 57 56 55 17 24 30 U8_RF 29 2529 29 2529 1 2 R45_RF 1 2 R43_RF 1 2 R44_RF 1 2 R14_RF 1 2 R15_RF 1 2 R51_RF 1 2 R52_RF 4 2 3 1 J10_RF 46 46 2 1 C101_RF 1 2 R13_RF 2 1 C281_RF 2 1 C280_RF 1 2 XW9_RF 1 2 XW20_RF 1 2 C106_RF 1 2 C107_RF 1 2 L33_RF 1 3 5 2 4 6 U12_RF 23 23 23 23 23 23 2 232 6 2 6 23 23 23 23 23 本图纸出自恒熙维修助手　ｗｗｗ．ｈｗｋ１６８．ｃｏｍ