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INDUSTRY ORIENTATION ACTIVITY
Week No. 3
Clamping Circuits
By
III Semester B.E., A Section
Department of Electronics and Communication Engineering
(ug program accredited by national board of accreditation)
ST. JOSEPH ENGINEERING COLLEGE
Vamanjoor, Mangaluru - 575028, India
CLAMPING CIRCUIT
Aim: To design and test diode various clamping circuits using diodes.
Pre-requisite: Knowledge on the working of the diodes.
Tools: NI Multisim 13.0.0
Apparatus: Diode, capacitor, AC source, resistor, CRO, Battery.
Theory:
A clamping circuit is used to place either the positive or negative peak of a signal
at a desired level. The dc component is simply added or subtracted to/from the input
signal. The clamper is also referred to as an IC restorer and ac signal level shifter.
A clamp circuit adds the positive or negative dc component to the input signal so as to
push it either on the positive side or on the negative side.
The circuit will be called a positive clamper , when the signal is pushed upward by the
circuit. When the signal moves upward, the negative peak of the signal coincides with
the zero level.
The circuit will be called a negative clamper, when the signal is pushed downward by
the circuit. When the signal is pushed on the negative side, the positive peak of the
input signal coincides with the zero level.
Circuit Diagram:
Input Waveform:
Output waveform:
Circuit Diagram:
Input Waveform:
Output Waveform:
Observations:
(i) The shape of the waveform will be the same, but its level is shifted either upward or
downward,
(ii) There will be no change in the peak-to-peak or rms value of the waveform due to the
clamping circuit. Thus, the input waveform and output waveform will have the same
peak-to-peak value that is, 2Vmax.
(iii) There will be a change in the peak and average values of the waveform. Average
value over a complete cycle is zero. The clamped output varies from 2 Vmax and 0 (or 0
and -2Vmax). Thus the peak value of the clamped output is 2Vmax and average value is
Vmax.
(iv) The values of the resistor R and capacitor C affect the waveform.
Result:
Clamping circuits were verified and the output waveforms were observed.
Ioa  week3

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Ioa week3

  • 1. INDUSTRY ORIENTATION ACTIVITY Week No. 3 Clamping Circuits By III Semester B.E., A Section Department of Electronics and Communication Engineering (ug program accredited by national board of accreditation) ST. JOSEPH ENGINEERING COLLEGE Vamanjoor, Mangaluru - 575028, India
  • 2. CLAMPING CIRCUIT Aim: To design and test diode various clamping circuits using diodes. Pre-requisite: Knowledge on the working of the diodes. Tools: NI Multisim 13.0.0 Apparatus: Diode, capacitor, AC source, resistor, CRO, Battery. Theory: A clamping circuit is used to place either the positive or negative peak of a signal at a desired level. The dc component is simply added or subtracted to/from the input signal. The clamper is also referred to as an IC restorer and ac signal level shifter. A clamp circuit adds the positive or negative dc component to the input signal so as to push it either on the positive side or on the negative side. The circuit will be called a positive clamper , when the signal is pushed upward by the circuit. When the signal moves upward, the negative peak of the signal coincides with the zero level. The circuit will be called a negative clamper, when the signal is pushed downward by the circuit. When the signal is pushed on the negative side, the positive peak of the input signal coincides with the zero level.
  • 3. Circuit Diagram: Input Waveform: Output waveform: Circuit Diagram: Input Waveform:
  • 4. Output Waveform: Observations: (i) The shape of the waveform will be the same, but its level is shifted either upward or downward, (ii) There will be no change in the peak-to-peak or rms value of the waveform due to the clamping circuit. Thus, the input waveform and output waveform will have the same peak-to-peak value that is, 2Vmax. (iii) There will be a change in the peak and average values of the waveform. Average value over a complete cycle is zero. The clamped output varies from 2 Vmax and 0 (or 0 and -2Vmax). Thus the peak value of the clamped output is 2Vmax and average value is Vmax. (iv) The values of the resistor R and capacitor C affect the waveform. Result: Clamping circuits were verified and the output waveforms were observed.