The document discusses instruction set architecture (ISA). It defines ISA as the part of computer architecture related to instructions, registers, addressing modes, memory architecture, interrupt and external I/O. It also discusses the difference between RISC and CISC architectures, with RISC having fewer computing cycles per instruction. The relationship between compilers and ISA is mentioned, with ISA helping compilers generate the best instruction sequences.

2. Mubashar
Superior University ,Depalpur
raomubashar345@gmail.com
M.Faizan
Superior University ,Depalpur
Ashfaq
Superior University,Depalpur

4. History of (ISA)
For the first time IBM introduce 360 in
1964.
“An instruction set specifies a processor
define storage limits and method of
access.”

5. Instruction Set Architecture
Instruction set architecture (ISA), is the
part of the computer architecture
related to instructions, registers,
addressing modes, memory
architecture, interrupt and external
I/O

6. ISA semantically
It is close to high level language.
It is near to semantic gap.
Semantically are heavy instructions
such that RISC and CISC

7. Feature of ISA
Implement ability is consider as a
main part of ISA. It include
performance and cost range.
Programmability easy to express
program efficiently.

8. Difference b/w RISC and CISC
The difference b/w RISC(reduce
instruction set computing) and
CISC(Complex instruction set
computing) is number of computing
cycles each of their instruction take.

9. Computer set Architecture
Computer architecture is a set of rules
and methods that describe the
functionality, organization, and
implementation of computer systems.

10. What is MIPS ?
The number of MIPS (million
instructions per second) is a
general measure of computing
performance.

11. Relation of complier and ISA
The major purpose to generate the
best code for machine.
ISA can help the compiler by giving
the best sequence of instruction

12. Advantage:
Makes code generation easy.
Dada can be stored for long
periods is registers.
The accumulator is only temporary
storage so memory traffic is the
highest for this approach

13. Disadvantage:
All operands must be named leading
to longer instruction.