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FPGA’s, Addressing New Markets With 44 & 28 nm Devices

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The growing ASIC tape-out costs, countered by increased FPGA capacity, speed and lower cost are making FPGA’s an attractive solution for applications that have traditionally been using ASICs or ASSPs. A critical enabler for such a transition is the availability of a wider range of more complex Silicon IP cores that are proven and optimized in the new FPGA devices. Success will require Silicon IP providers, that have traditionally been providing FPGA IP, to be motivated to address more complex IP requirements and to migrate their IP to the new devices and that the traditional ASIC IP vendors shift their focus to support of FPGA requirements. Is this happening today, and what is most likely to happen in the near future?

TechnologyDesign
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FPGA’s, Addressing New Markets With 44 & 28 nm Devices IP-SoC December 2011 Hal Barbour– President, CAST, Inc.
The Clive Maxfield ASIC v. FPGA Illustration 2 CAST Intro & Overview
Opportunities & Obstacles Opportunities Across the board in all markets New markets & applications Smaller form factor Lower power Lower cost Obstacles How do we design in millions of gates? Are the tools adequate? Will the design processes need to change? New methodologies and training? 3 CAST Intro & Overview
The IP challenges Many IP vendors only support ASIC’s Difficult to support the breadth of FPGA providers and technologies Increasing number of providers Traditional: Altera, Xilinx, Lattice, Microsemi (Actel) Newer: Achronix, Silicon Blue, Tabula FPGA vendors seem to be doing less firm cores and more hardened functions What are the opportunities for IP companies in serving the new FPGA technologies? 4 CAST Intro & Overview

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  • 1. FPGA’s, Addressing New Markets With 44 & 28 nm Devices IP-SoC December 2011 Hal Barbour– President, CAST, Inc.
  • 2. The Clive Maxfield ASIC v. FPGA Illustration 2 CAST Intro & Overview
  • 3. Opportunities & Obstacles Opportunities Across the board in all markets New markets & applications Smaller form factor Lower power Lower cost Obstacles How do we design in millions of gates? Are the tools adequate? Will the design processes need to change? New methodologies and training? 3 CAST Intro & Overview
  • 4. The IP challenges Many IP vendors only support ASIC’s Difficult to support the breadth of FPGA providers and technologies Increasing number of providers Traditional: Altera, Xilinx, Lattice, Microsemi (Actel) Newer: Achronix, Silicon Blue, Tabula FPGA vendors seem to be doing less firm cores and more hardened functions What are the opportunities for IP companies in serving the new FPGA technologies? 4 CAST Intro & Overview