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GTS



                                                               Trigger and synchronize :
                                                               AGATA + ancillaries




Orsay, 10 december 2009,
for the selection process of the trigger and synchronization
system for nuclear physics experiments in GANIL (SPIRAL2)                           Joël Chavas
Outline

• GTS – Main features
• GTS – Hardware / software
• GTS – Status and characteristics
The DAQ in AGATA
GTS – Function

•   Provides the global clock
•   Handles centrally all trigger requests
•   Transport medium for trigger activity
•   Equalizes downlinks
    – No calibration run required
• Provides the absolute time (48-bit counter)
GTS – Structure


           Leaf


                           Trigger
           Leaf    Root
                          processor
 Leaf
          Fanin-
          fanout
 Leaf
GTS – AGATA requirements

•   Individual trigger requests – 50 kHz
•   Trigger validation – 1 MHz (Mult. 1)
•   Trigger validation – 300kHz (Mult. 30)
•   Repeatability of the phase skew on the sub-ns
    scale
GTS – Originality and novelty

•   Digital trigger system
•   Replaces analog triggers – without dead-time
•   Optical fibers, to transmit clock and trigger events
•   Modularity
Hardware

• Trigger processor :
   – a commercial card inside a PCIexpress slot of the computer
• GTS card :
   – Mezzanine
   – ATCA card in development
• Links :
   – Optical links
   – Mezzanine connectors
GTS card


                      TDC
                                   DELAY
                            PLL
              MGT
optic   mux                                M
                    FPGA    trigger bus
GTS mezzanine
  GTS mezzanine

              XXX
GTS
GTS

       GTS mezzanine – on LLP carrier
GTS mezzanine – On LLP carrier



GTS
Firmware / software

• Trigger processor :
   – edk project, home made slow control through
     PCIexpress
• GTS :
   – edk project, embedded software (vxWorks)
   – slow control through udp/ip
How it works : a modular approach


         Trigger processor



                     vhdl trigger
      GTS tree          cores
Trigger processor – structure

           Multiplicity
           Partition 0
           Multiplicity
           Partition 1
           Multiplicity
           Partition 2
  Online   Multiplicity                 Validation
           Partition 3    Coincidence   broadcast
  sorter
           Multiplicity
           Partition 4
           Multiplicity
           Partition 5
           Multiplicity
           Partition 6
           Multiplicity
           Partition 7
Trigger processor

• Partition coincidence
   – Ex : Mult(Ge) ≥ 4 and Mult(Ancillary) ≥ 1 after 5µs
   – Delayed multiplicity window : clock precision
GTS tree – General

• A unique hardware for all nodes
• A unique firmware for all leaves
• A unique embedded software for all nodes
GTS tree – Clocks

•   Clock recovered from gigabit optical links
•   Clock cleaned by external PLL
•   Downlink times are measured
•   Downlink times are equalized through a FIFO and
    an external delay line
GTS tree – Alignment

      downlink


                    tdownlink = t2 – 1/2 × t1


      clocked
                     t2
    combinatorial
    combinatorial
                     t1
    combinatorial
GTS – Communication with carriers
Trigger cores

• Handle all trigger activity
• Purely vhdl                          Leaf
• Uplink :                             Leaf        Root
   – Trigger requests           Leaf
   – Periodic idles
                                Leaf
• Downlink :                                  uplink
   – Trigger validation
   – Absolute time                            downlink
   – Synchronous command
• No dead-time
Measurements – Jitters


                         p-p jitter (ps)

        clk                    70
      leaf-leaf               200
      leaf-root               170
Measurements – Skews



                         Max (ps)

    phase alignment      +/- 250
   phase repeatability    +/- 50
Measurements – latencies

• Local latency : hundreds of ns
• No dead-time, except for a technical 2 µs one
• GTS tree latencies :
   – Max = 12 µs (4-layer tree) with trigger processor
      • Depends on idle rate and delayed coincidence
   – 7 µs without trigger processor
   – 2 µs added at each FANIN-FANOUT layer
GTS commissioning : november 2009

• 4-layer GTS tree
• 7 leaves (6 for germanium detectors, 1 for
  ancillary detectors)
• 2 partitions (germanium detectors and ancillary
  detectors) with two decision equations used :
   – Mult(Ge, 3,+0)
   – Mult(Ge,2,+0) + Mult(Anc,1,+2µs)
• Technical trigger validation rate : 2 MHz
Trigger processor -- Status

• 2 multiplicity partitions implemented on a FX100
• Firmware done for 8 partitions – to be
  implemented on a more powerful hardware
• On-line reconfiguration through a pseudo-C
  configuration file
• GUI based on ncurses library
GTS tree -- Status

• Done : firmware, embedded software, host server
  software
• Under development : python-based GUI
• ATCA card development
GTS hardware – Status

• V2 : 4 complete GTS cards + 1 GTS that can be
  used only as root
• V3 : 20 produced and tested
• V3 : 10 under production for june 2009
• Comments :
  – Production is not the problem : testing and support are
    the problem
  – Stand-alone GTS card : no support is needed
  – GTS tree : support is needed
Discussion and future needs

• Ancillaries and the GTS tree latency
• Feeding the root and the leave with an external
  clock – links with BUTIS?
• Customization (software) of the trigger processor
   – Physics is done on the trigger processor
Work load

• Roberto Isocrate (hardware)
• Damiano Bortolato (firmware/software GTS tree
  prototype)
• Joël Chavas (firmware/software/commissioning GTS tree,
  testing)
• Luciano Berti (trigger processor)
• Marco Bellato (trigger cores, conception, organization)
• Dino Bazzacco (validation)
Conclusion

• GTS : an innovative digital trigger system
• Successful commissioning with the ancillary
  detectors included : november 2009

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GTS, Global Trigger and Synchronization system

  • 1. GTS Trigger and synchronize : AGATA + ancillaries Orsay, 10 december 2009, for the selection process of the trigger and synchronization system for nuclear physics experiments in GANIL (SPIRAL2) Joël Chavas
  • 2. Outline • GTS – Main features • GTS – Hardware / software • GTS – Status and characteristics
  • 3. The DAQ in AGATA
  • 4. GTS – Function • Provides the global clock • Handles centrally all trigger requests • Transport medium for trigger activity • Equalizes downlinks – No calibration run required • Provides the absolute time (48-bit counter)
  • 5. GTS – Structure Leaf Trigger Leaf Root processor Leaf Fanin- fanout Leaf
  • 6. GTS – AGATA requirements • Individual trigger requests – 50 kHz • Trigger validation – 1 MHz (Mult. 1) • Trigger validation – 300kHz (Mult. 30) • Repeatability of the phase skew on the sub-ns scale
  • 7. GTS – Originality and novelty • Digital trigger system • Replaces analog triggers – without dead-time • Optical fibers, to transmit clock and trigger events • Modularity
  • 8. Hardware • Trigger processor : – a commercial card inside a PCIexpress slot of the computer • GTS card : – Mezzanine – ATCA card in development • Links : – Optical links – Mezzanine connectors
  • 9. GTS card TDC DELAY PLL MGT optic mux M FPGA trigger bus
  • 10. GTS mezzanine GTS mezzanine XXX
  • 11. GTS GTS GTS mezzanine – on LLP carrier
  • 12. GTS mezzanine – On LLP carrier GTS
  • 13. Firmware / software • Trigger processor : – edk project, home made slow control through PCIexpress • GTS : – edk project, embedded software (vxWorks) – slow control through udp/ip
  • 14. How it works : a modular approach Trigger processor vhdl trigger GTS tree cores
  • 15. Trigger processor – structure Multiplicity Partition 0 Multiplicity Partition 1 Multiplicity Partition 2 Online Multiplicity Validation Partition 3 Coincidence broadcast sorter Multiplicity Partition 4 Multiplicity Partition 5 Multiplicity Partition 6 Multiplicity Partition 7
  • 16. Trigger processor • Partition coincidence – Ex : Mult(Ge) ≥ 4 and Mult(Ancillary) ≥ 1 after 5µs – Delayed multiplicity window : clock precision
  • 17. GTS tree – General • A unique hardware for all nodes • A unique firmware for all leaves • A unique embedded software for all nodes
  • 18. GTS tree – Clocks • Clock recovered from gigabit optical links • Clock cleaned by external PLL • Downlink times are measured • Downlink times are equalized through a FIFO and an external delay line
  • 19. GTS tree – Alignment downlink tdownlink = t2 – 1/2 × t1 clocked t2 combinatorial combinatorial t1 combinatorial
  • 20. GTS – Communication with carriers
  • 21. Trigger cores • Handle all trigger activity • Purely vhdl Leaf • Uplink : Leaf Root – Trigger requests Leaf – Periodic idles Leaf • Downlink : uplink – Trigger validation – Absolute time downlink – Synchronous command • No dead-time
  • 22. Measurements – Jitters p-p jitter (ps) clk 70 leaf-leaf 200 leaf-root 170
  • 23. Measurements – Skews Max (ps) phase alignment +/- 250 phase repeatability +/- 50
  • 24. Measurements – latencies • Local latency : hundreds of ns • No dead-time, except for a technical 2 µs one • GTS tree latencies : – Max = 12 µs (4-layer tree) with trigger processor • Depends on idle rate and delayed coincidence – 7 µs without trigger processor – 2 µs added at each FANIN-FANOUT layer
  • 25. GTS commissioning : november 2009 • 4-layer GTS tree • 7 leaves (6 for germanium detectors, 1 for ancillary detectors) • 2 partitions (germanium detectors and ancillary detectors) with two decision equations used : – Mult(Ge, 3,+0) – Mult(Ge,2,+0) + Mult(Anc,1,+2µs) • Technical trigger validation rate : 2 MHz
  • 26. Trigger processor -- Status • 2 multiplicity partitions implemented on a FX100 • Firmware done for 8 partitions – to be implemented on a more powerful hardware • On-line reconfiguration through a pseudo-C configuration file • GUI based on ncurses library
  • 27. GTS tree -- Status • Done : firmware, embedded software, host server software • Under development : python-based GUI • ATCA card development
  • 28. GTS hardware – Status • V2 : 4 complete GTS cards + 1 GTS that can be used only as root • V3 : 20 produced and tested • V3 : 10 under production for june 2009 • Comments : – Production is not the problem : testing and support are the problem – Stand-alone GTS card : no support is needed – GTS tree : support is needed
  • 29. Discussion and future needs • Ancillaries and the GTS tree latency • Feeding the root and the leave with an external clock – links with BUTIS? • Customization (software) of the trigger processor – Physics is done on the trigger processor
  • 30. Work load • Roberto Isocrate (hardware) • Damiano Bortolato (firmware/software GTS tree prototype) • Joël Chavas (firmware/software/commissioning GTS tree, testing) • Luciano Berti (trigger processor) • Marco Bellato (trigger cores, conception, organization) • Dino Bazzacco (validation)
  • 31. Conclusion • GTS : an innovative digital trigger system • Successful commissioning with the ancillary detectors included : november 2009