7. System Organization I/O Bus Memory Bus Processor Cache Main Memory Disk Controller Disk Disk Graphics Controller Network Interface Graphics Network interrupts I/O Bridge Core Chip Set
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15. Instruction Set Interface instruction set software hardware Interface imp 1 imp 2 imp 3 use use use time
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18. Execution Cycle Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction
19. Processor Performance 1 0 0 0 1 2 0 0 1 9 9 7 1 9 9 6 1 9 9 5 1 9 9 4 1 9 9 3 1 9 9 2 1 9 9 1 1 9 9 0 1 9 8 9 1 9 8 8 1 9 8 7 Copyright 1998 Morgan Kaufmann Publishers, Inc. All Rights Reserved H P 9 0 0 0 / 7 5 0 S U N - 4 / 2 6 0 M I P S M 2 0 0 0 M I P S M / 1 2 0 I B M R S 6 0 0 0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 1 1 0 0 D E C A l p h a 5 / 5 0 0 D E C A l p h a 2 1 2 6 4 / 6 0 0 D E C A l p h a 5 / 3 0 0 D E C A l p h a 4 / 2 6 6 D E C A X P / 5 0 0 I B M P O W E R 1 0 0 Y e a r P e r f o r m a n c e 0
21. Processor and Caches To main memory Processor Module External Cache Datapath Registers Internal Cache Control Processor
22. Memory Memory Controller Memory Bus DRAM SIMM SIMM Slot 0 SIMM Slot 1 SIMM Slot 2 SIMM Slot 3 SIMM Slot 4 SIMM Slot 5 SIMM Slot 6 SIMM Slot 7 DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM
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Editor's Notes
Design state of art organization in 1990
Let me summarize what I have said so far. The most important thing I want you to remember is that: all computers, no matter how complicated or expensive, can be divided into five components: (1) The datapath and (2) control that make up the processor. (3) The memory system that supplies data to the processor. And last but not least, the (4) input and (5) output devices that get data in and out of the computer. One thing about memory is that Not all “memory” are created equally. Some memory are faster but more expensive and we place them closer to the processor and call them “cache.” The main memory can be slower than the cache so we usually use less expensive parts so we can have more of them. Finally as you can see from the last few slides, the input and output devices usually has the messiest organization. There are several reasons for it: (1) First of all, I/O devices can have a wide range of speed. (2) Then I/O devices also have a wide range of requirements. (s) Finally to make matters worse, historically I/O has attracted the least amount of research interest. But hopefully this is changing. In this class, you will learn about all these five components and we will try to make this as enjoyable as possible. So have fun.
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