David Goren has worked at IBM for over 15 years as a researcher focusing on power conversion and electromagnetic design for processors. He is now self-employed writing a book on science and Buddhism. He has a B.Sc., M.Sc., and D.Sc. from Technion in electrical engineering. He has received several awards for his research and teaching.

1. Curriculum Vitae
David Goren (D.Sc.)
Updated: July 2016
Personal Data:
Military service: full three years, Communication force.
One year service in Labanon
Israeli I. D. number: 0 5779389 5
Place of birth: Israel
Citizenship: Israeli
Family Status: Married
Work place Address (December 2014 till present):
Self-employed author on science and Buddhism – working from home
Description:
Following a three month uninterrupted and concentrated meditation practices at the Plum Village
Zen Buddhist Monastery in France (Thich Nhat Hanh tradition) I started to write a book entitled
"Symphony for Buddha, Science and Happiness" which is currently (from July 2016) in the editing
process.
Work place Address (June 2011 till December 2014):
IBM – T. J. Watson Research Center
1101 Kitchawan Road
Yorktown Heights
NY 10598
USA
Description:
Working as BAND 9 RSM (Research Staff Member) in IBM T. J. Watson Research Lab (main IBM
research lab). Focusing on power voltage conversion for next generation IBM processors. Research
of Buck regulator design fully on the processor chip carrying >100A - inventing the Open Slab
concept which proved to satisfy design requirements. ( >1A/mm2 current density @ 100A, and 90%
efficiency – beyond state of the art). Also invented same-chip slab inductor solution.

2. Work place address (February 1997 till June 2011)
IBM – Haifa Research Lab
Haifa University Campus
Mount Carmel
Haifa 3498825
Description:
Researcher in IBM Haifa Research Lab (microelectronics, on-chip ElectroMagnetics) for 14 years.
Working on high speed analog and mixed signal design first, and then focusing on on-chip ultra-
high-frequency (~100GHz) ElectroMagnetics. Founding and R&D of the Haifa On-Chip T-line
project which which have been implemented in all IBM design kits and earned outstanding research
accomplishment award.
Home Address: Leah 33 street, Apt. 1
Carmeliya Neighborhood
Haifa 3440502
Phone: Home/Work: 077-4324026
E- Mail: davidgorenprivate@gmail.com
Full Profile: https://www.linkedin.com/in/david-goren-37976a106
Academic Education:
B.Sc. 1988 Dept. of EE, Technion – Magna Cum Laude ‫נשיא‬ ‫)מצטיין‬‫מצטבר‬( .
M.Sc. 1991 Dept. of EE., Technion. Magna Cum Laude (95 average).
Supervisor: Prof. Yael Nemirovsky
General research area: Heterostructure Device Physics in II-VI compounds.
(full Technion Internal fellowship + Junior Staff member position).
D.Sc. 1998 Dept. of E.E, Technion
Supervised by: Prof. Yael Nemirovsky and Prof. A. Bar-Lev
Advisor: Prof. A. Ron.
General research area: Heterostructure Device Physics and Solar Cells in II-VI
compounds.
(full Technion Internal fellowship + Junior Staff member position).
Enrichment Courses taken beyond and after completion of doctoral studies at the Technion:
1) Business Education Program ("mini-MBA" course), by "Lahav" management school of Tel-Aviv
University, 5 Month course – one full day in a week, Completed October 2004. Final project
work on a business plan for the IBM On-Chip T-line project.

3. 2) Philosophy of Science with an emphasis on modern physics, by Prof. Meir Chemo, Haifa
University (I have learned philosophy of science separately during my B.sc. degree).
3) Critical analysis of the fundamentals of modern physics (mainly Quantum
Mechanics), by Prof. Meir Chemo, Haifa University.
4) Critical analysis of the fundamentals of mechanical statistics, by Prof. Meir Chemo, Haifa
University.
5) CMOS RF design, by Dr. Claudio Jakobson, Technion.
6) Antennas and Radiation, by Prof. Yehuda Leviatan, Technion.
7) Basic communication course (Transmit and Receive techniques)
by Dr. Abraham Saad, Technion.
Main previous area of research (in Technion): Heterostructure Device Physics. (M.Sc. and
D.Sc.) CdTe Solar Cells (D.Sc.) – full range expertise in microelectronics.
Teaching experience (25 years experience):
1. As a teaching assistant:
046773 Opto-electronic Semiconductor Devices
Graduate and Undergraduate students, five semesters experience.
046234 Electron Devices 2 (Bipolar)
Graduate and Undergraduate students, two semester experience.
2. As an independent lecturer:
In the Technion:
044109 Introduction to Electrical Engineering
Undergraduate students, three hours a week, two semester experience.
046773 Opto-electronic Semiconductor Devices
Graduate & Undergraduate, two semester experience:
One jointly with Prof. Yael Nemirovsky, One as fully independent lecturer.
044142 Analog Circuit Design
Undergraduate students, three hours a week, two semester experience.
046234 Electron Devices 2 (Bipolar Transistors, mainly SiGe technology)
Graduate &Undergraduate, five semester teaching experience with Prof. Adir Bar-Lev
049031 Models and Optimization of VLSI interconnects with Dr. Avinoam Kolodny
Special course targeting Israel Hi Tech Industries, I focused on my IBM
On-Chip T-line design and modeling research.
In Ort Technical College:

4. Ort Hermelin – EE dept. - undergraduate course on stochastic processes.
Ort Hermelin – EE dept. – undergraduate course on electromagnetic fields and waves – disconnected
due to the closing of the Hermelin technical college.
Student supervising experience (in the Technion):
1) Co-supervisor to Anastasia Barger, during three years, towards her master degree in electrical
engineering on the subject of network on-chip interconnects, together with Dr. Avinoam Kolodny.
Anastasia has graduated on June 2006 with a final grade of 93.
2) Co-supervisor to Roi Carmon, towards his master degree in electrical engineering on the subject
of 24GHz CMOS power amplifier with on-chip power combining transformer, together with Prof.
Danny Ritter.
3) Co-Supervisor to Omer Lavi, towards his master degree in EE on MEMS filters, together with
Prof. Yael Nemirovsky
I have also participated in numerous doctoral and master student final examinations.
Awards:
1988 Technion comulative president award for excellence in studies.
1988 Award for writing an original work on the subject of philosophy of mathematics.
1991 Miriam and Aaron Gutwirth award for excellence in research.
1992 Miriam and Aaron Gutwirth award for excellence in research.
1993 Technion president award for excellence in teaching.
1993 The Israel Vacuum Society award for excellence in presenting a paper at the 13th.
conference in Tel. Aviv.
1994 Miriam and Aaron Gutwirth award for excellence in research.
1996 A special Miriam and Aaron Gutwirth award for excellence in research.
1997 Award for excellence in the Whiskey project (SiGe test equipment driver) - IBM.
2001 Award for exceptional innovation and high impact in the On-Chip Transmission Line
Design and Modeling project - IBM.
2002 IBM Outstanding Innovation Award (OIA) - for being the founder,
technical and managerial leader of the IBM On-Chip
Transmission Line Project.
2006 Award for winning the IBM FAB incentive program for research (suggesting and designing
an innovative design idea being fabricated in the FAB).
2007 OUTSTANDING OIA. (for non IBMers: a proven impact of more than
$100M to IBM business from my T-line research product level results).
List of Publications:
Thesis:
"Heterojunctions in the Alloy System Mercury Cadmium Telluride", M.Sc. Thesis, Technion, (1991).

5. “Heterostructures in II-VI Compounds for Ohmic Contacts and Devices as Solar Cells”, D.sc.
Thesis, Technion, (1998).
Original Papers in Refereed Professional Journals:
1. R. Fastow, D. Goren and Y. Nemirovsky, "Shockley-Read recombination and trapping in P-type
HgCdTe", J. Appl. Phys. 68(7), PP 3405-3412, (1990).
2. N. Amir, D. Goren, D. Fekete, and Y. Nemirovsky, "A Model for High Temperature Growth of
CdTe by Metal Organic Chemical Vapor Deposition", J. Elect. Mater. Vol. 20, No. 3, PP 227-
230 (1991).
3. Y. Nemirovsky, D. Goren and A. Ruzin, "A Model for the growth of CdTe by Metal Organic
Chemical Vapor Deposition", J. Elect. Mater. Vol. 20, No. 8, PP 609-613 (1991),
4. D. Goren, N. Amir and Y. Nemirovsky, "Determination of the Interface Charge between an
Epilayer and a substrate using Capacitance-Voltage Measurements", J. Appl. Phys. 71(1)
PP 318-325 (1992).
5. L. Djaloshinsky, D. Goren and Y. Nemirovsky, "Band diagram of a HgTe-CdTe Semimetal-
Semiconductor Abrupt Heterostructure", J. Appl. Phys. 73(9) PP 4473-4483 (1993).
6. D. Goren and Y. Nemirovsky, "Determination of the Interface Charge between a Heteroepitaxial
Layer and a Substrate using Capacitance-Voltage Measurements", J. Appl. Phys. 77(1), P-244
(1995)
7.*Y. Nemirovsky, N. Amir, D.Goren, G. Asa, E. Weiss and N. Mainzer, "The interface of
metalorganic chemical vapor deposition - CdTe/HgCdTe", J. Elect. Mater., Vol. 24(9), p. 1163
(1995).
8. D. Goren, G. Asa and Y. Nemirovsky, "An Analytical Approximation for the Free Electron
Density of HgCdTe Alloy System for 0 < x < 1", J. Appl. Phys. 78(9), p. 5845 (1995).
9. D. Goren, G. Asa and Y. Nemirovsky, "Barrier Formation in Graded HgTe/CdTe
Heterojunctions", J. Appl. Phys. Vol. 80(9), P. 5083, (1996).
10. D. Goren, N. Amir, E. Khanin, G. Asa, and Y. Nemirovsky, "single Crystalline CdTe Solar
Cells Grown by MOCVD", Solar Energy Materials and Solar Cells, 44(4), P. 341 november
(1996).
11. D. Goren, G. Asa and Y. Nemirovsky, "Photocurrent in CdTe NIP Solar Cells", Solar Energy
Materials and Solar Cells, November (1996).
12. Y. Nemirovsky, G. Gordon and D. Goren, "Measurement of Band Offsets and Interface Charges
by the C-V Matching method", J. Appl. Phys. December (1997).

6. 13. Thomas Zwick, Youri Tretiakov and David Goren, "On-Chip Transmission Line Measurement
and Modeling in IBM SiGe Technology up to 110[GHz]", IEEE Microwave and Wireless
Components Letters (1994).
14. Ullrich R. Pfeiffer and David Goren , “A 23dBm 60GHz Distributed
Active Transformer in a Silicon Process Technology”, IEEE Transactions on Microwave Theory
and Techniques, submitted september 2006. (accepted for publication).
15. Ullrich R. Pfeiffer and David Goren, "A 20dBm Fully-Integrated
60GHz SiGe Power Amplifier with Automatic Level Control", IEEE Journal of
Solid State Circuits, 2007. (accepted for publication)
16. A. Sayag, S. Levin, D. Regev, D. Zifra, S. Shapira, D. Goren and D. Ritter, “Slow Wave
transmission lines on silicon with grounded and floating substrate-shields: experiment and
electromagnetic simulation” IEEE, T-MTT, 2007.
17. R. Gordin, David Goren, S. Shlafman, D. Elad, M. Scheuermann, A. Young, F. Liu, X. Gu, C.
Tyberg, "Design and Modelling of Vertical Interconnects for 3DI Applications", Special Section
on TSV modeling in IEEE Transactions of Advanced Packaging, February 2011.
18. Xiaoxiong Gu, et al and David Goren, “Characterization of TSV-induced Loss and Substrate
Noise Coupling in Advanced Three-Dimensional CMOS SOI Technology”, IEEE T-CPMT,
Nov 2013.
Original Papers Presented at Professional Conferences:
1. D. Goren, L. Djaloshinsky and Y. Nemirovsky: "HgTe Contacts on CdTe", the 13th. annual
conference of The Israel Vacuum Society, Tel Aviv University, 4 May (1993).
2. D. Goren, E. Khanin, G. Asa, N. Amir, Y. Nemirovsky and A. Bar-Lev: "New CdTe Solar
Cells", Sixth Sede Boqer Symposium on Solar Electricity Production (International
Conference), Ben-Gurion National Solar Energy Center, Sede Boqer, 27-29 November (1994).
3. D. Goren, E. Khanin, G. asa, N. Amir and Y. Nemirovsky: "Single Crystalline Thin Film CdTe
Solar Cells", Workshop on the use of solar energy organized by the government of Israel in
cooperation with the united nations economic comission for Europe and the world energy
council, Tel Aviv, Israel 31 July - 4 August 1995
4. D. Goren, G. Asa, E. Khanin and Y. Nemirovsky "Modeling of the Charge Collection
Efficiency in CdTe NIP Solar Cells", Seventh Sede Boqer Symposium on Solar Electricity
Production (International Conference), Ben-Gurion National Solar Energy Center, Sede Boqer,
18-20 March (1996).
5. D. Goren, M. Zelikson, M. Leibowitz, and Frank Szenher, "2.5 GHz Pin Electronics SiGe Driver
for IC Test Equipment", IEEE 1999 BIPOLAR/BICMOS circuits and technology
meeting, pp. 31-33, Minneapolis, September (1999).

7. 6. D. Goren, Eliyahu Shamsaev and Israel Wagner, “A Novel Method for Stochastic Nonlinearity
Analysis of a CMOS Pipeline ADC”, IEEE Design Automation Conference DAC2001, Las
Vegas, June (2001).
7. D. Goren et al, “An Interconnect-Aware Methodology for Analog and Mixed Signal Design,
Based on High Bandwidth (Over 40 GHz) On-Chip Transmission Line Approach, IEEE
DATE02 conference, pp. 804-810, Paris (2002).
8. Rachel Gordin, David Goren and Michael Zelikson, “Modeling of On-Chip Transmission Lines
in High-Speed A&MS Design - The Low Frequency Inductance Calculation”, IEEE Signal
Propagation on Interconnects Conference, pp. 129-132 Pisa (2002).
9. David Goren, Michael Zelikson and Rachel Gordin, “Interconnect-Aware Design Methodology
for Analog and Mixed Signal Design in Silicon Based Technologies using High Bandwidth On-
Chip Transmission Lines", IEEE 2002 conference in Israel.
10. D. Goren, Rachel Gordin, and Michael Zelikson, "Modeling Methodology for On-Chip
Coplanar Transmission Lines over the Lossy Silicon Substrate", IEEE Signal Propagation on
Interconnects conference, Siena, (2003).
11. R. Gordin, D. Goren, and M. Zelikson, "Study of On-Chip Coplanar Transmission Lines over
the Lossy Silicon Substrate", IEEE Signal Propagation on Interconnects conference, Siena
(2003).
12. D. Goren et al, "On-Chip Interconnect-Aware Design and Modeling Methodology, based on
High Bandwidth Transmission Line Devices", IEEE DAC 2003 conference, Anaheim (2003).
13. R. Gordin and D. Goren, "Modeling Capacitance of On-Chip Coplanar Transmission Lines over
the Silicon Substrate", IEEE Signal Propagation on Interconnects Conference (2004).
14. D. Goren, A. Barger and A. Kolodny, "Design and Modeling of Network On-Chip
Interconnects",IEEE ICECS 2004 conference, Tel Aviv, December (2004).
15 A. Barger, D. Goren and A. Kolodny, “Simple Criterion for Maximizing Data Rate in NoC
Links”, 10th IEEE Workshop on Signal Propagation on Interconnects, Berlin, May (2006).
16. U. Pfeiffer, D. Goren, B. Floyd, and S. Reynolds, “SiGe Transformer Matched Power Amplifier
for Operation at Millimeter-Wave Frequencies”, IEEE ESSCIRC 2005 conference, Grenoble
France (2005).
17. B. Jagannathan, R. Groves, D. Goren, B. Floyd, D. Greenberg**, L. Wagner, S. Csutak, S. Lee,
D. Coolbaugh, and J. Pekarik, “RF CMOS for microwave and mm-wave applications”, IEEE
Sirf 2006 (Silicon Monolithic Integrated Circuits) conference, San Diego, CA (2006)
18. D. Goren, R. Gordin, S. Shlafman and Roi Carmon, “The Closed Environment Concept in VLSI
On-Chip Transmission Lines Design and Modeling” IEEE SPI 2006 conference, Berlin, May
2006.
19. David Goren, Shlomo Shlafman and Benny Sheinman ,"Silicon-chip

8. Single and Coupled Coplanar Transmission Line Measurements and Model Verification up to
50GHz", IEEE SPI 2007 conference, Genova Italy May 2007.
20. D. Goren, B. Sheinman, W. Woods, J. Rascoe and S. Shlafman, "ON-CHIP CMOS
COPLANAR TRANSMISSION LINE MEASUREMENTS AND MODEL VERIFICATION
UP TO 50 GHz", IEEE international COMCAS conference, Tel Aviv 2008.
21. David Goren and Yael Nemirovsky, "TeraMOS – SOI CMOS MEMS Focal Plane Matrix Chip
for Passive TeraHertz Imaging system (0.6-1.5THz)", IWPC conference, Herndon Virginia,
April 2009.
22. D. Corcos, D. Goren and Y Nemirovsky, "CMOS-SOI-MEMS Transistor (TeraMOS) for
TeraHertz Imaging", IEEE COMCAS conference, Tel Aviv, November 2009.
23. D. Goren et al, "CMOS-SOI-MEMS Transistor (TeraMOS) for
TeraHertz Imaging", IET (KTN) THz 10 conference, London, January 2010.
24. R. Gordin, D. Goren et al, “Design and Modeling Methodology of Vertical Interconnects
for 3DI Applications”, IEEE Trans. Components, Packaging and Manufacturing Technology,
Vol. 1, Issue 2, pp 163-167, 2011.
25. Naigang Wang, D. Goren et al. “Ultra-High-Q Air-Core Slab Inductors for On-Chip Power
Conversion”, IEDM, San Francisco, July 2014.
Participation in IBM internal conferences and customer connections:
o IBM Academy conference on Interconnect Needs for High Bandwidth and Frequency
Applications, June 1999
o IBM Academy conference on Next Generation Design Methodologies in Frequencies
Approaching 10GHz and above, June 2004
o IBM Academy conference on Analog Circuit Design, Technology, Modeling, and Tools,
September 2006
o IBM foundry seminar to customers in Israel, September 2005
o IBM foundry seminar - presenting the whole seminar (half day) to Israeli foundry customers
on On-Chip T-lines and SiGe technology, May 2006
o On going support and counseling to IBM designers worldwide for effective usage of On-Chip
T-lines
o Direct T-line delivery and support to IBM external customers (mainly Intel/Envara).
o Presentation on T-line based Server Global Clock distribution for the IBM expert clock design
community, November 2009.
o Presentation of my on-die voltage regulation q conversion work to design teams in IBM Haifa
Research Lab.

9. Patents:
1. David Goren, Viktor Ariel and Michael Zelikson, "CURRENT CONTROL OF OUTPUT
SWING", Filed as Docket IL919980021US1 in US on March 15 (1999).
2. Don Papae, David Goren and Michael Zelikson, Inventors, “DRIVER OUTPUT SWING
CONTROL USING THE MIRROR DRIVER CONCEPT”, US 09/715,423 Nov 17 2000.
3. David Goren, Eliyahu Samsaev and Israel Wagner, “A NOVEL CHARGE
CANCELLATION CIRCUIT FOR SWITCHED_CAPACITOR APPLICATIONS”, US
10/029,980 Dec 31 2001.
4. D. Goren, J. Katzenstein, Y. Tretiakov, METHOD FOR DETERMINING FRINGING
CAPACITANCES ON PASSIVE DEVICES WITHIN AN INTEGRATED CIRCUIT, US
7103488, 2006-09-05.
5. D. Goren, R. Gordin, M. Zelikson, INTERCONNECT-AWARE INTEGRATED CIRCUIT
DESIGN, US 7080340, 2006-07-18.
6. D. Goren, S. Shlafman, CAPACITANCE MODELING, US 7308662, 2007-12-11.
7. B. A. Floyd, D. Goren, U. Pfeiffer, S. K. Reynolds, CIRCUITS AND METHODS FOR
IMPLEMENTING TRANSFORMER-COUPLED AMPLIFIERS AT MILLIMETER
WAVE FREQUENCIES, US 7315212, 2008-01-01.
8. R. Gordin, D. Goren, DEVICE AND METHOD FOR REDUCING DISHING OF
CRITICAL ON-CHIP INTERCONNECT LINES, China ZL200510070268.3, 2008-02-20.
9. R. Gordin, D. Goren, SYSTEM AND METHOD OF MODELLING CAPACITANCE OF
ON-CHIP COPLANAR TRANSMISSION LINE STRUCTURES OVER A SUBSTRATE,
US 7392490, 2008-06-24.
10. D. Goren, U. Pfeiffer, B. Sheinman, S. Shlafman, INTEGRATED CIRCUIT
TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS,
US 7427801, 2008-09-23.
11. D. Goren, B. Sheinman, S. Shlafman, METHOD FOR HIGH FREQUENCY LIMIT
CAPACITANCE AND INDUCTANCE CALCULATION FOR COPLANAR ON-CHIP
STRUCTURE, US 7434186, 2008-10-07.
12. A. Alon, D. Goren, R. Gordin, B. Lifshitz, A. Sherman, M. Zelikson, AN
INTERCONNECT-AWARE METHODOLOGY FOR INTEGRATED CIRCUIT DESIGN,
US 7454733, 2008-11-18.
13. B. A. Floyd, D. Goren, U. Pfeiffer, S. K. Reynolds, CIRCUITS AND METHODS FOR
IMPLEMENTING TRANSFORMER-COUPLED AMPLIFIERS AT MILLIMETER
WAVE FREQUENCIES, US 7459981, 2008-12-02.

10. 14. B. A. Floyd, D. Goren, U. Pfeiffer, S. K. Reynolds, CIRCUITS AND METHODS FOR
IMPLEMENTING TRANSFORMER-COUPLED AMPLIFIERS AT MILLIMETER
WAVE FREQUENCIES, US 7629852, 2009-12-08.
15. D. Goren, U. Pfeiffer, R. Carmon, CIRCUITS AND METHODS FOR HIGH-EFFICIENCY
ON-CHIP POWER DETECTION, US 7676200, 2010-03-09.
16. Rachel Gordin, David Goren, Shlomo Shlafman and Roi Carmon, “Self Contained
Interconnect Devices in Dense VLSI Design Environment”, (IBM docket No. IL8-2006-
0064).
17. David Goren and Shlomo Shlafman, “A fast Method for Monte Carlo Simulation of
Transmission Lines”, (IBM docket No. IL8-2006-0069).
18. David Goren, Thomas Morf, Danny Elad and Israel Berger, "MONOLITHIC PASSIVE THz
DETECTOR WITH ENERGY CONCENTRATION ON SUB-PIXEL SUSPENDED
MEMS THREMAL SENSOR", US Patent Application No. 12/903235, filed Oct 13 2010.
19. David Goren, Shlomo Shlafman and Danny Elad: “STRUCTURE AND COMPACT
MODELING OF VARIABLE TRANSMISSION LINES”, US Patent Application Number:
13/251256
20. Wayne H Woods, David Goren, Benny Sheinman, Shlomo Shlafman, Rajendran
Krishnasamy, Phillip Chapman, Raminderpal Singh: “Bias-controlled deep trench substrate
noise isolation integrated circuit device structures”, U.S Patent 8021941
21. David Goren, Amir Alon, Betty Livshitz, Anatoly Sherman, Rachel Gordin, “Topologies
and Methodologies for AMS Integrated Circuit Design”, US Patent No. 8347244, July 2013
22. Rachel Gordin and David Goren, “METHOD AND SYSTEM FOR DESIGN AND
MODELING OF VERTICAL INTERCONNECTS FOR 3DI APPLICATIONS”,
US Patent No. 8448119, August 2013
23. David Goren (primary inventor), Naigang Wang and Leland Chang,
“Open Slab Inductor Device for efficient On-Chip Supply Voltage Conversion and
Regulation”, USPTO application 13/589280 (August 20 2012), USPTO publication
US20140049934A1 (February 20 2014).
24. David Goren (primary inventor), Naigang Wang and Leland Chang,
“Open Slab Inductor Device for efficient On-Chip Supply Voltage Conversion and
Regulation”, USPTO application 13/595016 (August 27 2012), USPTO publication
US20140053004A1 (February 20 2014).