The document discusses shared-memory systems and charts. It provides definitions and concepts related to modeling shared-memory concurrency using partial orders of events called pomsets. Specifically, it defines: - Shared-memory systems as consisting of registers, data, processes, actions, and rules for updating configurations. - Pomsets as labeled partial orders used to model executions. - The may-occur-concurrently relation for rules in a shared-memory system. - Partial-order semantics for runs of pomsets in a shared-memory system. - Shared-memory charts (SMCs) as pomsets with gates used to model specifications.

1. Shared-Memory Systems and Charts
Remi MORIN
´
Universite de la M´diterran´e
´ e e
Laboratoire d’Informatique Fondamentale de Marseille
CSR 2011 June 2011

2. Peterson’s mutual exclusion protocol
Process 1 Process 2
repeat: repeat:
f[1] ← true; f[2] ← true;
Turn ← 2; Turn ← 1;
wait (f[2] = false wait (f[1] = false
or Turn = 1); or Turn = 2);
Critical Section(1); Critical Section(2);
f[1] ← false; f[2] ← false;
1

3. Executions as partial orders (pomsets)
Process 1 Process 2
f[1]←true f[2]←true
Turn←1
Turn←2
Turn=2
Time
C.S.(2)
f[2]←false
f[2]=false
C.S.(1)
2

4. Foreword
Model and semantics
Expressive power MSO logic
Specifications with automata
Checking SMC specifications
2

5. A simple model for shared-memory systems
Let Σ be a fixed alphabet.
A shared-memory system consists of
• a set of registers R, a set of data D,
• a set of processes P
• for each action a ∈ Σ: a non-empty subset Loc(a) ⊆ P
• an initial configuration ı ∈ Q
• some final configurations F ⊆ Q.
• and for each action a ∈ Σ: a set of rules ∆a
• A configuration is a mapping q : R → D
• A rule is a triple ρ = (ν, a, ν′ ) where ν, ν′ : R ⇀ D
Guard Update
3

6. Sequential operational semantics
For any two states q, q′ ∈ Q and any rule ρ = (ν, a, ν′ ) ∈ ∆a ,
we denote by
• aρ = a the action performed by ρ
• Rρ = dom(ν) the subset of registers read by ρ
• Wρ = dom(ν′ ) the subset of registers modified by ρ
ρ
We put q→q′ if
• q|Rρ = ν (the rule is enabled in q)
• q′ |Wρ = ν′ (the rule is applied in q′ )
• q′ (r) = q(r) for all r ∈ R Wρ (nothing else happens inbetween)
4

7. Special case [Zielonka, RAIRO, 1987]
An asynchronous automaton is an SMS such that
• P = R and
• for all rules ρ ∈ ∆a , Rρ = Loc(a) = Wρ .
5

8. May-Occur-Concurrently relation
Let ρ, ρ′ ∈ ∆ be two rules.
We put ρ ρ′ if
• Loc(aρ ) ∩ Loc(aρ′ ) = ∅,
• Wρ ∩ (Rρ′ ∪ Wρ′ ) = ∅ and
• Wρ′ ∩ (Rρ ∪ Wρ ) = ∅.
Intuitively, two rules may occur concurrently if they correspond to
actions occurring on disjoint sets of processes and if each rule does
not modify the registers read or written by the other.
6

9. Partial-order semantics (1/2)
Let t = (E, , η) be a labeled partial order, i.e. a partially
ordered multiset (for short: a pomset) over Σ.
A run of t is a mapping ρ : E → ∆ such that
R0 : For all e ∈ E, aρ(e) = η(e)
(rule action matches event action)
R1 : For all e1 , e2 ∈ E with ρ(e1 ) ρ(e2 ), e1 e2 or e2 e1
(dependent rules cannot occur concurrently)
R2 : For all e1 , e2 ∈ E with e1 — 2 , ρ(e1 ) ρ(e2 )
≺e
(waiting means rule dependency)
where x— means: x ≺ y and x ≺ z
≺y y implies z = y.
7

10. Partial-order semantics (2/2)
Let H be a downward-closed subset of events (a prefix of t).
The configuration qρ,H reached after H with run ρ is such that

ν′ (r) if e = max{f ∈ H | r ∈ Wρ(e) }
ρ(e)
qρ,H (r) =
qρ,H (r) = ı(r) if there is no such event
A run ρ of t is applicable if the rule ρ(e) is enabled in qρ,↓e{e}
for all events e ∈ E.
An applicable run of t = (E, , η) is accepting if qρ,E ∈ F.
Definition
The language L(S) recognized by S collects all pomsets which
admit some accepting run.
8

11. Foreword
Model and semantics
Expressive power MSO logic
Specifications with automata
Checking SMC specifications
8

12. Question!
Let Σ = {p, c} and L be the set of all ladders.
p c p c p c
Does any SMS recognize this language?
9

13. MSO logic
The language of all ladders is MSO-definable by the conjunc-
tion of the following sentences:
∀y : Pc (y) → ∃x.(Pp (x) ∧ x—≺y)
∀x, z : Pp (x) → ∃y.(Pc (y) ∧ x—≺y))
∀x, y : (Pp (y) ∧ x y) → Pp (x)
10

14. Cut-bounded languages
The (universal) cut-width of t = (E, , η) is
CW(t) = max #{ (h, e) ∈ H x (E H) | h—≺e } p c
H prefix of t
Definition
The cut-bound B ∈ N ∪ {∞} of L is
sup{ CW(t) | t ∈ L }
L is cut-bounded if its cut-bound is ∞.
Example
The language of all ladders is not cut-bounded.
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15. First result
MSO-definable languages
¢
Cut-bounded languages
¢
Pomset languages
Theorem (Expressive power of shared-memory systems)
A pomset language is recognized by some finite SMS iff
it is MSO-definable and cut-bounded .
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16. Deterministic rules and weak unambiguity
A shared-memory system has deterministic rules if for all
actions a ∈ Σ and all valuations ν ∈ V there exists at most
one rule (ν, a, ν′ ) ∈ ∆.
A shared-memory system is weakly-unambiguous if each
pomset from L(S) admits a unique accepting run.
Theorem (Expressive power equivalence)
The language of any finite shared-memory system is the
language of a weakly-unambiguous finite shared-memory
system with deterministic rules.
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17. Unambiguous case
MSO-definable languages
¢
Media-bounded languages
¢
Cut-bounded languages
¢
Pomset languages
Theorem ≃ [M., IJFCS, 2010]
A pomset language is recognized by some unambiguous finite
SMS iff it is MSO-definable and media-bounded .
14

18. Deterministic case
MSO-definable languages
¢
Media-bounded languages
¢
Cut-bounded languages
¢
Pomset languages Consistent and coherent languages
Theorem ≃ [M., CONCUR’08]
A pomset language is recognized by some deterministic finite
SMS iff it is MSO-definable, media-bounded, coherent and
consistent .
15

19. Foreword
Model and semantics
Expressive power MSO logic
Specifications with automata
Checking SMC specifications
15

20. How to concatenate two pomsets?
a a
?
b x =
a b a
We have to distinguish between a’s
16

21. How to concatenate two pomsets?
a
a
a
?
a
a
a
a b
; a
a
a b
a
a
a
We have to distinguish between a’s
17

22. Pomsets with gates
Let G be a finite and non-empty set of gates .
We consider the extended alphabet Γ = Σ x 2G {∅}.
We put (a, H) Γ (a′ , H′ ) if H ∩ H′ ≠ ∅ or a = a′ .
Definition (Pomsets with gates)
A shared-memory chart (an SMC) is a pomset t = (E, , η) over
Γ such that we have either e1 e2 or e2 e1 for any two
events e1 and e2 with η(e1 ) Γ η(e2 ).
We denote by SMC the set of all SMCs.
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23. Product of SMCs
a, {x} a, {x}
b, {x} x =
a, {y} b, {x} a, {y}
Definition (Product of pomsets with gates)
Given two SMCs t1 = (E1 , 1 , η1 ) and t2 = (E2 , 2 , η2 ) the
asynchronous product t1 · t2 is the pomset t = (E, , η) where
E = E1 ∪ E2 , η = η1 ∪ η2 , and is the transitive closure of
1 ∪ 2 ∪{(e1 , e2 ) ∈ E1 x E2 | η(e1 ) Γ η(e2 )}
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24. Rational SMC languages
a
a, {x}
a
a, {x, y} a
a
a, {x}
a, {x} b, {y}
; a
a b
a
a, {x}
a
Definition (Automata over pomsets with gates)
An SMC specification is an automaton A = (Q, ı, →, F) where Q
is a finite set of states, with initial state ı, → ⊆ Q x SMC x Q
is a finite set of transitions labeled by SMCs, and F ⊆ Q is a
subset of final states.
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25. SMCs vs. Mazurkiewicz traces and MSCs
Any Mazurkiewicz trace can be regarded as an SMC where
each action is a gate and each event labeled by a is associated
with the set of actions dependent with a.
Similarly any message sequence chart can be regarded as an
SMC where gates are processes and each event is associated
with the (single) process where it occurs.
Moreover these identifications preserve the product of
traces and MSCs
In that way, SMCs appear as a formal generalization
of both Mazurkiewicz traces and message sequence
charts.
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26. Foreword
Model and semantics
Expressive power MSO logic
Specifications with automata
Checking SMC specifications
21

27. How to detect unbounded specifications?
Definition
Let t = (E, , η) be an SMC. The communication graph of t is the
directed graph CG(t) = (V, →) over the set V = e∈E π2 (η(e))
of active gates in t such that g → g′ if there are e, e′ ∈ E for
which g ∈ π2 (η(e)), g′ ∈ π2 (η(e′ )) and
• either η(e) Γ η(e′ )
• or e— ′ .
≺e
22

28. Checking unboundedness
Theorem
The pomset language LΣ (A) of an SMC specification A is
t1 tn
cut-bounded iff for any loop q0 →...→qn = q0 , all connected
components of the communication graph CG(t1 · ... · tn ) are
strongly connected.
Consequently checking for cut-boundedness of a given SMC specification is
decidable. It is actually easy to show that this problem is co-NP-complete.
23

29. How to detect non-implementable specifications?
We cannot decide whether an SMC specification describes
an implementable language, since this question is already
undecidable for Mazurkiewicz traces.
Definition
An SMC specification is loop-connected if for all loops
t1 tn
q0 →...→qn = q0 the communication graph of the SMC t1 · ... · tn
is connected.
Theorem
A cut-bounded language is MSO-definable if and only if it is
the language of a loop-connected SMC specification.
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30. Conclusion
• We have presented a characterization of the expressive
power of shared-memory systems
1. in terms of logic definability and cut-boundedness
2. in terms of automata over pomsets with gates.
• This model of concurrency and this algebraic framework
generalize the theory of Mazurkiewicz traces and
message sequence charts.
• These results should be extended soon to systems with
autoconcurrency .
• A simpler notion of communication graph may be designed.
25

31. Questions?

32. Unambiguity determinism
An SMS is unambiguous if each pomset admits at most one
applicable run.
An SMS is deterministic if for each a ∈ Σ and each reachable
configuration q, there exists at most one rule ρ ∈ ∆a such that
ρ
q→q′ .
Clearly:
Any deterministic SMS is unambiguous.
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