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CompactDFA: Scalable Pattern Matching Using
Longest Prefix Match Solutions
Abstract—
A central component in all contemporary intrusiondetection systems (IDSs) is their pattern
matching algorithms,which are often based on constructing and traversing a
deterministicfinite automaton (DFA) that represents the patterns. Whilethis approach
ensures deterministic time guarantees, modernIDSs need to deal with hundreds of patterns,
thus requiring tostore very large DFAs, which usually do not fit in fast memory.This results
in a major bottleneck on the throughput of the IDS,as well as its power consumption and
cost. We propose a novelmethod to compress DFAs by observing that the name used
bycommon DFA encoding is meaningless. While regular DFAs storeseparately each
transition between two states, we use this degreeof freedom and encode states in such a way
that all transitions to aspecific state are represented by asingle prefixthatdefines a set
ofcurrent states. Our technique applies to a large class of automata,which can be
categorized by simple properties. Then, the problemof pattern matching is reduced to the
well-studied problem ofLongest PrefixMatch(LPM), which can be solved either in
ternarycontent-addressable memory (TCAM), in commercially availableIP-lookup chips,
or in software. Specifically, we show that with aTCAM our scheme can reach a throughput
of 10 Gb/s with lowpower consumption.
CONCLUSION
This paper shows a reduction of the pattern matching problemto the IP-lookup problem.
Our scheme, CompactDFA, gets asan input a DFA and produces compressed rule sets;
each compressedrule defines the set of states that the rule applies to usingacommonprefix.

2. A state may match more than one rule, andin this case the rulewith the longest prefix
determines the action—exactlyas inthe IP forwarding case.With this reduction, we have
new arsenals of IP-lookup solutions,eitherin hardware or in software that can boost up
theperformance of p
attern matching, a major task in contemporarysecurity tools. In this paper, we focus on the
usage of TCAMfor pattern matching, a hardware device that is commonly usedfor IP-lookupand
packet classification and is deployed in manycore routers. We show that with
moderate size of TCAM spacewe can achieve fast pattern matching of 2 Gb/s with low
powerconsumption. Due to its small memory and power requirements,it is feasible to
implement our architecture with several TCAMsworkingin parallel, such that each TCAM
performs patternmatching on a different session, achieving a total throughput of10
Gb/sand beyond.
SYSTEM CONFIGURATION:-
HARDWARE CONFIGURATION:-
 Processor - Pentium –IV
 Speed - 1.1 Ghz
 RAM - 256 MB(min)
 Hard Disk - 20 GB
 Key Board - Standard Windows Keyboard
 Mouse - Two or Three Button Mouse
 Monitor - SVGA
SOFTWARE CONFIGURATION:-
 Operating System : Windows XP
 Programming Language : JAVA
 Java Version : JDK 1.6 & above.