This document discusses programming systems for high-performance computing. It begins by describing how distributed memory parallel systems replaced vector machines in the early 1990s. Message passing interface (MPI) became the dominant programming model. The document then examines reasons for MPI's success, including quick implementation, low cost, and good performance. It also discusses factors needed for a new programming system to succeed, such as addressing compelling needs and backward compatibility. While MPI will continue to be used, its scalability may become an issue for exascale systems.
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Is Multicore Hardware For General-Purpose Parallel Processing Broken? : NotesSubhajit Sahu
Highlighted notes of article while studying Concurrent Data Structures, CSE:
Is Multicore Hardware For General-Purpose Parallel Processing Broken?
By Uzi Vishkin
Communications of the ACM, April 2014, Vol. 57 No. 4, Pages 35-39
10.1145/2580945
Performance Characterization and Optimization of In-Memory Data Analytics on ...Ahsan Javed Awan
The document discusses performance optimization of Apache Spark on scale-up servers through near-data processing. It finds that Spark workloads have poor multi-core scalability and high I/O wait times on scale-up servers. It proposes exploiting near-data processing through in-storage processing and 2D-integrated processing-in-memory to reduce data movements and latency. The author evaluates these techniques through modeling and a programmable FPGA accelerator to improve the performance of Spark MLlib workloads by up to 9x. Challenges in hybrid CPU-FPGA design and attaining peak performance are also discussed.
The document provides an overview of parallelization using OpenMP. It discusses how parallel programming models have evolved with hardware to improve performance and efficiency. It describes shared memory and message passing models like OpenMP and MPI. The document compares OpenMP and MPI, detailing their pros and cons. It explains how OpenMP can be used to achieve parallelism on shared memory systems using compiler directives and libraries.
The document discusses implementing the Vector, Signal and Image Processing Library (VSIPL) on FPGA-based reconfigurable computers. It examines the challenges of doing so given VSIPL's boundless vectors and extensive scope. It presents an implementation of a single-precision floating-point boundless convolver as a proof of concept. The convolver achieved a 10x speed increase over software. Three potential architectures for broader FPGA VSIPL implementations are outlined.
PT-4142, Porting and Optimizing OpenMP applications to APU using CAPS tools, ...AMD Developer Central
The document discusses porting and optimizing OpenMP applications to AMD APUs using CAPS tools. It provides an overview of CAPS Enterprise, which develops compilers and tools to help customers leverage the performance of multi-core and many-core processors. It then discusses CAPS' OpenACC and OpenMP compilers, which can generate code for AMD GPUs and APUs from directive-based programming models. The document demonstrates how the CAPS OpenMP compiler can analyze OpenMP applications and generate optimized code for execution on AMD APUs, showing speedups for the HydroC benchmark application.
This Chapter provides a Background Review of Parallel and Distributed Computing. a focus is made on the concept of SISD, SIMD, MISD, MIMD.
It also gives an understanding of the notion of HPC (High-Performance Computing). A survey is done using some case studies to show why parallelism is needed. The chapter discusses the Amdahl's Law and the limitations. Gustafson's Law is also discussed.
Near Data Computing Architectures: Opportunities and Challenges for Apache SparkAhsan Javed Awan
The document discusses opportunities for improving Apache Spark performance using near data computing architectures. It proposes exploiting in-storage processing and 2D integrated processing-in-memory to reduce data movement between CPUs and memory. Certain Spark workloads like joins and aggregations that are I/O bound would benefit from in-storage processing, while iterative workloads are more suited for 2D integrated processing-in-memory. The document outlines a system design using FPGAs to emulate these architectures for evaluating Spark machine learning workloads like k-means clustering.
Optimizing High Performance Computing Applications for EnergyDavid Lecomber
Energy and power usage in high performance computing and supercomputing is a major issue for system owners and users - we take a look at what developers and administrators can do to reduce application energy costs
Is Multicore Hardware For General-Purpose Parallel Processing Broken? : NotesSubhajit Sahu
Highlighted notes of article while studying Concurrent Data Structures, CSE:
Is Multicore Hardware For General-Purpose Parallel Processing Broken?
By Uzi Vishkin
Communications of the ACM, April 2014, Vol. 57 No. 4, Pages 35-39
10.1145/2580945
Performance Characterization and Optimization of In-Memory Data Analytics on ...Ahsan Javed Awan
The document discusses performance optimization of Apache Spark on scale-up servers through near-data processing. It finds that Spark workloads have poor multi-core scalability and high I/O wait times on scale-up servers. It proposes exploiting near-data processing through in-storage processing and 2D-integrated processing-in-memory to reduce data movements and latency. The author evaluates these techniques through modeling and a programmable FPGA accelerator to improve the performance of Spark MLlib workloads by up to 9x. Challenges in hybrid CPU-FPGA design and attaining peak performance are also discussed.
The document provides an overview of parallelization using OpenMP. It discusses how parallel programming models have evolved with hardware to improve performance and efficiency. It describes shared memory and message passing models like OpenMP and MPI. The document compares OpenMP and MPI, detailing their pros and cons. It explains how OpenMP can be used to achieve parallelism on shared memory systems using compiler directives and libraries.
The document discusses implementing the Vector, Signal and Image Processing Library (VSIPL) on FPGA-based reconfigurable computers. It examines the challenges of doing so given VSIPL's boundless vectors and extensive scope. It presents an implementation of a single-precision floating-point boundless convolver as a proof of concept. The convolver achieved a 10x speed increase over software. Three potential architectures for broader FPGA VSIPL implementations are outlined.
PT-4142, Porting and Optimizing OpenMP applications to APU using CAPS tools, ...AMD Developer Central
The document discusses porting and optimizing OpenMP applications to AMD APUs using CAPS tools. It provides an overview of CAPS Enterprise, which develops compilers and tools to help customers leverage the performance of multi-core and many-core processors. It then discusses CAPS' OpenACC and OpenMP compilers, which can generate code for AMD GPUs and APUs from directive-based programming models. The document demonstrates how the CAPS OpenMP compiler can analyze OpenMP applications and generate optimized code for execution on AMD APUs, showing speedups for the HydroC benchmark application.
This Chapter provides a Background Review of Parallel and Distributed Computing. a focus is made on the concept of SISD, SIMD, MISD, MIMD.
It also gives an understanding of the notion of HPC (High-Performance Computing). A survey is done using some case studies to show why parallelism is needed. The chapter discusses the Amdahl's Law and the limitations. Gustafson's Law is also discussed.
Near Data Computing Architectures: Opportunities and Challenges for Apache SparkAhsan Javed Awan
The document discusses opportunities for improving Apache Spark performance using near data computing architectures. It proposes exploiting in-storage processing and 2D integrated processing-in-memory to reduce data movement between CPUs and memory. Certain Spark workloads like joins and aggregations that are I/O bound would benefit from in-storage processing, while iterative workloads are more suited for 2D integrated processing-in-memory. The document outlines a system design using FPGAs to emulate these architectures for evaluating Spark machine learning workloads like k-means clustering.
Near Data Computing Architectures for Apache Spark: Challenges and Opportunit...Spark Summit
Scale-out big data processing frameworks like Apache Spark have been designed to use on off the shelf commodity machines where each machine has the modest amount of compute , memory and storage capacity. Recent advancement in the hardware technology motivates understanding Spark performance on novel hardware architectures. Our earlier work has shown that the performance of Spark based data analytics is bounded by the frequent accesses to the DRAM. In this talk, we argue in favor of Near Data Computing Architectures that enable processing the data where it resides (e.g Smart SSDs and Compute Memories) for Apache Spark. We envision a programmable logic based hybrid near-memory and near-storage compute architecture for Apache Spark. Furthermore we discuss the challenges involved to achieve 10x performance gain for Apache Spark on NDC architectures.
The theory behind parallel computing is covered here. For more theoretical knowledge: https://sites.google.com/view/vajira-thambawita/leaning-materials
The document discusses component interface design. It defines an interface and contrasts an API approach with a protocol approach. It provides examples of common bad interface practices like deceptive APIs and DSLs as APIs. It also discusses issues with distributed systems like idempotency keys and the coupling spectrum. The document emphasizes designing error messages for the caller and distinguishing component purpose from implementation.
"This deck is from the opening session of the "Introduction to Programming Pascal (P100) with CUDA 8" workshop at CSCS in Lugano, Switzerland. The three-day course is intended to offer an introduction to Pascal computing using CUDA 8."
Watch the video: http://wp.me/p3RLHQ-gsQ
Learn more: http://www.cscs.ch/events/event_detail/index.html?tx_seminars_pi1%5BshowUid%5D=155
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
This document discusses using cloud computing technologies for data analysis applications. It presents different cloud runtimes like Hadoop, DryadLINQ, and CGL-MapReduce and compares their features to MPI. Applications like Cap3 and HEP are well-suited for cloud runtimes while iterative applications show higher overhead. Results show that as the number of VMs per node increases, MPI performance decreases by up to 50% compared to bare metal nodes. Integration of MapReduce and MPI could help improve performance of some applications on clouds.
Lean Model-Driven Development through Model-Interpretation: the CPAL design ...Nicolas Navet
We introduce a novel Model-Driven Development (MDD) flow which aims at more simplicity, more intuitive programming, quicker turnaround time and real-time predictability by leveraging the use of model-interpretation and providing the language abstractions needed to argue about the timing correctness on a high-level. The MDD flow is built around a language called Cyber-Physical Action Language (CPAL).
CPAL serves to describe both the functional behaviour of activities (i.e., the code of the function itself) as well as the functional architecture of the system (i.e., the set of functions, how they are activated, and the data flows among the functions). CPAL is meant to support two use-cases. Firstly, CPAL is a development and design space exploration environment for CPS with main features being the formal description, the editing, graphical representation and simulation of CPS models. Secondly, CPAL is a real-time execution platform. The vision behind CPAL is that a model is executed and verified in simulation mode on a workstation and the same model can be later run on an embedded board with a timing-equivalent run-time time behaviour.
Apache Hadoop India Summit 2011 talk "Adaptive Parallel Computing over Distri...Yahoo Developer Network
Adaptive parallel computing over distributed military computing infrastructures allows for highly compute intensive operations to be performed through parallel computing without large clusters. It intelligently uses existing spare computing capacity within a cloud of heterogeneous devices connected over challenged networks. Two approaches for adaptive parallel computing are MPI + DDS and Hadoop. MPI + DDS uses MPI for parallel code execution over a distributed network with DDS for reliable communication, while Hadoop uses MapReduce for parallelization and is highly scalable with good fault tolerance. However, both have challenges to address for use in resource-constrained military environments.
This technical brief discusses in-memory compute grids (IMCGs). It explains that IMCGs efficiently execute algorithms across a grid of computers similarly to how in-memory data grids (IMDGs) store and manage data. The brief outlines four key aspects of IMCGs: distributed deployment/provisioning; distributed resource management; distributed execution models; and distributed execution services. It provides details on specific capabilities within each aspect, such as GridGain's "zero deployment" and pluggable failover. The brief positions GridGain as a leading IMCG that combines these aspects to provide a full-featured distributed computing platform.
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DevOpsDays Tel Aviv DEC 2022 | Building A Cloud-Native Platform Brick by Bric...Haggai Philip Zagury
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In this talk, I will try to provide my personal journey from the "Operator to Developer's chair" and the practices which helped me along my journey as a Cloud-Native Dev ;)
This document reviews parallel computing and compares different parallel programming models. It discusses CPU and GPU architectures, highlighting that GPUs are designed for massive parallelism while CPUs balance computing power and flexibility. The document evaluates programming models based on supported system architectures, programming interfaces, workload partitioning, task assignment, synchronization methods, and communication models.
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This document provides an introduction to parallel computing. It begins with definitions of parallel computing as using multiple compute resources simultaneously to solve problems. Popular parallel architectures include shared memory, where all processors can access a common memory, and distributed memory, where each processor has its own local memory and they communicate over a network. The document discusses key parallel computing concepts and terminology such as Flynn's taxonomy, parallel overhead, scalability, and memory models including uniform memory access (UMA), non-uniform memory access (NUMA), and distributed memory. It aims to provide background on parallel computing topics before examining how to parallelize different types of programs.
Characteristics of Remote Persistent Memory – Performance, Capacity, or Local...inside-BigData.com
In this deck from the 2019 OpenFabrics Workshop in Austin, Paul Grun from Cray presents: Characteristics of Remote Persistent Memory – Performance, Capacity, or Locality. Which One(s)?
Persistent Memory exhibits several interesting characteristics including persistence, capacity and others. These (sometimes)competing characteristics may require system and server architects to make tradeoffs in system architecture. A sometimes overlooked tradeoff is in the locality of the persistent memory, i.e. locally-attached persistent memory versus remote(or fabric-attached) persistent memory. In this session, we explore some of those tradeoffs and take an early look at the emerging use cases for Remote Persistent Memory and how those may impact network architecture and API design.
Watch the video: https://wp.me/p3RLHQ-jZR
Learn more: https://www.openfabrics.org/2019-workshop-agenda-and-abstracts/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
The document discusses how to build a scalable mobile app. It explains that as an app grows in users it needs to scale to continue performing well. There are two approaches to scaling - scaling out by adding more servers or scaling up by improving existing servers. The document recommends designing for scalability from the start by using a multi-server architecture with load balancing, developing in the cloud, and following a microservices approach. It also stresses the importance of database architecture and optimization to ensure scalability.
This document discusses challenges in large scale machine learning. It begins by discussing why distributed machine learning is necessary when data is too large for one computer to store or when models have too many parameters. It then discusses various challenges that arise in distributed machine learning including scalability issues, class imbalance, the curse of dimensionality, overfitting, and algorithm complexities related to data loading times. Specific examples are provided of distributing k-means clustering and spectral clustering algorithms. Distributed implementations of support vector machines are also discussed. Throughout, it emphasizes the importance of understanding when and where distributed approaches are suitable compared to single machine learning.
This document provides an overview of distributed deep learning on Spark. It begins with a brief introduction to machine learning and deep learning. It then discusses why distributed systems are needed for deep learning due to the computational intensity. Spark is identified as a framework that can be used to build distributed deep learning systems. Two examples are described - SparkNet, which was developed at UC Berkeley, and CaffeOnSpark, developed at Yahoo. Both implement distributed stochastic gradient descent using a parameter server approach. The document concludes with demonstrations of Caffe and CaffeOnSpark.
This document discusses software for parallel programming, including parallel programming models, languages, compilers, and environments. It covers shared memory and message passing models, as well as data parallel programming. It also discusses language features that support parallelism, parallel language constructs, optimizing compilers for parallelism, and integrated parallel programming environments. Key topics are parallel debugging, performance monitoring, and program visualization tools. Representative parallel programming environments including Cray, Intel Paragon, and CM-5 software are also summarized.
TRACK F: OpenCL for ALTERA FPGAs, Accelerating performance and design product...chiportal
The document discusses OpenCL for accelerating FPGA designs. It provides an overview of technology trends favoring parallelism and programmability. OpenCL is presented as a solution to bring FPGA design closer to software development by providing a standard programming model and faster compilation. The document describes how OpenCL maps to FPGAs by compiling kernels to hardware pipelines and discusses examples accelerated using OpenCL on FPGAs, including AES encryption, option pricing, document filtering, and video compression.
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Scale-out big data processing frameworks like Apache Spark have been designed to use on off the shelf commodity machines where each machine has the modest amount of compute , memory and storage capacity. Recent advancement in the hardware technology motivates understanding Spark performance on novel hardware architectures. Our earlier work has shown that the performance of Spark based data analytics is bounded by the frequent accesses to the DRAM. In this talk, we argue in favor of Near Data Computing Architectures that enable processing the data where it resides (e.g Smart SSDs and Compute Memories) for Apache Spark. We envision a programmable logic based hybrid near-memory and near-storage compute architecture for Apache Spark. Furthermore we discuss the challenges involved to achieve 10x performance gain for Apache Spark on NDC architectures.
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"This deck is from the opening session of the "Introduction to Programming Pascal (P100) with CUDA 8" workshop at CSCS in Lugano, Switzerland. The three-day course is intended to offer an introduction to Pascal computing using CUDA 8."
Watch the video: http://wp.me/p3RLHQ-gsQ
Learn more: http://www.cscs.ch/events/event_detail/index.html?tx_seminars_pi1%5BshowUid%5D=155
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
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We introduce a novel Model-Driven Development (MDD) flow which aims at more simplicity, more intuitive programming, quicker turnaround time and real-time predictability by leveraging the use of model-interpretation and providing the language abstractions needed to argue about the timing correctness on a high-level. The MDD flow is built around a language called Cyber-Physical Action Language (CPAL).
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Apache Hadoop India Summit 2011 talk "Adaptive Parallel Computing over Distri...Yahoo Developer Network
Adaptive parallel computing over distributed military computing infrastructures allows for highly compute intensive operations to be performed through parallel computing without large clusters. It intelligently uses existing spare computing capacity within a cloud of heterogeneous devices connected over challenged networks. Two approaches for adaptive parallel computing are MPI + DDS and Hadoop. MPI + DDS uses MPI for parallel code execution over a distributed network with DDS for reliable communication, while Hadoop uses MapReduce for parallelization and is highly scalable with good fault tolerance. However, both have challenges to address for use in resource-constrained military environments.
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This document provides an introduction to parallel computing. It begins with definitions of parallel computing as using multiple compute resources simultaneously to solve problems. Popular parallel architectures include shared memory, where all processors can access a common memory, and distributed memory, where each processor has its own local memory and they communicate over a network. The document discusses key parallel computing concepts and terminology such as Flynn's taxonomy, parallel overhead, scalability, and memory models including uniform memory access (UMA), non-uniform memory access (NUMA), and distributed memory. It aims to provide background on parallel computing topics before examining how to parallelize different types of programs.
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Watch the video: https://wp.me/p3RLHQ-jZR
Learn more: https://www.openfabrics.org/2019-workshop-agenda-and-abstracts/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
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This document discusses software for parallel programming, including parallel programming models, languages, compilers, and environments. It covers shared memory and message passing models, as well as data parallel programming. It also discusses language features that support parallelism, parallel language constructs, optimizing compilers for parallelism, and integrated parallel programming environments. Key topics are parallel debugging, performance monitoring, and program visualization tools. Representative parallel programming environments including Cray, Intel Paragon, and CM-5 software are also summarized.
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How to Get CNIC Information System with Paksim Ga.pptxdanishmna97
Pakdata Cf is a groundbreaking system designed to streamline and facilitate access to CNIC information. This innovative platform leverages advanced technology to provide users with efficient and secure access to their CNIC details.
HCL Notes und Domino Lizenzkostenreduzierung in der Welt von DLAUpanagenda
Webinar Recording: https://www.panagenda.com/webinars/hcl-notes-und-domino-lizenzkostenreduzierung-in-der-welt-von-dlau/
DLAU und die Lizenzen nach dem CCB- und CCX-Modell sind für viele in der HCL-Community seit letztem Jahr ein heißes Thema. Als Notes- oder Domino-Kunde haben Sie vielleicht mit unerwartet hohen Benutzerzahlen und Lizenzgebühren zu kämpfen. Sie fragen sich vielleicht, wie diese neue Art der Lizenzierung funktioniert und welchen Nutzen sie Ihnen bringt. Vor allem wollen Sie sicherlich Ihr Budget einhalten und Kosten sparen, wo immer möglich. Das verstehen wir und wir möchten Ihnen dabei helfen!
Wir erklären Ihnen, wie Sie häufige Konfigurationsprobleme lösen können, die dazu führen können, dass mehr Benutzer gezählt werden als nötig, und wie Sie überflüssige oder ungenutzte Konten identifizieren und entfernen können, um Geld zu sparen. Es gibt auch einige Ansätze, die zu unnötigen Ausgaben führen können, z. B. wenn ein Personendokument anstelle eines Mail-Ins für geteilte Mailboxen verwendet wird. Wir zeigen Ihnen solche Fälle und deren Lösungen. Und natürlich erklären wir Ihnen das neue Lizenzmodell.
Nehmen Sie an diesem Webinar teil, bei dem HCL-Ambassador Marc Thomas und Gastredner Franz Walder Ihnen diese neue Welt näherbringen. Es vermittelt Ihnen die Tools und das Know-how, um den Überblick zu bewahren. Sie werden in der Lage sein, Ihre Kosten durch eine optimierte Domino-Konfiguration zu reduzieren und auch in Zukunft gering zu halten.
Diese Themen werden behandelt
- Reduzierung der Lizenzkosten durch Auffinden und Beheben von Fehlkonfigurationen und überflüssigen Konten
- Wie funktionieren CCB- und CCX-Lizenzen wirklich?
- Verstehen des DLAU-Tools und wie man es am besten nutzt
- Tipps für häufige Problembereiche, wie z. B. Team-Postfächer, Funktions-/Testbenutzer usw.
- Praxisbeispiele und Best Practices zum sofortigen Umsetzen
In the rapidly evolving landscape of technologies, XML continues to play a vital role in structuring, storing, and transporting data across diverse systems. The recent advancements in artificial intelligence (AI) present new methodologies for enhancing XML development workflows, introducing efficiency, automation, and intelligent capabilities. This presentation will outline the scope and perspective of utilizing AI in XML development. The potential benefits and the possible pitfalls will be highlighted, providing a balanced view of the subject.
We will explore the capabilities of AI in understanding XML markup languages and autonomously creating structured XML content. Additionally, we will examine the capacity of AI to enrich plain text with appropriate XML markup. Practical examples and methodological guidelines will be provided to elucidate how AI can be effectively prompted to interpret and generate accurate XML markup.
Further emphasis will be placed on the role of AI in developing XSLT, or schemas such as XSD and Schematron. We will address the techniques and strategies adopted to create prompts for generating code, explaining code, or refactoring the code, and the results achieved.
The discussion will extend to how AI can be used to transform XML content. In particular, the focus will be on the use of AI XPath extension functions in XSLT, Schematron, Schematron Quick Fixes, or for XML content refactoring.
The presentation aims to deliver a comprehensive overview of AI usage in XML development, providing attendees with the necessary knowledge to make informed decisions. Whether you’re at the early stages of adopting AI or considering integrating it in advanced XML development, this presentation will cover all levels of expertise.
By highlighting the potential advantages and challenges of integrating AI with XML development tools and languages, the presentation seeks to inspire thoughtful conversation around the future of XML development. We’ll not only delve into the technical aspects of AI-powered XML development but also discuss practical implications and possible future directions.
Communications Mining Series - Zero to Hero - Session 1DianaGray10
This session provides introduction to UiPath Communication Mining, importance and platform overview. You will acquire a good understand of the phases in Communication Mining as we go over the platform with you. Topics covered:
• Communication Mining Overview
• Why is it important?
• How can it help today’s business and the benefits
• Phases in Communication Mining
• Demo on Platform overview
• Q/A
3. In The Beginning
§ Distributed
Memory
Parallel
Systems
are
replacing
vector
machines.
§ CM-‐5
(using
SPARC)
announced
1991
– 1024
node
CM-‐5
is
at
top
of
first
TOP500
list
in
1993
§ Problem:
Need
to
rewrite
all
(vector)
code
in
new
programming
model
May
2013
CCGrid13
3
4. Some of the Attempts
May
2013
CCGrid13
4
1990
1995
2000
2005
2010
HPF
HPF1
HPF2
MPI
MPI1
MPI2
MPI3
UPC
CAF
PGAS
OpenMP
V1
V2
V3
Shared
Memory
GPGPU
OpenCL
OpenACC
Widely
used
Does
not
scale
Too
early
to
say
LiAle
to
no
public
use
5. Questions
1. Message-‐passing
is
claimed
to
be
“a
difficult
way
to
program”.
If
so,
why
is
it
the
only
widely
used
way
to
program
HPC
systems?
2. What’s
needed
for
a
programming
system
to
succeed?
3. What’s
needed
in
a
good
HPC
parallel
programming
system?
May
2013
CCGrid13
5
6. Definitions
§ Parallel
programming
model:
a
parallel
programming
paOern
– Bulk
synchronous,
SIMD,
message-‐passing…
§ Parallel
programming
system:
a
language
or
library
that
implements
one
or
mulUple
models
– MPI+C,
OpenMP…
§ MPI+C
implements
mulUple
models
(message-‐passing,
bulk
synchronous…)
§ MPI+OpenMP
is
a
hybrid
system
May
2013
CCGrid13
6
7. Why Did MPI Succeed?
Beyond
the
expectaUons
of
its
designers
May
2013
CCGrid13
7
8. Some Pragmatic Reasons for the Success of MPI
§ Clear
need:
Each
of
the
vendors
had
its
own
message-‐passing
library;
there
were
no
major
differences
between
them,
and
no
significant
compeUUve
advantage.
Users
wanted
portability
– Same
was
true
of
OpenMP
§ Quick
implementaHon:
MPI
libraries
were
available
as
soon
as
the
standard
was
ready
– As
disUnct
from
HPF
[rise
&
fall
of
HPF]
§ Cheap:
A
few
people-‐years
(at
most)
to
port
MPI
to
a
new
placorm
May
2013
CCGrid13
8
9. Some Technical Reasons for the Success of MPI
§ Good
performance:
HPC
programming
is
about
performance.
An
HPC
programming
system
must
provide
to
the
user
the
raw
HW
performance
of
the
HW.
MPI
mostly
did
that
§ Performance
portability:
Same
opUmizaUons
(reduce
communicaUon
volume,
aggregate
communicaUon,
use
collecUves,
overlap
computaUon
and
communicaUon)
are
good
for
any
placorm
– This
was
a
major
weakness
of
HPF
[rise
&
fall
of
HPF]
§ Performance
transparency:
Few
surprises;
a
simple
performance
model
(e.g.,
postal
model
–
a+bm)
predicts
well
communicaUon
performance
most
of
the
Ume
– Another
weakness
of
HPF
May
2013
CCGrid13
9
10. How About Productivity?
§ Coding
producUvity
is
much
overrated:
A
relaUve
small
fracUon
of
programming
effort
is
coding:
Debugging,
tuning,
tesUng
&
validaUng
are
where
most
of
the
Ume
is
spent.
MPI
is
not
worse
than
exisUng
alternaUves
in
these
aspects
of
code
development.
§ MPI
code
is
very
small
fracUon
of
a
large
scienUfic
framework
§ Programmer
producUvity
depends
on
enUre
tool
chain
(compiler,
debugger,
performance
tools,
etc.).
It
is
easier
to
build
a
tool
chain
for
a
communicaUon
library
than
for
a
new
language
May
2013
CCGrid13
10
11. Some Things MPI Got Right
§ Communicators
– Support
for
Ume
and
space
mulUplexing
§ CollecUve
operaUons
§ Orthogonal,
object-‐oriented
design
May
2013
CCGrid13
11
ApplicaUon
Library
ApplicaUon
App1
Coupler
App2
App1
App2
12. MPI Forever?
§ MPI
will
conUnue
to
be
used
in
the
exascale
Ume
frame
§ MPI
may
increasingly
become
a
performance
boOleneck
at
exascale
§ It’s
not
MPI;
it
is
MPI+X,
where
X
is
used
for
node
programming.
The
main
problem
is
a
lack
of
adequate
X.
May
2013
CCGrid13
12
13. It is Hard to Kill MPI
§ By
now,
there
are
10s
of
millions
LOCs
that
use
MPI
§ MPI
conUnues
to
improve
(MPI3)
§ MPI
performance
can
sUll
be
improved
in
various
ways
(e.g.,
JIT
specializaUon
of
MPI
calls)
§ MPI
scalability
can
sUll
be
improved
in
a
variety
of
ways
(e.g.,
distributed
data
structures)
§ The
number
of
nodes
in
future
exascale
systems
will
not
be
significantly
higher
than
the
current
numbers
May
2013
CCGrid13
13
15. Factors for Success
§ Compelling
need
– MPI
runs
out
of
steam
(?)
– OpenMP
runs
out
of
steam
(!)
– MPI+OpenMP+Cuda+…
becomes
too
baroque
– Fault
tolerance
and
power
management
require
new
programming
models
§ SoluUon
to
backward
compaUbility
problem
§ Limited
implementaUon
cost
&
fast
deployment
§ Community
support
(?)
May
2013
CCGrid13
15
16. Potential Problems with MPI
§ Sooware
overhead
for
communicaUon
– Strong
scaling
requires
finer
granularity
§ MPI
processes
with
hundreds
of
threads
–
serial
boOlenecks
§ Interface
to
node
programming
models:
The
basic
design
of
MPI
is
for
a
single
threaded
process;
tasks
are
not
MPI
enUUes
§ Interface
to
heterogeneous
nodes
(NUMA,
deep
memory
hierarchy,
possibly
non-‐coherent
memory)
§ Fault
tolerance
–
No
good
excepUon
model
§ Good
rDMA
leverage
(low-‐overhead
one-‐sided
communicaUon)
May
2013
CCGrid13
16
17. Potential Problems with OpenMP
§ No
support
for
locality
–
flat
memory
model
§ Parallelism
is
most
naturally
expressed
using
fine
grain
parallelism
(parallel
loops)
and
serializing
constructs
(locks,
serial
secUons)
§ Support
for
heterogeneity
is
lacking:
– OpenACC
has
narrow
view
of
heterogeneous
architecture
(two,
noncoherent
memory
spaces)
– No
support
for
NUMA
(memory
heterogeneity)
(There
is
significant
uncertainty
on
the
future
node
architecture)
May
2013
CCGrid13
17
18. New Needs
§ Current
mental
picture
of
parallel
computaUon:
Equal
computaUon
effort
means
equal
computaUon
Ume
– Significant
effort
invested
to
make
this
true:
jiOer
avoidance
§ Mental
picture
is
likely
to
be
inaccurate
in
the
future
– Power
management
is
local
– Fault
correcUon
is
local
§ Global
synchronizaUon
is
evil!
May
2013
CCGrid13
18
19. What Do We Need in a Good HPC
Programming System?
May
2013
CCGrid13
19
20. Our Focus
May
2013
CCGrid13
20
MulUple
Systems
Specialized
(?)
SoQware
Stack
Specialized
(?)
SoQware
Stack
Specialized
(?)
SoQware
Stack
Common
low-‐level
parallel
programming
system
Automated
mapping
Domain-‐Specifc
programming
system
Domain-‐Specifc
programming
system
21. Shared Memory Programming Model
Basics:
§ Program
expresses
parallelism
and
dependencies
(ordering
constraint)
§ Run-‐Ume
maps
execuUon
threads
so
as
to
achieve
load
balance
§ Global
name
space
§ CommunicaUon
is
implied
by
referencing
§ Data
is
migrated
close
to
execuUng
thread
by
caching
hardware
§ User
reduces
communicaUon
by
ordering
accesses
so
as
to
achieve
good
temporal,
spaUal
and
thread
locality
Incidentals:
§ Shared
memory
programs
suffer
from
races
§ Shared
memory
programs
are
nondeterminisUc
§ Lack
of
collecUve
operaUons
§ Lack
of
parallel
teams
May
2013
CCGrid13
21
App1
Coupler
App2
App1
App2
22. Distributed Memory Programming Model (for HPC)
Basics:
§ Program
distributes
data,
maps
execuUon
to
data,
and
expresses
dependencies
§
CommunicaUon
is
usually
explicit,
but
can
be
implicit
(PGAS)
– Explicit
communicaUon
needed
for
performance
– User
explicitly
opUmizes
communicaUon
(no
caching)
Incidentals:
§ Lack
of
global
name
space
§ Use
of
send-‐receive
May
2013
CCGrid13
22
23. Hypothetical Future Architecture: (At Least) 3 Levels
§ Assume
core
heterogeneity
is
transparent
to
user
(alternaUve
is
too
depressing…)
May
2013
CCGrid13
23
Node
…
Core
Core
Coherence
domain
…
Core
Core
Coherence
domain
…
…
Node
…
Core
Core
Coherence
domain
…
Core
Core
Coherence
domain
…
…
...
...
24. Possible Direction
§ Need,
for
future
nodes,
a
model
intermediate
between
shared
memory
and
distributed
memory
– Shared
memory:
global
name
space,
implicit
communicaUon
and
caching
– Distributed
memory:
control
of
data
locaUon
and
communicaUon
aggregaUon
– With
very
good
support
for
latency
hiding
and
fine
grain
parallelism
§ Such
a
model
could
be
used
uniformly
across
the
enUre
memory
hierarchy!
– With
a
different
mix
of
hardware
and
sooware
support
May
2013
CCGrid13
24
25. Extending the Shared Memory Model Beyond
Coherence Domains – Caching in Memory
§ Assume
(to
start
with)
a
fixed
parUUon
of
data
to
“homes”
(locales)
§ Global
name
space:
easy
§ Implicit
communicaUon
(read/write):
performance
problem
– Need
accessing
data
in
large
user-‐defined
chunks
-‐>
• User-‐defined
“logical
cache
lines”
(data
structure,
Ule;
data
set
that
can
be
moved
together
• User
(or
compiler)
inserted
“prefetch/flush”
instrucUons
(acquire/release
access)
– Need
latency
hiding
-‐>
• Prefetch
or
“concurrent
mulUtasking”
May
2013
CCGrid13
25
26. Living Without Coherence
§ ScienUfic
codes
are
ooen
organized
in
successive
phases
where
a
variable
(a
family
of
variables)
is
either
exclusively
updated
or
shared
during
the
enUre
phase.
Examples
include
– ParUcle
codes
(Barnes-‐Hut,
molecular
dynamics…)
– IteraUve
solvers
(finite
element,
red-‐black
schemes..)
☛ Need
not
track
status
of
each
“cache
line”;
sooware
can
effect
global
changes
at
phase
end
May
2013
CCGrid13
26
27. How This Compares to PGAS Languages?
§ Added
ability
to
cache
and
prefetch
– As
disUnct
from
copying
– Data
changes
locaQon
without
changing
name
§ Added
message
driven
task
scheduling
– Necessary
for
hiding
latency
of
reads
in
irregular,
dynamic
codes
May
2013
CCGrid13
27
28. Is Such Model Useful?
§ Facilitates
wriUng
dynamic,
irregular
code
(e.g.,
Barnes-‐Hut)
§ Can
be
used,
without
performance
loss,
by
adding
annotaUons
that
enable
early
binding
May
2013
CCGrid13
28
29. Example: caching
§ General
case:
“Logical
cache
line”
defined
as
a
user-‐provided
class
§ Special
case:
Code
for
simple,
frequently
used
Ule
types
is
opUmized
&
inlined
(e.g.,
rectangular
submatrices)
[Chapel]
§ General
case:
need
dynamic
space
management
and
(possibly)
an
addiUonal
indirecUon
(ooen
avoided
via
pointer
swizzling)
§ Special
case:
same
remote
data
(e.g.,
halo)
is
repeatedly
accessed.
Can
preallocate
local
buffer
and
compile
remote
references
into
local
references
(at
compile
Ume,
for
regular
halos,
aoer
data
is
read,
for
irregular
halos)
May
2013
CCGrid13
29
30. There is a L o n g List of Additional Issues
§ How
general
are
home
parUUons?
– Use
of
“owner
compute”
approach
requires
general
parUUon
– Complex
parUUons
lead
to
expensive
address
translaUon
§ Is
the
number
of
homes
(locales)
fixed?
§ Can
data
homes
migrate?
– No
migraUon
is
a
problem
for
load
balancing
and
failure
recovery
– Usual
approach
to
migraUon
(virtualizaUon
&
overdecomposiUon)
unnecessarily
reduces
granularity
§ Can
we
update
(parameterized)
decomposiUon,
rather
than
virtualize
locaUons?
May
2013
CCGrid13
30
31. There is a L o n g List of Additional Issues (2)
§ Local
view
of
control
or
global
view?
Forall i on A[i] A[i] = foo(i)
– TransformaUon
described
in
terms
of
global
data
structure
Foreach A.tile foo(tile)
– TransformaUon
described
in
terms
of
local
data
structure
(with
local
references)
– There
are
strong,
diverging
opinions
on
which
is
beOer
§ Hierarchical
data
structures
&
hierarchical
control
§ ExcepUon
model
§ …
May
2013
CCGrid13
31