1. ECE 354
Lab 2: Capturing and Displaying
Digital Image
ECE Department: University of Massachusetts, Amherst

2. Big Picture Introduction
 Understand the existing SOPC builder setup with new
modification
 Capturing image using camera
 Storing the captured image in the frame buffer
 Display the image on a CRT monitor with the use of a VGA
p y
g
controller
 Perform simple image processing
 Primarily written in C code
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3. Additional Hardware
 TRDB_D5M Digital Camera
 S i lC
Serial Connector and
t
d
Cable
 CRT Monitor
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4. Skills to learn
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Integrate code with preexisting code
Understanding previously written code
Connect to a device that you did not design
Writing a communication protocol to somebody else’s
specifications
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5. Steps taken to complete project
Begin by looking over camera documentation
Understand SOPC builder setup given
Write a C program to capture data into FIFO buffer
C program to transfer data from FIFO to flash memory
Gain knowledge of how the DE2_NIOS_HOST_MOUSE_VGA
f
project displays an image to the CRT monitor
 Use that knowledge to display your image
 Finally have fun performing image processing
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6. Lab2 Setup
[1]
[1] TRDB_D5M_Userguide
http://www.terasic.com.tw/attachment/archive/281/TRDB_D5M_UserGuide.pdf
p
_
_
p
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7. Overview of DE2_NIOS_HOST_MOUSE_VGA project
DE2 NIOS HOST MOUSE VGA
 Implements a monochrome display, with a preloaded image,
where the user can draw on it with a mouse
 USB mouse should be connected USB HOST port
 CRT monitor should be connected to the VGA port
 You will integrate your code so that the project displays the
image received from digital camera
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8. SOPC builder setup:

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Based on DE2_NIOS_HOST_MOUSE_VGA
The program code is stored in SRAM memory
e p og a
s sto ed
S
e o y
Parallel Input/output interface(PIO) for LED, switches
Camera Avalon Interface(Camera_IF) helps in transferring
image data
The dedicated SDRAM is used as a frame buffer that holds
a single frame of video at the time.
The SDRAM is controlled and accessed by using the four
fourport controller hardware
 Controller can be used to read or write to the SDRAM
through its four FIFO buffers
buffers.
Flash controller is used to control the data transfer to flash
memory
VGA controller di l i
t ll displaying d t on t VGA
data
to
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9. Block diagram of Terasic camera system

TRDB_D5M_Userguide
http://www.terasic.com.tw/attachment/archive/281/TRDB_D5M_UserGui
de.pdf
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10. Hardware Modules for this Lab
 SDRAM-Multiport Controller:
This
Thi module i a generic 4 port SDRAM controller.
d l is
i
t
t ll
It uses two FIFO buffers for inputs (writing) and
two FIFO buffers for outputs. The FIFO buffers
are made using Altera MegaFunctions and are 16
bit wide and can hold up to 512 words of this
size.
size In this system the SDRAM controller is used
as a frame buffer to hold a single picture frame
 Flash Controller
 VGA controller
 Camera Avalon Interface module
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11. To get started with the lab
 Run the DE2_NOIS_MOUSE_VGA_project present in the
project folder given to you
 Run SOPC builder and understand each of the components
added and configuration present
 Hardware component files are p
p
present under IP folder
•
•
It contains SDRAM_4 port controller components
Camera Avalon Interface
 Software components are present under the software folder
• Hello_led_0 has all the required software component files
• Some part of code is given in this project which is present in
file hello led.c
e e o_ ed c
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12. Information for C program
 C code to capture camera data and store it in frame buffer
 Picture taken at 640x480 has 3 data per pixel times 8 bits
(at least) each, this would mean a total of 7,372800Mbit or
921,6 Kbyte
 So efficient storage design required
 Recommended C code function
• Camera Capture
• Copying RGB(pixels) d
(
l ) data f
from FIFO to Flash memory
l h
• Using flash memory to store the pixel data before
transferring to VGA output
 Program space memory is less (SRAM).Avoid unnecessary
buffers. Write programs as efficient as possible
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13. Readout modes: D5M camera
 The Terasic D5M camera supports a function
called :
1. binning -This function reduces the resolution
of the image by averaging pixels together
g
y
g gp
g
2. Skipping - reduces the output resolution
without affecting th fi ld f i
ith t ff ti
the field-of-view. It does this by
d
thi b
not sampling entire rows and columns of pixels.
p
p
p
yp
A skip 2X mode skips one of pixels for every pair
of output.
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14. Displaying image through VGA controller
 Look through VGA.h for
VGA functions
 Write C code similar to
that shown below that
calls functions from VGA.h
to display each pixel
 It is your job to come up
with an equation to check
each pixel in your receive
buffer
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15. Additional information
 The image should be 2-bit gray scale with a resolution of
640x480
 Uncompressed image
 I recommend starting with the smallest image resolution
and work from there
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16. Image Processing
 It is required that you implement two forms of
image processing
 Recommendations include:
•
•
•
•
•
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Add timestamp onto image
p
g
Counter to keep track of number of pictures taken
Rotate, mirror, invert image
Simple edge detection (challenging)
Detect changes in images (challenging)
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17. References for software and hardware design in Lab2
 I recommend looking over section II of the NIOS II Software
Developer’s Handbook
g project titled- Embedded Demonstrator for Video
 Go through p j
Presentation and Manipulation by Cato Marwell Jonasse (Google
it) to get clear insight on hardware description for this project
(
(You can g through chapter 9 specifically)
go
g
p
p
y)
 DE2_NIOS_HOST_MOUSE_VGA project
 NIOS II Software Developer’s Handbook
• http://www.altera.com/literature/lit-nio2.jsp
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18. Where does this project lead?
 Next lab will be on the topic sending data over a network
• Sending image between DE2 boards
• Don’t worry if you have not taken computer networking
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19. Questions and Comments
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20. Back up
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