Thesis Donato Slides EN

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Thesis Donato Slides EN

  1. 1. A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 26th July 2005 Alberto Donato donato@elet.polimi.it Relatore: Correlatore: Prof. Fabrizio Ferrandi Ing. Marco Domenico Santambrogio
  2. 2. Index - Aim of the work - The reconfigurable platform: • Hardware architecture • Partial dynamic reconfiguration flows - Software architecture: • The ICAP kernel module • The IP-Core Manager - Tests and results - Future work Alberto Donato 2/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  3. 3. Aim of the Work reconfiguration capabilities allow creation of Systems-on-Chip FPGAs whose hardware components can be modified, added and removed at runtime. Provide software support for dynamic partial reconfiguration on Systems-on-Chip running the LINUX operating system. Issues: • Partial reconfiguration process management from the OS • Addition and removal of hardware reconfigurable components • Automatic loading and unloading of specific drivers for the IP-Cores upon components configuration/deconfiguration • Easier programming interface for specific drivers Alberto Donato 3/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  4. 4. Hardware Architecture Architecture derived from Caronte: • General purpose processor BUS BUS • Memory (BRAM, DDR) • ICAP Reconfigurable General Purpose Module • Reconfigurable components Processor Reconfigurable Bridge Module Memory Reconfigurable Module ICAP Alberto Donato 4/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  5. 5. Hardware Architecture (2) PLB bus OPB bus Components of the hardware architecture: PPC405 Interrupt • PPC405 processor Processor Controler • SRAM and SDRAM memory SRAM UART Memory • Flash memory Interface • Xilinx ICAP IP-Core SDRAM Memory Ethernet Controller Bridge peripherals: I/O Flash Memory • Xilinx UARTLite interface GPIO LEDs BRAM • Ethernet controller Memory • GPIO LEDs 7−Segments Display ICAP • 7-Segments display Alberto Donato 5/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  6. 6. Partial Dynamic Reconfiguration Flows Reconfiguration of areas of the fabric without interfering with the FPGA rest of the system. Two different approaches: small-bits and module-based reconfiguration. Small-bits manipulation: • change single reconfigurable elements, such as slices • useful to modify the configuration of hardware components of the system Module-based reconfiguration: • addition or removal of system components • changes in the resources available to the system Alberto Donato 6/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  7. 7. Software Side: Previous Work Application Code Self-reconfigurable platform: Level 3 • PowerPc/MicroBlaze processor XPART Level 2 Hardware Indepentent • ICAP component Hardware Emulated Dependent Level 1 ICAP API ICAP API • Stand-alone application using the Device Drivers XPART API Level 0 Embedded Microprocessor External (Windows/Unix) Supports small-bits reconfiguration. Egret architecture: • Modular hardware/software RSoC Core Module FPGA Peripheral Module architecture Peripheral Peripheral Interface Device • Based on the LINUX OS Core CPU Hard or Soft • Dynamic configuration of hard- Core Peripheral Peripheral Interface ware modules and loading of Device Core Internal CPU bus drivers Peripheral Module Alberto Donato 7/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  8. 8. Software Architecture Composed of two main elements: • Driver to support partial reconfiguration • Manager for the IP-Cores devices The software architecture provides: Applications • Access to ICAP component from userspace Linux Kernel • Interface between IP-Cores IP−Core Manager low-level drivers and kernel ICAP Driver • Access to reconfigurable Low−level Device Drivers devices from userspace Reconfigurable Devices processes ICAP Alberto Donato 8/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  9. 9. The ICAP Kernel Module Implements a device driver, adds kernel support for the Xilinx ICAP component. • Access from userspace via standard device node mechanism (i.e. /dev/icap) • Masks hardware details • Reconfiguration data provided in the form of partial bitstream files Kernel Reconfig. Reconfig. Application Controller Controller Configuration Data Driver Data I/O Alberto Donato 9/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  10. 10. The ICAP Kernel Module: Reconfiguration WRITE configuration system call IOCTL call Reconfiguration process using /dev/icap the ICAP kernel module: Linux Kernel 1. partial bitstream is copied into ICAP module buffer from a partial IOCTL call bitstream userspace process 2. reconfiguration ioctl partial call is performed from userspace bitstream memory buffer 3. the kernel module sends ICAP module partial configuration data to the ICAP component Memory−Mapped I/O Space ICAP The hardware ICAP component is accessed copy content of buffer through the memory mapping mechanism. Alberto Donato 10/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  11. 11. The IP-Core Manager A LINUX kernel module which implements a unified infrastructure for the management of the IP-Cores. • IP-Cores Plug-and-Play • Runtime loading of specific IP-Cores drivers Load Device IPCM • Management of operations Driver common to all drivers • Access to reconfigurable Read components from userspace Interrupt device info • Standardize and simplify writing of specific drivers IP−Core HW IPCM I/O mem region Device type Alberto Donato 11/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  12. 12. The IP-Core Manager: Hierarchy The IP-Core Manager acts as a layer between the operating system kernel and the low-level device drivers. The low-level drivers contain: • system calls implementation Kernel • devices initialization register/unregister device request/free memory areas and shutdown functions kernel IP−Core Manager (SW) Kernel Module modules register system calls The drivers also contain a stub: Driver Driver Driver IP−Core drivers data I/O • provides standard kernel module interface reconfigurable IP−Core IP−Core IP−Core IP−Core IP−Core hardware • provides module initialization and shutdown functions Alberto Donato 12/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  13. 13. The IP-Core Manager: Structure Registration process of a new IP-Core with the IPCM: 1. interrupt is received from the HW-IPCM 2. read device data (base address, device id, address range) 3. load low-level driver if not already loaded 4. the low-level driver drv_id, device data baseaddr, initialization function range IPCM registers driver data ipcm_core_register() Driver request_module() structures device data structure ipcm_stub_init() 5. data structures for the ipc_dev_t new device is initialized registered drivers drv_t * ipcm_drv_register() allocate new driver structure drv_t registered devices driver data structure Alberto Donato 13/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  14. 14. Tests and Results Comparison between original Caronte architecture and the one supporting LINUX Resource Orignal Caronte Caronte LINUX Total Elem. Perc. Elem. Perc. available Slice Flip Flops 1843 18% 2369 24% 9856 4-input LUTs 1727 17% 2173 22% 9856 Occupied Slices 1818 36% 2262 45% 4928 Bonded IOBs 107 27% 168 42% 396 Block RAM 32 72% 32 72% 44 2 50% 2 50% 4 DCMs Resources usage in different hardware architectures supporting LINUX Resource Base Arch. No Ethernet No Flash Total Elem. Perc. Elem. Perc. Elem. Perc. available Slice Flip Flops 5079 51% 2369 24% 4668 47% 9856 4-input LUTs 5883 59% 2173 22% 5598 56% 9856 Occupied Slices 4926 99% 2262 45% 4711 95% 4928 Bonded IOBs 205 51% 168 42% 36 81% 396 Tbufs 64 2% 64 2% 64 2% 2464 Block RAM 36 81% 32 72% 36 81% 44 6 37% 4 25% 6 37% 16 GCLKs 2 50% 2 50% 2 50% 4 DCMs Alberto Donato 14/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  15. 15. Tests and Results (2) Small-bits manipulation partial reconfiguration tests Label Reconfig. Bitstream Configuration Throughput frames size (Byte) time (msec) (MByte/sec) 0 33 24179 15.509 1.487 RC 1 46 40171 25.674 1.492 RC 2 50 44907 28.628 1.496 RC 3 60 51347 32.700 1.497 RC 4 68 53619 34.203 1.495 RC 5 88 67099 42.814 1.495 RC 6 104 60567 38.598 1.459 RC 7 132 100595 64.140 1.496 RC 8 148 94063 60.045 1.494 RC 9 182 119319 76.049 1.496 RC Reconfiguration times have been measured on the Avnet Virtex-II Pro Development Board: • with 66 Mhz processor: throughput ~1.5 Mbyte/s • with 100 Mhz processor: throughput > 3.0 Mbyte/s Alberto Donato 15/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
  16. 16. Future Work Possible extensions of the described software architecture: • extension of the ICAP driver to allow creation of reconfiguration command from reconfiguration data (without pre-synthesized bitstreams) • runtime calculation of difference bitstreams • implementation of the HW-IPCM • extension of the ICAP component to support DMA transfers Alberto Donato 16/16 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system

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