This document provides information about a one-day national workshop on VLSI system design and verification using SystemVerilog to be held on March 28th, 2016. It lists the organizing committee members and details about registration, important dates, venue, and objectives of the workshop. The workshop aims to provide capabilities in VLSI design and verification using SystemVerilog and will be conducted by technical experts from Caliber Embedded Technologies India Pvt. Ltd. It will cover topics like SystemVerilog syntax, OOP concepts, memory modeling, and hands-on labs. The target audience are UG/PG students and faculty from ECE, EEE, and other relevant disciplines. The registration fee is INR 300 and is restricted to 50 participants

1. ORGANIZING COMMITEE
Chief Patrons
Sri.R.VijayaKumhar –Managing Trustee
Patrons
Dr.A.Ebenezer Jeyakumar-Director(Academics)
Dr.N.R.Alamelu- Principal
Convenor
Dr.M.Jagadeeswari, HoD/ECE-PG
Coordinator
Mr.C.S.Manikandababu, AP(Sl.Gr.)/ECE-PG
Co-coordinator
Ms.S.Padmapriya, AP/ECE-PG
RESOURCE PERSONS
Technical Experts from
Caliber Embedded Technologies India (P) Ltd.,
Coimbatore – 641044
For further enquries and communication,
Contact :
The Convenor,
Department of ECE-PG,
Sri Ramakrishna Engineering College,
Coimbatore – 641 022.
Phone : 0422-2460088, 2461588
Mobile : 99941 58642, 94863 55965
Email id: hod-mevlsi@srec.ac.in
DD Drawn in favor of
The Principal,
Sri Ramakrishna Engineering College,
Payable at Coimbatore.
Important Dates:
Registration form along with D.D should reach us on or
before: 22.03.16
Intimation to participant on or before : 24.03.2016
Sri Ramakrishna Engineering College
[Educational Service : SNR Sons Charitable Trust]
[Autonomous Institution, Accredited by NAAC with ‘A’ Grade]
[Approved by AICTE and Permanently Affiliated to Anna
University, Chennai] [ISO 9001-2008 Certified and all eligible
programmes Accredited by NBA]
VATTAMALAIPALAYAM, N.G.G.O. COLONY POST,
COIMBATORE – 641 022.
A One Day National Workshop
on
VLSI System Design & Verification
using System Verilog
28th
March 2016
Name :_______________________
Designation :________________________
Organization :________________________
Address :_______________________
________________________
Mobile :____________________________
E-Mail :____________________________
Fee Payment Details :
Draft No:____________ Dated :_________
Amount :____________ Bank :_________
___________________________________
(Accomdation is available on chargable basis
if requested)
Signature of Signature of Head of the
Candidate Department /Instituion
Sri Ramakrishna Engineering College,
Coimbatore-641022.
A One Day National Workshop
on
VLSI System Design & Verification using
System Verilog
28th
March 2016
Organized by
Department of Electronics and Communication
Engineering (PG)
&
In Association with
Sri Ramakrishna Engineering College
[Educational Service : SNR Sons Charitable Trust]
[Autonomous Institution, Accredited by NAAC with ‘A’ Grade]
[Approved by AICTE and Permanently Affiliated to Anna University, Chennai]
[ISO 9001-2008 Certified and all eligible programmes Accredited by NBA]
VATTAMALAIPALAYAM, N.G.G.O. COLONY POST,
COIMBATORE – 641 022. Tamilnadu, India.
www.srec.ac.in
REGISTRATION FORM

2. The Objective
The objective of the workshop is to provide the
broad capability in all areas of design and
verification for the industry standards using
System Verilog. System Verilog is a combined
hardware description and verification language
based on extension of verilog. System Verilog is
a massive language that breaks down into three
separate blocks; the design language, assertions,
and the testbench language. This workshop is
structured to enable engineers to develop their
skills to cover the full breadth of SystemVerilog
features for both design and verification.
About the Institution
Sri Ramakrishna Engineering College
established in the year 1994 by SNR Sons
Charitable Trust had grown into an eminent
institution in Tamilnadu. The Institution is
accredited by National Board of Accreditation
(NBA) for all eligible UG & PG courses and the
institution is accredited by NAAC with ‘A’
Grade. The college has been granted
Autonomous Status for all UG and PG courses
by UGC and Anna University, from 2007. The
college campus has an admirable infrastructure
with all facilities and well equipped laboratories.
The college has signed Memorandum of
Understanding (MoU) with South Dakota
School of Mines and Technology, USA,
Kyungpook National University, South Korea
for student and staff exchange programme. The
college has also signed MoU with Infosys,
Wipro, Keane NTT, EMC2, Suguna Industries,
Salzer Electronics Ltd, NIIT, BSNL,
CODISSIA, FICE, Pricol Technologies to
enable the student to be trained in gaining
practical Knowledge.
About the Department
The Department of ECE (PG) -VLSI Design is
recognized as the research center by Anna University,
Chennai with all computing facilities, State-of-the-art
laboratories, and efficient teaching professionals and
well stacked department library.
About Caliber Embedded Technologies
CET Training offers a holistic program by veterans with
rich industry experience in VLSI design and
verification, PCB design, Mat lab, VLSI and LAB
VIEW with the core curriculum encompassing all the
key skills recognized as significant for a design engineer
today. They guide you on the several different
approaches used in the industry to crack design
problems and the approach in learning-through-
experience process of training which inculcate the habit
of out-of-box thoughts and practical learning by using
our proprietary course material and concept labs. At the
end of the training, the engineer would have acquired
the skills vital for making a spot in all the reputed core
companies, understand the concepts, gain practice in
problem solving and crack a job interview.
The capabilities as a new technologies solution provider
stems from our combined expertise in PCB CAM and
Mechanical Design in-depth insights into the complex
demands of product engineering.
Eligibility
UG Students:
PRE- FINAL AND FINAL YEAR STUDENTS of
ECE, EEE, EIE &B.Sc., Electronics
PG Students/Research Scholars/Industry Experts:
VLSI Design, Embedded System Design, Applied
Electronics and M.Sc., Electronics
Course Content
Morning Session:
Introduction
 Introduction of VLSI
 Concepts of top-down design
 Overview of RTL models
 Overview of gate/switch models
 Basic concepts in C++ and Oops
SystemVerilog’s syntax
 SystemVerilog’s class data type and new
constructors
 Inheritance, data hiding
 Virtual methods and polymorphism
 Specialized (parameterized) classes
 Object handle assignments and down
casting
 Constrained random value generation
Afternoon Session: Laboratory
C++ and Oops
 Class, Object, Inheritance, Polymorphism
System Verilog
 Memory model concepts & structures
Registration Fees
Category INR
Research Scholars, UG/PG Students ,
Industry / R&D organizations &
Faculty from Academic Institutions
300
 No Spot Registration & Registration is
restricted to 50 participants only
Registration fee includes kit, Certificate, Working Lunch, Tea
& Snacks.