2. Objective
• To test the memories and to detect the
number of faults and repair ability of medical
systems
• The faulty memories are serially tested and
repaired
• Reduce testing time and switching activities
3. Introduction
• Built in self repair scheme(BISR) uses the built
in self test(BIST) and Built in repair
analysis(BIRA).
• BIST is used test and detect faulty memories
• It send the fault information to BIRA
• BIRA is used to find the repair solutions to the
faulty memories
4. built-in redundancy analysis (BIRA)
• The faulty cells are repaired line by line,
including faulty cells which are repaired with a
spare row or column, instead of using a bit-by-
bit approach. This is called a redundancy
analysis (RA)
5. Literature survey
S,no Title Author Method
1 A fault-driven,
comprehensive
redundancy
algorithm,2012
J. R. Day BIRA for memory
2 “A built-in
redundancy
analysis with
a minimized binary
search tree,2010
B. Shim and N.
Shanbhag
Tree search
3 BISR: A
reconfigurable
built-in
self-repair scheme
for random access
memories in
SoCs,”2012
S. Pontarelli Self repair scheme
6. Literature survey
S,no Title Author Method
1 Efficient BISR
techniques for
word-oriented
embedded
memories with
hierarchical
redundancy,2006
S.-K. Lu, C.-L. Yang Hierarchical
replacement
2 A memory built-in
selfrepair
scheme based on
configurable
spares,2011
M. Lee, L.-M. Denq Self heal technique
3 High-efficiency
memory BISR with
two serial RA stages
using spare
memories,2008
I. Kang, W. Jeong Serial spare
memories
8. DMR
• In reliability engineering, dual modular
redundancy (DMR) is when components of a
system are duplicated,
providing redundancy in case one should fail.
• It is particularly applied to systems where the
duplicated components work in parallel,
particularly in fault-tolerant computer systems
9. TMR
• Triple Modular Redundancy (TMR) in which
three systems perform a process and that
result is processed by a majority-voting system
to produce a single output.
• If any one of the three systems fails, the other
two systems can correct and mask the fault.
10. BIST
• A built-in self-test (BIST) or built-in test (BIT)
is a mechanism that permits a machine to test
itself with test pattern generator
12. Proposed Method
• To handle permanent faults, this technique will
suggested
• If any permanent faults are detected the testing
control avoid the prohibited zone to apply the
MIC pattern
• It will avoids usage of the faulty zone
• This technique is used to reduce the testing cost
and complexity
14. Explanation
• It mainly consists of BIST and BIRA modules.
• The main purpose is to classify the memories as faulty or not,
and the number of faults in each memory is stored in the
dedicated wrapper.
• When the fault is detected by BIST, the fault information is
sent to BIRA through the port Fault_info. After the test is
completed or stopped, the signal Test_ finish is activated and
BIRA executes the RA process to find repair solutions
• TPG has less switching activities by the use of Johnson
counter which can cause low power dissipation during testing
of memories
