Address Spaces Education

© 2004 IBM Corporation
IBM Systems and Technology Group
1 z/VM CP Storage Management Education Series
Address Spaces on z/Architecture
An Introduction
Dan FitzGerald
Friday, October 16, 2009 (Revision 2)

10/16/09Revision 2z/VM CP Storage Management Education Series2
Outline
Concept Review
Background
Introducing the ASCE
Translation Modes and Space Types
Address Space Numbers
Additional Comments

Concept Review
In this portion of the presentation, we will introduce concepts
that will come up in our discussion on address spaces
Most of this information is available from the z/Architecture
Principles of Operation, Chapter 3.
We will present this information as a series of definitions.
This is intended to be a fast reference/review only, so please
consult the Principles of Operation or your Connections
Coach if you have any questions.

Concept Review
 Dynamic Address Translation (DAT) – The process via which we
handle virtual memory
 DAT Tables – Hierarchical set of tables used for dynamic address
translation (includes segment tables and page tables)
 Program Status Word (PSW) – Contains information used in the
execution of the currently active program
 Access Registers – A special set of 16 registers, one for each
general purpose register. For use with AR Mode
 AR Mode – Uses the access registers when doing base
displacement addressing
Determined by bits 16 and 17 of the PSW

Concept Review
 There are four different types of addresses that we will encounter
in z/Architecture. They are known as “absolute”, “real”, “virtual” and
“logical.” Additionally, we will hear about “effective” addresses.
Absolute Address – The address assigned to a main storage
location
These are the unmodified, “actual” addresses of bytes in storage.
Real Address – Identifies a location in real storage
This is an address that we will use for an access to storage
As we will see, real addresses are converted by prefixing into absolute
addresses.

Concept Review
Virtual Address – Identifies a location in virtual storage
– When a virtual address is used for an access to main storage, it is
translated by means of dynamic address translation (DAT) to a real
address, which is then prefixed to an absolute address.
Logical Address – Your addresses are translated within
whatever mode the architecture is set to
– In z/Architecture, a specific address mode can be set.
For example, your machine may be set to “real address mode”. In this
case, your logical addresses will be treated as real addresses.
Unless otherwise specified, the storage-operand addresses for most
instructions are logical addresses.

Concept Review
Effective Address – The address which exists before any
transformation by dynamic address translation or any
prefixing is performed
Instruction Address – Addresses used to fetch instructions
from storage

Background

What is an address space and how do we use it?

Address Space – A set of virtual addresses, together with the
specific transformation parameters which allow each number
to be associated with a byte location in memory.

The Principles of Operation defines a “virtual address” as a
consecutive sequence of integer numbers

There are multiple distinct address spaces on your machine.
Therefore the “same” address can point to different locations,
depending on the address space

On z/Architecture, each process runs in its own address
space

Background

So, what kinds of address spaces are there and how are
address spaces used?

Each guest has at least one address space

Guests also have the ability to define their own address spaces.

Guest-defined address spaces are known as data spaces.

There are also system address spaces, which CP has
created for its own purposes

The system address space is used by CP to keep track of shared data

The system execution space is the address space that CP “lives” in

Virtual free address space is used for a certain kind of free storage

PTRM space is used to keep track of pageable PGMBKs (a PGMBK is
used for managing pages in virtual storage)

Introducing the ASCE

When a virtual address is used by a CPU to access main
storage, two things happen:
1. The virtual address is converted to a real address via DAT
2. This real address is converted to an absolute address through the use of
prefixing.

So now the big question: how do we switch between those
different address spaces?

We use something called an ASCE, which can be conceptualized as a
“key” to a given address space.

Address-Space Control Element (ASCE) – 8-byte field containing
the origin and length (“designator”) of the highest-level DAT table
for a specific address space.

The ASCE can be considered to point to the root of the DAT tables for
an address space.


An address space's ASCE can be found for use by DAT in
one of three ways:

In a control register

As specified by an access register

Given a “real-space” designation

When the ASCE is given by a real-space designation, then
the DAT is to translate the virtual address by treating it as a
real address

No DAT tables are used in this case


Since there are multiple address spaces on the system, it
follows that there must be multiple ASCEs

The ASCE that DAT chooses to use at a given time is
determined by the translation mode specified in the PSW.

There are four translation modes:

Primary-space mode

Secondary-space mode

Access-register mode

Home-space more

Translation Modes and Space Types

When the CPU is in primary or secondary-space mode...

The CPU can translate virtual addresses belonging the primary or
secondary address spaces, respectively

When the CPU is in access-register mode...

It can translate virtual addresses of up to 16 address spaces

These address spaces are the primary address space and the
individual address spaces specified in up to 15 access-registers

Why only 15 access registers? The assembler automatically interprets
any base reference to (general or access) register 0 as a reference to
the value 0.

When the CPU is in the home-space mode...

it can translate virtual addresses of the home address space


Recall that each running process has its own address space

This can be one of three types which tie in with the aforementioned
translation modes: primary, secondary and home

The primary address space is the base address space for the
process

The secondary address space is an additional address space
to be used that isn't the primary address space

The home address space contains the principle control
blocks that represent a given process. For more information,
refer to Chapter 5 of Principles of Operation.


It is likely that you will spend most of your time working in
CMS. Normal CMS users by default only have one address
space, the primary one.

This is pointed to by the “BASE” ASCBK

Other guests (Linux, DB2, special CMS setups) may be
running multiple address spaces

These additional address spaces will have ASCBKs “chained” to
(pointed to by) the BASE ASCBK

Address Space Numbers

Address Space Number – Each address space may be
assigned an Address Space Number, or ASN, by the Control
Program

The ASN uses a two-level table structure in main storage

The ASN 2nd
-level entry contains information about the given address
space

If the ASN 2nd
-table entry is marked valid, it contains the
ASCE that defines that address space


Usually, the ASNs for the primary and secondary address
spaces are assigned positions in control registers

The ASN for the primary address space can be found in bits 48-63 of
control register 4

The ASN for the secondary address space can be found in bits 48-63
of control register 3

The ASN for the home address space is not assigned a position in a
control register

In access register mode, the situation is a bit different...

An AR with a value of 0 specifies a primary address space; its
associated ASCE is in control register 1

An AR with a value of 1 specifies a secondary address space; its
associated ASCE is in control register 7

An AR containing any other value designates an entry in the access
list.


Access List – A table in which each entry contains the real
address of an ASN 2nd
-table entry

When an AR x specifies an access list entry n, the ASN 2nd
-table entry
that n points to will contain the ASCE for the address space of x


The ASN 2nd
-table entry contains a sequence number
(ASTESN)

The ASTESN may be used to control storage references to
its associated address space

These come into play when we're in AR mode and using the
access list

When the access list is used to perform a storage reference, an
ASTESN in the access list entry is compared to the ASTESN in the
2nd
-table entry

These values must be equal; otherwise, an ASTE-sequence
exception is recognised


The ASTESN allows an access list entry to be made
unusable if authorization is changed or the designated ASN
2nd
-table entry is reassigned to a different address space

In plain English: your ASN 2nd
-table entry may be reused. In which
case, it would have the same address

When we reuse these entries, the ASTESN in the ASN 2nd-table
entry is changed

Now consider an instruction is issued for an AR-mode
address space where access register x points to access list
entry n...

Let's say that n points to some 2nd
-table entry that has since been
reused

Now the ASTESN in n does not match the ASTESN in the 2nd
-table
entry; an ASTE-sequence exception is issued

Additional Comments

In CP Storage Management, we only use the Primary
Address Space, the Home Address Space and AR-Mode

Additionally, you won't be using ASN translation or ASN
Authorization. As such, these topics have been omitted from
this presentation

More information on these can be found between pages 3-23 and 3-
31 of the Principles of Operation

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