2. Context
Distinct manufacturing lines
Processor-Memory performance gap
Memory wall
Awkwardness of DRAM chips
Time to unify logic
and memory
3. Advantages
Higher bandwidth and lower latency
Less distance (no bus) and less complexity
Less energy consumption
Less heat, better performance
Costs efficient
Save board space
4. Disadvantages
Consequences on cost/bit and refresh
rate
Manufacturing challenges
Reduce interchangeability
ILP trade-off
7. Results
Multiple operations can execute
concurrently across parallel lanes
High performance
but
Not efficient with short vectors
Useless for non-vectorizable parallelism
8. Conclusion
VIRAM / DIVA not real successes
but implications in embedded systems
Intel : Through Silicon Vias, personal
technology to connect DRAM and
processor
First step to IRAM ?