The 8051 Microcontroller's overview

1. OVERVIEW OF
8051 MICRO CONTROLLER
By Venkatrao Ramisetti.

2. WHAT IS A MICRO CONTROLLER?
 A microcontroller is a small computer on a
single integrated circuit.
 A micro controller incorporates CPU along with
memory and I/O ports and other on chip peripherals.
Uses:
 Micro controllers are used for embedded
applications.
 Microcontrollers are used in automobile engine
control systems, implantable medical devices,
remote controls, office machines, appliances, power
tools, toys and other embedded systems. 1

3. THE 8051 MICRO CONTROLLER
 8051 is Introduced by Intel in
1980.
 It is Internally Harvard
Architecture(Separate Address
and Data Bus).
 8051 is a CISC machine.
 8031 is a ROM less 8051.
2

4. FEATURES OF 8051
 8-Bit CPU.
 On Chip Oscillator.
 4kB of On-chip ROM.
 128 Bytes of RAM.
 21 SFRs.
 2 Timers/counters.
 Full Duplex Serial Port.
 64 KB of External Program & 64 KB External Data
memory.
 Powerful Interrupt Structure.
3

5.  6 interrupt sources (2 external , 3 internal, Reset)
 64K external code (program) memory(only
read)PSEN
 64K external data memory(can be read and write)
by RD,WR
 Code memory is selectable by EA (internal or
external)
 We may have External memory as data and code
4

6. SFRS OF 8051
1.Accumulator
2.B Register
3.DPH
4.DPL
5.IE
6.IP
7.P0
8.P1
9.P2
10.P3 5
11.PCON
12.PSW
13.SCON
14.SBUF
15.SP
16.TMOD
17.TCON
18.TH0
19.TL0
20.TH1
21.TL1

7. BLOCK DIAGRAM OF 8051
CPU
Interrupt
Control
OSC Bus
Control
4k
ROM
Timer 1
Timer 2
Serial
128 bytes
RAM
4 I/O Ports
TXD RXDP0 P2 P1 P3
Ext Interrupts
I/O Ports
6

8. PIN DESCRIPTION
 PORT 0 (8)
 PORT 1 (8)
 PORT 2 (8)
 PORT 3 (8)
 VCC
 GND
 XTAL2
 XTAL1
 External Access
Pins(3).
7

9. I/O PORTS
 One of the most useful features of the 8051 is that it
contains four I/O ports (P0 - P3)
 Port 0 （pins 32-39）：P0（P0.0～P0.7）
 8-bit R/W - General Purpose I/O
 Or acts as a multiplexed low byte address and data bus for external memory
design
 Port 1 （pins 1-8） ：P1（P1.0～P1.7）
 Only 8-bit R/W - General Purpose I/O
 Port 2 （pins 21-28）：P2（P2.0～P2.7）
 8-bit R/W - General Purpose I/O
 Or high byte of the address bus for external memory design
 Port 3 （pins 10-17）：P3（P3.0～P3.7）
 General Purpose I/O
 if not using any of the internal peripherals (timers) or external interrupts.
 Each port can be used as input or output (bi-direction) 8

10. PORT3 ALTERNATE FUNCTIONS
9

11. SPECIAL PINS
 PSEN (out): Program Store Enable, the read signal for
external program memory (active low).
 ALE (out): Address Latch Enable, In order to access
multiple chips connected externally to 8051.
 EA (in): External Access Enable, active low to access
external program memory locations 0 to 4K
 XTAL1 & XTAL2: Crystal inputs for internal oscillator.
 RESET: Resets the micro controller.
 GND（pin 20）：ground
 Vcc（pin 40）：
 Vcc provides +5V supply voltage to the chip.
10

12. MEMORY ORGANIZATION OF 8051
 The 8051 microcontroller's memory is divided into
2 Parts.
 Program Memory
 Data Memory.
 Program Memory (ROM) is used for permanent
saving program being executed.
 Data Memory (RAM) is used for temporarily storing
and keeping intermediate results and variables.
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13. 1.PROGRAM MEMORY
 Program memory accessed through EA pin. In
program memory two categories takes place:
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14.  a)If EA is high, internal program memory is
accessed to 0FFFH memory location and external
program memory accessed from 1000H to FFFFH
memory locations.
 b)If EA is low, only external program memory
accessed from 0000H to FFFFH memory locations.
13

15. 2.DATA MEMORY
 Data memory is used to store the memory in the
registers each of 64k bytes size. Data memory is of
two types
 Internal
 External.
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16. 1.Internal data memory:
 The internal data memory consists of 256 bytes,
these are divided into two parts:
 00H-7FH for internal data RAM (128 bytes)
 80H-FFH for special function registers (128 bytes)
15

17. 2.External data memory:
 The 8051 gives the facility to interface external
RAM and ROM. External RAM is accessed by
DPTR and up to 64KB of RAM can be interfaced.
External data memory interfacing is of two types.
 RAM Interfacing.
 ROM Interfacing
16

18. I )RAM INTERFACING:
The interfacing of memory chip with microcontroller has some
regulations to follow:
a)The memory data bus is directly connected to memory chip
data pins
b)Control signal connection
RD(Read Memory) connected to OE (Output Enable)
WR(Write Memory) connected to WE(Write Enable)
c)The CPU address lines are directly connected to memory chip
addressing lines.
The memory chip consists of Chipset (CS) and Chip enable
(CE) address lines varies based on memory capacity chip
should inbuilt with control signals, data lines. The accessing of
memory is done when chip is activated.
17

19. 18

20. II) ROM INTERFACING:
 In many systems the on chip ROM of 8051 is not
sufficient, so external memory chip is used, it is
which allows program size to be large as 64K
bytes.
 EA Pin: To Indicate the program code stored in
microcontroller on chip ROM, EA pin is connected
to Vcc, to indicate program code is stored in ROM
EA pin is connected to ground.
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21. INTERRUPTS IN 8051
 What is Interrupt and What does it Do?
 Interrupt is an asynchronous event.
 Which makes the processor to deviate from the
main program to execute a special program.
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22. USES OF INTERRUPTS IN 8051
 Allow parallel tasking
 Interrupt routine runs in “background”
 Allow fast, low-overhead interaction with environment
 Don’t have to poll
 Immediate reaction
 An automatic function call
 Easy to program
 8051 Interrupts
 Serial port - wake up when data arrives/data has left
 Timer 0 overflow
 Timer 1 overflow
 External interrupt 0
 External interrupt 1
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23. INTERRUPT VECTOR TABLE:
Interrupt Function Pin Vector Address Priority
INT0 Ext. Intrpt 0 P3.2 0003H HIGHEST
T0 Timer 0 Intr P3.4 000BH
INT1 Ext. Intrpt 1 P3.3 0013H
T1 Timer 1 Intr P3.5 001BH
ES Serial Intrpt P3.0
P3.1
0023H LOWEST
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24. 23
7 6 5 4 3 2 1 0
EA - - ES ET1 EX1 ET0 EX0
IE Register:
EX0 = To Enable/Disable External Interrupt 0.
ET0= To Enable/Disable Timer 0.
EX1= To Enable/Disable External Interrupt 1.
ET1= To Enable/Disable Timer 1.
ES= To Enable/Disable Serial Interrupt.
EA= Enables/Disables All the Interrupts.

25. 7 6 5 4 3 2 1 0
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
24
TCON Register:
ITx=To select Level/Edge Trigger for INTx . Set/Cleared by Software
ITx= 0 (Level Triggering)
ITx= 1(Edge Triggering)
IEx=External Interrupt x Edge Flag. Set by Hardware when it detects
Edge. Cleared by Hardware After processing it.
|------ Interrupt Control-------|

26. WHAT HAPPENS WHEN AN INTERRUPT OCCURS?
The processor may ignore or may handle it.
If it wish to handle it,
1. Processor Completes current Instruction.
2. Current PC is pushed on stack.
3. It identifies the interrupt source.
4. Program execution continues at the interrupt
vector address for that interrupt.
5. After executing the sub routine, it returns to the
main process and then PC is popped from the
stack and program execution resumes where it
left off. 25

27. INTERRUPT PRIORITY
 What if two interrupt sources interrupt at the same
time?
 The interrupt with the highest PRIORITY gets
serviced first.
 All interrupts have a default priority order.
 Priority can also be set to “high” or “low”.
 We can change the priority levels by programming
a SFR named IP.
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28. IP REGISTER:
 PX0:Defines Priority level for EXT0.
 PT0:Defines Priority level for T0
 PX1:Defines Priority level for EXT1
 PT1:Defines Priority level for T1
 PS: Defines Priority level for Serial Interrupt.
7 6 5 4 3 2 1 0
- - - PS PT1 PX1 PT0 PX0
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29. TIMERS/COUNTERS IN 8051
 8051 has two 16-bit programmable timers/counters.
 They can be configured to operate either as timers or as event
counters.
 The names of the two counters are T0 and T1 respectively.
 The timer content is available in four 8-bit special function
registers are
 TL0
 TH0
 TL1
 TH1
 The operation of the timers/counters is controlled by two
special function registers.
 TCON
 TMOD
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30.  Higher order 4 Bits are used for Timer control
 TF1:Timer1 Overflow flag. Cleared by ISS(001B)
 TR1:TImer1 Run control bit. Set/Cleared by
Software.
 TF0:Timer 0 Overflow flag. Cleared by ISS(000B).
 TR0:Timer 0 Run control bit. Set/Cleared by
Software.
TCON Register:
7 6 5 4 3 2 1 0
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
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31.  Lower order 4 Bits are used for Interrupt control.
 IE1:Ext Intr1 Edge flag. Set by Hardware when
External interrupt edge detected. Cleared by
hardware(0013)
 IT1:Interrupt 1 type control bit. Set/clr by software
to specify level/edge triggered.
 IE0:Ext Intr0 Edge flag. Set by Hardware when
External interrupt edge detected. Cleared by
hardware(0003)
 IT0:Interrupt 0 type control bit. Set/clr by software
to specify level/edge triggered.
7 6 5 4 3 2 1 0
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
30

32.  Upper 4 Bits are for Timer1.
 Lower 4 Bits are for Timer0.
 GATE: When TRx (in TCON) is set and
GATE=1,Timer/counter x will run only when INTx is
HIGH(Hardware Control).
 GATE=0,Timer/counter x will run only while TRx=1
(Software Control)
 C/T: 0=Timer 1=Counter.
TMOD Register:
7 6 5 4 3 2 1 0
GATE C/T M1 M0 GATE C/T M1 M0
31

33. M 1 M 0 Mode Function
0 0 Mode 0 13 bit counter
0 1 Mode 1 16 bit counter
1 0 Mode 2 8 bit auto reload
1 1 Mode 3 Split timer
MODE Operation:
Split timer is slits the TIMER0 into two 8bit counters.
TL0 is controlled by TIMER0
TH0 is controlled by TIMER1 Bits.
If it is TIMER 1 then it is in off state.
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34. 8051 UART:
 Full-Duplex Communication.
 The register SBUF is used to hold the data. The
special function register SBUF is physically two
registers.
 One is, write-only and is used to hold data to be
transmitted out of the 8051 via TXD.
 The other is, read-only and holds the received data
from external sources via RXD.
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35. SCON REGISTER
 SCON Controls the serial Data Communication.
 SCON is a Bit addressable register.
Data Transmission
 Transmission of serial data begins at any time when data is
written to SBUF.
 Pin P3.1 (Alternate function bit TXD) is used to transmit data
to the serial data network.
 TI is set to 1 when data has been transmitted. This signifies
that SBUF is empty so that another byte can be sent.
Data Reception
 Reception of serial data begins if the receive enable bit is set
to 1 for all modes.
 Pin P3.0 (Alternate function bit RXD) is used to receive data
from the serial data network.
 Receive interrupt flag, RI, is set after the data has been
received in all modes. The data gets stored in SBUF register
from where it can be read. 34

36. SCON REGISTER:
 SM0: Serial port specifier 0.
 SM1: Serial port specifier 1.
 SM2: Used for multi processor communication.
 REN: Receive Enable.
 TB8: Transmit Bit 8.
 RB8: Receive Bit 8.
 TI: Transmit Interrupt.
 RI: Receive Interrupt.
7 6 5 4 3 2 1 0
SM0 SM1 SM2 REN TB8 RB8 TI RI
35

37. MODE OPERATIONS:
SM 0 SM 1 Mode Description Baud Rate
0 0 Mode 0 Shift Register Fosc/12
0 1 Mode 1 8-Bit UART Variable
1 0 Mode 2 9-Bit UART Fosc/64 or
Fosc/12
1 1 Mode 3 9-Bit UART Variable
36

38. SERIAL MODE 0
 In this mode, the serial port works like a shift
register and the data transmission works
synchronously with a clock frequency of fosc /12.
 Serial data is received and transmitted through
RXD. 8 bits are transmitted/ received aty a time.
 Pin TXD outputs the shift clock pulses of frequency
fosc /12, which is connected to the external circuitry
for synchronization.
 The shift frequency or baud rate is always 1/12 of
the oscillator frequency.
37

39. SERIAL MODE 1
 In mode-1, the serial port functions as a standard
Universal Asynchronous Receiver Transmitter
(UART) mode. 10 bits are transmitted through TXD
or received through RXD.
 The 10 bits consist of one start bit (which is usually
'0'), 8 data bits (LSB is sent first/received first), and
a stop bit (which is usually '1'). Once received, the
stop bit goes into RB8 in the special function
register SCON. The baud rate is variable.
38

40. SERIAL MODE 2
 In this mode 11 bits are transmitted through TXD or
received through RXD.
 The various bits are as follows: a start bit (usually '0'), 8
data bits (LSB first), a programmable 9 th (TB8 or
RB8)bit and a stop bit (usually '1').
 While transmitting, the 9 th data bit (TB8 in SCON) can
be assigned the value '0' or '1'. For example, if the
information of parity is to be transmitted, the parity bit
(P) in PSW could be moved into TB8.
 On reception of the data, the 9 th bit goes into RB8 in
'SCON', while the stop bit is ignored.
 The baud rate is programmable to either 1/32 or 1/64 of
the oscillator frequency.
39

41. SERIAL MODE 3
 In this mode 11 bits are transmitted through TXD or
received through RXD.
 The various bits are: a start bit (usually '0'), 8 data
bits (LSB first), a programmable 9 th bit and a stop
bit (usually '1').
 Mode-3 is same as mode-2, except the fact that the
baud rate in mode-3 is variable (i.e., just as in
mode-1).
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