SlideShare a Scribd company logo
1 of 52
2.1
### uVision Project, (C) Keil Software
soln
0x4
ARM-ADS
6090000::V6.9::.ARMCLANG
1
ARMCM4_FP
ARM
ARM.CMSIS.5.4.0
http://www.keil.com/pack/
IRAM(0x20000000,0x00020000)
IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M4")
FPU2 CLOCK(12000000) ESEL ELITTLE
UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)
0
$$Device:ARMCM4_FP$DeviceARMARMCM4IncludeARM
CM4_FP.h
0
0
0
0
0
0
1
.Objects
target_sim
1
0
0
1
1
.Listings
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
3
1
SARMCM3.DLL
-MPU
DCM.DLL
-pCM4
SARMCM3.DLL
-MPU
TCM.DLL
-pCM4
1
0
0
0
16
1
0
0
1
0
-1
1
BINUL2CM3.DLL
0
0
1
1
1
1
1
1
1
0
1
1
0
1
1
0
0
1
1
1
1
1
1
1
1
1
0
0
"Cortex-M4"
0
0
0
1
1
0
0
2
0
0
8
0
1
0
0
3
3
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0x0
0x0
0
0x0
0x0
0
0x0
0x0
0
0x0
0x0
0
0x0
0x0
0
0x0
0x0
0
0x20000000
0x20000
1
0x0
0x40000
0
0x0
0x0
1
0x0
0x0
1
0x0
0x0
1
0x0
0x0
1
0x0
0x40000
1
0x0
0x0
0
0x0
0x0
0
0x0
0x0
0
0x0
0x0
0
0x20000000
0x10000
0
0x20010000
0x10000
1
1
0
0
1
0
0
0
0
0
3
0
0
1
1
0
3
3
1
1
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0x00000000
0x20000000
Source for soln
140_main.c
1
.source140_main.c
140_asm_functions.s
2
.source140_asm_functions.s
::CMSIS
::Compiler
::Device
RTEDeviceARMCM4startup_ARMCM4.s
RTEDeviceARMCM4system_ARMCM4.c
RTEDeviceARMCM4_FPstartup_ARMCM4.s
RTEDeviceARMCM4_FPsystem_ARMCM4.c
RTEDeviceSTM32L476VGTxstartup_stm32l476xx.s
RTEDeviceSTM32L476VGTxsystem_stm32l4xx.c
1.0
### uVision Project, (C) Keil Software
*.c
*.s*; *.src; *.a*
*.obj; *.o
*.lib
*.txt; *.h; *.inc
*.plm
*.cpp
0
0
0
soln
0x4
ARM-ADS
12000000
1
1
0
1
0
1
65535
0
0
0
79
66
8
.Listings
1
1
1
0
1
1
0
1
0
0
0
0
1
1
1
1
1
1
1
0
0
1
0
1
7
1
0
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
0
0
1
1
0
0
BINUL2CM3.DLL
0
ARMRTXEVENTFLAGS
-L70 -Z18 -C0 -M0 -T1
0
DLGDARM
(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-
1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
0
ARMDBGFLAGS
-T0
0
UL2CM3
UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)
0
0
36
1
9244
0
0
0
0
0
1
.source140_main.c
target_simsource/140_main.c36
1
0
38
1
0
0
0
0
0
0
0
.source140_main.c
0
1
localv,0x0A
1
1
pint
2
1
str
1
1
0x20010000
0
0
0
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Source for soln
1
0
0
0
1
1
1
0
0
0
.source140_main.c
140_main.c
0
0
1
2
2
0
0
0
.source140_asm_functions.s
140_asm_functions.s
0
0
::CMSIS
0
0
0
1
::Compiler
1
0
0
1
::Device
1
0
0
1
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#define MY_ARRAY_BASE (0x20010000)
// Functions defined in a .s file
extern void task5(void);
extern void task6(void);
extern void task7(void);
extern void task10(void);
extern void task11(void);
extern void task12(void);
extern void task13(void);
extern void task14(void);
extern void task15(void);
// Global variable
uint32_t *gPtrArray1, *gPtrArray2;
uint32_t gVar1 = 6, gVar2;
volatile uint32_t gTemp1;
volatile uint32_t gTemp2;
int main(void) {
// We configure the RAM into the following two blocks in
"Options for Target..." ->
// "Target" -> "IRAM1 and IRAM2", with the first being
default:
// 1) Starting: 0x20000000; size: 0x10000 (2^16 B = 2^6 kB)
// 2) Starting: 0x20010000; size: 0x10000 (2^16 B = 2^6 kB)
// As a result, we can put our own data starting at
0x20010000.
// Initialize the global pointers
gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00);
gPtrArray2 = (uint32_t *)(MY_ARRAY_BASE + 0x40);
// Task 1. Load, modify, and store of a global var---example
1
gTemp1 = 0x10;
gTemp1 += 1;
// Task 2. Load, modify, and store of a global var---example
2
gTemp2 = 0x20;
gTemp2 += (gTemp1<<8);
printf("gTemp1 = 0x%X, gTemp2 = 0x%Xn", gTemp1,
gTemp2);
// Task 3. Load, modify, and store of a local var---example 1
volatile uint32_t lTemp1 = 0x1000;
lTemp1 += 1;
// Task 4. Load, modify, and store of a local var---example 2
volatile uint32_t lTemp2 = 0x2000;
lTemp2 += (lTemp1<<16);
printf("lTemp1 = 0x%X, lTemp2 = 0x%Xn", lTemp1,
lTemp2);
// Task 5. LDR pseudo instruction.
task5();
// Task 6. Load/Modify/Store using offset addressing.
gVar1 += 0x10;
task6(); // Task6: perform the above task using assembly
// Task 7. Load/Modify/Store using pseudo instruction.
gVar2 = 0x12345678;
gVar2 += gVar1;
task7(); // Task7: perform the above task using assembly
gVar1 = 6;
// Task 10. Register offset-based addressing---a simple
example.
// Note that this is especially useful for pointer arithmetic
here.
for (int i = 0; i < gVar1; i++) {
*(gPtrArray1 + i) = (uint32_t)(i*2 + 1); // i is register
offset based
}
// clear the memory for task10 in assembly
for (int i = 0; i < gVar1; i++) { *(gPtrArray1 + i) = 0; }
task10(); // task10: perform the above task using assembly
// Task 11. Register offset-based addressing---another simple
example.
// Note that this is especially useful for pointer arithmetic
here.
for (int i = 0; i < gVar1; i++) {
*(gPtrArray2 + i) = (uint32_t)(i*4 + 1);
}
// clear the memory for task11 in assembly
for (int i = 0; i < gVar1; i++) { *(gPtrArray2 + i) = 0; }
task11(); // task11: perform the above task using assembly
// Task 12. Register offset-based addressing---more
complicated case.
for (int i = 0; i < gVar1; i++) {
*(gPtrArray2 + i) = (*(gPtrArray1 + i))++; // Note that
the input data is changed as well
}
// clear the memory for task12 in assembly
for (int i = 0; i < gVar1; i++) { *(gPtrArray2 + i) = 0; }
task12(); // task12: perform the above task using assembly
printf("Task 2 is done.n");
// Task 13. Immediate offset addressing.
for (int i = 0; i < gVar1-1; i++) {
// We use immediate offset addressing twice in the
righthand side of the following
*(gPtrArray2 + i) = *(gPtrArray1) + *(gPtrArray1+1);
gPtrArray1++;
}
// clear the memory for task13 in assembly
gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); //
Restore the pointer
for (int i = 0; i < gVar1-1; i++) { *(gPtrArray2 + i) = 0; }
task13(); // task13: perform the above task using assembly
gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); //
Restore the pointer
// Task 14. Immediate offset addressing and pre-index
addressing.
for (int i = 0; i < gVar1-1; i++) {
//*(gPtrArray2 + i) = *(gPtrArray1) + 2 *
(*(++gPtrArray1));
// The above statement can be implemented below to force
the ''sequencing'':
// See: https://en.wikipedia.org/wiki/Sequence_point
uint32_t temp = *(gPtrArray1);
*(gPtrArray2 + i) = temp + 2 * (*(++gPtrArray1));
}
gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); //
Restore the pointer
for (int i = 0; i < gVar1-1; i++) { *(gPtrArray2 + i) = 0; }
task14(); // task14: perform the above task using assembly
gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); //
Restore the pointer
// Task 15. Post-index addressing and immediate offset
addressing.
for (int i = 0; i < gVar1-1; i++) {
//*(gPtrArray2 + i) = *(gPtrArray1++) + 4 *
(*gPtrArray1);
uint32_t temp = *(gPtrArray1++);
*(gPtrArray2 + i) = temp + 4 * (*gPtrArray1);
}
gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); //
Restore the pointer
for (int i = 0; i < gVar1-1; i++) { *(gPtrArray2 + i) = 0; }
task15(); // task15: perform the above task using assembly
while (1);
}
AREA my_fancy_asm_code, CODE, READONLY ;
Define the program area
; Export functions defined in this file. These functions
need to be declared
; in the file calling them.
EXPORT task5
EXPORT task6
EXPORT task7
EXPORT task10
EXPORT task11
EXPORT task12
EXPORT task13
EXPORT task14
EXPORT task15
IMPORT gPtrArray1
IMPORT gPtrArray2
IMPORT gVar1
IMPORT gVar2
ALIGN ; Align the data in the boundary of 4
bytes.
task5 PROC
LDR r0, =0x10 ; Pseudo code; see the disassembly
for the true code
LDR r1, =0x12345678 ; Pseudo code; see the
disassembly for the true code
LDR r2, =gVar1 ; Loading the address of the global
variable gVar1
LDR r3, =gPtrArray1 ; Loading the address of the
global variable gPtrArray1
BX lr
ENDP
task6 PROC
LDR r0, =0x10 ; Pseudo code; see the disassembly
for the true code
LDR r1, =gVar1 ; Loading the address of the global
variable gVar1
LDR r2, [r1]
ADD r0, r2
STR r0, [r1]
BX lr
ENDP
task7 PROC
LDR r0, =0x12345678 ; Pseudo code; see the
disassembly for the true code
LDR r1, =gVar1
LDR r1, [r1]
ADD r0, r1
LDR r2, =gVar2 ; Loading the address of the global
variable gVar2
STR r0, [r2]
BX lr
ENDP
task10 PROC
LDR r0, =gPtrArray1 ; Loading the address of the
global variable gPtrArray1
LDR r0, [r0] ; Loading the content of the global
variable gPtrArray1
LDR r1, =gVar1 ; Loading the address of the global
variable gVar1
LDR r1, [r1] ; Loading the content of the global
variable gVar1
MOV r2, #0 ; variable (int) i
task10_loop
CMP r2, r1 ; test = r2 - r1
BGE task10_end ; if test >= 0, then branch to
task10_end
MOV r3, r2, LSL #1 ; r3 <- 2 * r2
ADD r3, #1 ; r3 <- r3 + 1
STR r3, [r0, r2, LSL #2] ; r3 -> mem[r0 + 4*r2] or r3 ->
mem[r0 + i]
ADD r2, #1 ; r2 <- r2 + 1
B task10_loop ; branch to task10_loop
task10_end
BX lr ; return
ENDP
; If you need to use registers starting from r4, you need to
PUSH them first to save the
; run-time environment for the caller. You need to POP them up
at the exit of the code.
task11 PROC
LDR r0, =gPtrArray2
LDR r0, [r0]
LDR r1, =gVar1
LDR r1, [r1]
MOV r2, #0
task11_loop
CMP r2, r1
BGE task11_end
MOV r3, r2, LSL #2
ADD r3, #1
STR r3, [r0, r2, LSL #2]
ADD r2, #1
B task11_loop
task11_end
BX lr
ENDP
task12 PROC
PUSH {r4, lr}
LDR r0, =gPtrArray1
LDR r0, [r0]
LDR r4, =gPtrArray2
LDR r4, [r4]
LDR r1, =gVar1
LDR r1, [r1]
MOV r2, #0
task12_loop
CMP r2, r1
BGE task12_end
LDR r3, [r0, r2, LSL #2]
STR r3, [r4, r2, LSL #2]
ADD r3, #1
STR r3, [r0, r2, LSL #2]
ADD r2, #1
B task12_loop
task12_end
POP {r4, pc} ; Pop lr to pc, which is the same as BX
lr.
ENDP
task13 PROC
PUSH {r4-r5, lr}
LDR r0, =gPtrArray1
LDR r0, [r0]
LDR r4, =gPtrArray2
LDR r4, [r4]
LDR r1, =gVar1
LDR r1, [r1]
SUB r1, #1
MOV r2, #0
task13_loop
CMP r2, r1
BGE task13_end
LDR r3, [r0]
LDR r5, [r0, #4]
ADD r3, r5
STR r3, [r4, r2, LSL #2]
ADD r2, #1
ADD r0, #4
B task13_loop
task13_end
POP {r4-r5, pc}
ENDP
task14 PROC
PUSH {r4-r5, lr}
LDR r0, =gPtrArray1
LDR r0, [r0]
LDR r4, =gPtrArray2
LDR r4, [r4]
LDR r1, =gVar1
LDR r1, [r1]
SUB r1, #1
MOV r2, #0
task14_loop
CMP r2, r1
BGE task14_end
LDR r3, [r0]
LDR r5, [r0, #4]!
ADD r3, r5, LSL #1
STR r3, [r4, r2, LSL #2]
ADD r2, #1
B task14_loop
task14_end
POP {r4-r5, pc}
ENDP
task15 PROC
PUSH {r4-r5, lr}
LDR r0, =gPtrArray1
LDR r0, [r0]
LDR r4, =gPtrArray2
LDR r4, [r4]
LDR r1, =gVar1
LDR r1, [r1]
SUB r1, #1
MOV r2, #0
task15_loop
CMP r2, r1
BGE task15_end
LDR r3, [r0], #4
LDR r5, [r0]
ADD r3, r5, LSL #2
STR r3, [r4, r2, LSL #2]
ADD r2, #1
B task15_loop
task15_end
POP {r4-r5, pc}
ENDP
END ; End of the entire file
AREA my_fancy_asm_code, CODE, READONLY ;
Define the program area
; Export functions defined in this file. These functions
need to be declared
; in the file calling them.
EXPORT task10
EXPORT task11
EXPORT task12
EXPORT task13
EXPORT task14
EXPORT task15
IMPORT gPtrArray10a
IMPORT gPtrArray11a
IMPORT gPtrArray12a
IMPORT gPtrArray13a
IMPORT gPtrArray14a
IMPORT gPtrArray15a
IMPORT gVar1
ALIGN ; Align the data in the boundary of 4
bytes.
task10 PROC
LDR r0, =gPtrArray10a ; Loading the address of the
global variable gPtrArray10a
LDR r0, [r0] ; Loading the content of the global
variable gPtrArray10a
LDR r1, =gVar1 ; Loading the address of the global
variable gVar1
LDR r1, [r1] ; Loading the content of the global
variable gVar1
MOV r2, #0 ; variable (int) i
task10_loop
CMP r2, r1 ; test = r2 - r1
BGE task10_end ; if test >= 0, then branch to
task10_end
MOV r3, r2, LSL #2 ; r3 <- r2 * 4
SUB r3, #15 ; r3 <- r3 - 15
STRB r3, [r0, r2] ; r3 -> mem[r0 + r2] or r3 ->
mem[r0 + i]
ADD r2, #1 ; r2 <- r2 + 1
B task10_loop ; branch to task10_loop
task10_end
BX lr ; return
ENDP
; If you need to use registers starting from r4, you need to
PUSH them first to save the
; run-time environment for the caller. You need to POP them up
at the exit of the code.
task11 PROC
BX lr
ENDP
task12 PROC
PUSH {r4-r5, lr}
LDR r0, =gPtrArray10a
LDR r0, [r0]
LDR r4, =gPtrArray12a
LDR r4, [r4]
LDR r1, =gVar1
LDR r1, [r1]
MOV r2, #0
task12_loop
CMP r2, r1
BGE task12_end
LDRSB r3, [r0, r2]
LDR r5, =10
SUB r5, r3
STRH r5, [r4, r2, LSL #1]
ADD r3, #1
STRB r3, [r0, r2]
ADD r2, #1
B task12_loop
task12_end
POP {r4-r5, pc} ; Pop lr to pc, which is the same as
BX lr.
ENDP
task13 PROC
PUSH {r4-r5, lr}
POP {r4-r5, pc}
ENDP
task14 PROC
PUSH {r4-r5, lr}
LDR r0, =gPtrArray12a
LDR r0, [r0]
LDR r4, =gPtrArray14a
LDR r4, [r4]
LDR r1, =gVar1
LDR r1, [r1]
SUB r1, #1
MOV r2, #0
task14_loop
CMP r2, r1
BGE task14_end
LDRSH r3, [r0]
LDRSH r5, [r0, #2]!
ADD r3, r5, LSL #3
STR r3, [r4, r2, LSL #2]
ADD r2, #1
B task14_loop
task14_end
POP {r4-r5, pc}
ENDP
task15 PROC
PUSH {r4-r5, lr}
POP {r4-r5, pc}
ENDP
END
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#define MY_ARRAY_BASE (0x20010000)
// Functions defined in a .s file
extern void task10(void);
extern void task11(void);
extern void task12(void);
extern void task13(void);
extern void task14(void);
extern void task15(void);
// Global variable
// Pointers for the C version.
int8_t *gPtrArray10c = (int8_t *) (MY_ARRAY_BASE +
0x00);
uint8_t *gPtrArray11c = (uint8_t *) (MY_ARRAY_BASE +
0x40);
int16_t *gPtrArray12c = (int16_t *) (MY_ARRAY_BASE +
0x80);
uint16_t *gPtrArray13c = (uint16_t *) (MY_ARRAY_BASE +
0xC0);
int32_t *gPtrArray14c = (int32_t *) (MY_ARRAY_BASE +
0x100);
uint32_t *gPtrArray15c = (uint32_t *) (MY_ARRAY_BASE +
0x140);
// Pointers for the asm version.
int8_t *gPtrArray10a = (int8_t *) (MY_ARRAY_BASE +
0x20);
uint8_t *gPtrArray11a = (uint8_t *) (MY_ARRAY_BASE +
0x60);
int16_t *gPtrArray12a = (int16_t *) (MY_ARRAY_BASE +
0xA0);
uint16_t *gPtrArray13a = (uint16_t *) (MY_ARRAY_BASE +
0xE0);
int32_t *gPtrArray14a = (int32_t *) (MY_ARRAY_BASE +
0x120);
uint32_t *gPtrArray15a = (uint32_t *) (MY_ARRAY_BASE +
0x160);
int8_t gVar1 = 8;
int main(void) {
// Task 10. Register offset-based addressing---a simple
example.
for (int i = 0; i < gVar1; i++) {
*(gPtrArray10c + i) = (int8_t)(i*4 - 15); // i is saved in a
register
}
task10(); // task10: perform the above task using
assembly
// Task 11. Register offset-based addressing---another simple
example.
for (int i = 0; i < gVar1; i++) {
*(gPtrArray11c + i) = (uint8_t)(i*32 + 2);
}
task11(); // task11: perform the above task using
assembly
// Task 12. Register offset-based addressing---more
complicated case.
for (int i = 0; i < gVar1; i++) {
*(gPtrArray12c + i) = 10 - (*(gPtrArray10c + i))++;
} // Note that the input data is changed as well in
the above line
task12(); // task12: perform the above task using
assembly
// Task 13. Immediate offset addressing.
for (int i = 0; i < gVar1-1; i++) {
// We use immediate offset addressing twice below
(righthand side)
*(gPtrArray13c + i) = *(gPtrArray11c) +
*(gPtrArray11c+1);
gPtrArray11c++;
}
task13(); // task13: perform the above task using assembly
// Task 14. Immediate offset addressing and pre-index
addressing.
for (int i = 0; i < gVar1-1; i++) {
uint32_t temp = *(gPtrArray12c);
*(gPtrArray14c + i) = temp + 8 * (*(++gPtrArray12c));
}
task14(); // task14: perform the above task using assembly
// Task 15. Post-index addressing and immediate offset
addressing.
for (int i = 0; i < gVar1-1; i++) {
uint32_t temp = *(gPtrArray13c++);
*(gPtrArray15c + i) = temp + 16 * (*gPtrArray13c);
}
task15(); // task15: perform the above task using assembly
while (1);
}

More Related Content

Similar to 2.1 ### uVision Project, (C) Keil Software .docx

Runtime Code Generation and Data Management for Heterogeneous Computing in Java
Runtime Code Generation and Data Management for Heterogeneous Computing in JavaRuntime Code Generation and Data Management for Heterogeneous Computing in Java
Runtime Code Generation and Data Management for Heterogeneous Computing in JavaJuan Fumero
 
Db2 For I Parallel Data Load
Db2 For I Parallel Data LoadDb2 For I Parallel Data Load
Db2 For I Parallel Data LoadThomas Wolfe
 
GPU Programming on CPU - Using C++AMP
GPU Programming on CPU - Using C++AMPGPU Programming on CPU - Using C++AMP
GPU Programming on CPU - Using C++AMPMiller Lee
 
Windbg랑 친해지기
Windbg랑 친해지기Windbg랑 친해지기
Windbg랑 친해지기Ji Hun Kim
 
CUDA lab's slides of "parallel programming" course
CUDA lab's slides of "parallel programming" courseCUDA lab's slides of "parallel programming" course
CUDA lab's slides of "parallel programming" courseShuai Yuan
 
TLPI - 6 Process
TLPI - 6 ProcessTLPI - 6 Process
TLPI - 6 ProcessShu-Yu Fu
 
Pragmatic Optimization in Modern Programming - Mastering Compiler Optimizations
Pragmatic Optimization in Modern Programming - Mastering Compiler OptimizationsPragmatic Optimization in Modern Programming - Mastering Compiler Optimizations
Pragmatic Optimization in Modern Programming - Mastering Compiler OptimizationsMarina Kolpakova
 
The following code is an implementation of the producer consumer pro.pdf
The following code is an implementation of the producer consumer pro.pdfThe following code is an implementation of the producer consumer pro.pdf
The following code is an implementation of the producer consumer pro.pdfmarketing413921
 
Automated reduction of attack surface using call graph enumeration
Automated reduction of attack surface using call graph enumerationAutomated reduction of attack surface using call graph enumeration
Automated reduction of attack surface using call graph enumerationRuo Ando
 
FrontDays #3. Иван Федяев, Эволюция JavaScript. Обзор нововведений ECMAScript 6
FrontDays #3. Иван Федяев, Эволюция JavaScript. Обзор нововведений ECMAScript 6FrontDays #3. Иван Федяев, Эволюция JavaScript. Обзор нововведений ECMAScript 6
FrontDays #3. Иван Федяев, Эволюция JavaScript. Обзор нововведений ECMAScript 6FrontDays
 
Unit 4
Unit 4Unit 4
Unit 4siddr
 
LAS16-501: Introduction to LLVM - Projects, Components, Integration, Internals
LAS16-501: Introduction to LLVM - Projects, Components, Integration, InternalsLAS16-501: Introduction to LLVM - Projects, Components, Integration, Internals
LAS16-501: Introduction to LLVM - Projects, Components, Integration, InternalsLinaro
 
Exploring the x64
Exploring the x64Exploring the x64
Exploring the x64FFRI, Inc.
 
Xdp and ebpf_maps
Xdp and ebpf_mapsXdp and ebpf_maps
Xdp and ebpf_mapslcplcp1
 
02 - Introduction to the cdecl ABI and the x86 stack
02 - Introduction to the cdecl ABI and the x86 stack02 - Introduction to the cdecl ABI and the x86 stack
02 - Introduction to the cdecl ABI and the x86 stackAlexandre Moneger
 
The bytecode hocus pocus - JavaOne 2016
The bytecode hocus pocus - JavaOne 2016The bytecode hocus pocus - JavaOne 2016
The bytecode hocus pocus - JavaOne 2016Raimon Ràfols
 

Similar to 2.1 ### uVision Project, (C) Keil Software .docx (20)

Runtime Code Generation and Data Management for Heterogeneous Computing in Java
Runtime Code Generation and Data Management for Heterogeneous Computing in JavaRuntime Code Generation and Data Management for Heterogeneous Computing in Java
Runtime Code Generation and Data Management for Heterogeneous Computing in Java
 
Npc13
Npc13Npc13
Npc13
 
Db2 For I Parallel Data Load
Db2 For I Parallel Data LoadDb2 For I Parallel Data Load
Db2 For I Parallel Data Load
 
Staging driver sins
Staging driver sinsStaging driver sins
Staging driver sins
 
GPU Programming on CPU - Using C++AMP
GPU Programming on CPU - Using C++AMPGPU Programming on CPU - Using C++AMP
GPU Programming on CPU - Using C++AMP
 
Windbg랑 친해지기
Windbg랑 친해지기Windbg랑 친해지기
Windbg랑 친해지기
 
CUDA lab's slides of "parallel programming" course
CUDA lab's slides of "parallel programming" courseCUDA lab's slides of "parallel programming" course
CUDA lab's slides of "parallel programming" course
 
TLPI - 6 Process
TLPI - 6 ProcessTLPI - 6 Process
TLPI - 6 Process
 
Pragmatic Optimization in Modern Programming - Mastering Compiler Optimizations
Pragmatic Optimization in Modern Programming - Mastering Compiler OptimizationsPragmatic Optimization in Modern Programming - Mastering Compiler Optimizations
Pragmatic Optimization in Modern Programming - Mastering Compiler Optimizations
 
The following code is an implementation of the producer consumer pro.pdf
The following code is an implementation of the producer consumer pro.pdfThe following code is an implementation of the producer consumer pro.pdf
The following code is an implementation of the producer consumer pro.pdf
 
Automated reduction of attack surface using call graph enumeration
Automated reduction of attack surface using call graph enumerationAutomated reduction of attack surface using call graph enumeration
Automated reduction of attack surface using call graph enumeration
 
FrontDays #3. Иван Федяев, Эволюция JavaScript. Обзор нововведений ECMAScript 6
FrontDays #3. Иван Федяев, Эволюция JavaScript. Обзор нововведений ECMAScript 6FrontDays #3. Иван Федяев, Эволюция JavaScript. Обзор нововведений ECMAScript 6
FrontDays #3. Иван Федяев, Эволюция JavaScript. Обзор нововведений ECMAScript 6
 
Unit 4
Unit 4Unit 4
Unit 4
 
LAS16-501: Introduction to LLVM - Projects, Components, Integration, Internals
LAS16-501: Introduction to LLVM - Projects, Components, Integration, InternalsLAS16-501: Introduction to LLVM - Projects, Components, Integration, Internals
LAS16-501: Introduction to LLVM - Projects, Components, Integration, Internals
 
Exploring the x64
Exploring the x64Exploring the x64
Exploring the x64
 
Xdp and ebpf_maps
Xdp and ebpf_mapsXdp and ebpf_maps
Xdp and ebpf_maps
 
Vcs16
Vcs16Vcs16
Vcs16
 
OpenMP
OpenMPOpenMP
OpenMP
 
02 - Introduction to the cdecl ABI and the x86 stack
02 - Introduction to the cdecl ABI and the x86 stack02 - Introduction to the cdecl ABI and the x86 stack
02 - Introduction to the cdecl ABI and the x86 stack
 
The bytecode hocus pocus - JavaOne 2016
The bytecode hocus pocus - JavaOne 2016The bytecode hocus pocus - JavaOne 2016
The bytecode hocus pocus - JavaOne 2016
 

More from tarifarmarie

CASE GS-65 DATE 021309 (REVISED 010311) .docx
CASE  GS-65 DATE  021309 (REVISED 010311) .docxCASE  GS-65 DATE  021309 (REVISED 010311) .docx
CASE GS-65 DATE 021309 (REVISED 010311) .docxtarifarmarie
 
BBA 3551, Information Systems Management 1 Course Lea.docx
BBA 3551, Information Systems Management 1 Course Lea.docxBBA 3551, Information Systems Management 1 Course Lea.docx
BBA 3551, Information Systems Management 1 Course Lea.docxtarifarmarie
 
BUS 599 – Assignments and Rubrics © 2019 Strayer Unive.docx
BUS 599 – Assignments and Rubrics  © 2019 Strayer Unive.docxBUS 599 – Assignments and Rubrics  © 2019 Strayer Unive.docx
BUS 599 – Assignments and Rubrics © 2019 Strayer Unive.docxtarifarmarie
 
BEAUTY AND UGLINESS IN OLMEC MONUMENTAL SCULPTUREAuthor.docx
BEAUTY AND UGLINESS IN OLMEC MONUMENTAL SCULPTUREAuthor.docxBEAUTY AND UGLINESS IN OLMEC MONUMENTAL SCULPTUREAuthor.docx
BEAUTY AND UGLINESS IN OLMEC MONUMENTAL SCULPTUREAuthor.docxtarifarmarie
 
August 4, 2011 TAX FLIGHT IS A MYTH Higher State .docx
August 4, 2011   TAX FLIGHT IS A MYTH Higher State .docxAugust 4, 2011   TAX FLIGHT IS A MYTH Higher State .docx
August 4, 2011 TAX FLIGHT IS A MYTH Higher State .docxtarifarmarie
 
BHA 3202, Standards for Health Care Staff 1 Course Le.docx
BHA 3202, Standards for Health Care Staff 1 Course Le.docxBHA 3202, Standards for Health Care Staff 1 Course Le.docx
BHA 3202, Standards for Health Care Staff 1 Course Le.docxtarifarmarie
 
Assignment – 8600-341 (Leading and motivating a team effectiv.docx
Assignment – 8600-341 (Leading and motivating a team effectiv.docxAssignment – 8600-341 (Leading and motivating a team effectiv.docx
Assignment – 8600-341 (Leading and motivating a team effectiv.docxtarifarmarie
 
BIOEN 4250 BIOMECHANICS I Laboratory 4 – Principle Stres.docx
BIOEN 4250 BIOMECHANICS I Laboratory 4 – Principle Stres.docxBIOEN 4250 BIOMECHANICS I Laboratory 4 – Principle Stres.docx
BIOEN 4250 BIOMECHANICS I Laboratory 4 – Principle Stres.docxtarifarmarie
 
BHR 4680, Training and Development 1 Course Learning .docx
BHR 4680, Training and Development 1 Course Learning .docxBHR 4680, Training and Development 1 Course Learning .docx
BHR 4680, Training and Development 1 Course Learning .docxtarifarmarie
 
Business Plan 2016 Owners Mick & Sheryl Dun.docx
Business Plan 2016     Owners Mick & Sheryl Dun.docxBusiness Plan 2016     Owners Mick & Sheryl Dun.docx
Business Plan 2016 Owners Mick & Sheryl Dun.docxtarifarmarie
 
Assignment Guidelines NR224 Fundamentals - Skills NR224 .docx
Assignment Guidelines  NR224 Fundamentals - Skills NR224 .docxAssignment Guidelines  NR224 Fundamentals - Skills NR224 .docx
Assignment Guidelines NR224 Fundamentals - Skills NR224 .docxtarifarmarie
 
Brand Extension Marketing Plan 8GB530 Brand Extension Marketi.docx
Brand Extension Marketing Plan 8GB530 Brand Extension Marketi.docxBrand Extension Marketing Plan 8GB530 Brand Extension Marketi.docx
Brand Extension Marketing Plan 8GB530 Brand Extension Marketi.docxtarifarmarie
 
Building a Dynamic Organization The Stanley Lynch Investme.docx
Building a Dynamic Organization The Stanley Lynch Investme.docxBuilding a Dynamic Organization The Stanley Lynch Investme.docx
Building a Dynamic Organization The Stanley Lynch Investme.docxtarifarmarie
 
BBA 4351, International Economics 1 Course Learning O.docx
BBA 4351, International Economics 1 Course Learning O.docxBBA 4351, International Economics 1 Course Learning O.docx
BBA 4351, International Economics 1 Course Learning O.docxtarifarmarie
 
BSL 4060, Team Building and Leadership 1 Course Learn.docx
BSL 4060, Team Building and Leadership 1 Course Learn.docxBSL 4060, Team Building and Leadership 1 Course Learn.docx
BSL 4060, Team Building and Leadership 1 Course Learn.docxtarifarmarie
 
BHA 3002, Health Care Management 1 Course Learning Ou.docx
BHA 3002, Health Care Management 1 Course Learning Ou.docxBHA 3002, Health Care Management 1 Course Learning Ou.docx
BHA 3002, Health Care Management 1 Course Learning Ou.docxtarifarmarie
 
BBA 3551, Information Systems Management Course Learn.docx
BBA 3551, Information Systems Management Course Learn.docxBBA 3551, Information Systems Management Course Learn.docx
BBA 3551, Information Systems Management Course Learn.docxtarifarmarie
 
Afro-Asian Inquiry and the Problematics of Comparative Cr.docx
Afro-Asian Inquiry and the Problematics of Comparative Cr.docxAfro-Asian Inquiry and the Problematics of Comparative Cr.docx
Afro-Asian Inquiry and the Problematics of Comparative Cr.docxtarifarmarie
 
BBA 2201, Principles of Accounting I 1 Course Learnin.docx
BBA 2201, Principles of Accounting I 1 Course Learnin.docxBBA 2201, Principles of Accounting I 1 Course Learnin.docx
BBA 2201, Principles of Accounting I 1 Course Learnin.docxtarifarmarie
 
ARH2000 Art & Culture USF College of the Arts 1 .docx
ARH2000 Art & Culture  USF College of the Arts 1 .docxARH2000 Art & Culture  USF College of the Arts 1 .docx
ARH2000 Art & Culture USF College of the Arts 1 .docxtarifarmarie
 

More from tarifarmarie (20)

CASE GS-65 DATE 021309 (REVISED 010311) .docx
CASE  GS-65 DATE  021309 (REVISED 010311) .docxCASE  GS-65 DATE  021309 (REVISED 010311) .docx
CASE GS-65 DATE 021309 (REVISED 010311) .docx
 
BBA 3551, Information Systems Management 1 Course Lea.docx
BBA 3551, Information Systems Management 1 Course Lea.docxBBA 3551, Information Systems Management 1 Course Lea.docx
BBA 3551, Information Systems Management 1 Course Lea.docx
 
BUS 599 – Assignments and Rubrics © 2019 Strayer Unive.docx
BUS 599 – Assignments and Rubrics  © 2019 Strayer Unive.docxBUS 599 – Assignments and Rubrics  © 2019 Strayer Unive.docx
BUS 599 – Assignments and Rubrics © 2019 Strayer Unive.docx
 
BEAUTY AND UGLINESS IN OLMEC MONUMENTAL SCULPTUREAuthor.docx
BEAUTY AND UGLINESS IN OLMEC MONUMENTAL SCULPTUREAuthor.docxBEAUTY AND UGLINESS IN OLMEC MONUMENTAL SCULPTUREAuthor.docx
BEAUTY AND UGLINESS IN OLMEC MONUMENTAL SCULPTUREAuthor.docx
 
August 4, 2011 TAX FLIGHT IS A MYTH Higher State .docx
August 4, 2011   TAX FLIGHT IS A MYTH Higher State .docxAugust 4, 2011   TAX FLIGHT IS A MYTH Higher State .docx
August 4, 2011 TAX FLIGHT IS A MYTH Higher State .docx
 
BHA 3202, Standards for Health Care Staff 1 Course Le.docx
BHA 3202, Standards for Health Care Staff 1 Course Le.docxBHA 3202, Standards for Health Care Staff 1 Course Le.docx
BHA 3202, Standards for Health Care Staff 1 Course Le.docx
 
Assignment – 8600-341 (Leading and motivating a team effectiv.docx
Assignment – 8600-341 (Leading and motivating a team effectiv.docxAssignment – 8600-341 (Leading and motivating a team effectiv.docx
Assignment – 8600-341 (Leading and motivating a team effectiv.docx
 
BIOEN 4250 BIOMECHANICS I Laboratory 4 – Principle Stres.docx
BIOEN 4250 BIOMECHANICS I Laboratory 4 – Principle Stres.docxBIOEN 4250 BIOMECHANICS I Laboratory 4 – Principle Stres.docx
BIOEN 4250 BIOMECHANICS I Laboratory 4 – Principle Stres.docx
 
BHR 4680, Training and Development 1 Course Learning .docx
BHR 4680, Training and Development 1 Course Learning .docxBHR 4680, Training and Development 1 Course Learning .docx
BHR 4680, Training and Development 1 Course Learning .docx
 
Business Plan 2016 Owners Mick & Sheryl Dun.docx
Business Plan 2016     Owners Mick & Sheryl Dun.docxBusiness Plan 2016     Owners Mick & Sheryl Dun.docx
Business Plan 2016 Owners Mick & Sheryl Dun.docx
 
Assignment Guidelines NR224 Fundamentals - Skills NR224 .docx
Assignment Guidelines  NR224 Fundamentals - Skills NR224 .docxAssignment Guidelines  NR224 Fundamentals - Skills NR224 .docx
Assignment Guidelines NR224 Fundamentals - Skills NR224 .docx
 
Brand Extension Marketing Plan 8GB530 Brand Extension Marketi.docx
Brand Extension Marketing Plan 8GB530 Brand Extension Marketi.docxBrand Extension Marketing Plan 8GB530 Brand Extension Marketi.docx
Brand Extension Marketing Plan 8GB530 Brand Extension Marketi.docx
 
Building a Dynamic Organization The Stanley Lynch Investme.docx
Building a Dynamic Organization The Stanley Lynch Investme.docxBuilding a Dynamic Organization The Stanley Lynch Investme.docx
Building a Dynamic Organization The Stanley Lynch Investme.docx
 
BBA 4351, International Economics 1 Course Learning O.docx
BBA 4351, International Economics 1 Course Learning O.docxBBA 4351, International Economics 1 Course Learning O.docx
BBA 4351, International Economics 1 Course Learning O.docx
 
BSL 4060, Team Building and Leadership 1 Course Learn.docx
BSL 4060, Team Building and Leadership 1 Course Learn.docxBSL 4060, Team Building and Leadership 1 Course Learn.docx
BSL 4060, Team Building and Leadership 1 Course Learn.docx
 
BHA 3002, Health Care Management 1 Course Learning Ou.docx
BHA 3002, Health Care Management 1 Course Learning Ou.docxBHA 3002, Health Care Management 1 Course Learning Ou.docx
BHA 3002, Health Care Management 1 Course Learning Ou.docx
 
BBA 3551, Information Systems Management Course Learn.docx
BBA 3551, Information Systems Management Course Learn.docxBBA 3551, Information Systems Management Course Learn.docx
BBA 3551, Information Systems Management Course Learn.docx
 
Afro-Asian Inquiry and the Problematics of Comparative Cr.docx
Afro-Asian Inquiry and the Problematics of Comparative Cr.docxAfro-Asian Inquiry and the Problematics of Comparative Cr.docx
Afro-Asian Inquiry and the Problematics of Comparative Cr.docx
 
BBA 2201, Principles of Accounting I 1 Course Learnin.docx
BBA 2201, Principles of Accounting I 1 Course Learnin.docxBBA 2201, Principles of Accounting I 1 Course Learnin.docx
BBA 2201, Principles of Accounting I 1 Course Learnin.docx
 
ARH2000 Art & Culture USF College of the Arts 1 .docx
ARH2000 Art & Culture  USF College of the Arts 1 .docxARH2000 Art & Culture  USF College of the Arts 1 .docx
ARH2000 Art & Culture USF College of the Arts 1 .docx
 

Recently uploaded

Introduction to ArtificiaI Intelligence in Higher Education
Introduction to ArtificiaI Intelligence in Higher EducationIntroduction to ArtificiaI Intelligence in Higher Education
Introduction to ArtificiaI Intelligence in Higher Educationpboyjonauth
 
Hybridoma Technology ( Production , Purification , and Application )
Hybridoma Technology  ( Production , Purification , and Application  ) Hybridoma Technology  ( Production , Purification , and Application  )
Hybridoma Technology ( Production , Purification , and Application ) Sakshi Ghasle
 
“Oh GOSH! Reflecting on Hackteria's Collaborative Practices in a Global Do-It...
“Oh GOSH! Reflecting on Hackteria's Collaborative Practices in a Global Do-It...“Oh GOSH! Reflecting on Hackteria's Collaborative Practices in a Global Do-It...
“Oh GOSH! Reflecting on Hackteria's Collaborative Practices in a Global Do-It...Marc Dusseiller Dusjagr
 
Science 7 - LAND and SEA BREEZE and its Characteristics
Science 7 - LAND and SEA BREEZE and its CharacteristicsScience 7 - LAND and SEA BREEZE and its Characteristics
Science 7 - LAND and SEA BREEZE and its CharacteristicsKarinaGenton
 
Crayon Activity Handout For the Crayon A
Crayon Activity Handout For the Crayon ACrayon Activity Handout For the Crayon A
Crayon Activity Handout For the Crayon AUnboundStockton
 
mini mental status format.docx
mini    mental       status     format.docxmini    mental       status     format.docx
mini mental status format.docxPoojaSen20
 
18-04-UA_REPORT_MEDIALITERAСY_INDEX-DM_23-1-final-eng.pdf
18-04-UA_REPORT_MEDIALITERAСY_INDEX-DM_23-1-final-eng.pdf18-04-UA_REPORT_MEDIALITERAСY_INDEX-DM_23-1-final-eng.pdf
18-04-UA_REPORT_MEDIALITERAСY_INDEX-DM_23-1-final-eng.pdfssuser54595a
 
Enzyme, Pharmaceutical Aids, Miscellaneous Last Part of Chapter no 5th.pdf
Enzyme, Pharmaceutical Aids, Miscellaneous Last Part of Chapter no 5th.pdfEnzyme, Pharmaceutical Aids, Miscellaneous Last Part of Chapter no 5th.pdf
Enzyme, Pharmaceutical Aids, Miscellaneous Last Part of Chapter no 5th.pdfSumit Tiwari
 
How to Make a Pirate ship Primary Education.pptx
How to Make a Pirate ship Primary Education.pptxHow to Make a Pirate ship Primary Education.pptx
How to Make a Pirate ship Primary Education.pptxmanuelaromero2013
 
A Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformA Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformChameera Dedduwage
 
Call Girls in Dwarka Mor Delhi Contact Us 9654467111
Call Girls in Dwarka Mor Delhi Contact Us 9654467111Call Girls in Dwarka Mor Delhi Contact Us 9654467111
Call Girls in Dwarka Mor Delhi Contact Us 9654467111Sapana Sha
 
Software Engineering Methodologies (overview)
Software Engineering Methodologies (overview)Software Engineering Methodologies (overview)
Software Engineering Methodologies (overview)eniolaolutunde
 
BASLIQ CURRENT LOOKBOOK LOOKBOOK(1) (1).pdf
BASLIQ CURRENT LOOKBOOK  LOOKBOOK(1) (1).pdfBASLIQ CURRENT LOOKBOOK  LOOKBOOK(1) (1).pdf
BASLIQ CURRENT LOOKBOOK LOOKBOOK(1) (1).pdfSoniaTolstoy
 
MENTAL STATUS EXAMINATION format.docx
MENTAL     STATUS EXAMINATION format.docxMENTAL     STATUS EXAMINATION format.docx
MENTAL STATUS EXAMINATION format.docxPoojaSen20
 
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxSOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxiammrhaywood
 
Solving Puzzles Benefits Everyone (English).pptx
Solving Puzzles Benefits Everyone (English).pptxSolving Puzzles Benefits Everyone (English).pptx
Solving Puzzles Benefits Everyone (English).pptxOH TEIK BIN
 
How to Configure Email Server in Odoo 17
How to Configure Email Server in Odoo 17How to Configure Email Server in Odoo 17
How to Configure Email Server in Odoo 17Celine George
 
Class 11 Legal Studies Ch-1 Concept of State .pdf
Class 11 Legal Studies Ch-1 Concept of State .pdfClass 11 Legal Studies Ch-1 Concept of State .pdf
Class 11 Legal Studies Ch-1 Concept of State .pdfakmcokerachita
 

Recently uploaded (20)

Introduction to ArtificiaI Intelligence in Higher Education
Introduction to ArtificiaI Intelligence in Higher EducationIntroduction to ArtificiaI Intelligence in Higher Education
Introduction to ArtificiaI Intelligence in Higher Education
 
Hybridoma Technology ( Production , Purification , and Application )
Hybridoma Technology  ( Production , Purification , and Application  ) Hybridoma Technology  ( Production , Purification , and Application  )
Hybridoma Technology ( Production , Purification , and Application )
 
“Oh GOSH! Reflecting on Hackteria's Collaborative Practices in a Global Do-It...
“Oh GOSH! Reflecting on Hackteria's Collaborative Practices in a Global Do-It...“Oh GOSH! Reflecting on Hackteria's Collaborative Practices in a Global Do-It...
“Oh GOSH! Reflecting on Hackteria's Collaborative Practices in a Global Do-It...
 
Science 7 - LAND and SEA BREEZE and its Characteristics
Science 7 - LAND and SEA BREEZE and its CharacteristicsScience 7 - LAND and SEA BREEZE and its Characteristics
Science 7 - LAND and SEA BREEZE and its Characteristics
 
Crayon Activity Handout For the Crayon A
Crayon Activity Handout For the Crayon ACrayon Activity Handout For the Crayon A
Crayon Activity Handout For the Crayon A
 
mini mental status format.docx
mini    mental       status     format.docxmini    mental       status     format.docx
mini mental status format.docx
 
18-04-UA_REPORT_MEDIALITERAСY_INDEX-DM_23-1-final-eng.pdf
18-04-UA_REPORT_MEDIALITERAСY_INDEX-DM_23-1-final-eng.pdf18-04-UA_REPORT_MEDIALITERAСY_INDEX-DM_23-1-final-eng.pdf
18-04-UA_REPORT_MEDIALITERAСY_INDEX-DM_23-1-final-eng.pdf
 
Enzyme, Pharmaceutical Aids, Miscellaneous Last Part of Chapter no 5th.pdf
Enzyme, Pharmaceutical Aids, Miscellaneous Last Part of Chapter no 5th.pdfEnzyme, Pharmaceutical Aids, Miscellaneous Last Part of Chapter no 5th.pdf
Enzyme, Pharmaceutical Aids, Miscellaneous Last Part of Chapter no 5th.pdf
 
How to Make a Pirate ship Primary Education.pptx
How to Make a Pirate ship Primary Education.pptxHow to Make a Pirate ship Primary Education.pptx
How to Make a Pirate ship Primary Education.pptx
 
TataKelola dan KamSiber Kecerdasan Buatan v022.pdf
TataKelola dan KamSiber Kecerdasan Buatan v022.pdfTataKelola dan KamSiber Kecerdasan Buatan v022.pdf
TataKelola dan KamSiber Kecerdasan Buatan v022.pdf
 
A Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy ReformA Critique of the Proposed National Education Policy Reform
A Critique of the Proposed National Education Policy Reform
 
Call Girls in Dwarka Mor Delhi Contact Us 9654467111
Call Girls in Dwarka Mor Delhi Contact Us 9654467111Call Girls in Dwarka Mor Delhi Contact Us 9654467111
Call Girls in Dwarka Mor Delhi Contact Us 9654467111
 
Software Engineering Methodologies (overview)
Software Engineering Methodologies (overview)Software Engineering Methodologies (overview)
Software Engineering Methodologies (overview)
 
BASLIQ CURRENT LOOKBOOK LOOKBOOK(1) (1).pdf
BASLIQ CURRENT LOOKBOOK  LOOKBOOK(1) (1).pdfBASLIQ CURRENT LOOKBOOK  LOOKBOOK(1) (1).pdf
BASLIQ CURRENT LOOKBOOK LOOKBOOK(1) (1).pdf
 
MENTAL STATUS EXAMINATION format.docx
MENTAL     STATUS EXAMINATION format.docxMENTAL     STATUS EXAMINATION format.docx
MENTAL STATUS EXAMINATION format.docx
 
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptxSOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
SOCIAL AND HISTORICAL CONTEXT - LFTVD.pptx
 
Solving Puzzles Benefits Everyone (English).pptx
Solving Puzzles Benefits Everyone (English).pptxSolving Puzzles Benefits Everyone (English).pptx
Solving Puzzles Benefits Everyone (English).pptx
 
How to Configure Email Server in Odoo 17
How to Configure Email Server in Odoo 17How to Configure Email Server in Odoo 17
How to Configure Email Server in Odoo 17
 
Staff of Color (SOC) Retention Efforts DDSD
Staff of Color (SOC) Retention Efforts DDSDStaff of Color (SOC) Retention Efforts DDSD
Staff of Color (SOC) Retention Efforts DDSD
 
Class 11 Legal Studies Ch-1 Concept of State .pdf
Class 11 Legal Studies Ch-1 Concept of State .pdfClass 11 Legal Studies Ch-1 Concept of State .pdf
Class 11 Legal Studies Ch-1 Concept of State .pdf
 

2.1 ### uVision Project, (C) Keil Software .docx

  • 1. 2.1 ### uVision Project, (C) Keil Software soln 0x4 ARM-ADS 6090000::V6.9::.ARMCLANG 1 ARMCM4_FP ARM ARM.CMSIS.5.4.0 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) 0 $$Device:ARMCM4_FP$DeviceARMARMCM4IncludeARM CM4_FP.h
  • 14. RTEDeviceSTM32L476VGTxsystem_stm32l4xx.c 1.0 ### uVision Project, (C) Keil Software *.c *.s*; *.src; *.a* *.obj; *.o *.lib *.txt; *.h; *.inc *.plm *.cpp 0 0 0
  • 17. 1 1 1 1 0 0 1 1 0 0 BINUL2CM3.DLL 0 ARMRTXEVENTFLAGS -L70 -Z18 -C0 -M0 -T1 0 DLGDARM (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,- 1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) 0
  • 18. ARMDBGFLAGS -T0 0 UL2CM3 UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) 0 0 36 1 9244 0 0 0 0 0 1 .source140_main.c target_simsource/140_main.c36 1 0 38 1 0 0 0 0 0
  • 23. // Functions defined in a .s file extern void task5(void); extern void task6(void); extern void task7(void); extern void task10(void); extern void task11(void); extern void task12(void); extern void task13(void); extern void task14(void); extern void task15(void); // Global variable uint32_t *gPtrArray1, *gPtrArray2; uint32_t gVar1 = 6, gVar2; volatile uint32_t gTemp1;
  • 24. volatile uint32_t gTemp2; int main(void) { // We configure the RAM into the following two blocks in "Options for Target..." -> // "Target" -> "IRAM1 and IRAM2", with the first being default: // 1) Starting: 0x20000000; size: 0x10000 (2^16 B = 2^6 kB) // 2) Starting: 0x20010000; size: 0x10000 (2^16 B = 2^6 kB) // As a result, we can put our own data starting at 0x20010000. // Initialize the global pointers gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); gPtrArray2 = (uint32_t *)(MY_ARRAY_BASE + 0x40); // Task 1. Load, modify, and store of a global var---example 1 gTemp1 = 0x10; gTemp1 += 1;
  • 25. // Task 2. Load, modify, and store of a global var---example 2 gTemp2 = 0x20; gTemp2 += (gTemp1<<8); printf("gTemp1 = 0x%X, gTemp2 = 0x%Xn", gTemp1, gTemp2); // Task 3. Load, modify, and store of a local var---example 1 volatile uint32_t lTemp1 = 0x1000; lTemp1 += 1; // Task 4. Load, modify, and store of a local var---example 2 volatile uint32_t lTemp2 = 0x2000; lTemp2 += (lTemp1<<16); printf("lTemp1 = 0x%X, lTemp2 = 0x%Xn", lTemp1, lTemp2);
  • 26. // Task 5. LDR pseudo instruction. task5(); // Task 6. Load/Modify/Store using offset addressing. gVar1 += 0x10; task6(); // Task6: perform the above task using assembly // Task 7. Load/Modify/Store using pseudo instruction. gVar2 = 0x12345678; gVar2 += gVar1; task7(); // Task7: perform the above task using assembly gVar1 = 6; // Task 10. Register offset-based addressing---a simple example. // Note that this is especially useful for pointer arithmetic here.
  • 27. for (int i = 0; i < gVar1; i++) { *(gPtrArray1 + i) = (uint32_t)(i*2 + 1); // i is register offset based } // clear the memory for task10 in assembly for (int i = 0; i < gVar1; i++) { *(gPtrArray1 + i) = 0; } task10(); // task10: perform the above task using assembly // Task 11. Register offset-based addressing---another simple example. // Note that this is especially useful for pointer arithmetic here. for (int i = 0; i < gVar1; i++) { *(gPtrArray2 + i) = (uint32_t)(i*4 + 1); } // clear the memory for task11 in assembly for (int i = 0; i < gVar1; i++) { *(gPtrArray2 + i) = 0; } task11(); // task11: perform the above task using assembly // Task 12. Register offset-based addressing---more
  • 28. complicated case. for (int i = 0; i < gVar1; i++) { *(gPtrArray2 + i) = (*(gPtrArray1 + i))++; // Note that the input data is changed as well } // clear the memory for task12 in assembly for (int i = 0; i < gVar1; i++) { *(gPtrArray2 + i) = 0; } task12(); // task12: perform the above task using assembly printf("Task 2 is done.n"); // Task 13. Immediate offset addressing. for (int i = 0; i < gVar1-1; i++) { // We use immediate offset addressing twice in the righthand side of the following *(gPtrArray2 + i) = *(gPtrArray1) + *(gPtrArray1+1); gPtrArray1++; } // clear the memory for task13 in assembly gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); // Restore the pointer
  • 29. for (int i = 0; i < gVar1-1; i++) { *(gPtrArray2 + i) = 0; } task13(); // task13: perform the above task using assembly gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); // Restore the pointer // Task 14. Immediate offset addressing and pre-index addressing. for (int i = 0; i < gVar1-1; i++) { //*(gPtrArray2 + i) = *(gPtrArray1) + 2 * (*(++gPtrArray1)); // The above statement can be implemented below to force the ''sequencing'': // See: https://en.wikipedia.org/wiki/Sequence_point uint32_t temp = *(gPtrArray1); *(gPtrArray2 + i) = temp + 2 * (*(++gPtrArray1)); } gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); // Restore the pointer for (int i = 0; i < gVar1-1; i++) { *(gPtrArray2 + i) = 0; } task14(); // task14: perform the above task using assembly
  • 30. gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); // Restore the pointer // Task 15. Post-index addressing and immediate offset addressing. for (int i = 0; i < gVar1-1; i++) { //*(gPtrArray2 + i) = *(gPtrArray1++) + 4 * (*gPtrArray1); uint32_t temp = *(gPtrArray1++); *(gPtrArray2 + i) = temp + 4 * (*gPtrArray1); } gPtrArray1 = (uint32_t *)(MY_ARRAY_BASE + 0x00); // Restore the pointer for (int i = 0; i < gVar1-1; i++) { *(gPtrArray2 + i) = 0; } task15(); // task15: perform the above task using assembly while (1); }
  • 31. AREA my_fancy_asm_code, CODE, READONLY ; Define the program area ; Export functions defined in this file. These functions need to be declared ; in the file calling them. EXPORT task5 EXPORT task6 EXPORT task7 EXPORT task10 EXPORT task11 EXPORT task12 EXPORT task13 EXPORT task14 EXPORT task15 IMPORT gPtrArray1 IMPORT gPtrArray2
  • 32. IMPORT gVar1 IMPORT gVar2 ALIGN ; Align the data in the boundary of 4 bytes. task5 PROC LDR r0, =0x10 ; Pseudo code; see the disassembly for the true code LDR r1, =0x12345678 ; Pseudo code; see the disassembly for the true code LDR r2, =gVar1 ; Loading the address of the global variable gVar1 LDR r3, =gPtrArray1 ; Loading the address of the global variable gPtrArray1 BX lr ENDP task6 PROC LDR r0, =0x10 ; Pseudo code; see the disassembly for the true code
  • 33. LDR r1, =gVar1 ; Loading the address of the global variable gVar1 LDR r2, [r1] ADD r0, r2 STR r0, [r1] BX lr ENDP task7 PROC LDR r0, =0x12345678 ; Pseudo code; see the disassembly for the true code LDR r1, =gVar1 LDR r1, [r1] ADD r0, r1 LDR r2, =gVar2 ; Loading the address of the global variable gVar2 STR r0, [r2] BX lr ENDP
  • 34. task10 PROC LDR r0, =gPtrArray1 ; Loading the address of the global variable gPtrArray1 LDR r0, [r0] ; Loading the content of the global variable gPtrArray1 LDR r1, =gVar1 ; Loading the address of the global variable gVar1 LDR r1, [r1] ; Loading the content of the global variable gVar1 MOV r2, #0 ; variable (int) i task10_loop CMP r2, r1 ; test = r2 - r1 BGE task10_end ; if test >= 0, then branch to task10_end MOV r3, r2, LSL #1 ; r3 <- 2 * r2 ADD r3, #1 ; r3 <- r3 + 1 STR r3, [r0, r2, LSL #2] ; r3 -> mem[r0 + 4*r2] or r3 -> mem[r0 + i] ADD r2, #1 ; r2 <- r2 + 1 B task10_loop ; branch to task10_loop task10_end
  • 35. BX lr ; return ENDP ; If you need to use registers starting from r4, you need to PUSH them first to save the ; run-time environment for the caller. You need to POP them up at the exit of the code. task11 PROC LDR r0, =gPtrArray2 LDR r0, [r0] LDR r1, =gVar1 LDR r1, [r1] MOV r2, #0 task11_loop CMP r2, r1 BGE task11_end MOV r3, r2, LSL #2 ADD r3, #1
  • 36. STR r3, [r0, r2, LSL #2] ADD r2, #1 B task11_loop task11_end BX lr ENDP task12 PROC PUSH {r4, lr} LDR r0, =gPtrArray1 LDR r0, [r0] LDR r4, =gPtrArray2 LDR r4, [r4] LDR r1, =gVar1 LDR r1, [r1] MOV r2, #0 task12_loop CMP r2, r1
  • 37. BGE task12_end LDR r3, [r0, r2, LSL #2] STR r3, [r4, r2, LSL #2] ADD r3, #1 STR r3, [r0, r2, LSL #2] ADD r2, #1 B task12_loop task12_end POP {r4, pc} ; Pop lr to pc, which is the same as BX lr. ENDP task13 PROC PUSH {r4-r5, lr} LDR r0, =gPtrArray1 LDR r0, [r0] LDR r4, =gPtrArray2 LDR r4, [r4]
  • 38. LDR r1, =gVar1 LDR r1, [r1] SUB r1, #1 MOV r2, #0 task13_loop CMP r2, r1 BGE task13_end LDR r3, [r0] LDR r5, [r0, #4] ADD r3, r5 STR r3, [r4, r2, LSL #2] ADD r2, #1 ADD r0, #4 B task13_loop task13_end POP {r4-r5, pc} ENDP
  • 39. task14 PROC PUSH {r4-r5, lr} LDR r0, =gPtrArray1 LDR r0, [r0] LDR r4, =gPtrArray2 LDR r4, [r4] LDR r1, =gVar1 LDR r1, [r1] SUB r1, #1 MOV r2, #0 task14_loop CMP r2, r1 BGE task14_end LDR r3, [r0] LDR r5, [r0, #4]! ADD r3, r5, LSL #1 STR r3, [r4, r2, LSL #2] ADD r2, #1
  • 40. B task14_loop task14_end POP {r4-r5, pc} ENDP task15 PROC PUSH {r4-r5, lr} LDR r0, =gPtrArray1 LDR r0, [r0] LDR r4, =gPtrArray2 LDR r4, [r4] LDR r1, =gVar1 LDR r1, [r1] SUB r1, #1 MOV r2, #0 task15_loop CMP r2, r1 BGE task15_end
  • 41. LDR r3, [r0], #4 LDR r5, [r0] ADD r3, r5, LSL #2 STR r3, [r4, r2, LSL #2] ADD r2, #1 B task15_loop task15_end POP {r4-r5, pc} ENDP END ; End of the entire file AREA my_fancy_asm_code, CODE, READONLY ; Define the program area ; Export functions defined in this file. These functions need to be declared ; in the file calling them. EXPORT task10
  • 42. EXPORT task11 EXPORT task12 EXPORT task13 EXPORT task14 EXPORT task15 IMPORT gPtrArray10a IMPORT gPtrArray11a IMPORT gPtrArray12a IMPORT gPtrArray13a IMPORT gPtrArray14a IMPORT gPtrArray15a IMPORT gVar1 ALIGN ; Align the data in the boundary of 4 bytes. task10 PROC LDR r0, =gPtrArray10a ; Loading the address of the
  • 43. global variable gPtrArray10a LDR r0, [r0] ; Loading the content of the global variable gPtrArray10a LDR r1, =gVar1 ; Loading the address of the global variable gVar1 LDR r1, [r1] ; Loading the content of the global variable gVar1 MOV r2, #0 ; variable (int) i task10_loop CMP r2, r1 ; test = r2 - r1 BGE task10_end ; if test >= 0, then branch to task10_end MOV r3, r2, LSL #2 ; r3 <- r2 * 4 SUB r3, #15 ; r3 <- r3 - 15 STRB r3, [r0, r2] ; r3 -> mem[r0 + r2] or r3 -> mem[r0 + i] ADD r2, #1 ; r2 <- r2 + 1 B task10_loop ; branch to task10_loop task10_end BX lr ; return ENDP
  • 44. ; If you need to use registers starting from r4, you need to PUSH them first to save the ; run-time environment for the caller. You need to POP them up at the exit of the code. task11 PROC BX lr ENDP task12 PROC PUSH {r4-r5, lr} LDR r0, =gPtrArray10a LDR r0, [r0] LDR r4, =gPtrArray12a LDR r4, [r4] LDR r1, =gVar1 LDR r1, [r1] MOV r2, #0
  • 45. task12_loop CMP r2, r1 BGE task12_end LDRSB r3, [r0, r2] LDR r5, =10 SUB r5, r3 STRH r5, [r4, r2, LSL #1] ADD r3, #1 STRB r3, [r0, r2] ADD r2, #1 B task12_loop task12_end POP {r4-r5, pc} ; Pop lr to pc, which is the same as BX lr. ENDP task13 PROC PUSH {r4-r5, lr}
  • 46. POP {r4-r5, pc} ENDP task14 PROC PUSH {r4-r5, lr} LDR r0, =gPtrArray12a LDR r0, [r0] LDR r4, =gPtrArray14a LDR r4, [r4] LDR r1, =gVar1 LDR r1, [r1] SUB r1, #1 MOV r2, #0 task14_loop CMP r2, r1 BGE task14_end LDRSH r3, [r0] LDRSH r5, [r0, #2]!
  • 47. ADD r3, r5, LSL #3 STR r3, [r4, r2, LSL #2] ADD r2, #1 B task14_loop task14_end POP {r4-r5, pc} ENDP task15 PROC PUSH {r4-r5, lr} POP {r4-r5, pc} ENDP END #include <stdio.h> #include <stdint.h> #include <stdbool.h>
  • 48. #define MY_ARRAY_BASE (0x20010000) // Functions defined in a .s file extern void task10(void); extern void task11(void); extern void task12(void); extern void task13(void); extern void task14(void); extern void task15(void); // Global variable // Pointers for the C version. int8_t *gPtrArray10c = (int8_t *) (MY_ARRAY_BASE + 0x00); uint8_t *gPtrArray11c = (uint8_t *) (MY_ARRAY_BASE + 0x40); int16_t *gPtrArray12c = (int16_t *) (MY_ARRAY_BASE + 0x80); uint16_t *gPtrArray13c = (uint16_t *) (MY_ARRAY_BASE + 0xC0);
  • 49. int32_t *gPtrArray14c = (int32_t *) (MY_ARRAY_BASE + 0x100); uint32_t *gPtrArray15c = (uint32_t *) (MY_ARRAY_BASE + 0x140); // Pointers for the asm version. int8_t *gPtrArray10a = (int8_t *) (MY_ARRAY_BASE + 0x20); uint8_t *gPtrArray11a = (uint8_t *) (MY_ARRAY_BASE + 0x60); int16_t *gPtrArray12a = (int16_t *) (MY_ARRAY_BASE + 0xA0); uint16_t *gPtrArray13a = (uint16_t *) (MY_ARRAY_BASE + 0xE0); int32_t *gPtrArray14a = (int32_t *) (MY_ARRAY_BASE + 0x120); uint32_t *gPtrArray15a = (uint32_t *) (MY_ARRAY_BASE + 0x160); int8_t gVar1 = 8; int main(void) { // Task 10. Register offset-based addressing---a simple example.
  • 50. for (int i = 0; i < gVar1; i++) { *(gPtrArray10c + i) = (int8_t)(i*4 - 15); // i is saved in a register } task10(); // task10: perform the above task using assembly // Task 11. Register offset-based addressing---another simple example. for (int i = 0; i < gVar1; i++) { *(gPtrArray11c + i) = (uint8_t)(i*32 + 2); } task11(); // task11: perform the above task using assembly // Task 12. Register offset-based addressing---more complicated case. for (int i = 0; i < gVar1; i++) { *(gPtrArray12c + i) = 10 - (*(gPtrArray10c + i))++; } // Note that the input data is changed as well in the above line
  • 51. task12(); // task12: perform the above task using assembly // Task 13. Immediate offset addressing. for (int i = 0; i < gVar1-1; i++) { // We use immediate offset addressing twice below (righthand side) *(gPtrArray13c + i) = *(gPtrArray11c) + *(gPtrArray11c+1); gPtrArray11c++; } task13(); // task13: perform the above task using assembly // Task 14. Immediate offset addressing and pre-index addressing. for (int i = 0; i < gVar1-1; i++) { uint32_t temp = *(gPtrArray12c); *(gPtrArray14c + i) = temp + 8 * (*(++gPtrArray12c)); } task14(); // task14: perform the above task using assembly
  • 52. // Task 15. Post-index addressing and immediate offset addressing. for (int i = 0; i < gVar1-1; i++) { uint32_t temp = *(gPtrArray13c++); *(gPtrArray15c + i) = temp + 16 * (*gPtrArray13c); } task15(); // task15: perform the above task using assembly while (1); }