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Computer Organization and Architecture, 10th Edition, by William Stallings
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
CHAPTER 2: PERFORMANCE ISSUES
TRUE OR FALSE
T F 1. Year by year the cost of computer systems continues to rise.
T F 2. Processors are so inexpensive that we now have microprocessors
we throw away.
T F 3. Workstation systems cannot support highly sophisticated
engineering and scientific applications.
T F 4. The IAS is the prototype of all subsequent general-purpose
computers.
T F 5. Cloud service providers use massive high-performance banks of
servers to satisfy high-volume, high-transaction-rate applications
for a broad spectrum of clients.
T F 6. The raw speed of the microprocessor will not achieve its potential
unless it is fed a constant stream of work to do in the form of
computer instructions.
T F 7. Superscalar execution is the same principle as seen in an assembly
line.
T F 8. Branch prediction potentially increases the amount of work
available for the processor to execute.
T F 9. Raw speed is far more important than how a processor performs
when executing a given application.
T F 10. The cache holds recently accessed data.
T F 11. Operations performed by a processor, such as fetching an
instruction, decoding the instruction, performing an arithmetic
operation, and so on, are governed by a system clock.
T F 12. A common measure of performance for a processor is the rate at
which instructions are executed, expressed as millions of
instructions per second (MIPS).
Computer Organization and Architecture, 10th Edition, by William Stallings
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
T F 13. Designers wrestle with the challenge of balancing processor
performance with that of main memory and other computer
components.
T F 14. A straight comparison of clock speeds on different processors
tells the whole story about performance.
T F 15. Measures such as MIPS and MFLOPS have proven adequate to
evaluating the performance of processors.
MULTIPLE CHOICE
1. Multiple parallel pipelines are used in __________ .
A. speculative execution B. data flow analysis
C. superscalar execution D. branch prediction
2. The desktop application(s) that require the great power of today’s
microprocessor-based systems include___________.
A. image processing B. speech recognition
C. videoconferencing D. all of the above
3. ___________ potentially increases the amount of work available for the
processor to execute.
A. Branch prediction B. Performance balance
C. Pipelining D. BIPS
4. The interface between processor and ___________ is the most crucial pathway
in the entire computer because it is responsible for carrying a constant flow
of program instructions and data between memory chips and the processor.
A. main memory B. pipeline
C. clock speed D. control unit
Computer Organization and Architecture, 10th Edition, by William Stallings
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
5. The __________ is a relatively small fast memory interposed between a larger,
slower memory and the logic that accesses the larger memory.
A. peripheral B. cache
C. processor D. arithmetic and logic unit
6. An increase in clock rate means that individual operations are executed _____.
A. the same B. slower
C. with very little change D. more rapidly
7. A __________ is a core designed to perform parallel operations on graphics data.
A. MIC B. ALU
C. GPU D. PGD
8. A(n) __________ Mean is a good candidate for comparing the execution time
performance of several systems.
A. Composite B. Arithmetic
C. Harmonic D. Evaluation
9. __________ law deals with the potential speedup of a program using multiple
processors compared to a single processor.
A. Moore’s B. Amdahl’s
C. Little’s D. Murphy’s
10. One increment, or pulse, of a clock is referred to as a __________ .
A. clock cycle B. clock rate
C. clock speed D. cycle time
Computer Organization and Architecture, 10th Edition, by William Stallings
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
11. The use of multiple processors on the same chip is referred to as __________
and provides the potential to increase performance without increasing the
clock rate.
A. multicore B. GPU
C. data channels D. MPC
12. With respect to changes in values, the __________ Mean gives equal weight to all
of the values in the data set.
A. Harmonic B. Arithmetic
C. Composite D. Geometric
13. The __________ measures the ability of a computer to complete a single task.
A. clock speed B. speed metric
C. execute cycle D. cycle time
14. A measurement of how many tasks a computer can accomplish in a certain
amount of time is called a(n) __________ .
A. real-time system B. application analysis
C. cycle speed D. throughput
15. The best known of the SPEC benchmark suites is __________ .
A. SPEC CPU2006 B. SPECjvm2008
C. SPECsfs2008 D. SPEC SC2013
SHORT ANSWER
1. __________ enables a processor to work simultaneously on multiple
instructions by performing a different phase for each of the multiple
instructions at the same time.
Computer Organization and Architecture, 10th Edition, by William Stallings
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
2. ___________ is the ability to issue more than one instruction in every processor
clock cycle.
3. With __________ the processor looks ahead in the instruction code fetched from
memory and predicts which branches, or groups of instructions, are likely to
be processed next.
4. __________ enables the processor to keep its execution engines as busy as
possible by executing instructions that are likely to be needed.
5. Traditionally found on a plug-in graphics card, a _________ is used to encode
and render 2D and 3D graphics as well as process video.
6. __________ Law applies to a queuing system.
7. The three common formulas used for calculating a mean are arithmetic,
harmonic, and __________ .
8. The __________ Mean used for a time-based variable, such as program
execution time, has the important property that it is directly proportional to
the total time.
9. The _________ Mean is preferred when calculating rates.
10. The __________ Mean gives consistent results regardless of which system is
used as a reference.
11. _________ metric are required for all reported results and have strict
guidelines for compilation.
12. A _________ suite is a collection of programs, defined in a high-level language,
that together attempt to provide a representative test of a computer in a
particular application or system programming area.
13. At the most fundamental level, the speed of a processor is dictated by the
pulse frequency produced by the clock, measured in cycles per second, or
_________.
14. The best-known collection of benchmark suites is defined and maintained
by an industry consortium known as __________.
15. __________ law deals with the potential speedup of a program using multiple
processors compared to a single processor.
Computer Organization and Architecture, 10th Edition, by William Stallings
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
CHAPTER 2: PERFORMANCE ISSUES
TRUE OR FALSE
1. F
2. T
3. F
4. T
5. T
6. T
7. F
8. T
9. F
10. T
11. T
12. T
13. T
14. F
15. F
MULTIPLE CHOICE
1. C
2. D
3. A
4. A
5. B
6. D
7. C
8. B
9. B
10. A
11. A
12. D
13. B
14. D
15. A
Computer Organization and Architecture, 10th Edition, by William Stallings
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
SHORT ANSWER
1. Pipelining
2. Superscalar execution
3. branch prediction
4. Speculative execution
5. GPU (graphics processing units)
6. Little’s
7. geometric
8. Arithmetic
9. Harmonic
10. Geometric
11. Base
12. benchmark
13. Hertz (Hz)
14. System Performance Evaluation Corporation (SPEC)
15. Amdahl’s

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Computer Organization and Architecture 10th Edition by Stallings Test Bank

  • 1. Computer Organization and Architecture, 10th Edition, by William Stallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. CHAPTER 2: PERFORMANCE ISSUES TRUE OR FALSE T F 1. Year by year the cost of computer systems continues to rise. T F 2. Processors are so inexpensive that we now have microprocessors we throw away. T F 3. Workstation systems cannot support highly sophisticated engineering and scientific applications. T F 4. The IAS is the prototype of all subsequent general-purpose computers. T F 5. Cloud service providers use massive high-performance banks of servers to satisfy high-volume, high-transaction-rate applications for a broad spectrum of clients. T F 6. The raw speed of the microprocessor will not achieve its potential unless it is fed a constant stream of work to do in the form of computer instructions. T F 7. Superscalar execution is the same principle as seen in an assembly line. T F 8. Branch prediction potentially increases the amount of work available for the processor to execute. T F 9. Raw speed is far more important than how a processor performs when executing a given application. T F 10. The cache holds recently accessed data. T F 11. Operations performed by a processor, such as fetching an instruction, decoding the instruction, performing an arithmetic operation, and so on, are governed by a system clock. T F 12. A common measure of performance for a processor is the rate at which instructions are executed, expressed as millions of instructions per second (MIPS).
  • 2. Computer Organization and Architecture, 10th Edition, by William Stallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. T F 13. Designers wrestle with the challenge of balancing processor performance with that of main memory and other computer components. T F 14. A straight comparison of clock speeds on different processors tells the whole story about performance. T F 15. Measures such as MIPS and MFLOPS have proven adequate to evaluating the performance of processors. MULTIPLE CHOICE 1. Multiple parallel pipelines are used in __________ . A. speculative execution B. data flow analysis C. superscalar execution D. branch prediction 2. The desktop application(s) that require the great power of today’s microprocessor-based systems include___________. A. image processing B. speech recognition C. videoconferencing D. all of the above 3. ___________ potentially increases the amount of work available for the processor to execute. A. Branch prediction B. Performance balance C. Pipelining D. BIPS 4. The interface between processor and ___________ is the most crucial pathway in the entire computer because it is responsible for carrying a constant flow of program instructions and data between memory chips and the processor. A. main memory B. pipeline C. clock speed D. control unit
  • 3. Computer Organization and Architecture, 10th Edition, by William Stallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. 5. The __________ is a relatively small fast memory interposed between a larger, slower memory and the logic that accesses the larger memory. A. peripheral B. cache C. processor D. arithmetic and logic unit 6. An increase in clock rate means that individual operations are executed _____. A. the same B. slower C. with very little change D. more rapidly 7. A __________ is a core designed to perform parallel operations on graphics data. A. MIC B. ALU C. GPU D. PGD 8. A(n) __________ Mean is a good candidate for comparing the execution time performance of several systems. A. Composite B. Arithmetic C. Harmonic D. Evaluation 9. __________ law deals with the potential speedup of a program using multiple processors compared to a single processor. A. Moore’s B. Amdahl’s C. Little’s D. Murphy’s 10. One increment, or pulse, of a clock is referred to as a __________ . A. clock cycle B. clock rate C. clock speed D. cycle time
  • 4. Computer Organization and Architecture, 10th Edition, by William Stallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. 11. The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the clock rate. A. multicore B. GPU C. data channels D. MPC 12. With respect to changes in values, the __________ Mean gives equal weight to all of the values in the data set. A. Harmonic B. Arithmetic C. Composite D. Geometric 13. The __________ measures the ability of a computer to complete a single task. A. clock speed B. speed metric C. execute cycle D. cycle time 14. A measurement of how many tasks a computer can accomplish in a certain amount of time is called a(n) __________ . A. real-time system B. application analysis C. cycle speed D. throughput 15. The best known of the SPEC benchmark suites is __________ . A. SPEC CPU2006 B. SPECjvm2008 C. SPECsfs2008 D. SPEC SC2013 SHORT ANSWER 1. __________ enables a processor to work simultaneously on multiple instructions by performing a different phase for each of the multiple instructions at the same time.
  • 5. Computer Organization and Architecture, 10th Edition, by William Stallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. 2. ___________ is the ability to issue more than one instruction in every processor clock cycle. 3. With __________ the processor looks ahead in the instruction code fetched from memory and predicts which branches, or groups of instructions, are likely to be processed next. 4. __________ enables the processor to keep its execution engines as busy as possible by executing instructions that are likely to be needed. 5. Traditionally found on a plug-in graphics card, a _________ is used to encode and render 2D and 3D graphics as well as process video. 6. __________ Law applies to a queuing system. 7. The three common formulas used for calculating a mean are arithmetic, harmonic, and __________ . 8. The __________ Mean used for a time-based variable, such as program execution time, has the important property that it is directly proportional to the total time. 9. The _________ Mean is preferred when calculating rates. 10. The __________ Mean gives consistent results regardless of which system is used as a reference. 11. _________ metric are required for all reported results and have strict guidelines for compilation. 12. A _________ suite is a collection of programs, defined in a high-level language, that together attempt to provide a representative test of a computer in a particular application or system programming area. 13. At the most fundamental level, the speed of a processor is dictated by the pulse frequency produced by the clock, measured in cycles per second, or _________. 14. The best-known collection of benchmark suites is defined and maintained by an industry consortium known as __________. 15. __________ law deals with the potential speedup of a program using multiple processors compared to a single processor.
  • 6. Computer Organization and Architecture, 10th Edition, by William Stallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. CHAPTER 2: PERFORMANCE ISSUES TRUE OR FALSE 1. F 2. T 3. F 4. T 5. T 6. T 7. F 8. T 9. F 10. T 11. T 12. T 13. T 14. F 15. F MULTIPLE CHOICE 1. C 2. D 3. A 4. A 5. B 6. D 7. C 8. B 9. B 10. A 11. A 12. D 13. B 14. D 15. A
  • 7. Computer Organization and Architecture, 10th Edition, by William Stallings © 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved. SHORT ANSWER 1. Pipelining 2. Superscalar execution 3. branch prediction 4. Speculative execution 5. GPU (graphics processing units) 6. Little’s 7. geometric 8. Arithmetic 9. Harmonic 10. Geometric 11. Base 12. benchmark 13. Hertz (Hz) 14. System Performance Evaluation Corporation (SPEC) 15. Amdahl’s