XeMPUPiL @ NGCLE@e-Novia 15.11.2017
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XeMPUPiL @ NGCLE@e-Novia 15.11.2017
- 1. XeMPUPiL Hybrid power-cap and performance-aware orchestration Marco Arnaboldi marco.arnaboldi@polimi.it 13th November 2017 @
- 2. The hidden ques+on 2 Power consumption trends in Data Centers Shehabi, A., Smith, S., Sartor, D., Brown, R., Herrlin, M., Koomey, J., ... & Lintner, W. (2016). United States data center energy usage report.
- 3. The hidden ques+on in numbers 3 US energy price @ September 2017 10.15 Cents/Kilowatt-hour =~ 6 Billion USD/year EU energy price @ September 2017 12.7 Cents/Kilowatt-hour =~ 7.6 Billion EUR/year Shehabi, A., Smith, S., Sartor, D., Brown, R., Herrlin, M., Koomey, J., ... & Lintner, W. (2016). United States data center energy usage report.
- 4. 4 State of the art SOFTWARE APPROACH ✓ efficiency ✖ timeliness MODEL BASED MONITORING [3] THREAD MIGRATION [2] RESOURCE MANAGMENT DVFS [4] RAPL [1] HARDWARE APPROACH ✖ efficiency ✓ timeliness [1] H. David, E. Gorbatov, U. R. Hanebutte, R. Khanna, and C. Le. Rapl: Memory power estimation and capping. In International Symposium on Low Power Electronics and Design (ISPLED), 2010. [2] R. Cochran, C. Hankendi, A. K. Coskun, and S. Reda. Pack & cap: adaptive dvfs and thread packing under power caps. In International Symposium on Microarchitecture (MICRO), 2011. [3] M. Ferroni, A. Cazzola, D. Matteo, A. A. Nacci, D. Sciuto, and M. D. Santambrogio. Mpower: gain back your android battery life! In Proceedings of the 2013 ACM conference on Pervasive and ubiquitous computing adjunct publication, pages 171–174. ACM, 2013. [4] T. Horvath, T. Abdelzaher, K. Skadron, and X. Liu. Dynamic voltage scaling in multitier web servers with end-to-end delay control. In Computers, IEEE Transactions. IEEE, 2007. CPU QUOTA
- 5. 5 State of the art SOFTWARE APPROACH ✓ efficiency ✖ timeliness MODEL BASED MONITORING [3] THREAD MIGRATION [2] RESOURCE MANAGMENT DVFS [4] RAPL [1] HARDWARE APPROACH ✖ efficiency ✓ timelinessCPU QUOTA HYBRID APPROACH [5] ✓ efficiency ✓ timeliness [1] H. David, E. Gorbatov, U. R. Hanebutte, R. Khanna, and C. Le. Rapl: Memory power estimation and capping. In International Symposium on Low Power Electronics and Design (ISPLED), 2010. [2] R. Cochran, C. Hankendi, A. K. Coskun, and S. Reda. Pack & cap: adaptive dvfs and thread packing under power caps. In International Symposium on Microarchitecture (MICRO), 2011. [3] M. Ferroni, A. Cazzola, D. Matteo, A. A. Nacci, D. Sciuto, and M. D. Santambrogio. Mpower: gain back your android battery life! In Proceedings of the 2013 ACM conference on Pervasive and ubiquitous computing adjunct publication, pages 171–174. ACM, 2013. [4] T. Horvath, T. Abdelzaher, K. Skadron, and X. Liu. Dynamic voltage scaling in multitier web servers with end-to-end delay control. In Computers, IEEE Transactions. IEEE, 2007. [5] H. Zhang and H. Hoffmann. Maximizing performance under a power cap: A comparison of hardware, software, and hybrid techniques. In International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2016.
- 13. 13XeMPUPiL methodology SW approach HW approach Monitoring
- 14. 14XeMPUPiL methodology SW approach HW approach Monitoring Hardware
- 15. 15XeMPUPiL methodology SW approach HW approach Monitoring Hardware Xen Hypervisor
- 16. 16XeMPUPiL methodology SW approach HW approach Monitoring Hardware Xen Hypervisor DomainU Workload DomainU Workload
- 21. 21 Experimental Results: performance maximization 0 0.2 0.4 0.6 0.8 1.0 NO RAPL RAPL 40 RAPL 30 RAPL 20 NormalizedPerformance 0 0.2 0.4 0.6 0.8 1.0 EP cachebench IOzone BT
- 22. 22 Experimental Results: performance maximization 0 0.2 0.4 0.6 0.8 1.0 NO RAPL RAPL 40 RAPL 30 RAPL 20 NormalizedPerformance 0 0.2 0.4 0.6 0.8 1.0 EP cachebench IOzone BT
- 23. 23 Experimental Results: performance maximization 0 0.5 1.0 PUPiL 40 RAPL 40 Normalizedperformance 0 0.5 1.0 EP cachebench IOzone BT 0 0.5 1.0 PUPiL 30 RAPL 30 Normalizedperformance 0 0.5 1.0 EP cachebench IOzone BT 0 0.5 1.0 PUPiL 20 RAPL 20 Normalizedperformance 0 0.5 1.0 EP cachebench IOzone BT
- 24. 24 Experimental Results: performance maximization 0 0.5 1.0 PUPiL 40 RAPL 40 Normalizedperformance 0 0.5 1.0 EP cachebench IOzone BT 0 0.5 1.0 PUPiL 30 RAPL 30 Normalizedperformance 0 0.5 1.0 EP cachebench IOzone BT 0 0.5 1.0 PUPiL 20 RAPL 20 Normalizedperformance 0 0.5 1.0 EP cachebench IOzone BT
- 25. 25 Experimental Results: power minimization 0 20 40 60 80 100 120 SLA 90% SLA 80% SLA 70% Performance(%) Benchmarks EP CacheBench IOZone BT
- 26. 26 Experimental Results: power minimization 0 50 100 150 200 SLA 90% SLA 80% SLA 70% Powerconsumption(W) Benchmarks EP CacheBench IOZone BT 160 W
- 27. Thanks for your +me “Towards a performance-aware power capping orchestrator for the Xen hypervisor” @ EWiLi, Pittsburgh, USA Paper Patent pending “METHOD FOR POWER OPTIMIZATION IN VIRTUALIZED ENVIRONMENTS AND SYSTEM IMPLEMENTING THE SAME”, Politecnico di Milano, Marco Arnaboldi, Matteo Ferroni, Marco D. Santambrogio
- 30. 30 XeMPUPiL methodology Hypervisor Hardware DomainU Workload DomainU Workload Dom0 Act Decide Observe MSRs RAPL writing Hypercall manager Daemon invoking RAPL specific hypercalls CPU-pool and pinning mechanisms Instrumentation -free performance monitoring
- 31. 31 XeMPUPiL methodology Hypervisor Hardware DomainU Workload DomainU Workload Dom0 Act Decide Observe MSRs reading Tracing back MSRs values Daemon gathering traces Shared memory MSRs RAPL writing Hypercall manager Daemon invoking RAPL specific hypercalls CPU-pool and pinning mechanisms