PyNOLI - Rationale Behind FPGA
•Download as PPTX, PDF•
0 likes•62 views
XOHW19: PyNOLI - Rationale Behind FPGA
Recommended
Recommended
More Related Content
More from NECST Lab @ Politecnico di Milano
More from NECST Lab @ Politecnico di Milano (20)
Recently uploaded
Recently uploaded (20)
PyNOLI - Rationale Behind FPGA
- 1. Giorgia Fiscaletti, Marco Speziali, Luca Stornaiuolo DEIB Seminar Room April 3rd, 2019
- 4. 4 Advantages • Low latency • High bandwidth • Power efficiency • Portability FPG A
- 5. 5 Advantages • Low latency • High bandwidth • Power efficiency • Portability FPG A Feature maps
- 6. 6 Advantages • Low latency • High bandwidth • Power efficiency • Portability FPGA float → int
- 7. 7 • Low latency • High bandwidth • Power efficiency • Parallelism FPG A intra-layer intra-feature- maps Advantages
- 8. 8 Thanks for the attention www.facebook.com/pynoliatnecst @PyNOLIatNECST Giorgia Fiscaletti <giorgia.fiscaletti@mail.polimi.it> Marco Speziali <marco.speziali@mail.polimi.it> Luca Stornaiuolo <luca.stornaiuolo@polimi.it>
Editor's Notes
- Hi! I’m Giorgia one of the three members of the PyNOLI team, and today I will explain our main techincal choice in our project: the FPGA.
- In fields such as real-time security systems, or autonomous driving, there is the need of a device that is able to deliver accurate results in a short amount of time. Moreover, it should also efficient in terms of power consumption.
- But let’s go straight to the question: why are we using FPGAs?
- First of all, one of the main characteristic of FPGA is the low latency: the time that occurs between an instruction and its response. As a matter of fact, FPGAs can reach around 1 microsecond of latency, allowing them to be used in real-time applications.
- Another feature of FPGA that suits perfectly our work is the high bandwidth, due to the direct connection to the pins of the chip. Since we are dealing with Deep Convolutional Neural Networks, we need to transfer a significant volume of data between the stages, such as the feature maps produced by the convolutional layers.
- Moreover, FPGAs are very good in terms of power efficiency when dealing with logic and fixed precision. In our system we use quantization as a reduction technique to map all the floating point values (weights, biases and inputs) to integer types within the interval [0, 255], making FPGAs a competitive solution.
- Last but not least, parallelism. FPGAs offer the possibility to exploit parallel processing to boost performance. In our system there will be two main sources of parallelism: the intra-layer parallelism, since different filters can be applied simultaneously to the same input, and the intra-feature-maps parallelism, that consists in multiplying in parallel the input feature maps by the weight.
- Thanks for the attention. If you want to follow us on our socials you can find us by typing PyNOLIatNECST on Facebook and Twitter.