This document discusses microarchitecture level and basic elements of a processor. It describes that the microarchitecture level implements the instruction set architecture above it depending on factors like the ISA, cost and performance goals. Common elements of a processor include the ALU, registers, internal and external data paths, and the control unit. The control unit sequences through micro-operations, executes each one using control signals, and can be implemented using microcode in a microprogrammed design. Microinstructions can directly or indirectly encode control signals to simplify the control memory width and microprogramming task.

1. Lecture 15
Microarchitecture Level:
Level 1

2. Microarchitecture Level
• The level above digital logic level.
• Job: to implement the ISA level above it.
• The design depends on:
—ISA being implemented
—Cost
—Performance goal

3. Microarchitecture Level
• Many modern ISAs, e.g. RISC, have simple
instructions that can usually be executed in
a single clock cycle.
• Other complex ISAs, e.g. Pentium IV, may
require many clock cycles to execute single
instruction.

4. Basic Elements of Processor
• ALU
• Registers
• Internal data paths
• External data paths
• Control Unit

5. Types of Micro-operation
• Transfer data between registers
• Transfer data from register to external
• Transfer data from external to register
• Perform arithmetic or logical operations

6. Functions of Control Unit
• Sequencing
—Causing the CPU to step through a series of
micro-operations
• Execution
—The CU causes each micro-op to be
performed.
• This is done using Control Signals

7. Control Signals
• Clock
—One micro-instruction (or set of parallel micro-
instructions) per clock cycle
• Instruction register
—Op-code for current instruction
—Determines which micro-instructions are
performed
• Flags
—State of CPU
—Results of previous operations
• From control bus
—Interrupts
—Acknowledgements

8. Model of Control Unit

9. Control Signals - output
• Within CPU
—Cause data movement
—Activate specific functions
• Via control bus
—To memory
—To I/O modules

10. Example Control Signal Sequence - Fetch
• MAR <- (PC)
—Control unit activates signal to open gates
between PC and MAR
• MBR <- (memory)
—Open gates between MAR and address bus
—Memory read control signal
—Open gates between data bus and MBR

11. Example: Data Paths and Control Signals

12. Internal Organization
• Usually a single internal bus
• Gates control movement of data onto and
off the bus
• Control signals control data transfer to
and from external systems bus
• Temporary registers needed for proper
operation of ALU

13. Microprogrammed Control
• A microprogram has a sequence of
instructions in a microprogramming
language.
—These are very simple instructions that
specify micro-operations.

14. Microprogrammed Control
• A microprogrammed control unit is a simple
logic circuit that is capable of:
—Sequencing through microinstructions
—Generating control signals to execute
each microinstruction.
• As in a hardwired control unit, the
control signal generated by a
microinstruction are used to cause
register transfers and ALU operations.

15. Control Unit Organization

16. Micro-programmed Control
• Use sequences of instructions to control
complex operations.
• Called micro-programming or firmware

17. Micro-programmed Control
• All the control unit does is generate a set
of control signals.
• Each control signal is on or off.
• Represent each control signal by a bit.
• Have a control word for each micro-
operation.
• Have a sequence of control words for each
machine code instruction.
• Add an address to specify the next micro-
instruction, depending on conditions.

18. Micro-programmed Control
• Today’s large microprocessor
—Many instructions and associated register-level
hardware
—Many control points to be manipulated
• This results in control memory that
—Contains a large number of words
– co-responding to the number of instructions to be
executed
—Has a wide word width
– Due to the large number of control points to be
manipulated

19. Micro-program Word Length
• Based on 3 factors
—Maximum number of simultaneous micro-
operations supported
—The way control information is represented or
encoded
—The way in which the next micro-instruction
address is specified

20. Micro-instruction Types
• Each micro-instruction specifies single (or
few) micro-operations to be performed
— (vertical micro-programming)
• Each micro-instruction specifies many
different micro-operations to be
performed in parallel
—(horizontal micro-programming)

21. Vertical Micro-programming
• Width is narrow
• n control signals encoded into log2 n bits
• Limited ability to express parallelism
• Considerable encoding of control
information requires external memory
word decoder to identify the exact control
line being manipulated

22. Horizontal Micro-programming
• Wide memory word
• High degree of parallel operations possible
• Little encoding of control information

23. Typical Microinstruction Formats

24. Compromise
• Divide control signals into disjoint groups
• Implement each group as separate field in
memory word
• Supports reasonable levels of parallelism
without too much complexity

25. Organization of
Control Memory

26. Control Unit
Store a set of
microinstructions
For vertical
microinstructions
only

27. Control Unit Function
1. Sequence logic unit issues read command
2. Word specified in control address register is
read (from control memory) into control buffer
register
3. Control buffer register contents generates
control signals and next address information
4. Sequence logic loads new address into control
address register based on next address
information from control buffer register and ALU
flags

28. Next Address Decision
• Depending on ALU flags and control buffer
register
—Get next instruction
– Add 1 to control address register
—Jump to new routine based on jump
microinstruction
– Load address field of control buffer register into
control address register
—Jump to machine instruction routine
– Load control address register based on opcode in IR

29. Advantages and Disadvantages of
Microprogramming
• Advantage:
—Simplifies design of control unit
– Cheaper
– Less error-prone
• Disadvantage:
—Slower
Microprogramming is the dominant technique for
implementing control unit in pure CISC.

30. Hard Wired Control Unit
• Disadvantage:
—Complex sequencing & micro-operation logic
—Difficult to design and test
—Inflexible design
—Difficult to add new instructions
• Advantage:
—Faster
Hardwired control unit is typically use for
implementing control unit in pure RISC.

31. Tasks Done By Microprogrammed
Control Unit
• Microinstruction sequencing
• Microinstruction execution
• Must consider both together

32. Design Considerations
• Size of microinstructions
• Address generation time
—Determined by instruction register
– Once per cycle, after instruction is fetched
—Next sequential address
– Common in most designed
—Branches
– Both conditional and unconditional

33. Sequencing Techniques
• Based on current microinstruction,
condition flags, contents of IR, control
memory address must be generated.
• Based on format of address information
—Two address fields
—Single address field
—Variable format

34. Branch Control
Logic:
Two Address
Fields

35. Branch Control
Logic: Single
Address Field

36. Branch Control
Logic: Variable
Format

37. Execution
• The cycle is the basic event
• Each cycle is made up of two events
—Fetch
– Determined by generation of microinstruction
address
—Execute
– Effect is to generate control signals
– Some control points internal to processor
– Rest go to external control bus or other
interface

38. Control Unit
Organization

39. A Taxonomy of Microinstructions
• Classification of microinstruction:
—Vertical/horizontal
—Packed/unpacked
—Hard/soft microprogramming
—Direct/indirect encoding

40. How to Encode
• K different internal and external control
signals
• Wilkes’s (first proposed the use of
microprogrammed control unit in 1951):
—K bits dedicated
—2K
possible combination of control signals.
• Not all used
—Two sources cannot be gated to same
destination
—Register cannot be source and destination
—Only one pattern presented to ALU at a time
—Only one pattern presented to external control
bus at a time.

41. How to Encode
• Require Q < 2K
which can be encoded with
log2Q < K bits
• Not done
—As difficult to program as pure decoded
(Wilkes) scheme.
—It is complex and therefore slow control logic
module.
• Compromises
—More bits than necessary are used.
—Some combinations that are physically
allowable are not possible to encode.

42. Microinstruction Encoding
• In practice, microprogrammed control
units are not designed using:
—a pure unencoded or
—horizontal microinstruction format.
• At least some degree of encoding is used
to reduce control memory width and to
simplify the task of microprogramming.

43. Specific Encoding Techniques
• Microinstruction organized as set of fields
• Each field contains code
• Activates one or more control signals
• Organize format into independent fields
—Field depicts set of actions (pattern of control
signals)
—Actions from different fields can occur
simultaneously
• Alternative actions that can be specified
by a field are mutually exclusive
—Only one action specified for field could occur
at a time

44. Microinstruction Encoding
Direct Encoding

45. Microinstruction Encoding
Indirect Encoding

46. The Data Path:
Example
The data path is the
part of CPU
containing ALU, its
input and its output.
Mic-1

47. Useful combinations of ALU signals and the function
performed.
The Data Path: Example( cont…)
ALU
functions is
determined
by the 6
control lines.

48. Microinstruction Control: The Mic-1
• To control the datapath of Mic-1, we need
29 signals:
—9 signal to control writing data from the C bus
into registers.
—9 signal to control enabling registers onto the
B bus for ALU i/p.
—8 signal to control the ALU and shifter
functions.
—2 signal (not shown) to indicate memory
read/write via MAR/MDR.
—1 signal (not shown) to indicate memory fetch
via PC/MBR.

49. Microinstruction Control: The Mic-1
• The values of 29 control signals specify
the operations for one cycle of the data
path.
• A data path consists of:
1. Gating values out of registers and onto the B
bus.
2. Propagating the signals through the ALU and
shifter.
3. Driving them onto the C-bus.
4. Writing the results in the appropriate
register(s).
5. In addition, if a memory read data signal is
asserted, the memory operation is started at the
end of the data cycle, after MAR has been
loaded.

50. Microinstruction Control: The Mic-1
• Issues:
— It may be desirable to write the o/p on the C bus
into many registers.
— It is never desirable to enable more than one
register write onto the B bus at a time – physical
damage.
By adding a 4-to-16 decoder, we can reduce
the number of bits needed to select among
the possible sources for driving the B bus.
We use 9+4+8+2+1=24 signals to control data
path for one cycle.
How to determine the
next cycle?
Need 2 additional fields:
NEXT_ADDRESS field
JAM field.

51. The microinstruction format for the Mic-1
36 signals
Address of a
potential next
microinstruction.
Determine how the
next microinstruction
is selected.

52. Microinstruction Control: The Mic-1
• At each cycle, the sequencer must
produce:
— The state of every control signal in the system.
— The address of the next microinstruction.
• The control store is a memory that holds
microinstructions.
• In this example, we have 512x36-bit
control word. We need:
— MicroProgram Counter (MPC) as a pointer to the
control store memory address.
— MIR (MicroInstruction Register) to hold the
current microinstruction.

53. Microinstruction Control: The Mic-1
• The operation of Mic-1:
1. MIR is loaded from the word in the control store
pointed by MPC.
2. Once MIR is et up, the various signals propagate out
into the data path.
3. A register content is put out onto the B bus and the
ALU knows which operation to perform.
4. The ALU perform the task after the inputs stable.
5. After ALU, N, Z and shifter outputs are stable, the N
and Z values are then saved in a pair of 1-bit flip-
flops.
6. Load the registers from bus C; and load N and Z flip-
flops onto MPC to determine the next
microinstruction.

54. The complete
block
diagram of our
example
microarchitect
ure, the
Mic-1.

55. Thank you
Q&A