matlab ieee projects support

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ELECTRONICS –VLSI-ELECTRICAL
M TECH MATLB SIMULATION PROJECTS
ON
Communications- Image Processing- Signal Processing- Wireless Networks
Communications
MATCOM1 Performance Comparison of MIMO Systems
Based on Selective Adaptive Arrays
Communications
MATCOM2 Signal processing and channel capacity
enhancement using MIMO Technology
Communications
MATCOM3 Study on Position Estimation of Implanted
Devices by Using Signal Processing for
UWB Ground Penetrating Radar
Communications
MATCOM4 The Performance Simulation of
MIMOOFDM Networks with Group-
selected
Communications
MATCOM5 A Novel HaarWavelet-Based BPSK OFDM Communications

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System
MATCOM6 Diversity Gain for MIMO Neyman–Pearson Communications
MATCOM7 Efficient PAPR Reduction in OFDM
Systems Based on a Companding
Communications
MATCOM8 Fast Walsh–Hadamard–Fourier Transform
Algorithm
Communications
MATCOM9 Cooperative Diversity for Free-Space
Optical Communications
Communications
MATCOM10 Adaptive MMSE Rake Receiver for
WCDMA
Communications
MATCOM11 DWDM Effects of Single Model Optical
Fiber in Radio over Fiber System
Communications
MATCOM12 Convolutional Codes in Two-Way Relay
Networks with
Communications
MATCOM13 Cooperative and Constrained MIMO
Communications in
Wireless Ad Hoc/SensorNetworks
Communications
MATCOM14 Efficiency of the LDPC Codes in the
Reduction of PAPR in Comparison to Turbo
Codes and Concatenated Turbo-Reed
Solomon Codes in a MIMO-OFDM System
Communications
MATCOM15 A New Iterative Soft Decision Subcarrier
PIC Scheme for CI/MC-CDMA System
Communications
MATCOM16 Receiver Multiuser Diversity Aided Multi-
Stage Minimum Mean-Square Error
Detection for
Heavily Loaded DS-CDMA and SDMA
Systems
Communications
MATCOM17 Two-Step Channel Estimation Scheme for
OFDM Systems over Fast Rayleigh Fading
Channels
Communications
MATCOM18 Communication Coverage in Wireless
Passive SensorNetworks
Communications
MATCOM19 Channel Coding ForHigh-Speed Links: A
Systematic
Look at CodePerformance and System
Simulation
Communications
MATCOM20 Efficient Detection Ordering Scheme for
MIMO
Communications

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Transmission Using Power Control
MATCOM21 Training Design for Repetitive-Slot-Based
CFO Estimation in OFDM
Communications
MATCOM22 Rayleigh Fading Networks: A Cross-Layer
Way
Communications
MATCOM23 Multi-Branch Successive Interference
Cancellation
for MIMO Spatial Multiplexing Systems
Communications
MATCOM24 Nonlinear Companding Transform for
Reduction of
Peak-to-Average Power Ratio in OFDM
Systems
Communications
MATCOM25 BER of Adaptive Arrays in AWGN Channel Communications
MATCOM26 Performance Assessment of OFDM-based
and OWDM-based Radio-over-Fiber
Systems in the Presence of Phase Noise
Communications
MATCOM27 Energy-Efficient ResourceAllocation for
OFDM-Based Cognitive Radio Networks
Communications
MATCOM28 Impact of Timing Jitter and I/Q Imbalance in
OFDM Systems
Communications
Image Processing
MATIMG1 Boosting Color Feature Selection for Color
Face Recognition
Image Processing
MATIMG2 Combined Affine Geometric
Transformations and Spatially Dependent
Radiometric Deformations: A Decoupled
Linear Estimation Framework
Image Processing
MATIMG3 Non-blind Watermarking scheme for color
images in RGB spaceusing DWT-SVD
Image Processing
MATIMG4 Removal of High Density Salt and Pepper
Noise Through Modified Decision Based
UnsymmetricTrimmed Median Filter
Image Processing
MATIMG5 Automatic Segmentation of Digital Images
Applied in Cardiac Medical Images
Image Processing
MATIMG6 Efficient Compressionof Encrypted
Grayscale Images
Image Processing
MATIMG7 New low complexity DCT based video
compressionmethod
Image Processing
MATIMG8 Enhancement of Color Images by Scaling Image Processing

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the DCT Coefficients
MATIMG8 New low complexity DCT based video
compressionmethod
Image Processing
MATIMG9 Bi-2DPCA: A Fast Face Coding Method for
Recognition
Image Processing
MATIMG10 Neural Network-Based Face Detection Image Processing
MATIMG11 Objective Quality Assessment of Tone-
Mapped Images
Image Processing
MATIMG12 Perceptual Quality Metric With Internal
Generative Mechanism
Image Processing
MATIMG13 Reversible Watermarking Based on
Invariant Image Classification and Dynamic
Histogram Shifting
Image Processing
MATIMG14 Deconvolving Images with Unknown
Boundaries Using the Alternating Direction
Method of Multipliers
Image Processing
Signal Processing
MATSIG1 Algebraic Signal ProcessingTheory: 1-D
Nearest Neighbor Models
Signal Processing
MATSIG2 Compressive MUSIC: Revisiting the Link
Between Compressive Sensing and Array
Signal Processing
Signal Processing
MATSIG3 Nonlinear Optical Signal Processing in
Optical Packet Switching Systems
Signal Processing
MATSIG4 Novel Speech Signal Processing Algorithms
for High-Accuracy Classification of
Parkinson’s Disease
Signal Processing
MATSIG5 On Approximate Diagonalization of
Correlation Matrices in Widely Linear
Signal Processing
Signal Processing
MATSIG6 On Convolution Model for Ultrasound Echo
Signal Processing
Signal Processing
MATSIG7 Terahertz Information and Signal Processing
by RF-Photonics
Signal Processing
MATSIG8 Throughput-Distortion Computation of
Generic Matrix Multiplication: Toward a
Computation Channel for Digital Signal
Processing Systems
Signal Processing
MATSIG9 Audio Forensic marking using Quantization Signal Processing

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in DWT-SVD Domain
MATSIG10 Bi-Iterative Algorithm for Extracting
Independent Components From Array
Signals
Signal Processing
MATSIG11 Efficient Target Tracking through Binary-
Detection in Sparsely Deployed WSN
Signal Processing
MATSIG12 Mobile Emitter Geolocation and Tracking
Using TDOA and FDOA Measurements
Signal Processing
MATSIG13 A Dynamic System Approachfor Radio
Location Fingerprinting in Wireless Local
Area Networks
Signal Processing
MATSIG14 Finite-Precision Analysis of Demappers and
Decoders for LDPC-Coded M-QAM
Systems
Signal Processing
MATSIG15 A New Delayless Subband Adaptive
Filtering Algorithm for Active Noise Control
Systems
Signal Processing
MATSIG16 Novel Probabilistic Bounds on Power Level
Profile of Spectrally-Encoded Spread-Time
CDMA Signals
Signal Processing
MATSIG17 Spectral Correlation of a Digital Pulse
Stream Modulated by a Cyclostationary
Sequence in the Presence of Timing Jitter
Signal Processing
MATSIG18 Near-Space Wide-Swath Radar Imaging
With Multiaperture Antenna
Signal Processing
MATSIG19 Blind Subspace-Based Signature Estimation
in DS-CDMA Systems With Unknown
Wide-Sense Stationary Interference
Signal Processing
MATSIG20 Using Nonlinear Filter for Adaptive Blind
Channel Equalization
Signal Processing
MATSIG21 Multi-Feature Fusion via Hierarchical
Regression for Multimedia Analysis
Signal Processing
Wireless Networks
MATWN1 Cross-Layer Designed Adaptive Modulation
Algorithm with Packet Combining and
Truncated ARQ over MIMO Nakagami
Fading Channels
WirelessNetworks
MATWN2 Evaluation of Foundation Fieldbus H1
Networks for Steam Generator Level
Wireless Networks

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Control
MATWN3 Energy Time Series Forecasting Based
on Pattern Sequence Similarity
Wireless Networks
MATWN4 An agent-assisted QoS-based routing
algorithm for wireless sensornetworks
Wireless Networks
MATWN5 Selfish Overlay Network Creation and
Maintenance
Wireless Networks
MATWN6 A Generic Multilevel Architecture for Time
Series Prediction
Wireless Networks
MATWN7 Always Acyclic Distributed Path
Computation
Wireless Networks
MATWN8 Cooperative Caching in Wireless P2P
Networks: Design, Implementation, and
Evaluation
Wireless Networks
MATWN9 Cross-Layer QoS-Aware Communication for
Ultra Wide Band Wireless Multimedia
Sensor Networks
Wireless Networks
MATWN10 PAM: An Efficient and Privacy-Aware
Monitoring Framework for Continuously
Moving Objects
Wireless Networks
MATWN11 Traffic Management in SensorNetworks
with a Mobile Sink
Wireless Networks
MATWN12 A Cross-Layer Approachto Energy
Efficiency for Adaptive MIMO Systems
Exploiting Spare Capacity
Wireless Networks
MATWN13 Fast Intra-Network and Cross-Layer
Handover (FINCH) for WiMAX and Mobile
Internet
Wireless Networks
MATWN14 FULL-DUPLEX RADIO-OVER-FIBER
TRANSPORT SYSTEMS BASED ON
DIRECT-DETECTION SCHEME
Wireless Networks
MATWN15 Training Design for Repetitive-Slot-based
CFO estimation in OFDM
Wireless Networks
MATWN16 DEVELOPMENT OF HYBRID MODEL
AND OPTIMIZATION OF METAL
REMOVAL RATE IN ELECTRIC
DISCHARGE MACHINING USING
ARTIFICIAL NEURAL NETWORKS AND
GENETIC ALGORITHM
Wireless Networks

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MATWN17 A Dynamic Channel Assignment Scheme for
TDMA-based Multihop Cellular Networks
Wireless Networks
MATWN18 Hierarchical Inter-Domain Routing in
Optical DWDM Networks
Wireless Networks
MATWN19 Lighting the Local Area: Optical Code-
Division Multiple Access and Quality of
Service Provisioning
Wireless Networks
MATWN20 I/Q Imbalance in Multiple Beamforming
OFDM Transceivers: SINR Analysis and
Digital Baseband Compensation
Wireless Networks
VLSI
Vlsi 1 A New VLSI Architecture of Parallel
Multiplier Accumlator By radix-2 MBA
IEEE
Vlsi 2 An FPGA Based High Speed IEEE-754 IEEE
Vlsi 3 Design of High Speed Kogge-Stone Based
Carry Select Adder
IEEE
Vlsi 4 Design and Implementation of a High
Performance Multiplier using HDL
IEEE
Vlsi 5 FPGAimplementation of Binary Coded
Decimal Digit Adders and Multipliers
IEEE
Vlsi 6 High speed Modified Booth Encoder
multiplier for signed and unsigned numbers
IEEE
Vlsi 7 Signed Multiplier for Dsp applications IEEE
Vlsi 8 An Efficient Implementation of Floating
Point Multipier
IEEE
Vlsi 9 Parallel Architecture for Hierarchical Optical
Flow Estimation Based on FPGA
IEEE
Vlsi 10 Design and Characterization of Parallel
Prefix Adders using FPGAs
IEEE
Vlsi 11 A High Speed Binary Floating Point IEEE

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Multiplier Using Dadda Algorithm
Vlsi 12 High-Speed Low-Power Viterbi Decoder
Design for TCM Decoders
IEEE
Vlsi 13 Implementation of UART with Status
Register
Communication
Vlsi 14 Design and Simulation of UART Serial
Communication Module Based on VHDL
Communication
Vlsi 15 FPGAImplementation of RS232 to
Universal serial bus converter
Communication
Vlsi 16 Design of Serial Communication Interface
Based on FPGA
Communication
Vlsi 17 Building an AMBA AHB compliant
Memory Controller
Communication
Vlsi 18 Implementation of a Self-Motivated
Arbitration Scheme for the Multilayer AHB
Busmatrix
Communication
Vlsi 19 FPGA-based forImplementation of Multi-
Serials to Ethernet Gateway
Communication
Vlsi 20 Globally Integrated Power and Clock Communication
Vlsi 21 Security-Enabled Near-Field
Communication Tag With Flexible
Architecture Supporting Asymmetric
Cryptography
Communication
Vlsi 22 Techniques for Compensating Memory
Errors in JPEG2000
Communication
Vlsi 23 Low-CostFIR Filter Designs Based on
Faithfully Rounded Truncated Multiple
Constant Multiplication/Accumulation
Communication
Vlsi 24 MDC FFT/IFFT ProcessorWith Variable
Length for MIMO-OFDM Systems
Communication
Vlsi 26 A Novel Modulo Adder for Residue Number
System
Communication
Vlsi 27 Concurrent Error Detection for Orthogonal
Latin Squares Encoders and Syndrome
Computation
Communication
Vlsi 28 Low-Power Pulse-Triggered Flip-Flop
Design Based on a Signal Feed-Through
Scheme
Communication
Vlsi 29 Built-In Generation of Functional Broadside

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Tests Using a Fixed Hardware Structure
Vlsi 30 ACHIEVEING REDUCED AREA BY
MULTI-BIT FLIP FLOP DESIGN
Communication
Vlsi 31 Design of Digit-Serial FIR Filters:
Algorithms, Architectures, and a CAD Tool
Communication
Vlsi 32 Multioperand Redundant Adders on FPGAs Communication
Vlsi 33 20-GHz 8 × 8-bit Parallel Carry-Save
Pipelined RSFQ Multiplier
Communication
Vlsi 34 Modulo 2n-2 Arithmetic Units Communication
Vlsi 35 A Self-Checking Approachfor SEU/MBUs-
Hardened FSMs Design Based on the
Replication of One-Hot Code
IEEE
Vlsi 36 An efficient FPGA implementation of the
Advanced
IEEE
Vlsi 37 An On-Chip Delay Measurement Technique
Using
IEEE
Vlsi 38 Area-Efficient Carry Select Adder IEEE
Vlsi 39 Implementing Flexible Reliability in a IEEE
Vlsi 40 Mapping Multi-Domain Applications onto IEEE
Vlsi 41 Measurement and Evaluation of Power
Analysis
IEEE
Vlsi 42 Multiplierless Algorithm for Multivariate
Gaussian
IEEE
Vlsi 43 On Modulo 2n þ 1 Adder Design On Modulo
2n þ 1 Adder Design
IEEE
Vlsi 44 Period Extension and Randomness
Enhancement Using
IEEE
Vlsi 45 Platform-Independent Customizable UART
Soft-Core2012
IEEE
Vlsi 46 Single Cycle Access Structure for Logic Test IEEE
Vlsi 47 Timing Uncertainty in 3-D Clock Trees Due
to
IEEE
Vlsi 48 VHDL Implementation of a Flexible and IEEE
Vlsi 49 Weight Pattern Generation IEEE