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1. Logic Mind Technologies
Vijayangar (Near Maruthi Medicals), Bangalore-40
Ph: 8123668124 // 8123668066
Efficient Coding Schemes for Fault-Tolerant
Parallel Filters
Abstract—As the complexity of communications and signal processing systems
increases, so does the number of blocks orelements that they have. In many cases,
some of those elements operate in parallel, performing the same processing on
different signals. A typical example of those elements are digital filters. The
increase in complexity also poses reliability challenges and creates the need for
fault-tolerant implementations. A scheme based on error correction coding has
been recently proposed to protect parallel filters. In that scheme, each filter is
treated as a bit, and redundant filters that act as parity check bits are introduced to
detect and correct errors. In this brief, the idea of applying coding techniques to
protect parallel filters is addressed in a more general way. In particular, it is shown
that the fact that filter inputs and outputs are not bits but numbers enables a more
efficient protection. This reduces the protection overhead and makes the number of
redundant filters independent of the number of parallel filters. The proposed
scheme is first described and then illustrated with two case studies. Finally, both
the effectiveness in protecting against errors and the cost are evaluated for a field-
programmable gate array implementation.
2. SOFTWARE REQUIREMENT:
ModelSim6.4c.
Xilinx 9.1/13.2.
HARDWARE REQUIREMENT:
FPGA Spartan 3.
PROJECT FLOW:
First Review:
Literature Survey
Paper Explanation
Design of Project
Project Enhancement explanation
Second Review:
Implementing 40% of Base Paper
Third Review
Implementing Remaining 60% of Base Paper with Future Enhancement (Modification)
For More Details please contact
Logic Mind Technologies
Vijayangar (NearMaruthi Medicals), Bangalore-40
Ph: 8123668124 // 8123668066
Mail: logicmindtech@gmail.com
