ADC An Introduction

1. 15EE55C – DIGITAL SIGNAL PROCESSING AND
ITS APPLICATIONS
INTRODUCTION
Dr. M. Bakrutheen AP(SG)/EEE
Mr. K. Karthik Kumar AP/EEE
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
NATIONAL ENGINEERING COLLEGE, K.R. NAGAR, KOVILPATTI – 628 503
(An Autonomous Institution, Affiliated to Anna University – Chennai)

2. INTRODUCTION
 Most of the signals directly encountered in science and engineering are
continuous: light intensity that changes with distance; voltage that
varies over time; a chemical reaction rate that depends on temperature,
etc.
 Analog-to-Digital Conversion (ADC) and Digital-to-Analog
Conversion (DAC) are the processes that allow digital computers to
interact with these everyday signals.
 Digital information is different from its continuous counterpart in two
important respects: it is sampled, and it is quantized.
 Both of these restrict how much information a digital signal can
contain.

3. ADVANTAGES OF DIGITAL TRANSMISSIONS
 Noise immunity
 Error detection and correction
 Ease of multiplexing
 Integration of analog and digital data
 Use of signal regenerators
 Data integrity and security
 Ease of evaluation and measurements
 More suitable for processing

4. DISADVANTAGES OF DIGITAL TRANSMISSIONS
 More bandwidth requirement
 Need of precise time synchronization
 Additional hardware for encoding/decoding
 Integration of analog and digital data
 Sudden degradation in QoS
 Incompatible with existing analog facilities

5. ADC
 In electronics, an analog-to-digital converter (ADC, A/D, or A-to-D) is
a system that converts an analog signal, such as a sound picked up by a
microphone or light entering a digital camera, into a digital signal.
 An ADC may also provide an isolated measurement such as an
electronic device that converts an input analog voltage or current to a
digital number representing the magnitude of the voltage or current.
 There are several ADC architectures. Due to the complexity and the
need for precisely matched components, all but the most specialized
ADCs are implemented as integrated circuits (ICs).

6. ADC

7. SAMPLING
 The analog signal is continuous in time and it is necessary to convert
this to a flow of digital values.
 It is therefore required to define the rate at which new digital values are
sampled from the analog signal.
 The rate of new values is called the sampling rate or sampling
frequency of the converter.
 A continuously varying band limited signal can be sampled and then
the original signal can be reproduced from the discrete-time values by a
reconstruction filter.

8. SAMPLING THEOREM
 The Nyquist–Shannon sampling theorem implies that a faithful
reproduction of the original signal is only possible if the sampling rate is
higher than twice the highest frequency of the signal.
 Since a practical ADC cannot make an instantaneous conversion, the input
value must necessarily be held constant during the time that the converter
performs a conversion (called the conversion time).
 An input circuit called a sample and hold performs this task—in most cases
by using a capacitor to store the analog voltage at the input, and using an
electronic switch or gate to disconnect the capacitor from the input.
 Many ADC integrated circuits include the sample and hold subsystem
internally.

9. SAMPLING THEOREM
 Theorem Statement:
 A continuous time signal can be represented in its samples and can
be recovered back when sampling frequency fs is greater than or
equal to the twice the highest frequency component of message
signal. i. e. fs≥2fm

10. SAMPLING

11. SAMPLING

12. ALIASING
 An ADC works by sampling the value of the input at discrete intervals in
time.
 Provided that the input is sampled above the Nyquist rate, defined as twice
the highest frequency of interest, then all frequencies in the signal can be
reconstructed.
 If frequencies above half the Nyquist rate are sampled, they are incorrectly
detected as lower frequencies, a process referred to as aliasing.
 Aliasing occurs because instantaneously sampling a function at two or
fewer times per cycle results in missed cycles, and therefore the appearance
of an incorrectly lower frequency.
 For example, a 2 kHz sine wave being sampled at 1.5 kHz would be
reconstructed as a 500 Hz sine wave.

13. AVOIDING ALIASING
 To avoid aliasing, the input to an ADC must be low-pass filtered to remove
frequencies above half the sampling rate.
 This filter is called an anti-aliasing filter, and is essential for a practical
ADC system that is applied to analog signals with higher frequency
content.
 In applications where protection against aliasing is essential, oversampling
may be used to greatly reduce or even eliminate it.
 Although aliasing in most systems is unwanted, it can be exploited to
provide simultaneous down-mixing of a band-limited high-frequency
signal (see undersampling and frequency mixer).
 The alias is effectively the lower heterodyne of the signal frequency and
sampling frequency.

14. SAMPLING TECHNIQUES
 There are three types of sampling techniques:
 Impulse sampling.
 Natural sampling.
 Flat Top sampling.

15. SAMPLING TECHNIQUES – IMPULSE SAMPLING
 Impulse sampling can be performed by multiplying input signal x(t) with
impulse train of period 'T'. Here, the amplitude of impulse changes with
respect to amplitude of input signal x(t).
 The output of sampler is given by

16. SAMPLING TECHNIQUES – NATURAL SAMPLING
 Natural sampling is similar to impulse sampling, except the impulse train is
replaced by pulse train of period T. i.e. multiply input signal x(t) to pulse
train as shown below

17. SAMPLING TECHNIQUES – FLAT TOP SAMPLING
 During transmission, noise is introduced at top of the transmission pulse
which can be easily removed if the pulse is in the form of flat top. Here, the
top of the samples are flat i.e. they have constant amplitude. Hence, it is
called as flat top sampling or practical sampling. Flat top sampling makes
use of sample and hold circuit.

18. SAMPLE AND HOLD CIRCUITS
 A Sample and Hold Circuit, sometimes represented as S/H Circuit or S & H Circuit, is
usually used with an Analog to Digital Converter to sample the input analog signal and
hold the sampled signal.
 In the S/H Circuit, the analog signal is sampled for a short interval of time, usually in the
range of 10µS to 1µS.
 After this, the sampled value is hold until the arrival of next input signal to be sampled.
 The duration for holding the sample will be usually between few milliseconds to few
seconds.
 The following image shows a simple block diagram of a typical Sample and Hold Circuit

19. NEED FOR SAMPLE AND HOLD CIRCUITS
 If the input analog voltage of an ADC changes more than ±1/2 LSB,
then there is a severe chance that the output digital value is an error.
 For the ADC to produce accurate results, the input analog voltage
should be held constant for the duration of the conversion.
 As the name suggests, a S/H Circuit samples the input analog signal
based on a sampling command and holds the output value at its output
until the next sampling command is arrived.

20. EXPLANATION SAMPLE AND HOLD CIRCUITS

21. SIMPLE SAMPLE AND HOLD CIRCUITS
 The operating principle of a S/H Circuit with the help of a simplified
circuit diagram of sample and hold circuit consist of two basic
components:
 Analog Switch
 Holding Capacitor
 This circuit tracks the input analog signal until the sample command is
changed to hold command. After the hold command, the capacitor
holds the analog voltage during the analog to digital conversion.

22. ANALOG SWITCH IN SAMPLE AND HOLD CIRCUITS
 Any FET like JFET or MOSFET can be used as an Analog Switch.
 The Gate-Source voltage VGS is responsible for switching the JFET.
 When VGS is equal to 0V, the JFET acts as a closed switch as it operates in its Ohmic
region.
 When VGS is a large negative voltage (i.e. more negative than VGS(OFF)), the JFET acts as
an open switch as it is cut-off.
 The switch can be either a Shunt Switch or a Series Switch, depending on its position
with respect to input and output.
 The following image shows a JFET configured as both a Shunt Switch and as a Series
Switch.

23. TYPES OF SAMPLE AND HOLD CIRCUITS
 All the below mentioned circuits use JFET as the switch.
 During the sampling period, the JFET is turned ON and the charging in the holding
capacitor rises to the level of the input analog voltage.
 At the end of the sampling period, the JFET is turned OFF and the holding capacitor
is isolated from the input signal.
 This makes sure that the output voltage is held constant at the value of the input
voltage irrespective of minor changes in the input value.
 To compensate for the low drop-out voltage across the holding capacitor, two
buffers (voltage followers) are used, one at the input and one at the output.

24. TYPES OF SAMPLE AND HOLD CIRCUITS
 The following image shows an open-loop type S/H Circuit.
 As there is no feedback, this circuit is relatively faster than the coming circuits
(which all are in closed-loop configuration).
 But the feedback in the closed-loop architectures provide higher accuracy figures.
 The acquisition time (discussed in the next section) must be as low as possible.
 It is dependent on three factors:
 The RC time constant, where R is the ON Resistance of the JFET (Ron) and C is the holding
capacitor CH.
 Maximum output current
 Slew-rate of the Op-Amp

25. TYPES OF SAMPLE AND HOLD CIRCUITS
 A slightly improved circuit than the first one is presented in the next circuit. In this
configuration, the ON Resistance of the JFET is brought into the feedback loop and
hence, the acquisition time is dependent on the other two factors.

26. TYPES OF SAMPLE AND HOLD CIRCUITS
 The next circuit is further improved when compared to the previous circuit by
providing voltage gain. The voltage gain of the circuit can be calculated using
the input resistor R1 and the feedback resistor RF as follows:
A = 1 + (RF / R1)

27. TYPES OF SAMPLE AND HOLD CIRCUITS
 The final circuit offers additional advantages than the previous circuit.
 The important one is that the position of the holding capacitor is changed and
as a result, the voltage at non-inverting terminal of A2 is equal to the voltage
across the capacitor divided by the open-loop gain of A2.
 This ensure a faster charging time of the holding capacitor and subsequently a
shorter acquisition time.

28. PERFORMANCE PARAMETERS OF S&H CIRCUITS
 The performance of an S/H Circuit can be characterized by parameters
that are commonly used for an amplifier like Input Offset Voltage, Gain
Error, Non-linearity and so on.
 But there are a few characteristics that are specific to the S/H Circuits.
 These characteristics are helpful in analyzing its performance during
the transition from sampling mode to hold mode (and vice versa) and
also during hold mode operations.

29. PERFORMANCE PARAMETERS OF S&H CIRCUITS
Acquisition Time (tac):
 The time required for the charge in the holding capacitor to rise up to a
level that is close to the input voltage during the sampling is called
acquisition time. It is affected by three factors:
 The RC Time Constant
 The Slew-Rate of the Op-Amp
 The maximum output current of the Op-Amp

30. PERFORMANCE PARAMETERS OF S&H CIRCUITS
Aperture Time (tap)
 The time delay between the initiation of VO tracking the Vi and the
initiation of the hold command is called the Aperture Time. This delay
is usually due to the propagation delays through the driver and the
switch circuits.
 For a precise timing operation, the hold command must be initiated in
advance by an amount of aperture time.
Aperture Uncertainty (∆ tap)
 The Aperture time will not be the same for all the sample and will vary
from sample to sample. This uncertainty is called Aperture Uncertainty.
This will severely affect the advancing of the hold command.

31. PERFORMANCE PARAMETERS OF S&H CIRCUITS
Hold Mode Settling Time (ts)
 The hold mode settling time is the time taken by the output VO to settle within
the specified error band (usually 1%, 0.1% or 0.01%) after the application of
hold command.
Hold Step
 During the switching from sample mode to hold mode, there might an
unwanted transfer of charge between the switch and the holding capacitor
(mainly due to the parasitic capacitances). This will affect the capacitor voltage
as well as the output voltage. This change in the output voltage from the
desired voltage is called Hold Step.

32. PERFORMANCE PARAMETERS OF S&H CIRCUITS
Feedthrough
 Again, the parasitic capacitances in the switch may cause AC coupling between
VO and Vi in hold mode. As a result, the output voltage may vary with changes
in the input voltage and this is referred to as feedthrough.
Droop
 Voltage Droop is a phenomenon where the voltage across the holding capacitor
drops down due to leakage currents.

33. ADVANTAGES OF S&H CIRCUITS
Advantages of Sample and Hold Circuit
 The main and important advantage of a typical SH Circuit is to aid an
Analog to Digital Conversion process by holding the sampled analog
input voltage.
 In multichannel ADCs, where synchronization between different
channels is important, an SH circuit can help by sampling analog
signals from all the channels at the same time.
 In multiplexed circuits, the crosstalk can be reduced with an SH circuit.

34. APPLICATIONS OF S&H CIRCUITS
Applications of Sample and Hold Circuit
 Some of the important applications are mentioned below:
 Analog to Digital Converter Circuits (ADC)
 Digital Interface Circuits
 Operational Amplifiers
 Analog De-multiplexers
 Data distribution systems
 Storage of outputs of multiplexers
 Pulse Modulation Systems

35. QUANTIZATION
 Quantization, in mathematics and digital signal processing, is the
process of mapping input values from a large set (often a continuous
set) to output values in a (countable) smaller set, often with a finite
number of elements.
 Rounding and truncation are typical examples of quantization
processes.
 Quantization is involved to some degree in nearly all digital signal
processing, as the process of representing a signal in digital form
ordinarily involves rounding.
 Quantization also forms the core of essentially all lossy compression
algorithms.

36. QUANTIZATION – EXPLANATION
 The simplest way to quantize a signal is to choose the digital amplitude value
closest to the original analog amplitude.
 This example shows the original analog signal (green), the quantized signal
(black dots), the signal reconstructed from the quantized signal (yellow) and
the difference between the original signal and the reconstructed signal (red).
 The difference between the original signal and the reconstructed signal is the
quantization error and, in this simple quantization scheme, is a deterministic
function of the input signal.

37. PROCESS
 The following figure represents an analog signal.
 This signal to get converted into digital, has to undergo sampling and
quantizing.
 The quantizing of an analog signal is done by discretizing the signal
with a number of quantization levels. Quantization is representing the
sampled values of the amplitude by a finite set of levels, which means
converting a continuous-amplitude sample into a discrete-time signal.

38. PROCESS
 The following figure shows how an analog signal gets quantized. The
blue line represents analog signal while the brown one represents the
quantized signal.
 Both sampling and quantization result in the loss of information. The
quality of a Quantizer output depends upon the number of quantization
levels used.

39. PROCESS
 The discrete amplitudes of the quantized output are called as
representation levels or reconstruction levels. The spacing between the
two adjacent representation levels is called a quantum or step-size.
 The following figure shows the resultant quantized signal which is the
digital form for the given analog signal.
 This is also called as Stair-case waveform, in accordance with its
shape.

40. TYPES OF QUANTIZATION
 There are two types of Quantization - Uniform Quantization and Non-
uniform Quantization.
 The type of quantization in which the quantization levels are uniformly
spaced is termed as a Uniform Quantization.
 The type of quantization in which the quantization levels are unequal
and mostly the relation between them is logarithmic, is termed as a
Non-uniform Quantization.

41. UNIFORM QUANTIZATION
 There are two types of uniform quantization. They are Mid-Rise type
and Mid-Tread type.
 The following figures represent the two types of uniform quantization
 Figure 1 shows the mid-rise type and figure 2 shows the mid-tread type
of uniform quantization.

42. QUANTIZATION ERROR
 For any system, during its functioning, there is always a difference in
the values of its input and output.
 The processing of the system results in an error, which is the difference
of those values.
 The difference between an input value and its quantized value is called
a Quantization Error.
 A Quantizer is a logarithmic function that performs Quantization
rounding off the value.
 An analog-to-digital converter (ADC) works as a quantizer.

43. QUANTIZATION ERROR
 The following figure illustrates an example for a quantization error,
indicating the difference between the original signal and the quantized
signal.

44. QUANTIZATION NOISE
 It is a type of quantization error, which usually occurs in analog audio
signal, while quantizing it to digital.
 For example, in music, the signals keep changing continuously, where
regularity is not found in errors.
 Such errors create a wideband noise called as Quantization Noise