5. Shift Registers
A shift register is a group of FFs arranged so that the binary numbers stored in the FFs are
shifted from one FF to the next for every clock pulse.
Several types:
–Serial In/Serial Out
–Serial In/Parallel Out
–Parallel In/Parallel Out
–Parallel In/Serial Out
Serial in/shift right/serial out Serial in/shift left/serial out Parallel in/serial out
Parallel in/parallel outSerial in/parallel out Rotate right Rotate left
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7. Serial In/Serial Out Shift Registers
A serial in/serial out shift register will have data loaded into it one bit at a
Time.
Example, The 74HC166 (and also the 74ALS166) can be used as a serial-in/serial-
out register. It is an eight-bit shift register.
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9. Serial In/Parallel Out Registers
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has a single data input and some number of parallel data outputs, as shown below.
10. Conversion of serial data to parallel form.
For example, assume the binary number 1011 is loaded sequentially, one bit
at each clock pulse.
C
FF0
CLK
C
FF1
C
FF2
D0 D1 D2
Serial
data
input
C
FF3
D3Q0 Q1 Q2 Q3
1
C
FF0
CLK
C
FF1
C
FF2
D0 D1 D2
Serial
data
input
C
FF3
D3Q0 Q1 Q2 Q3
0 1
C
FF0
CLK
C
FF1
C
FF2
D0 D1 D2
Serial
data
input
C
FF3
D3Q0 Q1 Q2 Q3
1 0 1
C
FF0
CLK
C
FF1
C
FF2
D0 D1 D2
Serial
data
input
C
FF3
D3Q0 Q1 Q2 Q3
1 1 0 1
C
FF0
CLK
C
FF1
C
FF2
D0 D1 D2
Serial
data
input
C
FF3
D3Q0 Q1 Q2 Q3
1X 1 0 1
C
FF0
CLK
C
FF1
C
FF2
D0 D1 D2
Serial
data
input
C
FF3
D3Q0 Q1 Q2 Q3
1X 1 0 1
CLKCLKCLKCLK
After 4 clock pulses, the data is available at the parallel output.
Shift Register Applications
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11. Example: the 74ALS164 is an eight-bit serial in/parallel out shift register
with each FF output externally accessible.
2^n = 8
n = 3
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14. Shift Register Applications
Delay a digital signal
Shift registers can be used to delay a digital signal by a predetermined amount.
Q7
Q7
A
B
Data out
CLK
40 MHz
Data in
CLK
Data in
Data out
td
C
SRG 8
EXAMPLE:
An 8-bit serial in/serial out shift register has a 40 MHz clock. What is the total delay through
the register?
The delay for each clock is
1/40 MHz = 25 ns
The total delay is 8 x
25 ns = 200 ns
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16. - An 8-bit serial in/serial out shift register has a 60 MHz clock.
What is the total delay through the register?
The delay for each clock is
1/60 MHz = 10 ns.
The total delay is 8 x
10 ns = 80 ns
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