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Gilbert Multiplier Cell
Linear Integrated Circuits
Mr.R.Gowrishankar
GILBERT MULTIPLIER CELL
 The Gilbert multiplier cell is a modification of the emitter coupled
cell and this allows four – quadrant multiplication.
 Therefore, it forms the basis of most of the integrated circuit
balanced Multipliers.
 Two cross- coupled emitter- coupled pairs in series connection
with an emitter coupled pair form the structure of the Gilbert
multiplier cell.
GILBERT MULTIPLIER CELL
 Circuit diagram:
Derivation of Gilbert multiplier cell
The collector current of Q3 and Q4 are given by
Similarly, the collector current of Q5 and Q6 are given by
Collector current IC1 and IC2 of transistors Q1 and Q2 can be
expressed as
GILBERT MULTIPLIER CELL
Substituting the above equation in IC3 and IC4, we get
Similarly substituting Ic2= in Ic5 and IC6 , we get,
GILBERT MULTIPLIER CELL
The differential output current I is given by,
∆I =IL1 - IL2
= (IC3 +IC5) - ( IC4+IC6)
=IC3 - IC6)-(IC4 - IC5)
∆I =IEE tanh( V1/2VT) tanh(V2/2VT)
GILBERT MULTIPLIER CELL
There is little difference between the Jones cell and the
translinear multiplier in this topology. In both forms, two
differential amplifier stages are formed by emitter-coupled
transistor pairs (Q1/Q4, Q3/Q5) whose outputs are connected
(currents summed) with opposite phases. The emitter junctions
of these amplifier stages are fed by the collectors of a third
differential pair (Q2/Q6).
GILBERT MULTIPLIER CELL
The output currents of Q2/Q6 become emitter currents for the
differential amplifiers. Simplified, the output current of an
individual transistor is given by ic = gm vbe. Its
transconductance gm is (at T = 300 K) about gm = 40 IC.
Combining these equations gives ic = 40 IC vbe,lo. However, IC
here is given by vbe,rf gm,rf. Hence ic = 40 vbe,lo vbe,rf gm,rf,
which is a multiplication of vbe,lo and vbe,rf. Combining the two
different stages output currents yields four-quadrant operation.
GILBERT MULTIPLIER CELL
 However, in the cells invented by Gilbert, shown in these
figures,[clarification needed] there are two additional diodes.
This is a crucial difference because they generate the logarithm
of the associated differential (X) input current so that the
exponential characteristics of the following transistors result in
an ideally perfect multiplication of these input currents with the
remaining pair of (Y) currents. This additional diode cell
topology is typically used when a low distortion voltage-
controlled amplifier (VCA) is required.
GILBERT MULTIPLIER CELL
 This topology is rarely used in RF mixer/modulator applications
for various reasons, one being that the linearity advantage of
the top linearized cascode is minimal due to the near-square
wave drive signals to these bases. The drive is less likely to be
a fast-edge squarewave at very high frequencies when there
may be some advantage in the linearization.
 Nowadays, functionally similar circuits can be constructed using
CMOS or BiCMOS cells.
Presented by
Mr.R.Gowrishankar

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LIC Gowrishankar (Gilbert multiplier cell) (1).pptx

  • 1. Gilbert Multiplier Cell Linear Integrated Circuits Mr.R.Gowrishankar
  • 2. GILBERT MULTIPLIER CELL  The Gilbert multiplier cell is a modification of the emitter coupled cell and this allows four – quadrant multiplication.  Therefore, it forms the basis of most of the integrated circuit balanced Multipliers.  Two cross- coupled emitter- coupled pairs in series connection with an emitter coupled pair form the structure of the Gilbert multiplier cell.
  • 3. GILBERT MULTIPLIER CELL  Circuit diagram:
  • 4. Derivation of Gilbert multiplier cell The collector current of Q3 and Q4 are given by Similarly, the collector current of Q5 and Q6 are given by Collector current IC1 and IC2 of transistors Q1 and Q2 can be expressed as
  • 5. GILBERT MULTIPLIER CELL Substituting the above equation in IC3 and IC4, we get Similarly substituting Ic2= in Ic5 and IC6 , we get,
  • 6. GILBERT MULTIPLIER CELL The differential output current I is given by, ∆I =IL1 - IL2 = (IC3 +IC5) - ( IC4+IC6) =IC3 - IC6)-(IC4 - IC5) ∆I =IEE tanh( V1/2VT) tanh(V2/2VT)
  • 7. GILBERT MULTIPLIER CELL There is little difference between the Jones cell and the translinear multiplier in this topology. In both forms, two differential amplifier stages are formed by emitter-coupled transistor pairs (Q1/Q4, Q3/Q5) whose outputs are connected (currents summed) with opposite phases. The emitter junctions of these amplifier stages are fed by the collectors of a third differential pair (Q2/Q6).
  • 8. GILBERT MULTIPLIER CELL The output currents of Q2/Q6 become emitter currents for the differential amplifiers. Simplified, the output current of an individual transistor is given by ic = gm vbe. Its transconductance gm is (at T = 300 K) about gm = 40 IC. Combining these equations gives ic = 40 IC vbe,lo. However, IC here is given by vbe,rf gm,rf. Hence ic = 40 vbe,lo vbe,rf gm,rf, which is a multiplication of vbe,lo and vbe,rf. Combining the two different stages output currents yields four-quadrant operation.
  • 9. GILBERT MULTIPLIER CELL  However, in the cells invented by Gilbert, shown in these figures,[clarification needed] there are two additional diodes. This is a crucial difference because they generate the logarithm of the associated differential (X) input current so that the exponential characteristics of the following transistors result in an ideally perfect multiplication of these input currents with the remaining pair of (Y) currents. This additional diode cell topology is typically used when a low distortion voltage- controlled amplifier (VCA) is required.
  • 10. GILBERT MULTIPLIER CELL  This topology is rarely used in RF mixer/modulator applications for various reasons, one being that the linearity advantage of the top linearized cascode is minimal due to the near-square wave drive signals to these bases. The drive is less likely to be a fast-edge squarewave at very high frequencies when there may be some advantage in the linearization.  Nowadays, functionally similar circuits can be constructed using CMOS or BiCMOS cells.