2. 2
Basic Concept…
It is a design made to compensate for the relatively slow speed of dynamic random-access memory (DRAM) or core memory, by
spreading memory addresses evenly across memory banks.
10. 10
High Order Interleaving
• High Order Interleaving uses the high order bits as the
module address and the lower bits as the
word address within each module.
• In this arrangement, the consecutive words are usually
in one module, having multiple modules is
not helpful if consecutive words are needed.
12. 12
Modules can be accessed independently
by different units, e.g. by the CPU and a
Hard Disk (or a second CPU) AND the
units use different Modules
=> Parallel operation => Higher Performance