3.a novel realization of reversible lfsr for its application in cryptography

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A Novel Realization of Reversible LFSR for its Application in
Cryptography
Abstract:
One-to-one mapping from input to output is thenecessary condition for a reversible
computational modeltransiting from one state of abstract machine to another. Probably, the
biggest motivation to study reversibletechnologies is that, it is considered to be the best effective
wayto enhance the energy efficiency than the conventional models.The research on reversibility
has shown greater impact to haveenormous applications in emerging technologies such
asQuantum Computing, QCA, Nanotechnology and Low PowerVLSI. In this paper, we have
realized novel reversiblearchitecture of Linear Feedback Shift Register (LFSR) andParallel
Signature Analyzer (PSA) and have explored these interms of delay, quantum cost and garbage.
While approachingfor LFSR, we have shown new reversible realization of SerialInput Serial
Output (SISO) and Serial Input Parallel Output(SIPO) registers up to N-bit and analyzed their
delay, quantumcost & garbage in terms of some lemmas, which willoutperform the existing
designs available in literature.
Existing Method:
The recent works focus on optimizing thereversible sequential designs in terms of number
ofreversible gates and garbage outputs. thebiggest motivation to study reversibletechnologies is
that, it is considered to be the best effective wayto enhance the energy efficiency than the
conventional models.The research on reversibility has shown greater impact to haveenormous
applications in emerging technologies such asQuantum Computing, QCA, Nanotechnology and
Low Power VLSI.
ProposedMethod:

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In this paper, we are presenting reversiblerealization of two shift registers naming Serial-in
Serial-outand Serial-in Parallel-out for their application in designingsequence pulse generator.
We will also present novelreversible architecture of Linear Feedback Shift Register(LFSR) and
Parallel Signal Analyzer (PSA). In computing,the input bit of LFSR is a linear function of its last
state.The starting value of the LFSR is termed seed, and due tothe deterministic operation of the
register, the bit streamproduced is completely determined by its current (or previous) state.The
shift registers arethe most exhaustively used functional devices in digitalsystem design for
multiple bits storing & shifting of thesame if required.
Applications:
1. Nanotechnology
2. Quantum Computing
3. Low Power VLSI
Advantages:
Delay,quantumcost & garbage
System Configuration:-
In the hardware part a normal computer where Xilinx ISE 14.3 software can be easily
operated is required, i.e., with a minimum system configuration
HARDWARE REQUIREMENT
Processor - Pentium –III
Speed - 1.1 GHz

3. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457
RAM - 1 GB (min)
Hard Disk - 40 GB
Floppy Drive - 1.44 MB
Key Board - Standard Windows Keyboard
Mouse - Two or Three Button Mouse
Monitor - SVGA
SOFTWARE REQUIREMENTS
 Operating System :Windows95/98/2000/XP/Windows7
 Front End : Modelsim 6.3 for Debugging and Xilinx 14.3 for
Synthesis and Hard Ware Implementation
 This software’s where Verilog source code can be used for design
implementation.

4. Head office: 3nd floor, Krishna Reddy Buildings, OPP: ICICI ATM, Ramalingapuram, Nellore
www.pvrtechnology.com, E-Mail: pvrieeeprojects@gmail.com, Ph: 81432 71457