A low cost low-power ring oscillator-based truly random number generator for encryption on smart cards

CONTACT: PRAVEEN KUMAR. L (,+91 – 9791938249)
MAIL ID: sunsid1989@gmail.com, praveen@nexgenproject.com
Web: www.nexgenproject.com, www.finalyear-ieeeprojects.com
A LOW-COST LOW-POWER RING OSCILLATOR-BASED TRULY
RANDOM NUMBER GENERATOR FOR ENCRYPTION ON SMART
CARDS
Abstract:
The design of a low-cost low-power ring oscillator- based truly random
number generator (TRNG) macro cell, which is suitable to be integrated in
smart cards, is presented. The oscillator sampling technique is exploited, and a
tetrahedral oscillator with large jitter has been employed to realize the TRNG.
Techniques to improvethe statistical quality of the ring oscillator based TRNGs’
bit sequences have been presented and verified by simulation and
measurement. A post digital processor is added to further enhance the
randomness of the output bits. Fabricated in the HHNEC 0.13-μm standard
CMOS process, the proposed TRNG has an area as low as 0.005 mm2. Powered
by a single 1.8-V supply voltage, the TRNG has a power consumption of 40 μW.
The bit rate of the TRNG after post processing is 100 kb/s. The proposed TRNG
has been made into an IP and successfully applied in an SD card for encryption
application. The proposed TRNG has passed the National Institute of Standards
and Technology tests and Diehard tests.
Existing System:

The extremely rapid development of integrated circuits, smart cards have been
widely used in electronic financial transactions, identification, and wireless
communication systems. The extending use of smart cards such as SD cards
has raised demanding security issues to fulfil the requirements for secrecy of
information. The security of the smart cards relies on the generation of
unpredictable and irreproducible digital key streams using a nondeterministic
random number generator.Therefore, a high-quality truly random number
generator (TRNG) plays a fundamental role for the encryption of the smart
cards. Thermal and shot noises of devices are random sources used to
generate truly random numbers. A high-speed oscillator based truly random
number source for cryptographic applications on a smart card IC is presented.
An oscillator feedback loop is used as an offset compensation for the noise
amplifier to guarantee equal probabilities of 0 and 1 s in output bit streams.
The bit rate of the TRNG is as high as 10 Mb/s. However, the power
consumption is also as high as 2.3 mW. An ultralow-power TRNG for anti-
collision purposes in passiveultrahigh-frequency radio-frequency identification
(RFID) tags is proposed. The TRNG generates random number by sampling the
900-MHz input signal with a local 320-kHz jittery clock. The power
consumption is as low as 0.55 μW due to the reuse of the 900-MHz input
signal. However, the statistical performance of the TRNG’s output bits is
sensitive to the latch’s input offset voltage caused by process variation. In
addition, the TRNG generates only 3-bit random numbers, limiting the

randomness of the output bits. A low-voltage low-power TRNG for Gen2 RFID
tag is presented in [11]. The minimum supply voltage of the TRNG is 0.8 V, and
the power consumption is 1.04 μW, but the pass rate of the TRNG is only
86.1% for the poker test.
Proposed System:
The architecture of the proposed TRNG, which consists of two oscillators
named OSC1 and OSC2, a low-power XOR gate, and a D flip-flop. The outputs
of OSC1 and OSC2 are combined by the XOR operation to yield Seed, a random
sequence of higher statistical quality. The center frequencies of OSC1 and
OSC2 are 80.3 and 50.4MHz, respectively, so that the frequencies of Seed are
not integer multiple of half the clock frequency. The XOR operation is
preferred owning to the even probabilities of 0 and 1 s for Seed. Then, Seed is
sampled by a 6.4-MHz system clock using the D flip flop. A post digital
processor is added to further improve the randomness of the output random
numbers. Typically, a TRNG consists of a random seed generator and a post
digital processor, which produces the final output. An important objective of
the post digital processor is to provide robustness of the statistical properties
of the TRNG output sequence. The scheme of our post digital processor is
shown in Fig. 6. The proposed post digital processor is realized by a 64-bit
linear feedback shift register and four nonlinear combined functions, which

can improve the unpredictability and decorrelation of output random
sequence.
Conclusion:
A low-cost low-power ring oscillator-based TRNG has been designed and
implemented in this brief. A tetrahedral oscillator with large jitter has been
employed to realize the TRNG. Measures to enhance the randomness of the
ring oscillator based TRNG have been analyzed based on phase noise models
and verified by simulation. The proposed TRNG as an IP core has been applied
in an SD card successfully. Fabricated in the HHNEC 0.13-μm standard CMOS
process, the proposed TRNG has an area as low as 0.005 mm2. Powered by a
single 1.8-V supply voltage, the power consumption is 40 μW. The bit rate of
the proposed TRNG after post processing in the SD card is 100 kb/s. The
random sequences from the TRNG have passed the NIST and Diehard tests,
which indicates that the randomness of the proposed TRNG is good.
REFERENCES:
[1] A. Vassilev and T. A. Hall, “The importance of entropy to information
security,” Computer, vol. 47, no. 2, pp. 78–81, Feb. 2014.
[2] B. Jun and P. Kocher, “The Intel RNG,” White Paper, 1999 [Online].
Available: http://www.cryptography.com/intelRNG.pdf.

[3] S. V. Suresh andW. P. Burleson, “Entropy and energy bounds for
metastability based TRNG with lightweight post-processing,” IEEE Trans.
Circuits Syst. I, Reg. Papers, vol. 62, no. 7, pp. 1785–1793, Jul. 2015.
[4] Ü. Güler and S. Ergün, “A high speed, fully digital IC random number
generator,” AEU—Int. J. Electron. Commun., vol. 66, no. 2, pp. 143–149, Feb.
2012.
[5] S. Mathew et al., “2.4 Gbps, 7 mW all-digital PVT-variation tolerant true
random number generator for 45 nm CMOS high-performance
microprocessors,” IEEE J. Solid-State Circuits, vol. 47, no. 11, pp. 2807–2821,
Nov. 2012.
[6] K. Yang et al., “A 23 Mb/s 23 pJ/b fully synthesized true-random-number
generator in 28 nm and 65 nm CMOS,” in Proc. IEEE Int. Solid-State Circuits
Conf., 2014, vol. 16, pp. 280–283.
[7] M. Bucci, L. Germani, R. Luzzi, A. Trifiletti, and M. Varanonuovo, “A high-
speed oscillator-based truly random number source for cryptographic
applications on a smart card IC,” IEEE Trans. Comput., vol. 52, no. 4, pp. 403–
409, Apr. 2003.
[8] R. Stewart, B. Leung, and G. Gong, “Truly random number generator based
on ring oscillator utilizing last passage time,” IEEE Trans. Circuits Syst. II, Exp.
Briefs, vol. 61, no. 12, pp. 937–941, Dec. 2014.

[9] D. Lubicz and N. Bochard, “Towards an oscillator based TRNG with a
certified entropy rate,” IEEE Trans. Comput., vol. 64, no. 4, pp. 1191–1200, Apr.
2015.
[10] G. K. Balachandran and R. E. Barnett, “A 440-nA true random number
generator for passive RFID tags,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol.
55, no. 11, pp. 3723–3732, Dec. 2008.

A low cost low-power ring oscillator-based truly random number generator for encryption on smart cards

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A low cost low-power ring oscillator-based truly random number generator for encryption on smart cards